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| author | Andreas Färber <afaerber@suse.de> | 2017-08-06 04:44:59 +0200 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2019-10-29 05:27:41 +0100 |
| commit | 02f4597e7ebe73f43fb4a2800d50e985a8bf8f08 (patch) | |
| tree | 9057cf4a2fe57741793769616116795f50c2cef7 | |
| parent | fd5f8d0a99b942fabd7c89fc2d822e91132b76a3 (diff) | |
| download | linux-realtek-v5.5/dt64.tar.gz | |
arm64: dts: realtek: Add RTD129x UART resetsrealtek-arm64-dt-for-5.5v5.5/dt64
Associate the UART nodes with the corresponding reset controller bits.
Signed-off-by: Andreas Färber <afaerber@suse.de>
| -rw-r--r-- | arch/arm64/boot/dts/realtek/rtd129x.dtsi | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/realtek/rtd129x.dtsi b/arch/arm64/boot/dts/realtek/rtd129x.dtsi index 282ab8bfaad156..4433114476f548 100644 --- a/arch/arm64/boot/dts/realtek/rtd129x.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd129x.dtsi @@ -12,6 +12,7 @@ /memreserve/ 0x0000000001ffe000 0x0000000000004000; #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/reset/realtek,rtd1295.h> / { interrupt-parent = <&gic>; @@ -79,6 +80,7 @@ reg-shift = <2>; reg-io-width = <4>; clock-frequency = <27000000>; + resets = <&iso_reset RTD1295_ISO_RSTN_UR0>; status = "disabled"; }; @@ -88,6 +90,7 @@ reg-shift = <2>; reg-io-width = <4>; clock-frequency = <432000000>; + resets = <&reset2 RTD1295_RSTN_UR1>; status = "disabled"; }; @@ -97,6 +100,7 @@ reg-shift = <2>; reg-io-width = <4>; clock-frequency = <432000000>; + resets = <&reset2 RTD1295_RSTN_UR2>; status = "disabled"; }; |