POST: Reorganize post entry and "preinit" functions.

Unlocking ram in handle_post() is tricky and only needed under qemu.
Separate out that logic from the coreboot/xen paths by invoking
handle_elf_post separately.  This simplifies both the qemu and
non-qemu code paths.

Also, organize all the "pre-init" functions into one section of the
file.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>

3 files changed, 47 insertions, 39 deletions

diff --git a/src/pmm.c b/src/pmm.c
index b3aa527..a7d0608 100644
--- a/src/pmm.c
+++ b/src/pmm.c
@@ -222,6 +222,14 @@ malloc_preinit(void)
     ASSERT32FLAT();
     dprintf(3, "malloc setup\n");
 
+    dprintf(1, "Ram Size=0x%08x (0x%016llx high)\n", RamSize, RamSizeOver4G);
+
+    // Don't declare any memory between 0xa0000 and 0x100000
+    add_e820(BUILD_LOWRAM_END, BUILD_BIOS_ADDR-BUILD_LOWRAM_END, E820_HOLE);
+
+    // Mark known areas as reserved.
+    add_e820(BUILD_BIOS_ADDR, BUILD_BIOS_SIZE, E820_RESERVED);
+
     // Populate temp high ram
     u32 highram = 0;
     int i;
diff --git a/src/post.c b/src/post.c
index e772384..ae5e923 100644
--- a/src/post.c
+++ b/src/post.c
@@ -29,30 +29,10 @@
 
 
 /****************************************************************
- * BIOS init
+ * BIOS initialization and hardware setup
  ****************************************************************/
 
 static void
-ramsize_preinit(void)
-{
-    dprintf(3, "Find memory size\n");
-    if (CONFIG_COREBOOT)
-        coreboot_preinit();
-    else if (usingXen())
-        xen_ramsize_preinit();
-    else
-        qemu_ramsize_preinit();
-
-    // Don't declare any memory between 0xa0000 and 0x100000
-    add_e820(BUILD_LOWRAM_END, BUILD_BIOS_ADDR-BUILD_LOWRAM_END, E820_HOLE);
-
-    // Mark known areas as reserved.
-    add_e820(BUILD_BIOS_ADDR, BUILD_BIOS_SIZE, E820_RESERVED);
-
-    dprintf(1, "Ram Size=0x%08x (0x%016llx high)\n", RamSize, RamSizeOver4G);
-}
-
-static void
 ivt_init(void)
 {
     dprintf(3, "init ivt\n");
@@ -321,41 +301,61 @@ reloc_preinit(void *f, void *arg)
     func(arg);
 }
 
-// Setup for code relocation and then call reloc_init
+// Setup for code relocation and then relocate.
 void VISIBLE32INIT
 dopost(void)
 {
+    // Set reboot flags.
     HaveRunPost = 1;
+    outb_cmos(0, CMOS_RESET_CODE);
+
+    // Enable CPU caching
+    setcr0(getcr0() & ~(CR0_CD|CR0_NW));
+
+    // Make sure legacy DMA isn't running.
+    dma_preinit();
+
+    // Check if we are running under Xen.
+    xen_preinit();
 
     // Detect ram and setup internal malloc.
     qemu_cfg_preinit();
-    ramsize_preinit();
+    if (CONFIG_COREBOOT)
+        coreboot_preinit();
+    else if (usingXen())
+        xen_ramsize_preinit();
+    else
+        qemu_ramsize_preinit();
     malloc_preinit();
 
     // Relocate initialization code and call maininit().
     reloc_preinit(maininit, NULL);
 }
 
-// Entry point for Power On Self Test (POST) - the BIOS initilization
-// phase.  This function makes the memory at 0xc0000-0xfffff
-// read/writable and then calls dopost().
-void VISIBLE32FLAT
-handle_post(void)
+// Startup debug output and display software version.
+static void
+debug_splash(void)
 {
     debug_serial_preinit();
     dprintf(1, "Start bios (version %s)\n", VERSION);
+}
 
-    // Enable CPU caching
-    setcr0(getcr0() & ~(CR0_CD|CR0_NW));
-
-    // Clear CMOS reboot flag.
-    outb_cmos(0, CMOS_RESET_CODE);
-
-    // Make sure legacy DMA isn't running.
-    dma_preinit();
+// Entry point for Power On Self Test (POST) when running under
+// xen/coreboot.
+void VISIBLE32INIT
+handle_elf(void)
+{
+    debug_splash();
+    dopost();
+}
 
-    // Check if we are running under Xen.
-    xen_preinit();
+// Entry point for Power On Self Test (POST) when running under
+// qemu/kvm/bochs.  Under qemu the memory at 0xc0000-0xfffff may be
+// read-only, so unlock the ram as the first step of booting.
+void VISIBLE32FLAT
+handle_post(void)
+{
+    debug_splash();
 
     // Allow writes to modify bios area (0xf0000)
     make_bios_writable();
diff --git a/src/romlayout.S b/src/romlayout.S
index cbe6b1c..a351091 100644
--- a/src/romlayout.S
+++ b/src/romlayout.S
@@ -380,7 +380,7 @@ entry_elf:
         movw %ax, %gs
         movw %ax, %ss
         movl $BUILD_STACK_ADDR, %esp
-        ljmpl $SEG32_MODE32_CS, $_cfunc32flat_handle_post
+        ljmpl $SEG32_MODE32_CS, $_cfunc32flat_handle_elf
 
         .code16gcc