d8bffff2016f ("cxl/port: Remove Component Register base address from struct cxl_dport")
0619337856c9 ("cxl/rch: Prepare for caching the MMIO mapped PCIe AER capability")
eb4663b07e13 ("cxl/acpi: Probe RCRB later during RCH downstream port creation")
59c3368b2e69 ("cxl/port: Export cxl_dvsec_rr_decode() to cxl_port")
1acba6e9206c ("cxl/pci: Break out range register decoding from cxl_hdm_decode_init()")
d3cdf4585f2f ("cxl/acpi: Warn about an invalid CHBCR in an existing CHBS entry")
397cd265815e ("cxl/regs: Fix sparse warning")
0a19bfc8de93 ("cxl/port: Add RCD endpoint port enumeration")
7592d935b7ae ("cxl/mem: Move devm_cxl_add_endpoint() from cxl_core to cxl_mem")
d5b1a27143cb ("cxl/acpi: Extract component registers of restricted hosts from RCRB")
1dedb6f3cf7f ("cxl/ACPI: Register CXL host ports by bridge device")
f17b558d6663 ("cxl/pmem: Refactor nvdimm device registration, delete the workqueue")
16d53cb0d690 ("cxl/region: Drop redundant pmem region release handling")
b51d76752120 ("cxl/acpi: Improve debug messages in cxl_acpi_probe()")
58eef878fcd1 ("cxl: Unify debug messages when calling devm_cxl_add_dport()")
f3cd264c4ec1 ("cxl: Unify debug messages when calling devm_cxl_add_port()")
fa89248e669d ("cxl/core: Remove duplicate declaration of devm_cxl_iomap_block()")