a3431650f30a ("drm/i915/mtl: Support HBR3 rate with C10 phy and eDP in MTL")
62618c7f117e ("drm/i915/mtl: C20 PLL programming")
27ac123b4544 ("drm/i915/dp_mst: Fix active port PLL selection for secondary MST streams")
51390cc0e00a ("drm/i915/mtl: Add Support for C10 PHY message bus and pll programming")
a42e65f33c38 ("drm/i915/mtl: Create separate reg file for PICA registers")
7cb3eb334b8c ("drm/i915/mtl: Add DP rates")
57b5482bff9e ("drm/i915: Introduce intel_csc_matrix struct")
0f752b2178c9 ("drm/i915: Remove the encoder update_prepare()/complete() hooks")
c5879999641f ("drm/i915/tc: Move the intel_tc_port struct declaration to intel_tc.c")
3eafcddf766b ("drm/i915/tc: Move TC port fields to a new intel_tc_port struct")
39feb7b16b10 ("drm/i915/tc: Use the tc_phy prefix for all TC PHY functions")
89b154091ab4 ("drm/i915/tc: Rename tc_phy_status_complete() to tc_phy_is_ready()")
359d36e67da9 ("drm/i915/tc: Use the adlp prefix for ADLP TC PHY functions")
a33c8f71d3d8 ("drm/i915/tc: Group the TC PHY setup/query functions per platform")
10d29bdceef7 ("drm/i915/tc: Check the PLL type used by an enabled TC port")
2a4d292f056b ("drm/i915/tc: Factor out a function querying active links on a TC port")
40a55b842bbc ("drm/i915/tc: Assume a TC port is legacy if VBT says the port has HDMI")
a8b4114d1125 ("drm/i915/tc: Make the TC mode readout consistent in all PHY states")
2983b869881b ("drm/i915/tc: Fix initial TC mode on disabled legacy ports")
c173a91b7608 ("drm/i915/tc: Fix TC mode for a legacy port if the PHY is not ready")