6a0dbcd20ef2 ("drm/msm/a6xx: set highest_bank_bit to 13 for a610")
8814455a0e54 ("drm/msm: Refactor UBWC config setting")
07e6de738aa6 ("drm/msm/a690: Fix reg values for a690")
1f8c29e80066 ("drm/msm/a6xx: Add A740 support")
9588d2f860a4 ("drm/msm/a6xx: Add A730 support")
af66706accdf ("drm/msm/a6xx: Add skeleton A7xx support")
5e46ad83db10 ("drm/msm/a6xx: Ensure clean GMU state in a6xx_gmu_fw_start")
90b593ce1c9e ("drm/msm/adreno: Switch to chip-id for identifying GPU")
47bd37f948a4 ("drm/msm/adreno: Move adreno info to config")
8825f5969267 ("drm/msm/adreno: Add helper for formating chip-id")
67133dc08696 ("drm/msm/adreno: Add adreno family")
75a5227c0d1d ("drm/msm/adreno: Bring the a630 family together")
c928a05e4415 ("drm/msm/adreno: Move speedbin mapping to device table")
f30a648d8748 ("drm/msm/adreno: Allow SoC specific gpu device table entries")
155668ef412f ("drm/msm/adreno: Use quirk to identify cached-coherent support")
459f9e26e7d4 ("drm/msm/adreno: Use quirk identify hw_apriv")
f4f1c707817d ("drm/msm/adreno: Remove redundant revn param")
6391030df062 ("drm/msm/adreno: Remove redundant gmem size param")
832ee64debdd ("drm/msm/adreno: Remove GPU name")
317ab1b90e59 ("drm/msm/a690: Remove revn and name")