f8c3e0e3f31b ("clk: mediatek: mt2712: Compress clock arrays entries to 90 columns")
67798a5bf22d ("clk: mediatek: mt2712: Migrate topckgen/mcucfg to mtk_clk_simple_probe()")
0f69a423c458 ("clk: mediatek: Switch to mtk_clk_simple_probe() where possible")
01a6c1ab57c3 ("clk: mediatek: clk-mtk: Propagate struct device for composites")
20498d52c9c1 ("clk: mediatek: clk-gate: Propagate struct device with mtk_clk_register_gates()")
fdc325c8f79c ("clk: mediatek: mt8192: Propagate struct device for gate clocks")
0cbe12694990 ("clk: mediatek: mt8192: Correctly unregister and free clocks on failure")
d46adccb7966 ("clk: mediatek: add driver for MT8365 SoC")
116151bd95d5 ("clk: mediatek: clk-mt8192: Add clock mux notifier for mfg_pll_sel")
9ec105db6d13 ("clk: mediatek: Use mtk_clk_register_gates_with_dev in simple probe")
5066c9acf565 ("clk: mediatek: gate: Export mtk_clk_register_gates_with_dev")
0d363282bb0c ("clk: mediatek: Add MediaTek Helio X10 MT6795 clock drivers")
a0bc8ae5a0d7 ("clk: mediatek: reset: Add infra_ao reset support for MT8192/MT8195")
761bc64003e3 ("clk: mediatek: reset: Add new register reset function with device")
723e367114de ("clk: mediatek: reset: Support nonsequence base offsets of reset registers")
2d2a2900588c ("clk: mediatek: reset: Revise structure to control reset register")
370bf6286969 ("clk: mediatek: reset: Merge and revise reset register function")
114257572a0e ("clk: mediatek: reset: Extract common drivers to update function")
086bcb50b435 ("clk: mediatek: reset: Refine and reorder functions in reset.c")
edabcf71d100 ("clk: mediatek: reset: Fix written reset bit offset")