bf36b52e781d ("drm/amdgpu: Avoid accessing HW when suspending SW state")
c9a6b82f45e2 ("drm/amdgpu: Implement DPC recovery")
81202807ae60 ("drm/amdgpu: block ring buffer access during GPU recovery")
5436ab94cd94 ("drm/amdkfd: fix set kfd node ras properties value")
aac891685da6 ("drm/amdgpu: refine message print for devices of hive")
53b3f8f40e6c ("drm/amdgpu: refine codes to avoid reentering GPU recovery")
f1403342ebdf ("drm/amdgpu: revert "fix system hang issue during GPU reset"")
72e14ebf9fc0 ("drm/amdgpu: annotate a false positive recursive locking")
94561899ddb0 ("drm/amdgpu: unlock mutex on error")
25c933b1c4fc ("drm/amd/powerplay: add new sysfs interface for retrieving gpu metrics(V2)")
0ad7a64d69cd ("drm/amdgpu: enable RAS support for sienna cichlid")
81b41ff5d287 ("drm/amd/powerplay: revise the outputs layout of amdgpu_pm_info debugfs")
df9c8d1aa278 ("drm/amdgpu: fix system hang issue during GPU reset")
66c868282f91 ("drm/amd/powerplay: move SMC message issuing APIs to smu_cmn.c")
c1b353b7eac5 ("drm/amd/powerplay: update the tables init related")
caad2613dc4b ("drm/amd/powerplay: move table setting common code to smu_cmn.c")
e7a95eea2250 ("drm/amd/powerplay: maximum code sharing around watermarks setting")
a7bae0619903 ("drm/amd/powerplay: move more APIs to smu_cmn.c")
af5ba6d21a70 ("drm/amd/powerplay: common API for disabling all features with exception")
7dbf78051f75 ("drm/amd/powerplay: move ppfeature mask setting to smu_cmn.c")
28251d726b2b ("drm/amd/powerplay: implement smu_cmn_get_enabled_mask() for all ASICs")
b4bb3aaf04af ("drm/amd/powerplay: move dpm feature enablement checking to smu_cmn.c")
4d942ae349bb ("drm/amd/powerplay: move dpm feature support checking to smu_cmn.c")
d23c3ccc2176 ("drm/amd/powerplay: move clock dpm enablement check to smu_v11/v12")
8264ee69f0d8 ("drm/amd/powerplay: drop unused code")
6c339f37f1cd ("drm/amd/powerplay: unify swSMU index to asic specific index mapping")
443c7f3c3641 ("drm/amdgpu: add read amdgpu_gfxoff status in debugfs")
d51dc6132795 ("drm/amd/powerplay: set VCN1 pg only for sienna_cichlid")
3cd7e415aea4 ("drm/amd/powerplay: drop unused code around thermal range setting")
1e1964b777ce ("drm/amd/powerplay: maximum the code sharing on thermal irq setting")
0540ecedcba9 ("drm/amd/powerplay: sort the call flow on temperature ranges retrieving")
2b1f12a2da04 ("drm/amd/powerplay: correct Sienna Cichlid temperature limit settings")
cbf3f132fe5d ("drm/amd/powerplay: correct Navi1X temperature limit settings")
778f8e6afea6 ("drm/amd/powerplay: drop unnecessary wrapper around pcie parameters setting")
42f75c849f17 ("drm/amd/powerplay: drop unused APIs and parameters")
982d68b09358 ("drm/amd/powerplay: drop smu_v12_0.c unnecessary wrapper V2")
d56ff011367e ("drm/amd/powerplay: drop unnecessary wrappers")
10e96d897329 ("drm/amd/powerplay: drop Sienna Cichlid specific set_soft_freq_limited_range")
b64d86889f1e ("drm/amd/powerplay: add new UMD pstate data structure")
90a89c316e64 ("drm/amd/powerplay: update Sienna Cichlid default dpm table setup")
3afb244be3e0 ("drm/amd/powerplay: update Navi10 default dpm table setup")
3a86d7f668cb ("drm/amd/powerplay: update Arcturus default dpm table setting")
ea8139d8d59b ("drm/amd/powerplay: add SMU mode1 reset")
3a4024b58b3f ("drm/amdgpu/powerplay: Modify SMC message name for setting power profile mode")
4c8f126e0cd5 ("drm/amdgpu/powerplay: Target power profile mode should be the second parameter of renoir_set_power_profile_mode")
d8d3493a46f9 ("drm/amd/powerplay: put dpm frequency setting common code in smu_v11_0.c")
e5ef784b1e17 ("drm/amd/powerplay: revise calling chain on retrieving frequency range")
c98f31d17cc8 ("drm/amd/powerplay: revise calling chain on setting soft limit")
661b94f5acf7 ("drm/amd/powerplay: put setting hard limit common code in smu_v11_0.c")
b2febc9901ee ("drm/amd/powerplay: drop unused code and wrapper around clock retrieving")