a832d35762a0 ("drm/i915: Move the PIPEMISC write the correct place")
5f29ab23046a ("drm/i915: Track pipe gamma enable/disable in crtc state")
9d5441de28e2 ("drm/i915: Populate gamma_mode for all platforms")
051a6d8d3ca0 ("drm/i915: Move LUT programming to happen after vblank waits")
4d8ed54c0447 ("drm/i915: Split color mgmt based on single vs. double buffered registers")
87cefd57c88a ("drm/i915: Pull GAMMA_MODE write out from haswell_load_luts()")
23b03a272c2b ("drm/i915: Constify the state arguments to the color management stuff")
5f4f3e386b36 ("drm/i915: Precompute gamma_mode")
7eb31a0bb2c1 ("drm/i915: Split the gamma/csc enable bits from the plane_ctl() function")
108d14bdaef6 ("drm/i915: Setup PIPE_CHICKEN for fastsets too")
e4c0d5314ded ("drm/i915: Apply LUT validation checks to platforms more accurately (v3)")
c0550305fcbd ("drm/i915: Force background color to black for gen9+ (v2)")
85e2d61e4976 ("drm/i915: Validate userspace-provided color management LUT's (v4)")
129fe7516b23 ("drm/i915/color: switch to kernel types")
c4aa2eca319c ("drm/i915/sprite: switch to kernel types")
0258404f9d38 ("drm/i915: start moving runtime device info to a separate struct")
167bc759e823 ("drm/i915: Restrict PSMI context load w/a to Haswell GT1")
a489334941d4 ("drm/i915: Fix Cherryview oops on boot")
f513ac76530c ("drm/i915/icl: Mind the SFC units when resetting VD or VEBox engines")
57b19d55189b ("drm/i915/icl: Record the valid VDBoxes with SFC capability")
cf819eff907a ("drm/i915: replace IS_GEN<N> with IS_GEN(..., N)")
302da0cdf784 ("drm/i915: Use intel_ types more consistently for color management code (v2)")
d15f9cdd59ba ("drm/i915/icl: Do not change reserved registers related to PSR2")
517974992593 ("drm/i915: Allocate a common scratch page")
452420d22d5b ("drm/i915: Fuse per-context workaround handling with the common framework")
69bcdecf1af5 ("drm/i915: Move register white-listing to the common workaround framework")
28d6ccce73be ("drm/i915/selftests: Add tests for GT and engine workaround verification")
094304beb4e1 ("drm/i915: Verify GT workaround state after GPU init")
4a15c75c4246 ("drm/i915: Introduce per-engine workarounds")
25d140faaa25 ("drm/i915: Record GT workarounds in a list")
e1bf094b3c75 ("drm/i915: Add HAS_DISPLAY() and use it")
b9f78d675230 ("drm/i915/selftests: Fix live_workarounds to actually do resets")
8d2f6e2f2721 ("drm/i915/selftests: Extract spinner code")
7b610f1fbed2 ("drm/i915/dp: Add DSC params and DSC config to intel_crtc_state")
83234d13f9fd ("drm/i915: Reorganize plane register writes to make them more atomic")
0e39037b3165 ("drm/i915: Cache the error string")
95fd94a645f7 ("drm/i915: avoid rebuilding i915_gpu_error.o on version string updates")
8f19b401a6fc ("drm/i915: Make CHICKEN_TRANS reg not depend on enum value")
fb6f0b64e455 ("drm/i915: Prevent machine hang from Broxton's vtd w/a and error capture")
03981c6ebec4 ("drm/i915: Disable LP3 watermarks on all SNB machines")
cb8ef723ab81 ("drm/i915/gen9_bc: Work around DMC bug zeroing power well requests")
745aa6cdee6b ("drm/i915: Fix icl workarounds whitespaces")
85f04aa569ad ("drm/i915: Deduplicate register definition for GAMW_ECO_DEV_RW_IA")
ca0026790efa ("drm/i915: Always write both TILEOFF and LINOFF plane registers")
07464c7c0cf7 ("drm/i915: Clean up skl+ PLANE_POS vs. scaler handling")
7b012bd62db9 ("drm/i915: Polish the skl+ plane keyval/msk/max register setup")
8d3bf1a3959f ("drm/i915: Move drm_vblank_init() to i915_load_modeset_init()")
d0105af93976 ("drm/i915: Clean up skl_program_scaler()")
e69b348a7adb ("drm/i915: Nuke posting reads from plane update/disable funcs")
55f99bf2a9c3 ("drm/i915/ringbuffer: Delay after EMIT_INVALIDATE for gen4/gen5")