a630ac686425 ("drm/msm/gpu: Name GMU bos")
192f4ee3e408 ("drm/msm/a6xx: Add support for Adreno 7c Gen 3 gpu")
a6f24383f6c0 ("drm/msm/a6xx: Fix llcc configuration for a660 gpu")
f6d62d091cfd ("drm/msm/a6xx: add support for Adreno 660 GPU")
564499f5ddbb ("drm/msm/a6xx: add missing PC_DBG_ECO_CNTL bit for a640/a650")
58e933e3f012 ("drm/msm/a6xx: add GMU_CX_GMU_CX_FALNEXT_INTF write for a650")
64245fc55172 ("drm/msm/a6xx: use AOP-initialized PDC for a650")
408434036958 ("drm/msm/a6xx: update/fix CP_PROTECT initialization")
6ddbfa1f5adb ("drm/msm: a6xx: fix version check for the A650 SQE microcode")
8490f02a3ca4 ("drm/msm: a6xx: Make sure the SQE microcode is safe")
3d247123b5a1 ("drm/msm/a6xx: Add support for using system cache on MMU500 based targets")
474dadb8b0d5 ("drm/msm/a6xx: Add support for using system cache(LLC)")
96c876f12771 ("drm/msm: Fix a couple incorrect usages of get_vaddr_active()")
e9ba8d550dd1 ("drm/msm: Fix the a650 hw_apriv check")
2fb7487aaf71 ("drm/msm: Get rid of the REG_ADRENO offsets")
d3a569fccfa0 ("drm/msm: a6xx: Use WHERE_AM_I for eligible targets")
8907afb476ac ("drm/msm: Allow a5xx to mark the RPTR shadow as privileged")
84c31ee16f90 ("drm/msm/a6xx: Add support for per-instance pagetables")
933415e24bd0 ("drm/msm: Add support for private address space instances")
15eb9ad073c0 ("drm/msm: Drop context arg to gpu->submit()")