39818c06c829 ("drm/i915/dp: Add DP tunnel atomic state and check BW limit")
9d6953335284 ("drm/i915: move *_crtc_clock_get() to intel_dpll.c")
36f579ffc692 ("drm/i915/dp_mst: Improve BW sharing between MST streams")
e37137380931 ("drm/i915/dp_mst: Force modeset CRTC if DSC toggling requires it")
ab67821fa9e0 ("drm/i915/dp_mst: Disable DSC on ICL MST outputs")
987c945ab2ee ("drm/i915/dp: Use connector DSC DPCD in intel_dp_supports_fec()")
998d2cd361ca ("drm/i915/fdi: Improve FDI BW sharing between pipe B and C")
8ca0b875c082 ("drm/i915: Add helpers for BW management on shared display links")
1050e4c2368e ("drm/i915: Factor out a helper to check/compute all the CRTC states")
fa7a7a1c9c05 ("drm/i915: Add helper to modeset a set of pipes")
78015e27b7d7 ("drm/i915/dp: Update the link bpp limits for DSC mode")
7d0f2f68b661 ("drm/i915/dp: Skip computing a non-DSC link config if DSC is needed")
703c5994fe1a ("drm/i915/dp: Track the pipe and link bpp limits separately")
72b2d2a6f178 ("drm/i915/dp: Factor out helpers to compute the link limits")
16a9359401ed ("drm/i915: Implement transcoder LRR for TGL+")
26f03ef81663 ("drm/i915: Assert that VRR is off during vblank evasion if necessary")
0ce013a4e840 ("drm/i915: Update VRR parameters in fastset")
8f782270cc14 ("drm/i915: Disable VRR during seamless M/N changes")
6a38b36c274f ("drm/i915: Validate that the timings are within the VRR range")
825edc8bc72f ("drm/i915: Adjust seamless_m_n flag behaviour")