From 4db286b0a29aa3576a401b637ac5910dac22117f Mon Sep 17 00:00:00 2001 From: André Draszik Date: Tue, 30 Apr 2024 10:49:49 +0100 Subject: arm64: dts: exynos: gs101: specify empty clocks for remaining pinctrl MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The pinctrl instances hsi1, gsactrl, and gsacore need a clock for register access to work. Since we haven't implemented the relevant CMUs for the clocks required by these instances just add empty clocks for now so as to make the DT pass the validation checks. Once the clocks are implmented in the gs101 clock driver, these should be updated then. Signed-off-by: André Draszik Reviewed-by: Tudor Ambarus Link: https://lore.kernel.org/r/20240430-samsung-pinctrl-busclock-dts-v2-4-14fc988139dd@linaro.org Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/exynos/google/gs101.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi index 9edda5b94abcd4..a66e996666b878 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -1309,6 +1309,9 @@ pinctrl_hsi1: pinctrl@11840000 { compatible = "google,gs101-pinctrl"; reg = <0x11840000 0x00001000>; + /* TODO: update once support for this CMU exists */ + clocks = <0>; + clock-names = "pclk"; interrupts = ; }; @@ -1422,11 +1425,17 @@ pinctrl_gsactrl: pinctrl@17940000 { compatible = "google,gs101-pinctrl"; reg = <0x17940000 0x00001000>; + /* TODO: update once support for this CMU exists */ + clocks = <0>; + clock-names = "pclk"; }; pinctrl_gsacore: pinctrl@17a80000 { compatible = "google,gs101-pinctrl"; reg = <0x17a80000 0x00001000>; + /* TODO: update once support for this CMU exists */ + clocks = <0>; + clock-names = "pclk"; }; cmu_top: clock-controller@1e080000 { -- cgit 1.2.3-korg