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authorGeert Uytterhoeven <geert+renesas@glider.be>2022-10-24 13:34:15 +0200
committerJonathan Cameron <Jonathan.Cameron@huawei.com>2023-03-11 12:18:28 +0000
commitcd62d4f39a0de0c2936ecaae938ba444d77c902a (patch)
tree0c44cbc146676de2072d5607eb51d6110fd319a5
parente932fb64c017dccbee44b7ee781584dbc65449ed (diff)
downloadiio-cd62d4f39a0de0c2936ecaae938ba444d77c902a.tar.gz
dt-bindings: iio: adc: renesas,rcar-gyroadc: Miscellaneous improvements
Set limits on the number of power-domains and resets, and make them required. Simplify the example, and update it to match reality: - Convert from obsolete MSTP to CPG/MSSR bindings, - Examples should use #{address,size}-cells = <1>, - Add missing resets property, - Drop soc container and pinctrl properties, which are not needed in examples. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/7b7a13680fa24282c3407e12b5943a66a2ed9068.1666611184.git.geert+renesas@glider.be Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
-rw-r--r--Documentation/devicetree/bindings/iio/adc/renesas,rcar-gyroadc.yaml60
1 files changed, 29 insertions, 31 deletions
diff --git a/Documentation/devicetree/bindings/iio/adc/renesas,rcar-gyroadc.yaml b/Documentation/devicetree/bindings/iio/adc/renesas,rcar-gyroadc.yaml
index c115e2e99bd9a..1c7aee5ed3e0b 100644
--- a/Documentation/devicetree/bindings/iio/adc/renesas,rcar-gyroadc.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/renesas,rcar-gyroadc.yaml
@@ -34,9 +34,11 @@ properties:
clock-names:
const: fck
- power-domains: true
+ power-domains:
+ maxItems: 1
- resets: true
+ resets:
+ maxItems: 1
"#address-cells":
const: 1
@@ -51,6 +53,8 @@ required:
- reg
- clocks
- clock-names
+ - power-domains
+ - resets
- "#address-cells"
- "#size-cells"
@@ -108,36 +112,30 @@ patternProperties:
examples:
- |
- #include <dt-bindings/clock/r8a7791-clock.h>
+ #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
#include <dt-bindings/power/r8a7791-sysc.h>
- soc {
- #address-cells = <2>;
- #size-cells = <2>;
-
- adc@e6e54000 {
- compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc";
- reg = <0 0xe6e54000 0 64>;
- clocks = <&mstp9_clks R8A7791_CLK_GYROADC>;
- clock-names = "fck";
- power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
-
- pinctrl-0 = <&adc_pins>;
- pinctrl-names = "default";
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- adc@0 {
- reg = <0>;
- compatible = "maxim,max1162";
- vref-supply = <&vref_max1162>;
- };
-
- adc@1 {
- reg = <1>;
- compatible = "maxim,max1162";
- vref-supply = <&vref_max1162>;
- };
+
+ adc@e6e54000 {
+ compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc";
+ reg = <0xe6e54000 64>;
+ clocks = <&cpg CPG_MOD 901>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
+ resets = <&cpg 901>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ adc@0 {
+ reg = <0>;
+ compatible = "maxim,max1162";
+ vref-supply = <&vref_max1162>;
+ };
+
+ adc@1 {
+ reg = <1>;
+ compatible = "maxim,max1162";
+ vref-supply = <&vref_max1162>;
};
};
...