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| author | Jiaxun Yang <jiaxun.yang@flygoat.com> | 2023-02-28 19:34:59 +0000 |
|---|---|---|
| committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2023-02-28 23:09:49 +0100 |
| commit | 1a2c73f4834dd79e4f2c590ac75358fb44137650 (patch) | |
| tree | 6fbb8f787588258eaecc2e3852f33477b6643ee3 | |
| parent | 70f864d1084734f8816a247c24e6876d2dfb5f89 (diff) | |
| download | iio-1a2c73f4834dd79e4f2c590ac75358fb44137650.tar.gz | |
MIPS: Workaround clang inline compat branch issue
Clang is unable to handle the situation that a chunk of inline
assembly ends with a compat branch instruction and then compiler
generates another control transfer instruction immediately after
this compat branch. The later instruction will end up in forbidden
slot and cause exception.
Workaround by add a option to control the use of compact branch.
Currently it's selected by CC_IS_CLANG and hopefully we can change
it to a version check in future if clang manages to fix it.
Fix boot on boston board.
Link: https://github.com/llvm/llvm-project/issues/61045
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Acked-by: Nathan Chancellor <nathan@kernel.org>
Acked-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| -rw-r--r-- | arch/mips/Kconfig | 4 | ||||
| -rw-r--r-- | arch/mips/include/asm/asm.h | 2 |
2 files changed, 5 insertions, 1 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 875c29246555b..e2f3ca73f40d6 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -3200,6 +3200,10 @@ config CC_HAS_MNO_BRANCH_LIKELY def_bool y depends on $(cc-option,-mno-branch-likely) +# https://github.com/llvm/llvm-project/issues/61045 +config CC_HAS_BROKEN_INLINE_COMPAT_BRANCH + def_bool y if CC_IS_CLANG + menu "Power management options" config ARCH_HIBERNATION_POSSIBLE diff --git a/arch/mips/include/asm/asm.h b/arch/mips/include/asm/asm.h index 336ac9b652350..2e99450f42284 100644 --- a/arch/mips/include/asm/asm.h +++ b/arch/mips/include/asm/asm.h @@ -336,7 +336,7 @@ symbol = value */ #ifdef CONFIG_WAR_R10000_LLSC # define SC_BEQZ beqzl -#elif MIPS_ISA_REV >= 6 +#elif !defined(CONFIG_CC_HAS_BROKEN_INLINE_COMPAT_BRANCH) && MIPS_ISA_REV >= 6 # define SC_BEQZ beqzc #else # define SC_BEQZ beqz |