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| author | George Stark <gnstark@sberdevices.ru> | 2023-07-14 14:37:50 +0300 |
|---|---|---|
| committer | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2023-07-20 19:21:30 +0100 |
| commit | 2b592ff48e8a1010cc0b16b633ba33bc185fe379 (patch) | |
| tree | b56c56d0f21c4f8b3f36591bebc1c1f3f57ac31f | |
| parent | d26f0514f05d01eeec689516eb5cdfdef3daadd5 (diff) | |
| download | iio-2b592ff48e8a1010cc0b16b633ba33bc185fe379.tar.gz | |
iio: adc: meson: move meson_sar_adc_set_chan7_mux routine upper
meson_sar_adc_set_chan7_mux is a basic func() for writing single register,
defined as static. Moved it up so it could be used in more places.
Signed-off-by: George Stark <GNStark@sberdevices.ru>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20230714114010.293440-4-gnstark@sberdevices.ru
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
| -rw-r--r-- | drivers/iio/adc/meson_saradc.c | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c index 7e7771e7b0de22..705d9f026ef65d 100644 --- a/drivers/iio/adc/meson_saradc.c +++ b/drivers/iio/adc/meson_saradc.c @@ -336,6 +336,19 @@ static int meson_sar_adc_wait_busy_clear(struct iio_dev *indio_dev) 1, 10000); } +static void meson_sar_adc_set_chan7_mux(struct iio_dev *indio_dev, + enum meson_sar_adc_chan7_mux_sel sel) +{ + struct meson_sar_adc_priv *priv = iio_priv(indio_dev); + u32 regval; + + regval = FIELD_PREP(MESON_SAR_ADC_REG3_CTRL_CHAN7_MUX_SEL_MASK, sel); + regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG3, + MESON_SAR_ADC_REG3_CTRL_CHAN7_MUX_SEL_MASK, regval); + + usleep_range(10, 20); +} + static int meson_sar_adc_read_raw_sample(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, int *val) @@ -432,19 +445,6 @@ static void meson_sar_adc_enable_channel(struct iio_dev *indio_dev, } } -static void meson_sar_adc_set_chan7_mux(struct iio_dev *indio_dev, - enum meson_sar_adc_chan7_mux_sel sel) -{ - struct meson_sar_adc_priv *priv = iio_priv(indio_dev); - u32 regval; - - regval = FIELD_PREP(MESON_SAR_ADC_REG3_CTRL_CHAN7_MUX_SEL_MASK, sel); - regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG3, - MESON_SAR_ADC_REG3_CTRL_CHAN7_MUX_SEL_MASK, regval); - - usleep_range(10, 20); -} - static void meson_sar_adc_start_sample_engine(struct iio_dev *indio_dev) { struct meson_sar_adc_priv *priv = iio_priv(indio_dev); |