diff options
| author | Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com> | 2017-04-06 20:24:56 +0900 |
|---|---|---|
| committer | Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com> | 2017-04-11 14:37:33 +0900 |
| commit | 098ccf1c9b89109f63fef6d1f6294b29bb5cafba (patch) | |
| tree | 4309e7b9f9e47930d44efbdcbdfa3e44ea1d7f65 | |
| parent | 2ab35053049620d03f8a729ad6028711bad9a54e (diff) | |
| download | renesas-bsp-v4.9/rcar-3.5.3.tar.gz | |
sh-msiof: Fix SPI division value setting of r8a7796 based on hardware specificationrcar-3.5.3v4.9/rcar-3.5.3
R8A7796 has a hardware limitation on the division value of SPI.
BRPS x BRDV = 1/1 is valid only in R-CarH3. (R-Car M3-W have
BRPS x BRDV = 1/2 min).
Signed-off-by: Hiromitsu Yamasaki <hiromitsu.yamasaki.ym@renesas.com>
| -rw-r--r-- | drivers/spi/spi-sh-msiof.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c index 045ee757cc38ed..fa8469582227c9 100644 --- a/drivers/spi/spi-sh-msiof.c +++ b/drivers/spi/spi-sh-msiof.c @@ -198,12 +198,15 @@ struct sh_msiof_spi_priv { /* Check LSI revisions and set specific quirk value */ #define TRANSFER_WORKAROUND_H3WS10 BIT(0) /* H3ES1.0 workaround */ #define TRANSFER_WORKAROUND_H3WS11 BIT(1) /* H3ES1.1 workaround */ +#define UNDIVIDED_PROHIBIT BIT(2) /* Prohibition of 1/1 division */ static const struct soc_device_attribute rcar_quirks_match[] = { { .soc_id = "r8a7795", .revision = "ES1.0", .data = (void *)TRANSFER_WORKAROUND_H3WS10, }, { .soc_id = "r8a7795", .revision = "ES1.1", .data = (void *)TRANSFER_WORKAROUND_H3WS11, }, + { .soc_id = "r8a7796", + .data = (void *)UNDIVIDED_PROHIBIT, }, {/*sentinel*/}, }; @@ -319,6 +322,10 @@ static void sh_msiof_spi_set_clk_regs(struct sh_msiof_spi_priv *p, /* SCR_BRDV_DIV_1 is valid only if BRPS is x 1/1 or x 1/2 */ if (sh_msiof_spi_div_table[k].div == 1 && brps > 2) continue; + /* r8a7796 is invalid only when BRPS x BRDV = 1/1 */ + if ((p->quirks & UNDIVIDED_PROHIBIT) && + sh_msiof_spi_div_table[k].div == 1 && brps == 1) + continue; if (brps <= 32) /* max of brdv is 32 */ break; } |