# This is a BitKeeper generated diff -Nru style patch. # # ChangeSet # 2004/03/23 04:32:39-05:00 len.brown@intel.com # [ACPI] ACPI SCI shall be level/low unless explicit over-ride # http://bugzilla.kernel.org/show_bug.cgi?id=1622 # add "acpi_sci=edge" and "acpi_sci=high" manual over-ride # # include/asm-x86_64/mpspec.h # 2004/03/23 04:23:10-05:00 len.brown@intel.com +0 -1 # delete mp_config_ioapic_for_sci() # # include/asm-x86_64/acpi.h # 2004/03/23 04:23:09-05:00 len.brown@intel.com +0 -2 # delete mp_config_ioapic_for_sci() # # include/asm-i386/mpspec.h # 2004/03/23 04:23:09-05:00 len.brown@intel.com +0 -3 # delete mp_config_ioapic_for_sci() # # drivers/acpi/bus.c # 2004/03/23 04:23:09-05:00 len.brown@intel.com +13 -6 # delete mp_config_ioapic_for_sci() # # arch/x86_64/kernel/mpparse.c # 2004/03/23 04:23:00-05:00 len.brown@intel.com +0 -57 # delete mp_config_ioapic_for_sci() # # arch/x86_64/kernel/e820.c # 2004/03/23 04:22:59-05:00 len.brown@intel.com +14 -0 # add acpi_sci= # # arch/x86_64/kernel/acpi.c # 2004/03/23 04:22:59-05:00 len.brown@intel.com +77 -31 # capture sci_int with early fadt parse # use this to properly parse int_src_over-ride for SCI # fix bug in PCI trigger routine # # arch/i386/kernel/setup.c # 2004/03/23 04:22:59-05:00 len.brown@intel.com +11 -0 # add acpi_sci= # # arch/i386/kernel/mpparse.c # 2004/03/23 04:22:59-05:00 len.brown@intel.com +0 -64 # delete mp_config_ioapic_for_sci() # # arch/i386/kernel/acpi.c # 2004/03/23 04:22:59-05:00 len.brown@intel.com +77 -30 # capture sci_int with early fadt parse # use this to properly parse int_src_over-ride for SCI # fix bug in PCI trigger routine # # Documentation/kernel-parameters.txt # 2004/03/23 04:22:58-05:00 len.brown@intel.com +2 -3 # acpi_sci= replaces acpi_pic_sci= # diff -Nru a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt --- a/Documentation/kernel-parameters.txt Tue Mar 23 04:32:43 2004 +++ b/Documentation/kernel-parameters.txt Tue Mar 23 04:32:43 2004 @@ -76,9 +76,8 @@ strict Be less tolerant of platforms that are not strictly ACPI specification compliant. - acpi_pic_sci= [HW,ACPI] ACPI System Conrol Interrupt trigger mode - level Force PIC-mode SCI to Level Trigger (default) - edge Force PIC-mode SCI to Edge Trigger + acpi_sci= [HW,ACPI] ACPI System Control Interrupt trigger mode + Format: { level | edge | high | low } acpi_irq_balance ACPI will balance active IRQs acpi_irq_nobalance ACPI will not move active IRQs diff -Nru a/arch/i386/kernel/acpi.c b/arch/i386/kernel/acpi.c --- a/arch/i386/kernel/acpi.c Tue Mar 23 04:32:43 2004 +++ b/arch/i386/kernel/acpi.c Tue Mar 23 04:32:43 2004 @@ -53,6 +53,8 @@ int acpi_ioapic; int acpi_strict; +acpi_interrupt_flags acpi_sci_flags __initdata; +int acpi_sci_override_gsi __initdata; /* -------------------------------------------------------------------------- Boot-time Configuration -------------------------------------------------------------------------- */ @@ -214,6 +216,54 @@ return 0; } +/* + * Parse Interrupt Source Override for the ACPI SCI + */ +static void +acpi_parse_sci_int_src_ovr(u8 bus_irq, u16 polarity, u16 trigger, u32 global_irq) +{ + if (trigger == 0) /* compatible SCI trigger is level */ + trigger = 3; + + if (polarity == 0) /* compatible SCI polarity is low */ + polarity = 3; + + /* Command-line over-ride via acpi_sci= */ + if (acpi_sci_flags.trigger) + trigger = acpi_sci_flags.trigger; + + if (acpi_sci_flags.polarity) + polarity = acpi_sci_flags.polarity; + + mp_override_legacy_irq(bus_irq, polarity, trigger, global_irq); + + /* + * stash over-ride to indicate we've been here + * and for later update of acpi_fadt + */ + acpi_sci_override_gsi = global_irq; + return; +} + +static int __init +acpi_parse_fadt(unsigned long phys, unsigned long size) +{ + struct fadt_descriptor_rev2 *fadt =0; + + fadt = (struct fadt_descriptor_rev2*) __acpi_map_table(phys,size); + if (!fadt) { + printk(KERN_WARNING PREFIX "Unable to map FADT\n"); + return 0; + } + +#ifdef CONFIG_ACPI_INTERPRETER + /* initialize sci_int early for INT_SRC_OVR MADT parsing */ + acpi_fadt.sci_int = fadt->sci_int; +#endif + + return 0; +} + static int __init acpi_parse_int_src_ovr ( @@ -227,6 +277,13 @@ acpi_table_print_madt_entry(header); + if (intsrc->bus_irq == acpi_fadt.sci_int) { + acpi_parse_sci_int_src_ovr(intsrc->bus_irq, + intsrc->flags.polarity, intsrc->flags.trigger, + intsrc->global_irq); + return 0; + } + mp_override_legacy_irq ( intsrc->bus_irq, intsrc->flags.polarity, @@ -444,6 +501,9 @@ /* Build a default routing table for legacy (ISA) interrupts. */ mp_config_acpi_legacy_irqs(); + /* Record sci_int for use when looking for MADT sci_int override */ + acpi_table_parse(ACPI_FADT, acpi_parse_fadt); + result = acpi_table_parse_madt(ACPI_MADT_INT_SRC_OVR, acpi_parse_int_src_ovr); if (result < 0) { printk(KERN_ERR PREFIX "Error parsing interrupt source overrides entry\n"); @@ -451,6 +511,13 @@ return result; } + /* + * If BIOS did not supply an INT_SRC_OVR for the SCI + * pretend we got one so we can set the SCI flags. + */ + if (!acpi_sci_override_gsi) + acpi_parse_sci_int_src_ovr(acpi_fadt.sci_int, 0, 0, acpi_fadt.sci_int); + result = acpi_table_parse_madt(ACPI_MADT_NMI_SRC, acpi_parse_nmi_src); if (result < 0) { printk(KERN_ERR PREFIX "Error parsing NMI SRC entry\n"); @@ -475,13 +542,12 @@ #ifdef CONFIG_ACPI_BUS /* - * "acpi_pic_sci=level" (current default) - * programs the PIC-mode SCI to Level Trigger. - * (NO-OP if the BIOS set Level Trigger already) + * acpi_pic_sci_set_trigger() + * + * use ELCR to set PIC-mode trigger type for SCI * - * If a PIC-mode SCI is not recogznied or gives spurious IRQ7's - * it may require Edge Trigger -- use "acpi_pic_sci=edge" - * (NO-OP if the BIOS set Edge Trigger already) + * If a PIC-mode SCI is not recognized or gives spurious IRQ7's + * it may require Edge Trigger -- use "acpi_sci=edge" * * Port 0x4d0-4d1 are ECLR1 and ECLR2, the Edge/Level Control Registers * for the 8259 PIC. bit[n] = 1 means irq[n] is Level, otherwise Edge. @@ -489,51 +555,32 @@ * ECLR2 is IRQ's 8-15 (IRQ 8, 13 must be 0) */ -static __initdata int acpi_pic_sci_trigger; /* 0: level, 1: edge */ - void __init -acpi_pic_sci_set_trigger(unsigned int irq) +acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger) { unsigned char mask = 1 << (irq & 7); unsigned int port = 0x4d0 + (irq >> 3); unsigned char val = inb(port); - + printk(PREFIX "IRQ%d SCI:", irq); if (!(val & mask)) { printk(" Edge"); - if (!acpi_pic_sci_trigger) { + if (trigger == 3) { printk(" set to Level"); outb(val | mask, port); } } else { printk(" Level"); - if (acpi_pic_sci_trigger) { + if (trigger == 1) { printk(" set to Edge"); - outb(val | mask, port); + outb(val & ~mask, port); } } printk(" Trigger.\n"); } - -int __init -acpi_pic_sci_setup(char *str) -{ - while (str && *str) { - if (strncmp(str, "level", 5) == 0) - acpi_pic_sci_trigger = 0; /* force level trigger */ - if (strncmp(str, "edge", 4) == 0) - acpi_pic_sci_trigger = 1; /* force edge trigger */ - str = strchr(str, ','); - if (str) - str += strspn(str, ", \t"); - } - return 1; -} - -__setup("acpi_pic_sci=", acpi_pic_sci_setup); #endif /* CONFIG_ACPI_BUS */ diff -Nru a/arch/i386/kernel/mpparse.c b/arch/i386/kernel/mpparse.c --- a/arch/i386/kernel/mpparse.c Tue Mar 23 04:32:43 2004 +++ b/arch/i386/kernel/mpparse.c Tue Mar 23 04:32:43 2004 @@ -1218,70 +1218,6 @@ extern FADT_DESCRIPTOR acpi_fadt; -void __init mp_config_ioapic_for_sci(int irq) -{ - int ioapic; - int ioapic_pin; - struct acpi_table_madt* madt; - struct acpi_table_int_src_ovr *entry = NULL; - acpi_interrupt_flags flags; - void *madt_end; - acpi_status status; - - /* - * Ensure that if there is an interrupt source override entry - * for the ACPI SCI, we leave it as is. Unfortunately this involves - * walking the MADT again. - */ - status = acpi_get_firmware_table("APIC", 1, ACPI_LOGICAL_ADDRESSING, - (struct acpi_table_header **) &madt); - if (ACPI_SUCCESS(status)) { - madt_end = (void *) (unsigned long)madt + madt->header.length; - - entry = (struct acpi_table_int_src_ovr *) - ((unsigned long) madt + sizeof(struct acpi_table_madt)); - - while ((void *) entry < madt_end) { - if (entry->header.type == ACPI_MADT_INT_SRC_OVR && - acpi_fadt.sci_int == entry->bus_irq) - goto found; - - entry = (struct acpi_table_int_src_ovr *) - ((unsigned long) entry + entry->header.length); - } - } - /* - * Although the ACPI spec says that the SCI should be level/low - * don't reprogram it unless there is an explicit MADT OVR entry - * instructing us to do so -- otherwise we break Tyan boards which - * have the SCI wired edge/high but no MADT OVR. - */ - return; - -found: - /* - * See the note at the end of ACPI 2.0b section - * 5.2.10.8 for what this is about. - */ - flags = entry->flags; - acpi_fadt.sci_int = entry->global_irq; - irq = entry->global_irq; - - ioapic = mp_find_ioapic(irq); - - ioapic_pin = irq - mp_ioapic_routing[ioapic].irq_start; - - /* - * MPS INTI flags: - * trigger: 0=default, 1=edge, 3=level - * polarity: 0=default, 1=high, 3=low - * Per ACPI spec, default for SCI means level/low. - */ - io_apic_set_pci_routing(ioapic, ioapic_pin, irq, - (flags.trigger == 1 ? 0 : 1), (flags.polarity == 1 ? 0 : 1)); -} - - #ifdef CONFIG_ACPI_PCI void __init mp_parse_prt (void) diff -Nru a/arch/i386/kernel/setup.c b/arch/i386/kernel/setup.c --- a/arch/i386/kernel/setup.c Tue Mar 23 04:32:43 2004 +++ b/arch/i386/kernel/setup.c Tue Mar 23 04:32:43 2004 @@ -186,6 +186,7 @@ #ifdef CONFIG_ACPI_BOOT extern int __initdata acpi_ht; int acpi_force __initdata = 0; +extern acpi_interrupt_flags acpi_sci_flags; #endif extern int blk_nohighio; @@ -852,6 +853,16 @@ /* disable IO-APIC */ else if (!memcmp(from, "noapic", 6)) disable_ioapic_setup(); + + else if (!memcmp(from, "acpi_sci=edge", 13)) + acpi_sci_flags.trigger = 1; + else if (!memcmp(from, "acpi_sci=level", 14)) + acpi_sci_flags.trigger = 3; + else if (!memcmp(from, "acpi_sci=high", 13)) + acpi_sci_flags.polarity = 1; + else if (!memcmp(from, "acpi_sci=low", 12)) + acpi_sci_flags.polarity = 3; + #endif /* * highmem=size forces highmem to be exactly 'size' bytes. diff -Nru a/arch/x86_64/kernel/acpi.c b/arch/x86_64/kernel/acpi.c --- a/arch/x86_64/kernel/acpi.c Tue Mar 23 04:32:43 2004 +++ b/arch/x86_64/kernel/acpi.c Tue Mar 23 04:32:43 2004 @@ -51,6 +51,8 @@ int acpi_ioapic; int acpi_strict; +acpi_interrupt_flags acpi_sci_flags __initdata; +int acpi_sci_override_gsi __initdata; /* -------------------------------------------------------------------------- Boot-time Configuration -------------------------------------------------------------------------- */ @@ -227,6 +229,54 @@ return 0; } +/* + * Parse Interrupt Source Override for the ACPI SCI + */ +static void +acpi_parse_sci_int_src_ovr(u8 bus_irq, u16 polarity, u16 trigger, u32 global_irq) +{ + if (trigger == 0) /* compatible SCI trigger is level */ + trigger = 3; + + if (polarity == 0) /* compatible SCI polarity is low */ + polarity = 3; + + /* Command-line over-ride via acpi_sci= */ + if (acpi_sci_flags.trigger) + trigger = acpi_sci_flags.trigger; + + if (acpi_sci_flags.polarity) + polarity = acpi_sci_flags.polarity; + + mp_override_legacy_irq(bus_irq, polarity, trigger, global_irq); + + /* + * stash over-ride to indicate we've been here + * and for later update of acpi_fadt + */ + acpi_sci_override_gsi = global_irq; + return; +} + +static int __init +acpi_parse_fadt(unsigned long phys, unsigned long size) +{ + struct fadt_descriptor_rev2 *fadt =0; + + fadt = (struct fadt_descriptor_rev2*) __acpi_map_table(phys,size); + if (!fadt) { + printk(KERN_WARNING PREFIX "Unable to map FADT\n"); + return 0; + } + +#ifdef CONFIG_ACPI_INTERPRETER + /* initialize sci_int early for INT_SRC_OVR MADT parsing */ + acpi_fadt.sci_int = fadt->sci_int; +#endif + + return 0; +} + static int __init acpi_parse_int_src_ovr ( @@ -240,6 +290,13 @@ acpi_table_print_madt_entry(header); + if (intsrc->bus_irq == acpi_fadt.sci_int) { + acpi_parse_sci_int_src_ovr(intsrc->bus_irq, + intsrc->flags.polarity, intsrc->flags.trigger, + intsrc->global_irq); + return 0; + } + mp_override_legacy_irq ( intsrc->bus_irq, intsrc->flags.polarity, @@ -293,13 +350,12 @@ #ifdef CONFIG_ACPI_BUS /* - * "acpi_pic_sci=level" (current default) - * programs the PIC-mode SCI to Level Trigger. - * (NO-OP if the BIOS set Level Trigger already) + * acpi_pic_sci_set_trigger() * - * If a PIC-mode SCI is not recogznied or gives spurious IRQ7's - * it may require Edge Trigger -- use "acpi_pic_sci=edge" - * (NO-OP if the BIOS set Edge Trigger already) + * use ELCR to set PIC-mode trigger type for SCI + * + * If a PIC-mode SCI is not recognized or gives spurious IRQ7's + * it may require Edge Trigger -- use "acpi_sci=edge" * * Port 0x4d0-4d1 are ECLR1 and ECLR2, the Edge/Level Control Registers * for the 8259 PIC. bit[n] = 1 means irq[n] is Level, otherwise Edge. @@ -307,52 +363,32 @@ * ECLR2 is IRQ's 8-15 (IRQ 8, 13 must be 0) */ -static __initdata int acpi_pic_sci_trigger; /* 0: level, 1: edge */ - void __init -acpi_pic_sci_set_trigger(unsigned int irq) +acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger) { unsigned char mask = 1 << (irq & 7); unsigned int port = 0x4d0 + (irq >> 3); unsigned char val = inb(port); - + printk(PREFIX "IRQ%d SCI:", irq); if (!(val & mask)) { printk(" Edge"); - if (!acpi_pic_sci_trigger) { + if (trigger == 3) { printk(" set to Level"); outb(val | mask, port); } } else { printk(" Level"); - if (acpi_pic_sci_trigger) { + if (trigger == 1) { printk(" set to Edge"); - outb(val | mask, port); + outb(val & ~mask, port); } } printk(" Trigger.\n"); } - -int __init -acpi_pic_sci_setup(char *str) -{ - while (str && *str) { - if (strncmp(str, "level", 5) == 0) - acpi_pic_sci_trigger = 0; /* force level trigger */ - if (strncmp(str, "edge", 4) == 0) - acpi_pic_sci_trigger = 1; /* force edge trigger */ - str = strchr(str, ','); - if (str) - str += strspn(str, ", \t"); - } - return 1; -} - -__setup("acpi_pic_sci=", acpi_pic_sci_setup); - #endif /* CONFIG_ACPI_BUS */ static unsigned long __init @@ -517,12 +553,22 @@ /* Build a default routing table for legacy (ISA) interrupts. */ mp_config_acpi_legacy_irqs(); + /* Record sci_int for use when looking for MADT sci_int override */ + acpi_table_parse(ACPI_FADT, acpi_parse_fadt); + result = acpi_table_parse_madt(ACPI_MADT_INT_SRC_OVR, acpi_parse_int_src_ovr); if (result < 0) { printk(KERN_ERR PREFIX "Error parsing interrupt source overrides entry\n"); /* TBD: Cleanup to allow fallback to MPS */ return result; } + + /* + * If BIOS did not supply an INT_SRC_OVR for the SCI + * pretend we got one so we can set the SCI flags. + */ + if (!acpi_sci_override_gsi) + acpi_parse_sci_int_src_ovr(acpi_fadt.sci_int, 0, 0, acpi_fadt.sci_int); result = acpi_table_parse_madt(ACPI_MADT_NMI_SRC, acpi_parse_nmi_src); if (result < 0) { diff -Nru a/arch/x86_64/kernel/e820.c b/arch/x86_64/kernel/e820.c --- a/arch/x86_64/kernel/e820.c Tue Mar 23 04:32:43 2004 +++ b/arch/x86_64/kernel/e820.c Tue Mar 23 04:32:43 2004 @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -18,6 +19,10 @@ extern unsigned long table_start, table_end; extern char _end[]; +#ifdef CONFIG_ACPI_BOOT +extern acpi_interrupt_flags acpi_sci_flags; +#endif + extern struct resource code_resource, data_resource, vram_resource; /* Check for some hardcoded bad areas that early boot is not allowed to touch */ @@ -564,6 +569,15 @@ else if (!memcmp(from, "pci=noacpi", 10)) { acpi_noirq_set(); } + + else if (!memcmp(from, "acpi_sci=edge", 13)) + acpi_sci_flags.trigger = 1; + else if (!memcmp(from, "acpi_sci=level", 14)) + acpi_sci_flags.trigger = 3; + else if (!memcmp(from, "acpi_sci=high", 13)) + acpi_sci_flags.polarity = 1; + else if (!memcmp(from, "acpi_sci=low", 12)) + acpi_sci_flags.polarity = 3; #endif diff -Nru a/arch/x86_64/kernel/mpparse.c b/arch/x86_64/kernel/mpparse.c --- a/arch/x86_64/kernel/mpparse.c Tue Mar 23 04:32:43 2004 +++ b/arch/x86_64/kernel/mpparse.c Tue Mar 23 04:32:43 2004 @@ -906,63 +906,6 @@ extern FADT_DESCRIPTOR acpi_fadt; -void __init mp_config_ioapic_for_sci(int irq) -{ - int ioapic; - int ioapic_pin; - struct acpi_table_madt* madt; - struct acpi_table_int_src_ovr *entry = NULL; - acpi_interrupt_flags flags; - void *madt_end; - acpi_status status; - - /* - * Ensure that if there is an interrupt source override entry - * for the ACPI SCI, we leave it as is. Unfortunately this involves - * walking the MADT again. - */ - status = acpi_get_firmware_table("APIC", 1, ACPI_LOGICAL_ADDRESSING, - (struct acpi_table_header **) &madt); - if (ACPI_SUCCESS(status)) { - madt_end = (void *) (unsigned long)madt + madt->header.length; - - entry = (struct acpi_table_int_src_ovr *) - ((unsigned long) madt + sizeof(struct acpi_table_madt)); - - while ((void *) entry < madt_end) { - if (entry->header.type == ACPI_MADT_INT_SRC_OVR && - acpi_fadt.sci_int == entry->bus_irq) - goto found; - - entry = (struct acpi_table_int_src_ovr *) - ((unsigned long) entry + entry->header.length); - } - } - /* - * Although the ACPI spec says that the SCI should be level/low - * don't reprogram it unless there is an explicit MADT OVR entry - * instructing us to do so -- otherwise we break Tyan boards which - * have the SCI wired edge/high but no MADT OVR. - */ - return; - -found: - /* - * See the note at the end of ACPI 2.0b section - * 5.2.10.8 for what this is about. - */ - flags = entry->flags; - acpi_fadt.sci_int = entry->global_irq; - irq = entry->global_irq; - - ioapic = mp_find_ioapic(irq); - - ioapic_pin = irq - mp_ioapic_routing[ioapic].irq_start; - - io_apic_set_pci_routing(ioapic, ioapic_pin, irq, - (flags.trigger >> 1) , (flags.polarity >> 1)); -} - #endif /*CONFIG_ACPI_HT_ONLY*/ int acpi_tolerant; diff -Nru a/drivers/acpi/bus.c b/drivers/acpi/bus.c --- a/drivers/acpi/bus.c Tue Mar 23 04:32:43 2004 +++ b/drivers/acpi/bus.c Tue Mar 23 04:32:43 2004 @@ -49,7 +49,7 @@ #define PREFIX "ACPI: " -extern void __init acpi_pic_sci_set_trigger(unsigned int irq); +extern void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger); extern int acpi_disabled; @@ -1877,11 +1877,18 @@ } #ifdef CONFIG_X86 - /* Ensure the SCI is set to level-triggered, active-low */ - if (acpi_ioapic) - mp_config_ioapic_for_sci(acpi_fadt.sci_int); - else - acpi_pic_sci_set_trigger(acpi_fadt.sci_int); + if (!acpi_ioapic) { + extern acpi_interrupt_flags acpi_sci_flags; + /* Set PIC-mode SCI trigger type */ + acpi_pic_sci_set_trigger(acpi_fadt.sci_int, acpi_sci_flags.trigger); + } else { + extern int acpi_sci_override_gsi; + /* + * now that acpi_fadt is initialized, + * update it with result from INT_SRC_OVR parsing + */ + acpi_fadt.sci_int = acpi_sci_override_gsi; + } #endif status = acpi_enable_subsystem(ACPI_FULL_INITIALIZATION); diff -Nru a/include/asm-i386/mpspec.h b/include/asm-i386/mpspec.h --- a/include/asm-i386/mpspec.h Tue Mar 23 04:32:43 2004 +++ b/include/asm-i386/mpspec.h Tue Mar 23 04:32:43 2004 @@ -227,10 +227,7 @@ extern void mp_register_ioapic (u8 id, u32 address, u32 irq_base); extern void mp_override_legacy_irq (u8 bus_irq, u8 polarity, u8 trigger, u32 global_irq); extern void mp_config_acpi_legacy_irqs (void); -extern void mp_config_ioapic_for_sci(int irq); extern void mp_parse_prt (void); -#else /*!CONFIG_X86_IO_APIC*/ -static inline void mp_config_ioapic_for_sci(int irq) { } #endif /*!CONFIG_X86_IO_APIC*/ #endif /*CONFIG_ACPI_BOOT*/ diff -Nru a/include/asm-x86_64/acpi.h b/include/asm-x86_64/acpi.h --- a/include/asm-x86_64/acpi.h Tue Mar 23 04:32:43 2004 +++ b/include/asm-x86_64/acpi.h Tue Mar 23 04:32:43 2004 @@ -138,8 +138,6 @@ #define boot_cpu_physical_apicid boot_cpu_id -extern void mp_config_ioapic_for_sci(int irq); - #endif /*__KERNEL__*/ #endif /*_ASM_ACPI_H*/ diff -Nru a/include/asm-x86_64/mpspec.h b/include/asm-x86_64/mpspec.h --- a/include/asm-x86_64/mpspec.h Tue Mar 23 04:32:43 2004 +++ b/include/asm-x86_64/mpspec.h Tue Mar 23 04:32:43 2004 @@ -196,7 +196,6 @@ extern void mp_register_ioapic (u8 id, u32 address, u32 irq_base); extern void mp_override_legacy_irq (u8 bus_irq, u8 polarity, u8 trigger, u32 global_irq); extern void mp_config_acpi_legacy_irqs (void); -extern void mp_config_ioapic_for_sci(int irq); extern void mp_parse_prt (void); #endif /*CONFIG_X86_IO_APIC*/