From: Dave Jones Update Intel cache descriptor decoding to match latest Intel Documentation (24161827.pdf) Signed-off-by: Dave Jones Signed-off-by: Andrew Morton --- 25-akpm/arch/i386/kernel/cpu/intel.c | 3 +++ 1 files changed, 3 insertions(+) diff -puN arch/i386/kernel/cpu/intel.c~dothan-speedstep-fix arch/i386/kernel/cpu/intel.c --- 25/arch/i386/kernel/cpu/intel.c~dothan-speedstep-fix Fri Aug 20 15:01:35 2004 +++ 25-akpm/arch/i386/kernel/cpu/intel.c Fri Aug 20 15:01:35 2004 @@ -97,10 +97,13 @@ static struct _cache_table cache_table[] { 0x70, LVL_TRACE, 12 }, { 0x71, LVL_TRACE, 16 }, { 0x72, LVL_TRACE, 32 }, + { 0x78, LVL_2, 1024 }, { 0x79, LVL_2, 128 }, { 0x7a, LVL_2, 256 }, { 0x7b, LVL_2, 512 }, { 0x7c, LVL_2, 1024 }, + { 0x7d, LVL_2, 2048 }, + { 0x7f, LVL_2, 512 }, { 0x82, LVL_2, 256 }, { 0x83, LVL_2, 512 }, { 0x84, LVL_2, 1024 }, _