From: Ralf Baechle Update support for the bazillion of variants of NEC VR41xx devices, including on-SOC device drivers. Signed-off-by: Andrew Morton --- 25-akpm/arch/mips/Kconfig | 19 25-akpm/arch/mips/Makefile | 6 25-akpm/arch/mips/configs/capcella_defconfig | 52 + 25-akpm/arch/mips/configs/e55_defconfig | 52 + 25-akpm/arch/mips/configs/mpc30x_defconfig | 52 + 25-akpm/arch/mips/configs/tb0226_defconfig | 53 + 25-akpm/arch/mips/configs/tb0229_defconfig | 85 ++ 25-akpm/arch/mips/configs/workpad_defconfig | 52 + 25-akpm/arch/mips/pci/Makefile | 1 25-akpm/arch/mips/pci/fixup-vr4133.c | 204 +++++ 25-akpm/arch/mips/pci/pci-vr41xx.c | 2 25-akpm/arch/mips/pci/pci-vr41xx.h | 2 25-akpm/arch/mips/vr41xx/common/giu.c | 2 25-akpm/arch/mips/vr41xx/common/icu.c | 2 25-akpm/arch/mips/vr41xx/common/ksyms.c | 2 25-akpm/arch/mips/vr41xx/common/vrc4173.c | 2 25-akpm/arch/mips/vr41xx/nec-cmbvr4133/Makefile | 8 25-akpm/arch/mips/vr41xx/nec-cmbvr4133/init.c | 78 ++ 25-akpm/arch/mips/vr41xx/nec-cmbvr4133/irq.c | 114 +++ 25-akpm/arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c | 250 +++++++ 25-akpm/arch/mips/vr41xx/nec-cmbvr4133/setup.c | 108 +++ 25-akpm/drivers/pcmcia/Kconfig | 8 25-akpm/drivers/pcmcia/Makefile | 2 25-akpm/drivers/pcmcia/vrc4171_card.c | 744 +++++++++++++++++++++ 25-akpm/drivers/pcmcia/vrc4173_cardu.c | 622 +++++++++++++++++ 25-akpm/drivers/pcmcia/vrc4173_cardu.h | 247 ++++++ 25-akpm/include/asm-mips/vr41xx/cmbvr4133.h | 61 + 25-akpm/include/asm-mips/vr41xx/vrc4173.h | 2 25-akpm/include/linux/pci_ids.h | 2 29 files changed, 2797 insertions(+), 37 deletions(-) diff -puN arch/mips/configs/capcella_defconfig~mips-vr41xx-updates arch/mips/configs/capcella_defconfig --- 25/arch/mips/configs/capcella_defconfig~mips-vr41xx-updates 2005-01-29 11:26:09.138358680 -0800 +++ 25-akpm/arch/mips/configs/capcella_defconfig 2005-01-29 11:26:09.172353512 -0800 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.10-rc2 -# Sun Nov 21 14:11:55 2004 +# Linux kernel version: 2.6.11-rc2 +# Wed Jan 26 02:49:00 2005 # CONFIG_MIPS=y # CONFIG_MIPS64 is not set @@ -58,6 +58,7 @@ CONFIG_KMOD=y # # CONFIG_MACH_JAZZ is not set CONFIG_MACH_VR41XX=y +# CONFIG_NEC_CMBVR4133 is not set # CONFIG_CASIO_E55 is not set # CONFIG_IBM_WORKPAD is not set # CONFIG_TANBAC_TB0226 is not set @@ -93,12 +94,12 @@ CONFIG_VRC4173=y # CONFIG_SNI_RM200_PCI is not set # CONFIG_TOSHIBA_RBTX4927 is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_HAVE_DEC_LOCK=y CONFIG_DMA_NONCOHERENT=y CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_IRQ_CPU=y CONFIG_MIPS_L1_CACHE_SHIFT=5 -# CONFIG_FB is not set # # CPU selection @@ -138,6 +139,20 @@ CONFIG_PCI_NAMES=y CONFIG_MMU=y # +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# PC-card bridges +# + +# +# PCI Hotplug Support +# +# CONFIG_HOTPLUG_PCI is not set + +# # Executable file formats # CONFIG_BINFMT_ELF=y @@ -153,6 +168,7 @@ CONFIG_TRAD_SIGNALS=y # CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set # # Memory Technology Devices (MTD) @@ -176,10 +192,12 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y # CONFIG_BLK_CPQ_CISS_DA is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_RAM is not set +CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_INITRAMFS_SOURCE="" # CONFIG_LBD is not set CONFIG_CDROM_PKTCDVD=m @@ -193,6 +211,7 @@ CONFIG_IOSCHED_NOOP=y CONFIG_IOSCHED_AS=y CONFIG_IOSCHED_DEADLINE=y CONFIG_IOSCHED_CFQ=y +CONFIG_ATA_OVER_ETH=m # # ATA/ATAPI/MFM/RLL support @@ -418,6 +437,7 @@ CONFIG_SERIO_I8042=y CONFIG_SERIO_SERPORT=y # CONFIG_SERIO_CT82C710 is not set # CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=m CONFIG_SERIO_RAW=m # @@ -484,7 +504,6 @@ CONFIG_WATCHDOG=y # # Ftape, the floppy tape device driver # -# CONFIG_AGP is not set # CONFIG_DRM is not set # CONFIG_RAW_DRIVER is not set @@ -515,12 +534,14 @@ CONFIG_WATCHDOG=y # # Graphics support # +# CONFIG_FB is not set # # Console display driver support # # CONFIG_VGA_CONSOLE is not set CONFIG_DUMMY_CONSOLE=y +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set # # Sound @@ -535,11 +556,25 @@ CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB_ARCH_HAS_OHCI=y # +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information +# + +# # USB Gadget Support # # CONFIG_USB_GADGET is not set # +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# InfiniBand support +# +# CONFIG_INFINIBAND is not set + +# # File systems # CONFIG_EXT2_FS=y @@ -633,6 +668,11 @@ CONFIG_MSDOS_PARTITION=y # CONFIG_NLS is not set # +# Profiling support +# +# CONFIG_PROFILING is not set + +# # Kernel hacking # # CONFIG_DEBUG_KERNEL is not set @@ -652,6 +692,10 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y # CONFIG_CRYPTO is not set # +# Hardware crypto devices +# + +# # Library routines # # CONFIG_CRC_CCITT is not set diff -puN arch/mips/configs/e55_defconfig~mips-vr41xx-updates arch/mips/configs/e55_defconfig --- 25/arch/mips/configs/e55_defconfig~mips-vr41xx-updates 2005-01-29 11:26:09.139358528 -0800 +++ 25-akpm/arch/mips/configs/e55_defconfig 2005-01-29 11:26:09.173353360 -0800 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.10-rc2 -# Sun Nov 21 14:11:58 2004 +# Linux kernel version: 2.6.11-rc2 +# Wed Jan 26 02:49:03 2005 # CONFIG_MIPS=y # CONFIG_MIPS64 is not set @@ -58,6 +58,7 @@ CONFIG_KMOD=y # # CONFIG_MACH_JAZZ is not set CONFIG_MACH_VR41XX=y +# CONFIG_NEC_CMBVR4133 is not set CONFIG_CASIO_E55=y # CONFIG_IBM_WORKPAD is not set # CONFIG_TANBAC_TB0226 is not set @@ -92,12 +93,12 @@ CONFIG_CASIO_E55=y # CONFIG_SNI_RM200_PCI is not set # CONFIG_TOSHIBA_RBTX4927 is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_HAVE_DEC_LOCK=y CONFIG_DMA_NONCOHERENT=y CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_IRQ_CPU=y CONFIG_MIPS_L1_CACHE_SHIFT=5 -# CONFIG_FB is not set # # CPU selection @@ -134,6 +135,20 @@ CONFIG_ISA=y CONFIG_MMU=y # +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# PC-card bridges +# +CONFIG_PCMCIA_PROBE=y + +# +# PCI Hotplug Support +# + +# # Executable file formats # CONFIG_BINFMT_ELF=y @@ -149,6 +164,7 @@ CONFIG_TRAD_SIGNALS=y # CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set # # Memory Technology Devices (MTD) @@ -170,9 +186,11 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y # # CONFIG_BLK_DEV_FD is not set # CONFIG_BLK_DEV_XD is not set +# CONFIG_BLK_DEV_COW_COMMON is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set +CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_INITRAMFS_SOURCE="" # CONFIG_LBD is not set CONFIG_CDROM_PKTCDVD=m @@ -186,6 +204,7 @@ CONFIG_IOSCHED_NOOP=y CONFIG_IOSCHED_AS=y CONFIG_IOSCHED_DEADLINE=y CONFIG_IOSCHED_CFQ=y +CONFIG_ATA_OVER_ETH=m # # ATA/ATAPI/MFM/RLL support @@ -397,6 +416,7 @@ CONFIG_SERIO=y CONFIG_SERIO_I8042=y CONFIG_SERIO_SERPORT=y # CONFIG_SERIO_CT82C710 is not set +# CONFIG_SERIO_LIBPS2 is not set CONFIG_SERIO_RAW=m # @@ -463,7 +483,6 @@ CONFIG_WATCHDOG=y # # Ftape, the floppy tape device driver # -# CONFIG_AGP is not set # CONFIG_DRM is not set # CONFIG_RAW_DRIVER is not set @@ -494,6 +513,7 @@ CONFIG_WATCHDOG=y # # Graphics support # +# CONFIG_FB is not set # # Console display driver support @@ -501,6 +521,7 @@ CONFIG_WATCHDOG=y # CONFIG_VGA_CONSOLE is not set # CONFIG_MDA_CONSOLE is not set CONFIG_DUMMY_CONSOLE=y +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set # # Sound @@ -514,11 +535,25 @@ CONFIG_DUMMY_CONSOLE=y # CONFIG_USB_ARCH_HAS_OHCI is not set # +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information +# + +# # USB Gadget Support # # CONFIG_USB_GADGET is not set # +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# InfiniBand support +# +# CONFIG_INFINIBAND is not set + +# # File systems # CONFIG_EXT2_FS=y @@ -611,6 +646,11 @@ CONFIG_MSDOS_PARTITION=y # CONFIG_NLS is not set # +# Profiling support +# +# CONFIG_PROFILING is not set + +# # Kernel hacking # # CONFIG_DEBUG_KERNEL is not set @@ -630,6 +670,10 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y # CONFIG_CRYPTO is not set # +# Hardware crypto devices +# + +# # Library routines # # CONFIG_CRC_CCITT is not set diff -puN arch/mips/configs/mpc30x_defconfig~mips-vr41xx-updates arch/mips/configs/mpc30x_defconfig --- 25/arch/mips/configs/mpc30x_defconfig~mips-vr41xx-updates 2005-01-29 11:26:09.140358376 -0800 +++ 25-akpm/arch/mips/configs/mpc30x_defconfig 2005-01-29 11:26:09.174353208 -0800 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.10-rc2 -# Sun Nov 21 14:12:02 2004 +# Linux kernel version: 2.6.11-rc2 +# Wed Jan 26 02:49:07 2005 # CONFIG_MIPS=y # CONFIG_MIPS64 is not set @@ -58,6 +58,7 @@ CONFIG_KMOD=y # # CONFIG_MACH_JAZZ is not set CONFIG_MACH_VR41XX=y +# CONFIG_NEC_CMBVR4133 is not set # CONFIG_CASIO_E55 is not set # CONFIG_IBM_WORKPAD is not set # CONFIG_TANBAC_TB0226 is not set @@ -93,12 +94,12 @@ CONFIG_VRC4173=y # CONFIG_SNI_RM200_PCI is not set # CONFIG_TOSHIBA_RBTX4927 is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_HAVE_DEC_LOCK=y CONFIG_DMA_NONCOHERENT=y CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_IRQ_CPU=y CONFIG_MIPS_L1_CACHE_SHIFT=5 -# CONFIG_FB is not set # # CPU selection @@ -138,6 +139,20 @@ CONFIG_PCI_NAMES=y CONFIG_MMU=y # +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# PC-card bridges +# + +# +# PCI Hotplug Support +# +# CONFIG_HOTPLUG_PCI is not set + +# # Executable file formats # CONFIG_BINFMT_ELF=y @@ -153,6 +168,7 @@ CONFIG_TRAD_SIGNALS=y # CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set # # Memory Technology Devices (MTD) @@ -176,10 +192,12 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y # CONFIG_BLK_CPQ_CISS_DA is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_RAM is not set +CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_INITRAMFS_SOURCE="" # CONFIG_LBD is not set CONFIG_CDROM_PKTCDVD=m @@ -193,6 +211,7 @@ CONFIG_IOSCHED_NOOP=y CONFIG_IOSCHED_AS=y CONFIG_IOSCHED_DEADLINE=y CONFIG_IOSCHED_CFQ=y +CONFIG_ATA_OVER_ETH=m # # ATA/ATAPI/MFM/RLL support @@ -396,6 +415,7 @@ CONFIG_SERIO_I8042=y CONFIG_SERIO_SERPORT=y # CONFIG_SERIO_CT82C710 is not set # CONFIG_SERIO_PCIPS2 is not set +# CONFIG_SERIO_LIBPS2 is not set CONFIG_SERIO_RAW=m # @@ -450,7 +470,6 @@ CONFIG_LEGACY_PTY_COUNT=256 # # Ftape, the floppy tape device driver # -# CONFIG_AGP is not set # CONFIG_DRM is not set # CONFIG_RAW_DRIVER is not set @@ -481,12 +500,14 @@ CONFIG_LEGACY_PTY_COUNT=256 # # Graphics support # +# CONFIG_FB is not set # # Console display driver support # # CONFIG_VGA_CONSOLE is not set CONFIG_DUMMY_CONSOLE=y +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set # # Sound @@ -501,11 +522,25 @@ CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB_ARCH_HAS_OHCI=y # +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information +# + +# # USB Gadget Support # # CONFIG_USB_GADGET is not set # +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# InfiniBand support +# +# CONFIG_INFINIBAND is not set + +# # File systems # CONFIG_EXT2_FS=y @@ -597,6 +632,11 @@ CONFIG_MSDOS_PARTITION=y # CONFIG_NLS is not set # +# Profiling support +# +# CONFIG_PROFILING is not set + +# # Kernel hacking # # CONFIG_DEBUG_KERNEL is not set @@ -639,6 +679,10 @@ CONFIG_CRYPTO_CRC32C=m # CONFIG_CRYPTO_TEST is not set # +# Hardware crypto devices +# + +# # Library routines # # CONFIG_CRC_CCITT is not set diff -puN arch/mips/configs/tb0226_defconfig~mips-vr41xx-updates arch/mips/configs/tb0226_defconfig --- 25/arch/mips/configs/tb0226_defconfig~mips-vr41xx-updates 2005-01-29 11:26:09.142358072 -0800 +++ 25-akpm/arch/mips/configs/tb0226_defconfig 2005-01-29 11:26:09.175353056 -0800 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.10-rc2 -# Sun Nov 21 14:12:07 2004 +# Linux kernel version: 2.6.11-rc2 +# Wed Jan 26 02:49:12 2005 # CONFIG_MIPS=y # CONFIG_MIPS64 is not set @@ -58,6 +58,7 @@ CONFIG_KMOD=y # # CONFIG_MACH_JAZZ is not set CONFIG_MACH_VR41XX=y +# CONFIG_NEC_CMBVR4133 is not set # CONFIG_CASIO_E55 is not set # CONFIG_IBM_WORKPAD is not set CONFIG_TANBAC_TB0226=y @@ -91,12 +92,12 @@ CONFIG_TANBAC_TB0226=y # CONFIG_SNI_RM200_PCI is not set # CONFIG_TOSHIBA_RBTX4927 is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_HAVE_DEC_LOCK=y CONFIG_DMA_NONCOHERENT=y CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_IRQ_CPU=y CONFIG_MIPS_L1_CACHE_SHIFT=5 -CONFIG_FB=y # # CPU selection @@ -134,6 +135,19 @@ CONFIG_HW_HAS_PCI=y CONFIG_MMU=y # +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# PC-card bridges +# + +# +# PCI Hotplug Support +# + +# # Executable file formats # CONFIG_BINFMT_ELF=y @@ -149,6 +163,7 @@ CONFIG_TRAD_SIGNALS=y # CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set # # Memory Technology Devices (MTD) @@ -168,10 +183,12 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y # Block devices # # CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_DEV_COW_COMMON is not set CONFIG_BLK_DEV_LOOP=m # CONFIG_BLK_DEV_CRYPTOLOOP is not set CONFIG_BLK_DEV_NBD=m CONFIG_BLK_DEV_RAM=m +CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_BLK_DEV_RAM_SIZE=4096 CONFIG_INITRAMFS_SOURCE="" # CONFIG_LBD is not set @@ -186,6 +203,7 @@ CONFIG_IOSCHED_NOOP=y CONFIG_IOSCHED_AS=y CONFIG_IOSCHED_DEADLINE=y CONFIG_IOSCHED_CFQ=y +CONFIG_ATA_OVER_ETH=m # # ATA/ATAPI/MFM/RLL support @@ -242,12 +260,12 @@ CONFIG_SCSI_CONSTANTS=y # # CONFIG_SCSI_SPI_ATTRS is not set # CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set # # SCSI low-level drivers # # CONFIG_SCSI_SATA is not set -# CONFIG_SCSI_QLOGIC_1280_1040 is not set # CONFIG_SCSI_DEBUG is not set # @@ -420,6 +438,7 @@ CONFIG_SERIO=y CONFIG_SERIO_I8042=y CONFIG_SERIO_SERPORT=y # CONFIG_SERIO_CT82C710 is not set +# CONFIG_SERIO_LIBPS2 is not set CONFIG_SERIO_RAW=m # @@ -473,7 +492,6 @@ CONFIG_LEGACY_PTY_COUNT=256 # # Ftape, the floppy tape device driver # -# CONFIG_AGP is not set # CONFIG_DRM is not set # CONFIG_RAW_DRIVER is not set @@ -504,6 +522,7 @@ CONFIG_LEGACY_PTY_COUNT=256 # # Graphics support # +CONFIG_FB=y # CONFIG_FB_MODE_HELPERS is not set # CONFIG_FB_TILEBLITTING is not set # CONFIG_FB_VIRTUAL is not set @@ -519,6 +538,7 @@ CONFIG_DUMMY_CONSOLE=y # Logo configuration # # CONFIG_LOGO is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set # # Sound @@ -542,11 +562,25 @@ CONFIG_SOUND=y # CONFIG_USB_ARCH_HAS_OHCI is not set # +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information +# + +# # USB Gadget Support # # CONFIG_USB_GADGET is not set # +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# InfiniBand support +# +# CONFIG_INFINIBAND is not set + +# # File systems # CONFIG_EXT2_FS=y @@ -690,6 +724,11 @@ CONFIG_NLS_ISO8859_1=m # CONFIG_NLS_UTF8 is not set # +# Profiling support +# +# CONFIG_PROFILING is not set + +# # Kernel hacking # # CONFIG_DEBUG_KERNEL is not set @@ -709,6 +748,10 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y # CONFIG_CRYPTO is not set # +# Hardware crypto devices +# + +# # Library routines # CONFIG_CRC_CCITT=m diff -puN arch/mips/configs/tb0229_defconfig~mips-vr41xx-updates arch/mips/configs/tb0229_defconfig --- 25/arch/mips/configs/tb0229_defconfig~mips-vr41xx-updates 2005-01-29 11:26:09.143357920 -0800 +++ 25-akpm/arch/mips/configs/tb0229_defconfig 2005-01-29 11:26:09.177352752 -0800 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.10-rc2 -# Sun Nov 21 14:12:07 2004 +# Linux kernel version: 2.6.11-rc2 +# Wed Jan 26 02:49:12 2005 # CONFIG_MIPS=y # CONFIG_MIPS64 is not set @@ -58,14 +58,16 @@ CONFIG_KMOD=y # # CONFIG_MACH_JAZZ is not set CONFIG_MACH_VR41XX=y +# CONFIG_NEC_CMBVR4133 is not set # CONFIG_CASIO_E55 is not set # CONFIG_IBM_WORKPAD is not set # CONFIG_TANBAC_TB0226 is not set CONFIG_TANBAC_TB0229=y +CONFIG_TANBAC_TB0219=y # CONFIG_VICTOR_MPC30X is not set # CONFIG_ZAO_CAPCELLA is not set CONFIG_PCI_VR41XX=y -CONFIG_VRC4173=y +# CONFIG_VRC4173 is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_MIPS_COBALT is not set # CONFIG_MACH_DECSTATION is not set @@ -93,13 +95,12 @@ CONFIG_VRC4173=y # CONFIG_SNI_RM200_PCI is not set # CONFIG_TOSHIBA_RBTX4927 is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_HAVE_DEC_LOCK=y CONFIG_DMA_NONCOHERENT=y CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_IRQ_CPU=y CONFIG_MIPS_L1_CACHE_SHIFT=5 -# CONFIG_FB is not set -CONFIG_TANBAC_TB0219=y # # CPU selection @@ -139,6 +140,20 @@ CONFIG_PCI_NAMES=y CONFIG_MMU=y # +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# PC-card bridges +# + +# +# PCI Hotplug Support +# +# CONFIG_HOTPLUG_PCI is not set + +# # Executable file formats # CONFIG_BINFMT_ELF=y @@ -154,6 +169,7 @@ CONFIG_TRAD_SIGNALS=y # CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set # # Memory Technology Devices (MTD) @@ -177,11 +193,13 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y # CONFIG_BLK_CPQ_CISS_DA is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set CONFIG_BLK_DEV_LOOP=m # CONFIG_BLK_DEV_CRYPTOLOOP is not set CONFIG_BLK_DEV_NBD=m # CONFIG_BLK_DEV_SX8 is not set CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_BLK_DEV_RAM_SIZE=4096 # CONFIG_BLK_DEV_INITRD is not set CONFIG_INITRAMFS_SOURCE="" @@ -197,6 +215,7 @@ CONFIG_IOSCHED_NOOP=y CONFIG_IOSCHED_AS=y CONFIG_IOSCHED_DEADLINE=y CONFIG_IOSCHED_CFQ=y +CONFIG_ATA_OVER_ETH=m # # ATA/ATAPI/MFM/RLL support @@ -315,7 +334,7 @@ CONFIG_DUMMY=m # Ethernet (10 or 100Mbit) # CONFIG_NET_ETHERNET=y -# CONFIG_MII is not set +CONFIG_MII=y # CONFIG_HAPPYMEAL is not set # CONFIG_SUNGEM is not set # CONFIG_NET_VENDOR_3COM is not set @@ -325,7 +344,26 @@ CONFIG_NET_ETHERNET=y # # CONFIG_NET_TULIP is not set # CONFIG_HP100 is not set -# CONFIG_NET_PCI is not set +CONFIG_NET_PCI=y +CONFIG_PCNET32=y +# CONFIG_AMD8111_ETH is not set +# CONFIG_ADAPTEC_STARFIRE is not set +# CONFIG_B44 is not set +# CONFIG_FORCEDETH is not set +# CONFIG_DGRS is not set +CONFIG_EEPRO100=y +# CONFIG_E100 is not set +# CONFIG_FEALNX is not set +# CONFIG_NATSEMI is not set +# CONFIG_NE2K_PCI is not set +# CONFIG_8139CP is not set +# CONFIG_8139TOO is not set +# CONFIG_SIS900 is not set +# CONFIG_EPIC100 is not set +# CONFIG_SUNDANCE is not set +# CONFIG_TLAN is not set +# CONFIG_VIA_RHINE is not set +# CONFIG_LAN_SAA9730 is not set # # Ethernet (1000 Mbit) @@ -338,6 +376,7 @@ CONFIG_NET_ETHERNET=y # CONFIG_YELLOWFIN is not set # CONFIG_R8169 is not set # CONFIG_SK98LIN is not set +# CONFIG_VIA_VELOCITY is not set # CONFIG_TIGON3 is not set # @@ -414,6 +453,7 @@ CONFIG_SERIO_I8042=y CONFIG_SERIO_SERPORT=y # CONFIG_SERIO_CT82C710 is not set # CONFIG_SERIO_PCIPS2 is not set +# CONFIG_SERIO_LIBPS2 is not set CONFIG_SERIO_RAW=m # @@ -468,7 +508,6 @@ CONFIG_LEGACY_PTY_COUNT=256 # # Ftape, the floppy tape device driver # -# CONFIG_AGP is not set # CONFIG_DRM is not set # CONFIG_RAW_DRIVER is not set @@ -499,12 +538,14 @@ CONFIG_LEGACY_PTY_COUNT=256 # # Graphics support # +# CONFIG_FB is not set # # Console display driver support # # CONFIG_VGA_CONSOLE is not set CONFIG_DUMMY_CONSOLE=y +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set # # Sound @@ -519,11 +560,25 @@ CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB_ARCH_HAS_OHCI=y # +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information +# + +# # USB Gadget Support # # CONFIG_USB_GADGET is not set # +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# InfiniBand support +# +# CONFIG_INFINIBAND is not set + +# # File systems # CONFIG_EXT2_FS=y @@ -538,6 +593,7 @@ CONFIG_FS_MBCACHE=y # CONFIG_REISERFS_FS is not set CONFIG_JFS_FS=m # CONFIG_JFS_POSIX_ACL is not set +# CONFIG_JFS_SECURITY is not set # CONFIG_JFS_DEBUG is not set # CONFIG_JFS_STATISTICS is not set CONFIG_XFS_FS=y @@ -680,11 +736,16 @@ CONFIG_NLS_ISO8859_1=m # CONFIG_NLS_UTF8 is not set # +# Profiling support +# +# CONFIG_PROFILING is not set + +# # Kernel hacking # # CONFIG_DEBUG_KERNEL is not set CONFIG_CROSSCOMPILE=y -CONFIG_CMDLINE="" +CONFIG_CMDLINE="mem=64M console=ttyS0,38400 ip=bootp root=/dev/nfs" # # Security options @@ -699,10 +760,14 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y # CONFIG_CRYPTO is not set # +# Hardware crypto devices +# + +# # Library routines # CONFIG_CRC_CCITT=m -# CONFIG_CRC32 is not set +CONFIG_CRC32=y # CONFIG_LIBCRC32C is not set CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=m diff -puN arch/mips/configs/workpad_defconfig~mips-vr41xx-updates arch/mips/configs/workpad_defconfig --- 25/arch/mips/configs/workpad_defconfig~mips-vr41xx-updates 2005-01-29 11:26:09.145357616 -0800 +++ 25-akpm/arch/mips/configs/workpad_defconfig 2005-01-29 11:26:09.178352600 -0800 @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.10-rc2 -# Sun Nov 21 14:12:08 2004 +# Linux kernel version: 2.6.11-rc2 +# Wed Jan 26 02:49:12 2005 # CONFIG_MIPS=y # CONFIG_MIPS64 is not set @@ -58,6 +58,7 @@ CONFIG_KMOD=y # # CONFIG_MACH_JAZZ is not set CONFIG_MACH_VR41XX=y +# CONFIG_NEC_CMBVR4133 is not set # CONFIG_CASIO_E55 is not set CONFIG_IBM_WORKPAD=y # CONFIG_TANBAC_TB0226 is not set @@ -92,12 +93,12 @@ CONFIG_VRC4171=y # CONFIG_SNI_RM200_PCI is not set # CONFIG_TOSHIBA_RBTX4927 is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_HAVE_DEC_LOCK=y CONFIG_DMA_NONCOHERENT=y CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_IRQ_CPU=y CONFIG_MIPS_L1_CACHE_SHIFT=5 -# CONFIG_FB is not set # # CPU selection @@ -134,6 +135,20 @@ CONFIG_ISA=y CONFIG_MMU=y # +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# PC-card bridges +# +CONFIG_PCMCIA_PROBE=y + +# +# PCI Hotplug Support +# + +# # Executable file formats # CONFIG_BINFMT_ELF=y @@ -149,6 +164,7 @@ CONFIG_TRAD_SIGNALS=y # CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set # # Memory Technology Devices (MTD) @@ -170,9 +186,11 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y # # CONFIG_BLK_DEV_FD is not set # CONFIG_BLK_DEV_XD is not set +# CONFIG_BLK_DEV_COW_COMMON is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set +CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_INITRAMFS_SOURCE="" # CONFIG_LBD is not set CONFIG_CDROM_PKTCDVD=m @@ -186,6 +204,7 @@ CONFIG_IOSCHED_NOOP=y CONFIG_IOSCHED_AS=y CONFIG_IOSCHED_DEADLINE=y CONFIG_IOSCHED_CFQ=y +CONFIG_ATA_OVER_ETH=m # # ATA/ATAPI/MFM/RLL support @@ -397,6 +416,7 @@ CONFIG_SERIO=y CONFIG_SERIO_I8042=y CONFIG_SERIO_SERPORT=y # CONFIG_SERIO_CT82C710 is not set +# CONFIG_SERIO_LIBPS2 is not set CONFIG_SERIO_RAW=m # @@ -463,7 +483,6 @@ CONFIG_WATCHDOG=y # # Ftape, the floppy tape device driver # -# CONFIG_AGP is not set # CONFIG_DRM is not set # CONFIG_RAW_DRIVER is not set @@ -494,6 +513,7 @@ CONFIG_WATCHDOG=y # # Graphics support # +# CONFIG_FB is not set # # Console display driver support @@ -501,6 +521,7 @@ CONFIG_WATCHDOG=y # CONFIG_VGA_CONSOLE is not set # CONFIG_MDA_CONSOLE is not set CONFIG_DUMMY_CONSOLE=y +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set # # Sound @@ -514,11 +535,25 @@ CONFIG_DUMMY_CONSOLE=y # CONFIG_USB_ARCH_HAS_OHCI is not set # +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information +# + +# # USB Gadget Support # # CONFIG_USB_GADGET is not set # +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# InfiniBand support +# +# CONFIG_INFINIBAND is not set + +# # File systems # CONFIG_EXT2_FS=y @@ -615,6 +650,11 @@ CONFIG_MSDOS_PARTITION=y # CONFIG_NLS is not set # +# Profiling support +# +# CONFIG_PROFILING is not set + +# # Kernel hacking # # CONFIG_DEBUG_KERNEL is not set @@ -634,6 +674,10 @@ CONFIG_KEYS_DEBUG_PROC_KEYS=y # CONFIG_CRYPTO is not set # +# Hardware crypto devices +# + +# # Library routines # # CONFIG_CRC_CCITT is not set diff -puN arch/mips/Kconfig~mips-vr41xx-updates arch/mips/Kconfig --- 25/arch/mips/Kconfig~mips-vr41xx-updates 2005-01-29 11:26:09.146357464 -0800 +++ 25-akpm/arch/mips/Kconfig 2005-01-29 11:26:09.201349104 -0800 @@ -73,6 +73,21 @@ config OLIVETTI_M700 config MACH_VR41XX bool "Support for NEC VR41XX-based machines" +config NEC_CMBVR4133 + bool "Support for NEC CMB-VR4133" + depends on MACH_VR41XX + select CPU_VR41XX + select DMA_NONCOHERENT + select IRQ_CPU + select HW_HAS_PCI + select PCI_VR41XX + +config ROCKHOPPER + bool "Support for Rockhopper baseboard" + depends on NEC_CMBVR4133 + select I8259 + select HAVE_STD_PC_SERIAL_PORT + config CASIO_E55 bool "Support for CASIO CASSIOPEIA E-10/15/55/65" depends on MACH_VR41XX @@ -107,6 +122,10 @@ config TANBAC_TB0229 The TANBAC TB0229 (VR4131DIMM) is a MIPS-based platform manufactured by TANBAC. Please refer to about VR4131DIMM. +config TANBAC_TB0219 + bool "Added TANBAC TB0219 Base board support" + depends on TANBAC_TB0229 + config VICTOR_MPC30X bool "Support for Victor MP-C303/304" select DMA_NONCOHERENT diff -puN arch/mips/Makefile~mips-vr41xx-updates arch/mips/Makefile --- 25/arch/mips/Makefile~mips-vr41xx-updates 2005-01-29 11:26:09.147357312 -0800 +++ 25-akpm/arch/mips/Makefile 2005-01-29 11:26:09.202348952 -0800 @@ -482,6 +482,12 @@ core-$(CONFIG_MACH_VR41XX) += arch/mips/ cflags-$(CONFIG_MACH_VR41XX) += -Iinclude/asm-mips/mach-vr41xx # +# NEC VR4133 +# +core-$(CONFIG_NEC_CMBVR4133) += arch/mips/vr41xx/nec-cmbvr4133/ +load-$(CONFIG_NEC_CMBVR4133) += 0xffffffff80100000 + +# # ZAO Networks Capcella (VR4131) # core-$(CONFIG_ZAO_CAPCELLA) += arch/mips/vr41xx/zao-capcella/ diff -puN /dev/null arch/mips/pci/fixup-vr4133.c --- /dev/null 2003-09-15 06:40:47.000000000 -0700 +++ 25-akpm/arch/mips/pci/fixup-vr4133.c 2005-01-29 11:26:09.198349560 -0800 @@ -0,0 +1,204 @@ +/* + * arch/mips/vr41xx/nec-cmbvr4133/pci_fixup.c + * + * The NEC CMB-VR4133 Board specific PCI fixups. + * + * Author: Yoichi Yuasa and + * Alex Sapkov + * + * 2003-2004 (c) MontaVista, Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + * + * Modified for support in 2.6 + * Author: Manish Lachwani (mlachwani@mvista.com) + * + */ +#include +#include +#include + +#include +#include + +extern int vr4133_rockhopper; +extern void ali_m1535plus_init(struct pci_dev *dev); +extern void ali_m5229_init(struct pci_dev *dev); + +/* Do platform specific device initialization at pci_enable_device() time */ +int pcibios_plat_dev_init(struct pci_dev *dev) +{ + /* + * We have to reset AMD PCnet adapter on Rockhopper since + * PMON leaves it enabled and generating interrupts. This leads + * to a lock if some PCI device driver later enables the IRQ line + * shared with PCnet and there is no AMD PCnet driver to catch its + * interrupts. + */ +#ifdef CONFIG_ROCKHOPPER + if (dev->vendor == PCI_VENDOR_ID_AMD && + dev->device == PCI_DEVICE_ID_AMD_LANCE) { + inl(pci_resource_start(dev, 0) + 0x18); + } +#endif + + /* + * we have to open the bridges' windows down to 0 because otherwise + * we cannot access ISA south bridge I/O registers that get mapped from + * 0. for example, 8259 PIC would be unaccessible without that + */ + if(dev->vendor == PCI_VENDOR_ID_INTEL && dev->device == PCI_DEVICE_ID_INTEL_S21152BB) { + pci_write_config_byte(dev, PCI_IO_BASE, 0); + if(dev->bus->number == 0) { + pci_write_config_word(dev, PCI_IO_BASE_UPPER16, 0); + } else { + pci_write_config_word(dev, PCI_IO_BASE_UPPER16, 1); + } + } + + return 0; +} + +/* + * M1535 IRQ mapping + * Feel free to change this, although it shouldn't be needed + */ +#define M1535_IRQ_INTA 7 +#define M1535_IRQ_INTB 9 +#define M1535_IRQ_INTC 10 +#define M1535_IRQ_INTD 11 + +#define M1535_IRQ_USB 9 +#define M1535_IRQ_IDE 14 +#define M1535_IRQ_IDE2 15 +#define M1535_IRQ_PS2 12 +#define M1535_IRQ_RTC 8 +#define M1535_IRQ_FDC 6 +#define M1535_IRQ_AUDIO 5 +#define M1535_IRQ_COM1 4 +#define M1535_IRQ_COM2 4 +#define M1535_IRQ_IRDA 3 +#define M1535_IRQ_KBD 1 +#define M1535_IRQ_TMR 0 + +/* Rockhopper "slots" assignment; this is hard-coded ... */ +#define ROCKHOPPER_M5451_SLOT 1 +#define ROCKHOPPER_M1535_SLOT 2 +#define ROCKHOPPER_M5229_SLOT 11 +#define ROCKHOPPER_M5237_SLOT 15 +#define ROCKHOPPER_PMU_SLOT 12 +/* ... and hard-wired. */ +#define ROCKHOPPER_PCI1_SLOT 3 +#define ROCKHOPPER_PCI2_SLOT 4 +#define ROCKHOPPER_PCI3_SLOT 5 +#define ROCKHOPPER_PCI4_SLOT 6 +#define ROCKHOPPER_PCNET_SLOT 1 + +#define M1535_IRQ_MASK(n) (1 << (n)) + +#define M1535_IRQ_EDGE (M1535_IRQ_MASK(M1535_IRQ_TMR) | \ + M1535_IRQ_MASK(M1535_IRQ_KBD) | \ + M1535_IRQ_MASK(M1535_IRQ_COM1) | \ + M1535_IRQ_MASK(M1535_IRQ_COM2) | \ + M1535_IRQ_MASK(M1535_IRQ_IRDA) | \ + M1535_IRQ_MASK(M1535_IRQ_RTC) | \ + M1535_IRQ_MASK(M1535_IRQ_FDC) | \ + M1535_IRQ_MASK(M1535_IRQ_PS2)) + +#define M1535_IRQ_LEVEL (M1535_IRQ_MASK(M1535_IRQ_IDE) | \ + M1535_IRQ_MASK(M1535_IRQ_USB) | \ + M1535_IRQ_MASK(M1535_IRQ_INTA) | \ + M1535_IRQ_MASK(M1535_IRQ_INTB) | \ + M1535_IRQ_MASK(M1535_IRQ_INTC) | \ + M1535_IRQ_MASK(M1535_IRQ_INTD)) + +struct irq_map_entry { + u16 bus; + u8 slot; + u8 irq; +}; +static struct irq_map_entry int_map[] = { + {1, ROCKHOPPER_M5451_SLOT, M1535_IRQ_AUDIO}, /* Audio controller */ + {1, ROCKHOPPER_PCI1_SLOT, M1535_IRQ_INTD}, /* PCI slot #1 */ + {1, ROCKHOPPER_PCI2_SLOT, M1535_IRQ_INTC}, /* PCI slot #2 */ + {1, ROCKHOPPER_M5237_SLOT, M1535_IRQ_USB}, /* USB host controller */ + {1, ROCKHOPPER_M5229_SLOT, IDE_PRIMARY_IRQ}, /* IDE controller */ + {2, ROCKHOPPER_PCNET_SLOT, M1535_IRQ_INTD}, /* AMD Am79c973 on-board + ethernet */ + {2, ROCKHOPPER_PCI3_SLOT, M1535_IRQ_INTB}, /* PCI slot #3 */ + {2, ROCKHOPPER_PCI4_SLOT, M1535_IRQ_INTC} /* PCI slot #4 */ +}; + +static int pci_intlines[] = + { M1535_IRQ_INTA, M1535_IRQ_INTB, M1535_IRQ_INTC, M1535_IRQ_INTD }; + +/* Determine the Rockhopper IRQ line number for the PCI device */ +int rockhopper_get_irq(struct pci_dev *dev, u8 pin, u8 slot) +{ + struct pci_bus *bus; + int i; + + bus = dev->bus; + if (bus == NULL) + return -1; + + for (i = 0; i < sizeof (int_map) / sizeof (int_map[0]); i++) { + if (int_map[i].bus == bus->number && int_map[i].slot == slot) { + int line; + for (line = 0; line < 4; line++) + if (pci_intlines[line] == int_map[i].irq) + break; + if (line < 4) + return pci_intlines[(line + (pin - 1)) % 4]; + else + return int_map[i].irq; + } + } + return -1; +} + +#ifdef CONFIG_ROCKHOPPER +void i8259_init(void) +{ + outb(0x11, 0x20); /* Master ICW1 */ + outb(I8259_IRQ_BASE, 0x21); /* Master ICW2 */ + outb(0x04, 0x21); /* Master ICW3 */ + outb(0x01, 0x21); /* Master ICW4 */ + outb(0xff, 0x21); /* Master IMW */ + + outb(0x11, 0xa0); /* Slave ICW1 */ + outb(I8259_IRQ_BASE + 8, 0xa1); /* Slave ICW2 */ + outb(0x02, 0xa1); /* Slave ICW3 */ + outb(0x01, 0xa1); /* Slave ICW4 */ + outb(0xff, 0xa1); /* Slave IMW */ + + outb(0x00, 0x4d0); + outb(0x02, 0x4d1); /* USB IRQ9 is level */ +} +#endif + +int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +{ + extern int pci_probe_only; + pci_probe_only = 1; + +#ifdef CONFIG_ROCKHOPPER + if( dev->bus->number == 1 && vr4133_rockhopper ) { + if(slot == ROCKHOPPER_PCI1_SLOT || slot == ROCKHOPPER_PCI2_SLOT) + dev->irq = CMBVR41XX_INTA_IRQ; + else + dev->irq = rockhopper_get_irq(dev, pin, slot); + } else + dev->irq = CMBVR41XX_INTA_IRQ; +#else + dev->irq = CMBVR41XX_INTA_IRQ; +#endif + + return dev->irq; +} + +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, ali_m1535plus_init); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M5229, ali_m5229_init); + + diff -puN arch/mips/pci/Makefile~mips-vr41xx-updates arch/mips/pci/Makefile --- 25/arch/mips/pci/Makefile~mips-vr41xx-updates 2005-01-29 11:26:09.149357008 -0800 +++ 25-akpm/arch/mips/pci/Makefile 2005-01-29 11:26:09.197349712 -0800 @@ -17,6 +17,7 @@ obj-$(CONFIG_MIPS_MSC) += ops-msc.o obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o obj-$(CONFIG_MIPS_TX3927) += ops-jmr3927.o obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o +obj-$(CONFIG_NEC_CMBVR4133) += fixup-vr4133.o # # These are still pretty much in the old state, watch, go blind. diff -puN arch/mips/pci/pci-vr41xx.c~mips-vr41xx-updates arch/mips/pci/pci-vr41xx.c --- 25/arch/mips/pci/pci-vr41xx.c~mips-vr41xx-updates 2005-01-29 11:26:09.150356856 -0800 +++ 25-akpm/arch/mips/pci/pci-vr41xx.c 2005-01-29 11:26:09.199349408 -0800 @@ -270,7 +270,7 @@ static int __init vr41xx_pciu_init(void) /* Clear bus error */ readl(BUSERRADREG); - writel(CONFIG_DONE, PCIENREG); + writel(BLOODY_CONFIG_DONE, PCIENREG); if (setup->mem_resource != NULL) vr41xx_pci_controller.mem_resource = setup->mem_resource; diff -puN arch/mips/pci/pci-vr41xx.h~mips-vr41xx-updates arch/mips/pci/pci-vr41xx.h --- 25/arch/mips/pci/pci-vr41xx.h~mips-vr41xx-updates 2005-01-29 11:26:09.152356552 -0800 +++ 25-akpm/arch/mips/pci/pci-vr41xx.h 2005-01-29 11:26:09.199349408 -0800 @@ -73,7 +73,7 @@ #define PCIRECONTREG KSEG1ADDR(0x0f000c30) #define RTRYCNT(reg) ((reg) & 0x000000ffU) #define PCIENREG KSEG1ADDR(0x0f000c34) - #define CONFIG_DONE 0x4U + #define BLOODY_CONFIG_DONE 0x4U #define PCICLKSELREG KSEG1ADDR(0x0f000c38) #define EQUAL_VTCLOCK 0x2U #define HALF_VTCLOCK 0x0U diff -puN arch/mips/vr41xx/common/giu.c~mips-vr41xx-updates arch/mips/vr41xx/common/giu.c --- 25/arch/mips/vr41xx/common/giu.c~mips-vr41xx-updates 2005-01-29 11:26:09.153356400 -0800 +++ 25-akpm/arch/mips/vr41xx/common/giu.c 2005-01-29 11:26:09.179352448 -0800 @@ -4,6 +4,7 @@ * Copyright (C) 2002 MontaVista Software Inc. * Author: Yoichi Yuasa * Copyright (C) 2003-2004 Yoichi Yuasa + * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -28,7 +29,6 @@ * - Added support for NEC VR4133. * - Removed board_irq_init. */ -#include #include #include #include diff -puN arch/mips/vr41xx/common/icu.c~mips-vr41xx-updates arch/mips/vr41xx/common/icu.c --- 25/arch/mips/vr41xx/common/icu.c~mips-vr41xx-updates 2005-01-29 11:26:09.154356248 -0800 +++ 25-akpm/arch/mips/vr41xx/common/icu.c 2005-01-29 11:26:09.179352448 -0800 @@ -4,6 +4,7 @@ * Copyright (C) 2001-2002 MontaVista Software Inc. * Author: Yoichi Yuasa * Copyright (C) 2003-2004 Yoichi Yuasa + * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -28,7 +29,6 @@ * Yoichi Yuasa * - Coped with INTASSIGN of NEC VR4133. */ -#include #include #include #include diff -puN arch/mips/vr41xx/common/ksyms.c~mips-vr41xx-updates arch/mips/vr41xx/common/ksyms.c --- 25/arch/mips/vr41xx/common/ksyms.c~mips-vr41xx-updates 2005-01-29 11:26:09.156355944 -0800 +++ 25-akpm/arch/mips/vr41xx/common/ksyms.c 2005-01-29 11:26:09.180352296 -0800 @@ -2,6 +2,7 @@ * ksyms.c, Export NEC VR4100 series specific functions needed for loadable modules. * * Copyright (C) 2003 Yoichi Yuasa + * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -17,7 +18,6 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include #include #include diff -puN arch/mips/vr41xx/common/vrc4173.c~mips-vr41xx-updates arch/mips/vr41xx/common/vrc4173.c --- 25/arch/mips/vr41xx/common/vrc4173.c~mips-vr41xx-updates 2005-01-29 11:26:09.158355640 -0800 +++ 25-akpm/arch/mips/vr41xx/common/vrc4173.c 2005-01-29 11:26:09.180352296 -0800 @@ -4,6 +4,7 @@ * Copyright (C) 2001-2003 MontaVista Software Inc. * Author: Yoichi Yuasa * Copyright (C) 2004 Yoichi Yuasa + * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -19,7 +20,6 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include #include #include #include diff -puN /dev/null arch/mips/vr41xx/nec-cmbvr4133/init.c --- /dev/null 2003-09-15 06:40:47.000000000 -0700 +++ 25-akpm/arch/mips/vr41xx/nec-cmbvr4133/init.c 2005-01-29 11:26:09.181352144 -0800 @@ -0,0 +1,78 @@ +/* + * arch/mips/vr41xx/nec-cmbvr4133/init.c + * + * PROM library initialisation code for NEC CMB-VR4133 board. + * + * Author: Yoichi Yuasa and + * Jun Sun and + * Alex Sapkov + * + * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + * + * Support for NEC-CMBVR4133 in 2.6 + * Manish Lachwani (mlachwani@mvista.com) + */ +#include +#include +#include +#include + +#include + +#ifdef CONFIG_ROCKHOPPER +#include +#include + +#define PCICONFDREG 0xaf000c14 +#define PCICONFAREG 0xaf000c18 +#endif + +const char *get_system_type(void) +{ + return "NEC CMB-VR4133"; +} + +#ifdef CONFIG_ROCKHOPPER +void disable_pcnet(void) +{ + u32 data; + + /* + * Workaround for the bug in PMON on VR4133. PMON leaves + * AMD PCNet controller (on Rockhopper) initialized and running in + * bus master mode. We have do disable it before doing any + * further initialization. Or we get problems with PCI bus 2 + * and random lockups and crashes. + */ + + writel((2 << 16) | + (PCI_DEVFN(1,0) << 8) | + (0 & 0xfc) | + 1UL, + PCICONFAREG); + + data = readl(PCICONFDREG); + + writel((2 << 16) | + (PCI_DEVFN(1,0) << 8) | + (4 & 0xfc) | + 1UL, + PCICONFAREG); + + data = readl(PCICONFDREG); + + writel((2 << 16) | + (PCI_DEVFN(1,0) << 8) | + (4 & 0xfc) | + 1UL, + PCICONFAREG); + + data &= ~4; + + writel(data, PCICONFDREG); +} +#endif + diff -puN /dev/null arch/mips/vr41xx/nec-cmbvr4133/irq.c --- /dev/null 2003-09-15 06:40:47.000000000 -0700 +++ 25-akpm/arch/mips/vr41xx/nec-cmbvr4133/irq.c 2005-01-29 11:26:09.182351992 -0800 @@ -0,0 +1,114 @@ +/* + * arch/mips/vr41xx/nec-cmbvr4133/irq.c + * + * Interrupt routines for the NEC CMB-VR4133 board. + * + * Author: Yoichi Yuasa and + * Alex Sapkov + * + * 2003-2004 (c) MontaVista, Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + * + * Support for NEC-CMBVR4133 in 2.6 + * Manish Lachwani (mlachwani@mvista.com) + */ +#include +#include +#include +#include +#include + +#include +#include + +extern void enable_8259A_irq(unsigned int irq); +extern void disable_8259A_irq(unsigned int irq); +extern void mask_and_ack_8259A(unsigned int irq); +extern void init_8259A(int hoge); + +extern int vr4133_rockhopper; + +static unsigned int startup_i8259_irq(unsigned int irq) +{ + enable_8259A_irq(irq - I8259_IRQ_BASE); + return 0; +} + +static void shutdown_i8259_irq(unsigned int irq) +{ + disable_8259A_irq(irq - I8259_IRQ_BASE); +} + +static void enable_i8259_irq(unsigned int irq) +{ + enable_8259A_irq(irq - I8259_IRQ_BASE); +} + +static void disable_i8259_irq(unsigned int irq) +{ + disable_8259A_irq(irq - I8259_IRQ_BASE); +} + +static void ack_i8259_irq(unsigned int irq) +{ + mask_and_ack_8259A(irq - I8259_IRQ_BASE); +} + +static void end_i8259_irq(unsigned int irq) +{ + if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) + enable_8259A_irq(irq - I8259_IRQ_BASE); +} + +static struct hw_interrupt_type i8259_irq_type = { + .typename = "XT-PIC", + .startup = startup_i8259_irq, + .shutdown = shutdown_i8259_irq, + .enable = enable_i8259_irq, + .disable = disable_i8259_irq, + .ack = ack_i8259_irq, + .end = end_i8259_irq, +}; + +static int i8259_get_irq_number(int irq) +{ + unsigned long isr; + + isr = inb(0x20); + irq = ffz(~isr); + if (irq == 2) { + isr = inb(0xa0); + irq = 8 + ffz(~isr); + } + + if (irq < 0 || irq > 15) + return -EINVAL; + + return I8259_IRQ_BASE + irq; +} + +static struct irqaction i8259_slave_cascade = { + .handler = &no_action, + .name = "cascade", +}; + +void __init rockhopper_init_irq(void) +{ + int i; + + if(!vr4133_rockhopper) { + printk(KERN_ERR "Not a Rockhopper Board \n"); + return; + } + + for (i = I8259_IRQ_BASE; i <= I8259_IRQ_LAST; i++) + irq_desc[i].handler = &i8259_irq_type; + + setup_irq(I8259_SLAVE_IRQ, &i8259_slave_cascade); + + vr41xx_set_irq_trigger(CMBVR41XX_INTC_PIN, TRIGGER_LEVEL, SIGNAL_THROUGH); + vr41xx_set_irq_level(CMBVR41XX_INTC_PIN, LEVEL_HIGH); + vr41xx_cascade_irq(CMBVR41XX_INTC_IRQ, i8259_get_irq_number); +} diff -puN /dev/null arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c --- /dev/null 2003-09-15 06:40:47.000000000 -0700 +++ 25-akpm/arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c 2005-01-29 11:26:09.183351840 -0800 @@ -0,0 +1,250 @@ +/* + * arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c + * + * Initialize for ALi M1535+(included M5229 and M5237). + * + * Author: Yoichi Yuasa and + * Alex Sapkov + * + * 2003-2004 (c) MontaVista, Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + * + * Support for NEC-CMBVR4133 in 2.6 + * Author: Manish Lachwani (mlachwani@mvista.com) + */ +#include +#include +#include +#include + +#include +#include +#include + +#define CONFIG_PORT(port) ((port) ? 0x3f0 : 0x370) +#define DATA_PORT(port) ((port) ? 0x3f1 : 0x371) +#define INDEX_PORT(port) CONFIG_PORT(port) + +#define ENTER_CONFIG_MODE(port) \ + do { \ + outb_p(0x51, CONFIG_PORT(port)); \ + outb_p(0x23, CONFIG_PORT(port)); \ + } while(0) + +#define SELECT_LOGICAL_DEVICE(port, dev_no) \ + do { \ + outb_p(0x07, INDEX_PORT(port)); \ + outb_p((dev_no), DATA_PORT(port)); \ + } while(0) + +#define WRITE_CONFIG_DATA(port,index,data) \ + do { \ + outb_p((index), INDEX_PORT(port)); \ + outb_p((data), DATA_PORT(port)); \ + } while(0) + +#define EXIT_CONFIG_MODE(port) outb(0xbb, CONFIG_PORT(port)) + +#define PCI_CONFIG_ADDR KSEG1ADDR(0x0f000c18) +#define PCI_CONFIG_DATA KSEG1ADDR(0x0f000c14) + +#ifdef CONFIG_BLK_DEV_FD + +void __devinit ali_m1535plus_fdc_init(int port) +{ + ENTER_CONFIG_MODE(port); + SELECT_LOGICAL_DEVICE(port, 0); /* FDC */ + WRITE_CONFIG_DATA(port, 0x30, 0x01); /* FDC: enable */ + WRITE_CONFIG_DATA(port, 0x60, 0x03); /* I/O port base: 0x3f0 */ + WRITE_CONFIG_DATA(port, 0x61, 0xf0); + WRITE_CONFIG_DATA(port, 0x70, 0x06); /* IRQ: 6 */ + WRITE_CONFIG_DATA(port, 0x74, 0x02); /* DMA: channel 2 */ + WRITE_CONFIG_DATA(port, 0xf0, 0x08); + WRITE_CONFIG_DATA(port, 0xf1, 0x00); + WRITE_CONFIG_DATA(port, 0xf2, 0xff); + WRITE_CONFIG_DATA(port, 0xf4, 0x00); + EXIT_CONFIG_MODE(port); +} + +#endif + +void __devinit ali_m1535plus_parport_init(int port) +{ + ENTER_CONFIG_MODE(port); + SELECT_LOGICAL_DEVICE(port, 3); /* Parallel Port */ + WRITE_CONFIG_DATA(port, 0x30, 0x01); + WRITE_CONFIG_DATA(port, 0x60, 0x03); /* I/O port base: 0x378 */ + WRITE_CONFIG_DATA(port, 0x61, 0x78); + WRITE_CONFIG_DATA(port, 0x70, 0x07); /* IRQ: 7 */ + WRITE_CONFIG_DATA(port, 0x74, 0x04); /* DMA: None */ + WRITE_CONFIG_DATA(port, 0xf0, 0x8c); /* IRQ polarity: Active Low */ + WRITE_CONFIG_DATA(port, 0xf1, 0xc5); + EXIT_CONFIG_MODE(port); +} + +void __devinit ali_m1535plus_keyboard_init(int port) +{ + ENTER_CONFIG_MODE(port); + SELECT_LOGICAL_DEVICE(port, 7); /* KEYBOARD */ + WRITE_CONFIG_DATA(port, 0x30, 0x01); /* KEYBOARD: eable */ + WRITE_CONFIG_DATA(port, 0x70, 0x01); /* IRQ: 1 */ + WRITE_CONFIG_DATA(port, 0x72, 0x0c); /* PS/2 Mouse IRQ: 12 */ + WRITE_CONFIG_DATA(port, 0xf0, 0x00); + EXIT_CONFIG_MODE(port); +} + +void __devinit ali_m1535plus_hotkey_init(int port) +{ + ENTER_CONFIG_MODE(port); + SELECT_LOGICAL_DEVICE(port, 0xc); /* HOTKEY */ + WRITE_CONFIG_DATA(port, 0x30, 0x00); + WRITE_CONFIG_DATA(port, 0xf0, 0x35); + WRITE_CONFIG_DATA(port, 0xf1, 0x14); + WRITE_CONFIG_DATA(port, 0xf2, 0x11); + WRITE_CONFIG_DATA(port, 0xf3, 0x71); + WRITE_CONFIG_DATA(port, 0xf5, 0x05); + EXIT_CONFIG_MODE(port); +} + +void ali_m1535plus_init(struct pci_dev *dev) +{ + pci_write_config_byte(dev, 0x40, 0x18); /* PCI Interface Control */ + pci_write_config_byte(dev, 0x41, 0xc0); /* PS2 keyb & mouse enable */ + pci_write_config_byte(dev, 0x42, 0x41); /* ISA bus cycle control */ + pci_write_config_byte(dev, 0x43, 0x00); /* ISA bus cycle control 2 */ + pci_write_config_byte(dev, 0x44, 0x5d); /* IDE enable & IRQ 14 */ + pci_write_config_byte(dev, 0x45, 0x0b); /* PCI int polling mode */ + pci_write_config_byte(dev, 0x47, 0x00); /* BIOS chip select control */ + + /* IRQ routing */ + pci_write_config_byte(dev, 0x48, 0x03); /* INTA IRQ10, INTB disable */ + pci_write_config_byte(dev, 0x49, 0x00); /* INTC and INTD disable */ + pci_write_config_byte(dev, 0x4a, 0x00); /* INTE and INTF disable */ + pci_write_config_byte(dev, 0x4b, 0x90); /* Audio IRQ11, Modem disable */ + + pci_write_config_word(dev, 0x50, 0x4000); /* Parity check IDE enable */ + pci_write_config_word(dev, 0x52, 0x0000); /* USB & RTC disable */ + pci_write_config_word(dev, 0x54, 0x0002); /* ??? no info */ + pci_write_config_word(dev, 0x56, 0x0002); /* PCS1J signal disable */ + + pci_write_config_byte(dev, 0x59, 0x00); /* PCSDS */ + pci_write_config_byte(dev, 0x5a, 0x00); + pci_write_config_byte(dev, 0x5b, 0x00); + pci_write_config_word(dev, 0x5c, 0x0000); + pci_write_config_byte(dev, 0x5e, 0x00); + pci_write_config_byte(dev, 0x5f, 0x00); + pci_write_config_word(dev, 0x60, 0x0000); + + pci_write_config_byte(dev, 0x6c, 0x00); + pci_write_config_byte(dev, 0x6d, 0x48); /* ROM address mapping */ + pci_write_config_byte(dev, 0x6e, 0x00); /* ??? what for? */ + + pci_write_config_byte(dev, 0x70, 0x12); /* Serial IRQ control */ + pci_write_config_byte(dev, 0x71, 0xEF); /* DMA channel select */ + pci_write_config_byte(dev, 0x72, 0x03); /* USB IDSEL */ + pci_write_config_byte(dev, 0x73, 0x00); /* ??? no info */ + + /* + * IRQ setup ALi M5237 USB Host Controller + * IRQ: 9 + */ + pci_write_config_byte(dev, 0x74, 0x01); /* USB IRQ9 */ + + pci_write_config_byte(dev, 0x75, 0x1f); /* IDE2 IRQ 15 */ + pci_write_config_byte(dev, 0x76, 0x80); /* ACPI disable */ + pci_write_config_byte(dev, 0x77, 0x40); /* Modem disable */ + pci_write_config_dword(dev, 0x78, 0x20000000); /* Pin select 2 */ + pci_write_config_byte(dev, 0x7c, 0x00); /* Pin select 3 */ + pci_write_config_byte(dev, 0x81, 0x00); /* ID read/write control */ + pci_write_config_byte(dev, 0x90, 0x00); /* PCI PM block control */ + pci_write_config_word(dev, 0xa4, 0x0000); /* PMSCR */ + +#ifdef CONFIG_BLK_DEV_FD + ali_m1535plus_fdc_init(1); +#endif + + ali_m1535plus_keyboard_init(1); + ali_m1535plus_hotkey_init(1); +} + +static inline void ali_config_writeb(u8 reg, u8 val, int devfn) +{ + u32 data; + int shift; + + writel((1 << 16) | (devfn << 8) | (reg & 0xfc) | 1UL, PCI_CONFIG_ADDR); + data = readl(PCI_CONFIG_DATA); + + shift = (reg & 3) << 3; + data &= ~(0xff << shift); + data |= (((u32)val) << shift); + + writel(data, PCI_CONFIG_DATA); +} + +static inline u8 ali_config_readb(u8 reg, int devfn) +{ + u32 data; + + writel((1 << 16) | (devfn << 8) | (reg & 0xfc) | 1UL, PCI_CONFIG_ADDR); + data = readl(PCI_CONFIG_DATA); + + return (u8)(data >> ((reg & 3) << 3)); +} + +static inline u16 ali_config_readw(u8 reg, int devfn) +{ + u32 data; + + writel((1 << 16) | (devfn << 8) | (reg & 0xfc) | 1UL, PCI_CONFIG_ADDR); + data = readl(PCI_CONFIG_DATA); + + return (u16)(data >> ((reg & 2) << 3)); +} + +int vr4133_rockhopper = 0; +void __init ali_m5229_preinit(void) +{ + if (ali_config_readw(PCI_VENDOR_ID,16) == PCI_VENDOR_ID_AL && + ali_config_readw(PCI_DEVICE_ID,16) == PCI_DEVICE_ID_AL_M1533) { + printk(KERN_INFO "Found an NEC Rockhopper \n"); + vr4133_rockhopper = 1; + /* + * Enable ALi M5229 IDE Controller (both channels) + * IDSEL: A27 + */ + ali_config_writeb(0x58, 0x4c, 16); + } +} + +void __init ali_m5229_init(struct pci_dev *dev) +{ + /* + * Enable Primary/Secondary Channel Cable Detect 40-Pin + */ + pci_write_config_word(dev, 0x4a, 0xc023); + + /* + * Set only the 3rd byteis for the master IDE's cycle and + * enable Internal IDE Function + */ + pci_write_config_byte(dev, 0x50, 0x23); /* Class code attr register */ + + pci_write_config_byte(dev, 0x09, 0xff); /* Set native mode & stuff */ + pci_write_config_byte(dev, 0x52, 0x00); /* use timing registers */ + pci_write_config_byte(dev, 0x58, 0x02); /* Primary addr setup timing */ + pci_write_config_byte(dev, 0x59, 0x22); /* Primary cmd block timing */ + pci_write_config_byte(dev, 0x5a, 0x22); /* Pr drv 0 R/W timing */ + pci_write_config_byte(dev, 0x5b, 0x22); /* Pr drv 1 R/W timing */ + pci_write_config_byte(dev, 0x5c, 0x02); /* Sec addr setup timing */ + pci_write_config_byte(dev, 0x5d, 0x22); /* Sec cmd block timing */ + pci_write_config_byte(dev, 0x5e, 0x22); /* Sec drv 0 R/W timing */ + pci_write_config_byte(dev, 0x5f, 0x22); /* Sec drv 1 R/W timing */ + pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x20); + pci_write_config_word(dev, PCI_COMMAND, + PCI_COMMAND_PARITY | PCI_COMMAND_MASTER | + PCI_COMMAND_IO); +} + diff -puN /dev/null arch/mips/vr41xx/nec-cmbvr4133/Makefile --- /dev/null 2003-09-15 06:40:47.000000000 -0700 +++ 25-akpm/arch/mips/vr41xx/nec-cmbvr4133/Makefile 2005-01-29 11:26:09.184351688 -0800 @@ -0,0 +1,8 @@ +# +# Makefile for the NEC-CMBVR4133 +# + +obj-y := init.o setup.o + +obj-$(CONFIG_PCI) += m1535plus.o +obj-$(CONFIG_ROCKHOPPER) += irq.o diff -puN /dev/null arch/mips/vr41xx/nec-cmbvr4133/setup.c --- /dev/null 2003-09-15 06:40:47.000000000 -0700 +++ 25-akpm/arch/mips/vr41xx/nec-cmbvr4133/setup.c 2005-01-29 11:26:09.184351688 -0800 @@ -0,0 +1,108 @@ +/* + * arch/mips/vr41xx/nec-cmbvr4133/setup.c + * + * Setup for the NEC CMB-VR4133. + * + * Author: Yoichi Yuasa and + * Alex Sapkov + * + * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + * + * Support for CMBVR4133 board in 2.6 + * Author: Manish Lachwani (mlachwani@mvista.com) + */ +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#ifdef CONFIG_MTD +#include +#include +#include +#include + +static struct mtd_partition cmbvr4133_mtd_parts[] = { + { + .name = "User FS", + .size = 0x1be0000, + .offset = 0, + .mask_flags = 0, + }, + { + .name = "PMON", + .size = 0x140000, + .offset = MTDPART_OFS_APPEND, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, + { + .name = "User FS2", + .size = MTDPART_SIZ_FULL, + .offset = MTDPART_OFS_APPEND, + .mask_flags = 0, + } +}; + +#define number_partitions (sizeof(cmbvr4133_mtd_parts)/sizeof(struct mtd_partition)) +#endif + +extern void (*late_time_init)(void); + +static void __init vr4133_serial_init(void) +{ + vr41xx_select_siu_interface(SIU_RS232C, IRDA_NONE); + vr41xx_siu_init(); + vr41xx_dsiu_init(); +} + +extern void i8259_init(void); + +static int __init nec_cmbvr4133_setup(void) +{ +#ifdef CONFIG_ROCKHOPPER + extern void disable_pcnet(void); + + disable_pcnet(); +#endif + set_io_port_base(KSEG1ADDR(0x16000000)); + + mips_machgroup = MACH_GROUP_NEC_VR41XX; + mips_machtype = MACH_NEC_CMBVR4133; + + late_time_init = vr4133_serial_init; + +#ifdef CONFIG_PCI +#ifdef CONFIG_ROCKHOPPER + ali_m5229_preinit(); +#endif +#endif + +#ifdef CONFIG_ROCKHOPPER + rockhopper_init_irq(); +#endif + +#ifdef CONFIG_MTD + /* we use generic physmap mapping driver and we use partitions */ + physmap_configure(0x1C000000, 0x02000000, 4, NULL); + physmap_set_partitions(cmbvr4133_mtd_parts, number_partitions); +#endif + + /* 128 MB memory support */ + add_memory_region(0, 0x08000000, BOOT_MEM_RAM); + +#ifdef CONFIG_ROCKHOPPER + i8259_init(); +#endif + return 0; +} + +early_initcall(nec_cmbvr4133_setup); diff -puN drivers/pcmcia/Kconfig~mips-vr41xx-updates drivers/pcmcia/Kconfig --- 25/drivers/pcmcia/Kconfig~mips-vr41xx-updates 2005-01-29 11:26:09.161355184 -0800 +++ 25-akpm/drivers/pcmcia/Kconfig 2005-01-29 11:26:09.189350928 -0800 @@ -187,6 +187,14 @@ config M32R_CFC_NUM help Set the number of M32R CF slots. +config PCMCIA_VRC4171 + tristate "NEC VRC4171 Card Controllers support" + depends on VRC4171 && PCMCIA + +config PCMCIA_VRC4173 + tristate "NEC VRC4173 CARDU support" + depends on CPU_VR41XX && PCI && PCMCIA + config PCCARD_NONSTATIC tristate depends on PCCARD diff -puN drivers/pcmcia/Makefile~mips-vr41xx-updates drivers/pcmcia/Makefile --- 25/drivers/pcmcia/Makefile~mips-vr41xx-updates 2005-01-29 11:26:09.162355032 -0800 +++ 25-akpm/drivers/pcmcia/Makefile 2005-01-29 11:26:09.194350168 -0800 @@ -31,6 +31,8 @@ obj-$(CONFIG_PCMCIA_PXA2XX) obj-$(CONFIG_M32R_PCC) += m32r_pcc.o obj-$(CONFIG_M32R_CFC) += m32r_cfc.o obj-$(CONFIG_PCMCIA_AU1X00) += au1x00_ss.o +obj-$(CONFIG_PCMCIA_VRC4171) += vrc4171_card.o +obj-$(CONFIG_PCMCIA_VRC4173) += vrc4173_cardu.o sa11xx_core-y += soc_common.o sa11xx_base.o pxa2xx_core-y += soc_common.o pxa2xx_base.o diff -puN /dev/null drivers/pcmcia/vrc4171_card.c --- /dev/null 2003-09-15 06:40:47.000000000 -0700 +++ 25-akpm/drivers/pcmcia/vrc4171_card.c 2005-01-29 11:26:09.192350472 -0800 @@ -0,0 +1,744 @@ +/* + * vrc4171_card.c, NEC VRC4171 Card Controller driver for Socket Services. + * + * Copyright (C) 2003 Yoichi Yuasa + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include + +#include "i82365.h" + +MODULE_DESCRIPTION("NEC VRC4171 Card Controllers driver for Socket Services"); +MODULE_AUTHOR("Yoichi Yuasa "); +MODULE_LICENSE("GPL"); + +#define CARD_MAX_SLOTS 2 +#define CARD_SLOTA 0 +#define CARD_SLOTB 1 +#define CARD_SLOTB_OFFSET 0x40 + +#define CARD_MEM_START 0x10000000 +#define CARD_MEM_END 0x13ffffff +#define CARD_MAX_MEM_OFFSET 0x3ffffff +#define CARD_MAX_MEM_SPEED 1000 + +#define CARD_CONTROLLER_INDEX 0x03e0 +#define CARD_CONTROLLER_DATA 0x03e1 +#define CARD_CONTROLLER_SIZE 2 + /* Power register */ + #define VPP_GET_VCC 0x01 + #define POWER_ENABLE 0x10 + #define CARD_VOLTAGE_SENSE 0x1f + #define VCC_3VORXV_CAPABLE 0x00 + #define VCC_XV_ONLY 0x01 + #define VCC_3V_CAPABLE 0x02 + #define VCC_5V_ONLY 0x03 + #define CARD_VOLTAGE_SELECT 0x2f + #define VCC_3V 0x01 + #define VCC_5V 0x00 + #define VCC_XV 0x02 + #define VCC_STATUS_3V 0x02 + #define VCC_STATUS_5V 0x01 + #define VCC_STATUS_XV 0x03 + #define GLOBAL_CONTROL 0x1e + #define EXWRBK 0x04 + #define IRQPM_EN 0x08 + #define CLRPMIRQ 0x10 + +#define IO_MAX_MAPS 2 +#define MEM_MAX_MAPS 5 + +enum { + SLOT_PROBE = 0, + SLOT_NOPROBE_IO, + SLOT_NOPROBE_MEM, + SLOT_NOPROBE_ALL +}; + +typedef struct vrc4171_socket { + int noprobe; + struct pcmcia_socket pcmcia_socket; + char name[24]; + int csc_irq; + int io_irq; +} vrc4171_socket_t; + +static vrc4171_socket_t vrc4171_sockets[CARD_MAX_SLOTS]; +static int vrc4171_slotb = SLOTB_IS_NONE; +static unsigned int vrc4171_irq; +static uint16_t vrc4171_irq_mask = 0xdeb8; + +static inline uint8_t exca_read_byte(int slot, uint8_t index) +{ + if (slot == CARD_SLOTB) + index += CARD_SLOTB_OFFSET; + + outb(index, CARD_CONTROLLER_INDEX); + return inb(CARD_CONTROLLER_DATA); +} + +static inline uint16_t exca_read_word(int slot, uint8_t index) +{ + uint16_t data; + + if (slot == CARD_SLOTB) + index += CARD_SLOTB_OFFSET; + + outb(index++, CARD_CONTROLLER_INDEX); + data = inb(CARD_CONTROLLER_DATA); + + outb(index, CARD_CONTROLLER_INDEX); + data |= ((uint16_t)inb(CARD_CONTROLLER_DATA)) << 8; + + return data; +} + +static inline uint8_t exca_write_byte(int slot, uint8_t index, uint8_t data) +{ + if (slot == CARD_SLOTB) + index += CARD_SLOTB_OFFSET; + + outb(index, CARD_CONTROLLER_INDEX); + outb(data, CARD_CONTROLLER_DATA); + + return data; +} + +static inline uint16_t exca_write_word(int slot, uint8_t index, uint16_t data) +{ + if (slot == CARD_SLOTB) + index += CARD_SLOTB_OFFSET; + + outb(index++, CARD_CONTROLLER_INDEX); + outb(data, CARD_CONTROLLER_DATA); + + outb(index, CARD_CONTROLLER_INDEX); + outb((uint8_t)(data >> 8), CARD_CONTROLLER_DATA); + + return data; +} + +static inline int search_nonuse_irq(void) +{ + int i; + + for (i = 0; i < 16; i++) { + if (vrc4171_irq_mask & (1 << i)) { + vrc4171_irq_mask &= ~(1 << i); + return i; + } + } + + return -1; +} + +static int pccard_init(struct pcmcia_socket *sock) +{ + vrc4171_socket_t *socket; + unsigned int slot; + + sock->features |= SS_CAP_PCCARD | SS_CAP_PAGE_REGS; + sock->irq_mask = 0; + sock->map_size = 0x1000; + sock->pci_irq = vrc4171_irq; + + slot = sock->sock; + socket = &vrc4171_sockets[slot]; + socket->csc_irq = search_nonuse_irq(); + socket->io_irq = search_nonuse_irq(); + + return 0; +} + +static int pccard_suspend(struct pcmcia_socket *sock) +{ + return -EINVAL; +} + +static int pccard_get_status(struct pcmcia_socket *sock, u_int *value) +{ + unsigned int slot; + uint8_t status, sense; + u_int val = 0; + + if (sock == NULL || sock->sock >= CARD_MAX_SLOTS || value == NULL) + return -EINVAL; + + slot = sock->sock; + + status = exca_read_byte(slot, I365_STATUS); + if (exca_read_byte(slot, I365_INTCTL) & I365_PC_IOCARD) { + if (status & I365_CS_STSCHG) + val |= SS_STSCHG; + } else { + if (!(status & I365_CS_BVD1)) + val |= SS_BATDEAD; + else if ((status & (I365_CS_BVD1 | I365_CS_BVD2)) == I365_CS_BVD1) + val |= SS_BATWARN; + } + if ((status & I365_CS_DETECT) == I365_CS_DETECT) + val |= SS_DETECT; + if (status & I365_CS_WRPROT) + val |= SS_WRPROT; + if (status & I365_CS_READY) + val |= SS_READY; + if (status & I365_CS_POWERON) + val |= SS_POWERON; + + sense = exca_read_byte(slot, CARD_VOLTAGE_SENSE); + switch (sense) { + case VCC_3VORXV_CAPABLE: + val |= SS_3VCARD | SS_XVCARD; + break; + case VCC_XV_ONLY: + val |= SS_XVCARD; + break; + case VCC_3V_CAPABLE: + val |= SS_3VCARD; + break; + default: + /* 5V only */ + break; + } + + *value = val; + + return 0; +} + +static inline u_char get_Vcc_value(uint8_t voltage) +{ + switch (voltage) { + case VCC_STATUS_3V: + return 33; + case VCC_STATUS_5V: + return 50; + default: + break; + } + + return 0; +} + +static inline u_char get_Vpp_value(uint8_t power, u_char Vcc) +{ + if ((power & 0x03) == 0x01 || (power & 0x03) == 0x02) + return Vcc; + + return 0; +} + +static int pccard_get_socket(struct pcmcia_socket *sock, socket_state_t *state) +{ + unsigned int slot; + uint8_t power, voltage, control, cscint; + + if (sock == NULL || sock->sock >= CARD_MAX_SLOTS || state == NULL) + return -EINVAL; + + slot = sock->sock; + + power = exca_read_byte(slot, I365_POWER); + voltage = exca_read_byte(slot, CARD_VOLTAGE_SELECT); + + state->Vcc = get_Vcc_value(voltage); + state->Vpp = get_Vpp_value(power, state->Vcc); + + state->flags = 0; + if (power & POWER_ENABLE) + state->flags |= SS_PWR_AUTO; + if (power & I365_PWR_OUT) + state->flags |= SS_OUTPUT_ENA; + + control = exca_read_byte(slot, I365_INTCTL); + if (control & I365_PC_IOCARD) + state->flags |= SS_IOCARD; + if (!(control & I365_PC_RESET)) + state->flags |= SS_RESET; + + cscint = exca_read_byte(slot, I365_CSCINT); + state->csc_mask = 0; + if (state->flags & SS_IOCARD) { + if (cscint & I365_CSC_STSCHG) + state->flags |= SS_STSCHG; + } else { + if (cscint & I365_CSC_BVD1) + state->csc_mask |= SS_BATDEAD; + if (cscint & I365_CSC_BVD2) + state->csc_mask |= SS_BATWARN; + } + if (cscint & I365_CSC_READY) + state->csc_mask |= SS_READY; + if (cscint & I365_CSC_DETECT) + state->csc_mask |= SS_DETECT; + + return 0; +} + +static inline uint8_t set_Vcc_value(u_char Vcc) +{ + switch (Vcc) { + case 33: + return VCC_3V; + case 50: + return VCC_5V; + } + + /* Small voltage is chosen for safety. */ + return VCC_3V; +} + +static int pccard_set_socket(struct pcmcia_socket *sock, socket_state_t *state) +{ + vrc4171_socket_t *socket; + unsigned int slot; + uint8_t voltage, power, control, cscint; + + if (sock == NULL || sock->sock >= CARD_MAX_SLOTS || + (state->Vpp != state->Vcc && state->Vpp != 0) || + (state->Vcc != 50 && state->Vcc != 33 && state->Vcc != 0)) + return -EINVAL; + + slot = sock->sock; + socket = &vrc4171_sockets[slot]; + + spin_lock_irq(&sock->lock); + + voltage = set_Vcc_value(state->Vcc); + exca_write_byte(slot, CARD_VOLTAGE_SELECT, voltage); + + power = POWER_ENABLE; + if (state->Vpp == state->Vcc) + power |= VPP_GET_VCC; + if (state->flags & SS_OUTPUT_ENA) + power |= I365_PWR_OUT; + exca_write_byte(slot, I365_POWER, power); + + control = 0; + if (state->io_irq != 0) + control |= socket->io_irq; + if (state->flags & SS_IOCARD) + control |= I365_PC_IOCARD; + if (state->flags & SS_RESET) + control &= ~I365_PC_RESET; + else + control |= I365_PC_RESET; + exca_write_byte(slot, I365_INTCTL, control); + + cscint = 0; + exca_write_byte(slot, I365_CSCINT, cscint); + exca_read_byte(slot, I365_CSC); /* clear CardStatus change */ + if (state->csc_mask != 0) + cscint |= socket->csc_irq << 8; + if (state->flags & SS_IOCARD) { + if (state->csc_mask & SS_STSCHG) + cscint |= I365_CSC_STSCHG; + } else { + if (state->csc_mask & SS_BATDEAD) + cscint |= I365_CSC_BVD1; + if (state->csc_mask & SS_BATWARN) + cscint |= I365_CSC_BVD2; + } + if (state->csc_mask & SS_READY) + cscint |= I365_CSC_READY; + if (state->csc_mask & SS_DETECT) + cscint |= I365_CSC_DETECT; + exca_write_byte(slot, I365_CSCINT, cscint); + + spin_unlock_irq(&sock->lock); + + return 0; +} + +static int pccard_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io) +{ + unsigned int slot; + uint8_t ioctl, addrwin; + u_char map; + + if (sock == NULL || sock->sock >= CARD_MAX_SLOTS || + io == NULL || io->map >= IO_MAX_MAPS || + io->start > 0xffff || io->stop > 0xffff || io->start > io->stop) + return -EINVAL; + + slot = sock->sock; + map = io->map; + + addrwin = exca_read_byte(slot, I365_ADDRWIN); + if (addrwin & I365_ENA_IO(map)) { + addrwin &= ~I365_ENA_IO(map); + exca_write_byte(slot, I365_ADDRWIN, addrwin); + } + + exca_write_word(slot, I365_IO(map)+I365_W_START, io->start); + exca_write_word(slot, I365_IO(map)+I365_W_STOP, io->stop); + + ioctl = 0; + if (io->speed > 0) + ioctl |= I365_IOCTL_WAIT(map); + if (io->flags & MAP_16BIT) + ioctl |= I365_IOCTL_16BIT(map); + if (io->flags & MAP_AUTOSZ) + ioctl |= I365_IOCTL_IOCS16(map); + if (io->flags & MAP_0WS) + ioctl |= I365_IOCTL_0WS(map); + exca_write_byte(slot, I365_IOCTL, ioctl); + + if (io->flags & MAP_ACTIVE) { + addrwin |= I365_ENA_IO(map); + exca_write_byte(slot, I365_ADDRWIN, addrwin); + } + + return 0; +} + +static int pccard_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem) +{ + unsigned int slot; + uint16_t start, stop, offset; + uint8_t addrwin; + u_char map; + + if (sock == NULL || sock->sock >= CARD_MAX_SLOTS || + mem == NULL || mem->map >= MEM_MAX_MAPS || + mem->sys_start < CARD_MEM_START || mem->sys_start > CARD_MEM_END || + mem->sys_stop < CARD_MEM_START || mem->sys_stop > CARD_MEM_END || + mem->sys_start > mem->sys_stop || + mem->card_start > CARD_MAX_MEM_OFFSET || + mem->speed > CARD_MAX_MEM_SPEED) + return -EINVAL; + + slot = sock->sock; + map = mem->map; + + addrwin = exca_read_byte(slot, I365_ADDRWIN); + if (addrwin & I365_ENA_MEM(map)) { + addrwin &= ~I365_ENA_MEM(map); + exca_write_byte(slot, I365_ADDRWIN, addrwin); + } + + start = (mem->sys_start >> 12) & 0x3fff; + if (mem->flags & MAP_16BIT) + start |= I365_MEM_16BIT; + exca_write_word(slot, I365_MEM(map)+I365_W_START, start); + + stop = (mem->sys_stop >> 12) & 0x3fff; + switch (mem->speed) { + case 0: + break; + case 1: + stop |= I365_MEM_WS0; + break; + case 2: + stop |= I365_MEM_WS1; + break; + default: + stop |= I365_MEM_WS0 | I365_MEM_WS1; + break; + } + exca_write_word(slot, I365_MEM(map)+I365_W_STOP, stop); + + offset = (mem->card_start >> 12) & 0x3fff; + if (mem->flags & MAP_ATTRIB) + offset |= I365_MEM_REG; + if (mem->flags & MAP_WRPROT) + offset |= I365_MEM_WRPROT; + exca_write_word(slot, I365_MEM(map)+I365_W_OFF, offset); + + if (mem->flags & MAP_ACTIVE) { + addrwin |= I365_ENA_MEM(map); + exca_write_byte(slot, I365_ADDRWIN, addrwin); + } + + return 0; +} + +static struct pccard_operations vrc4171_pccard_operations = { + .init = pccard_init, + .suspend = pccard_suspend, + .get_status = pccard_get_status, + .get_socket = pccard_get_socket, + .set_socket = pccard_set_socket, + .set_io_map = pccard_set_io_map, + .set_mem_map = pccard_set_mem_map, +}; + +static inline unsigned int get_events(int slot) +{ + unsigned int events = 0; + uint8_t status, csc; + + status = exca_read_byte(slot, I365_STATUS); + csc = exca_read_byte(slot, I365_CSC); + + if (exca_read_byte(slot, I365_INTCTL) & I365_PC_IOCARD) { + if ((csc & I365_CSC_STSCHG) && (status & I365_CS_STSCHG)) + events |= SS_STSCHG; + } else { + if (csc & (I365_CSC_BVD1 | I365_CSC_BVD2)) { + if (!(status & I365_CS_BVD1)) + events |= SS_BATDEAD; + else if ((status & (I365_CS_BVD1 | I365_CS_BVD2)) == I365_CS_BVD1) + events |= SS_BATWARN; + } + } + if ((csc & I365_CSC_READY) && (status & I365_CS_READY)) + events |= SS_READY; + if ((csc & I365_CSC_DETECT) && ((status & I365_CS_DETECT) == I365_CS_DETECT)) + events |= SS_DETECT; + + return events; +} + +static irqreturn_t pccard_interrupt(int irq, void *dev_id, struct pt_regs *regs) +{ + vrc4171_socket_t *socket; + unsigned int events; + irqreturn_t retval = IRQ_NONE; + uint16_t status; + + status = vrc4171_get_irq_status(); + if (status & IRQ_A) { + socket = &vrc4171_sockets[CARD_SLOTA]; + if (socket->noprobe == SLOT_PROBE) { + if (status & (1 << socket->csc_irq)) { + events = get_events(CARD_SLOTA); + if (events != 0) { + pcmcia_parse_events(&socket->pcmcia_socket, events); + retval = IRQ_HANDLED; + } + } + } + } + + if (status & IRQ_B) { + socket = &vrc4171_sockets[CARD_SLOTB]; + if (socket->noprobe == SLOT_PROBE) { + if (status & (1 << socket->csc_irq)) { + events = get_events(CARD_SLOTB); + if (events != 0) { + pcmcia_parse_events(&socket->pcmcia_socket, events); + retval = IRQ_HANDLED; + } + } + } + } + + return retval; +} + +static inline void reserve_using_irq(int slot) +{ + unsigned int irq; + + irq = exca_read_byte(slot, I365_INTCTL); + irq &= 0x0f; + vrc4171_irq_mask &= ~(1 << irq); + + irq = exca_read_byte(slot, I365_CSCINT); + irq = (irq & 0xf0) >> 4; + vrc4171_irq_mask &= ~(1 << irq); +} + +static int __devinit vrc4171_add_socket(int slot) +{ + vrc4171_socket_t *socket; + int retval; + + if (slot >= CARD_MAX_SLOTS) + return -EINVAL; + + socket = &vrc4171_sockets[slot]; + if (socket->noprobe != SLOT_PROBE) { + uint8_t addrwin; + + switch (socket->noprobe) { + case SLOT_NOPROBE_MEM: + addrwin = exca_read_byte(slot, I365_ADDRWIN); + addrwin &= 0x1f; + exca_write_byte(slot, I365_ADDRWIN, addrwin); + break; + case SLOT_NOPROBE_IO: + addrwin = exca_read_byte(slot, I365_ADDRWIN); + addrwin &= 0xc0; + exca_write_byte(slot, I365_ADDRWIN, addrwin); + break; + default: + break; + } + + reserve_using_irq(slot); + + return 0; + } + + sprintf(socket->name, "NEC VRC4171 Card Slot %1c", 'A' + slot); + + socket->pcmcia_socket.ops = &vrc4171_pccard_operations; + + retval = pcmcia_register_socket(&socket->pcmcia_socket); + if (retval != 0) + return retval; + + exca_write_byte(slot, I365_ADDRWIN, 0); + + exca_write_byte(slot, GLOBAL_CONTROL, 0); + + return 0; +} + +static void vrc4171_remove_socket(int slot) +{ + vrc4171_socket_t *socket; + + if (slot >= CARD_MAX_SLOTS) + return; + + socket = &vrc4171_sockets[slot]; + + pcmcia_unregister_socket(&socket->pcmcia_socket); +} + +static int __devinit vrc4171_card_setup(char *options) +{ + if (options == NULL || *options == '\0') + return 0; + + if (strncmp(options, "irq:", 4) == 0) { + int irq; + options += 4; + irq = simple_strtoul(options, &options, 0); + if (irq >= 0 && irq < NR_IRQS) + vrc4171_irq = irq; + + if (*options != ',') + return 0; + options++; + } + + if (strncmp(options, "slota:", 6) == 0) { + options += 6; + if (*options != '\0') { + if (strncmp(options, "memnoprobe", 10) == 0) { + vrc4171_sockets[CARD_SLOTA].noprobe = SLOT_NOPROBE_MEM; + options += 10; + } else if (strncmp(options, "ionoprobe", 9) == 0) { + vrc4171_sockets[CARD_SLOTA].noprobe = SLOT_NOPROBE_IO; + options += 9; + } else if ( strncmp(options, "noprobe", 7) == 0) { + vrc4171_sockets[CARD_SLOTA].noprobe = SLOT_NOPROBE_ALL; + options += 7; + } + + if (*options != ',') + return 0; + options++; + } else + return 0; + + } + + if (strncmp(options, "slotb:", 6) == 0) { + options += 6; + if (*options != '\0') { + if (strncmp(options, "pccard", 6) == 0) { + vrc4171_slotb = SLOTB_IS_PCCARD; + options += 6; + } else if (strncmp(options, "cf", 2) == 0) { + vrc4171_slotb = SLOTB_IS_CF; + options += 2; + } else if (strncmp(options, "flashrom", 8) == 0) { + vrc4171_slotb = SLOTB_IS_FLASHROM; + options += 8; + } else if (strncmp(options, "none", 4) == 0) { + vrc4171_slotb = SLOTB_IS_NONE; + options += 4; + } + + if (*options != ',') + return 0; + options++; + + if (strncmp(options, "memnoprobe", 10) == 0) + vrc4171_sockets[CARD_SLOTB].noprobe = SLOT_NOPROBE_MEM; + if (strncmp(options, "ionoprobe", 9) == 0) + vrc4171_sockets[CARD_SLOTB].noprobe = SLOT_NOPROBE_IO; + if (strncmp(options, "noprobe", 7) == 0) + vrc4171_sockets[CARD_SLOTB].noprobe = SLOT_NOPROBE_ALL; + } + } + + return 0; +} + +__setup("vrc4171_card=", vrc4171_card_setup); + +static int __devinit vrc4171_card_init(void) +{ + int retval, slot; + + vrc4171_set_multifunction_pin(vrc4171_slotb); + + if (request_region(CARD_CONTROLLER_INDEX, CARD_CONTROLLER_SIZE, + "NEC VRC4171 Card Controller") == NULL) + return -EBUSY; + + for (slot = 0; slot < CARD_MAX_SLOTS; slot++) { + if (slot == CARD_SLOTB && vrc4171_slotb == SLOTB_IS_NONE) + break; + + retval = vrc4171_add_socket(slot); + if (retval != 0) + return retval; + } + + retval = request_irq(vrc4171_irq, pccard_interrupt, SA_SHIRQ, + "NEC VRC4171 Card Controller", vrc4171_sockets); + if (retval < 0) { + for (slot = 0; slot < CARD_MAX_SLOTS; slot++) + vrc4171_remove_socket(slot); + + return retval; + } + + printk(KERN_INFO "NEC VRC4171 Card Controller, connected to IRQ %d\n", vrc4171_irq); + + return 0; +} + +static void __devexit vrc4171_card_exit(void) +{ + int slot; + + for (slot = 0; slot < CARD_MAX_SLOTS; slot++) + vrc4171_remove_socket(slot); + + release_region(CARD_CONTROLLER_INDEX, CARD_CONTROLLER_SIZE); +} + +module_init(vrc4171_card_init); +module_exit(vrc4171_card_exit); diff -puN /dev/null drivers/pcmcia/vrc4173_cardu.c --- /dev/null 2003-09-15 06:40:47.000000000 -0700 +++ 25-akpm/drivers/pcmcia/vrc4173_cardu.c 2005-01-29 11:26:09.188351080 -0800 @@ -0,0 +1,622 @@ +/* + * FILE NAME + * drivers/pcmcia/vrc4173_cardu.c + * + * BRIEF MODULE DESCRIPTION + * NEC VRC4173 CARDU driver for Socket Services + * (This device doesn't support CardBus. it is supporting only 16bit PC Card.) + * + * Copyright 2002,2003 Yoichi Yuasa + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR + * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include + +#include + +#include + +#include "vrc4173_cardu.h" + +MODULE_DESCRIPTION("NEC VRC4173 CARDU driver for Socket Services"); +MODULE_AUTHOR("Yoichi Yuasa "); +MODULE_LICENSE("GPL"); + +static int vrc4173_cardu_slots; + +static vrc4173_socket_t cardu_sockets[CARDU_MAX_SOCKETS]; + +extern struct socket_info_t *pcmcia_register_socket (int slot, + struct pccard_operations *vtable, + int use_bus_pm); +extern void pcmcia_unregister_socket(struct socket_info_t *s); + +static inline uint8_t exca_readb(vrc4173_socket_t *socket, uint16_t offset) +{ + return readb(socket->base + EXCA_REGS_BASE + offset); +} + +static inline uint16_t exca_readw(vrc4173_socket_t *socket, uint16_t offset) +{ + uint16_t val; + + val = readb(socket->base + EXCA_REGS_BASE + offset); + val |= (u16)readb(socket->base + EXCA_REGS_BASE + offset + 1) << 8; + + return val; +} + +static inline void exca_writeb(vrc4173_socket_t *socket, uint16_t offset, uint8_t val) +{ + writeb(val, socket->base + EXCA_REGS_BASE + offset); +} + +static inline void exca_writew(vrc4173_socket_t *socket, uint8_t offset, uint16_t val) +{ + writeb((u8)val, socket->base + EXCA_REGS_BASE + offset); + writeb((u8)(val >> 8), socket->base + EXCA_REGS_BASE + offset + 1); +} + +static inline uint32_t cardbus_socket_readl(vrc4173_socket_t *socket, u16 offset) +{ + return readl(socket->base + CARDBUS_SOCKET_REGS_BASE + offset); +} + +static inline void cardbus_socket_writel(vrc4173_socket_t *socket, u16 offset, uint32_t val) +{ + writel(val, socket->base + CARDBUS_SOCKET_REGS_BASE + offset); +} + +static void cardu_pciregs_init(struct pci_dev *dev) +{ + u32 syscnt; + u16 brgcnt; + u8 devcnt; + + pci_write_config_dword(dev, 0x1c, 0x10000000); + pci_write_config_dword(dev, 0x20, 0x17fff000); + pci_write_config_dword(dev, 0x2c, 0); + pci_write_config_dword(dev, 0x30, 0xfffc); + + pci_read_config_word(dev, BRGCNT, &brgcnt); + brgcnt &= ~IREQ_INT; + pci_write_config_word(dev, BRGCNT, brgcnt); + + pci_read_config_dword(dev, SYSCNT, &syscnt); + syscnt &= ~(BAD_VCC_REQ_DISB|PCPCI_EN|CH_ASSIGN_MASK|SUB_ID_WR_EN|PCI_CLK_RIN); + syscnt |= (CH_ASSIGN_NODMA|ASYN_INT_MODE); + pci_write_config_dword(dev, SYSCNT, syscnt); + + pci_read_config_byte(dev, DEVCNT, &devcnt); + devcnt &= ~(ZOOM_VIDEO_EN|SR_PCI_INT_SEL_MASK|PCI_INT_MODE|IRQ_MODE); + devcnt |= (SR_PCI_INT_SEL_NONE|IFG); + pci_write_config_byte(dev, DEVCNT, devcnt); + + pci_write_config_byte(dev, CHIPCNT, S_PREF_DISB); + + pci_write_config_byte(dev, SERRDIS, 0); +} + +static int cardu_init(unsigned int slot) +{ + vrc4173_socket_t *socket = &cardu_sockets[slot]; + + cardu_pciregs_init(socket->dev); + + /* CARD_SC bits are cleared by reading CARD_SC. */ + exca_writeb(socket, GLO_CNT, 0); + + socket->cap.features |= SS_CAP_PCCARD | SS_CAP_PAGE_REGS; + socket->cap.irq_mask = 0; + socket->cap.map_size = 0x1000; + socket->cap.pci_irq = socket->dev->irq; + socket->events = 0; + spin_lock_init(socket->event_lock); + + /* Enable PC Card status interrupts */ + exca_writeb(socket, CARD_SCI, CARD_DT_EN|RDY_EN|BAT_WAR_EN|BAT_DEAD_EN); + + return 0; +} + +static int cardu_suspend(unsigned int slot) +{ + return -EINVAL; +} + +static int cardu_register_callback(unsigned int sock, + void (*handler)(void *, unsigned int), + void * info) +{ + vrc4173_socket_t *socket = &cardu_sockets[sock]; + + socket->handler = handler; + socket->info = info; + + return 0; +} + +static int cardu_inquire_socket(unsigned int sock, socket_cap_t *cap) +{ + vrc4173_socket_t *socket = &cardu_sockets[sock]; + + *cap = socket->cap; + + return 0; +} + +static int cardu_get_status(unsigned int sock, u_int *value) +{ + vrc4173_socket_t *socket = &cardu_sockets[sock]; + uint32_t state; + uint8_t status; + u_int val = 0; + + status = exca_readb(socket, IF_STATUS); + if (status & CARD_PWR) val |= SS_POWERON; + if (status & READY) val |= SS_READY; + if (status & CARD_WP) val |= SS_WRPROT; + if ((status & (CARD_DETECT1|CARD_DETECT2)) == (CARD_DETECT1|CARD_DETECT2)) + val |= SS_DETECT; + if (exca_readb(socket, INT_GEN_CNT) & CARD_TYPE_IO) { + if (status & STSCHG) val |= SS_STSCHG; + } else { + status &= BV_DETECT_MASK; + if (status != BV_DETECT_GOOD) { + if (status == BV_DETECT_WARN) val |= SS_BATWARN; + else val |= SS_BATDEAD; + } + } + + state = cardbus_socket_readl(socket, SKT_PRE_STATE); + if (state & VOL_3V_CARD_DT) val |= SS_3VCARD; + if (state & VOL_XV_CARD_DT) val |= SS_XVCARD; + if (state & CB_CARD_DT) val |= SS_CARDBUS; + if (!(state & + (VOL_YV_CARD_DT|VOL_XV_CARD_DT|VOL_3V_CARD_DT|VOL_5V_CARD_DT|CCD20|CCD10))) + val |= SS_PENDING; + + *value = val; + + return 0; +} + +static inline u_char get_Vcc_value(uint8_t val) +{ + switch (val & VCC_MASK) { + case VCC_3V: + return 33; + case VCC_5V: + return 50; + } + + return 0; +} + +static inline u_char get_Vpp_value(uint8_t val) +{ + switch (val & VPP_MASK) { + case VPP_12V: + return 120; + case VPP_VCC: + return get_Vcc_value(val); + } + + return 0; +} + +static int cardu_get_socket(unsigned int sock, socket_state_t *state) +{ + vrc4173_socket_t *socket = &cardu_sockets[sock]; + uint8_t val; + + val = exca_readb(socket, PWR_CNT); + state->Vcc = get_Vcc_value(val); + state->Vpp = get_Vpp_value(val); + state->flags = 0; + if (val & CARD_OUT_EN) state->flags |= SS_OUTPUT_ENA; + + val = exca_readb(socket, INT_GEN_CNT); + if (!(val & CARD_REST0)) state->flags |= SS_RESET; + if (val & CARD_TYPE_IO) state->flags |= SS_IOCARD; + + return 0; +} + +static inline uint8_t set_Vcc_value(u_char Vcc) +{ + switch (Vcc) { + case 33: + return VCC_3V; + case 50: + return VCC_5V; + } + + return VCC_0V; +} + +static inline uint8_t set_Vpp_value(u_char Vpp) +{ + switch (Vpp) { + case 33: + case 50: + return VPP_VCC; + case 120: + return VPP_12V; + } + + return VPP_0V; +} + +static int cardu_set_socket(unsigned int sock, socket_state_t *state) +{ + vrc4173_socket_t *socket = &cardu_sockets[sock]; + uint8_t val; + + if (((state->Vpp == 33) || (state->Vpp == 50)) && (state->Vpp != state->Vcc)) + return -EINVAL; + + val = set_Vcc_value(state->Vcc); + val |= set_Vpp_value(state->Vpp); + if (state->flags & SS_OUTPUT_ENA) val |= CARD_OUT_EN; + exca_writeb(socket, PWR_CNT, val); + + val = exca_readb(socket, INT_GEN_CNT) & CARD_REST0; + if (state->flags & SS_RESET) val &= ~CARD_REST0; + else val |= CARD_REST0; + if (state->flags & SS_IOCARD) val |= CARD_TYPE_IO; + exca_writeb(socket, INT_GEN_CNT, val); + + return 0; +} + +static int cardu_get_io_map(unsigned int sock, struct pccard_io_map *io) +{ + vrc4173_socket_t *socket = &cardu_sockets[sock]; + uint8_t ioctl, window; + u_char map; + + map = io->map; + if (map > 1) + return -EINVAL; + + io->start = exca_readw(socket, IO_WIN_SA(map)); + io->stop = exca_readw(socket, IO_WIN_EA(map)); + + ioctl = exca_readb(socket, IO_WIN_CNT); + window = exca_readb(socket, ADR_WIN_EN); + io->flags = (window & IO_WIN_EN(map)) ? MAP_ACTIVE : 0; + if (ioctl & IO_WIN_DATA_AUTOSZ(map)) + io->flags |= MAP_AUTOSZ; + else if (ioctl & IO_WIN_DATA_16BIT(map)) + io->flags |= MAP_16BIT; + + return 0; +} + +static int cardu_set_io_map(unsigned int sock, struct pccard_io_map *io) +{ + vrc4173_socket_t *socket = &cardu_sockets[sock]; + uint16_t ioctl; + uint8_t window, enable; + u_char map; + + map = io->map; + if (map > 1) + return -EINVAL; + + window = exca_readb(socket, ADR_WIN_EN); + enable = IO_WIN_EN(map); + + if (window & enable) { + window &= ~enable; + exca_writeb(socket, ADR_WIN_EN, window); + } + + exca_writew(socket, IO_WIN_SA(map), io->start); + exca_writew(socket, IO_WIN_EA(map), io->stop); + + ioctl = exca_readb(socket, IO_WIN_CNT) & ~IO_WIN_CNT_MASK(map); + if (io->flags & MAP_AUTOSZ) ioctl |= IO_WIN_DATA_AUTOSZ(map); + else if (io->flags & MAP_16BIT) ioctl |= IO_WIN_DATA_16BIT(map); + exca_writeb(socket, IO_WIN_CNT, ioctl); + + if (io->flags & MAP_ACTIVE) + exca_writeb(socket, ADR_WIN_EN, window | enable); + + return 0; +} + +static int cardu_get_mem_map(unsigned int sock, struct pccard_mem_map *mem) +{ + vrc4173_socket_t *socket = &cardu_sockets[sock]; + uint32_t start, stop, offset, page; + uint8_t window; + u_char map; + + map = mem->map; + if (map > 4) + return -EINVAL; + + window = exca_readb(socket, ADR_WIN_EN); + mem->flags = (window & MEM_WIN_EN(map)) ? MAP_ACTIVE : 0; + + start = exca_readw(socket, MEM_WIN_SA(map)); + mem->flags |= (start & MEM_WIN_DSIZE) ? MAP_16BIT : 0; + start = (start & 0x0fff) << 12; + + stop = exca_readw(socket, MEM_WIN_EA(map)); + stop = ((stop & 0x0fff) << 12) + 0x0fff; + + offset = exca_readw(socket, MEM_WIN_OA(map)); + mem->flags |= (offset & MEM_WIN_WP) ? MAP_WRPROT : 0; + mem->flags |= (offset & MEM_WIN_REGSET) ? MAP_ATTRIB : 0; + offset = ((offset & 0x3fff) << 12) + start; + mem->card_start = offset & 0x03ffffff; + + page = exca_readb(socket, MEM_WIN_SAU(map)) << 24; + mem->sys_start = start + page; + mem->sys_stop = start + page; + + return 0; +} + +static int cardu_set_mem_map(unsigned int sock, struct pccard_mem_map *mem) +{ + vrc4173_socket_t *socket = &cardu_sockets[sock]; + uint16_t value; + uint8_t window, enable; + u_long sys_start, sys_stop, card_start; + u_char map; + + map = mem->map; + sys_start = mem->sys_start; + sys_stop = mem->sys_stop; + card_start = mem->card_start; + + if (map > 4 || sys_start > sys_stop || ((sys_start ^ sys_stop) >> 24) || + (card_start >> 26)) + return -EINVAL; + + window = exca_readb(socket, ADR_WIN_EN); + enable = MEM_WIN_EN(map); + if (window & enable) { + window &= ~enable; + exca_writeb(socket, ADR_WIN_EN, window); + } + + exca_writeb(socket, MEM_WIN_SAU(map), sys_start >> 24); + + value = (sys_start >> 12) & 0x0fff; + if (mem->flags & MAP_16BIT) value |= MEM_WIN_DSIZE; + exca_writew(socket, MEM_WIN_SA(map), value); + + value = (sys_stop >> 12) & 0x0fff; + exca_writew(socket, MEM_WIN_EA(map), value); + + value = ((card_start - sys_start) >> 12) & 0x3fff; + if (mem->flags & MAP_WRPROT) value |= MEM_WIN_WP; + if (mem->flags & MAP_ATTRIB) value |= MEM_WIN_REGSET; + exca_writew(socket, MEM_WIN_OA(map), value); + + if (mem->flags & MAP_ACTIVE) + exca_writeb(socket, ADR_WIN_EN, window | enable); + + return 0; +} + +static void cardu_proc_setup(unsigned int sock, struct proc_dir_entry *base) +{ +} + +static struct pccard_operations cardu_operations = { + .init = cardu_init, + .suspend = cardu_suspend, + .register_callback = cardu_register_callback, + .inquire_socket = cardu_inquire_socket, + .get_status = cardu_get_status, + .get_socket = cardu_get_socket, + .set_socket = cardu_set_socket, + .get_io_map = cardu_get_io_map, + .set_io_map = cardu_set_io_map, + .get_mem_map = cardu_get_mem_map, + .set_mem_map = cardu_set_mem_map, + .proc_setup = cardu_proc_setup, +}; + +static void cardu_bh(void *data) +{ + vrc4173_socket_t *socket = (vrc4173_socket_t *)data; + uint16_t events; + + spin_lock_irq(&socket->event_lock); + events = socket->events; + socket->events = 0; + spin_unlock_irq(&socket->event_lock); + + if (socket->handler) + socket->handler(socket->info, events); +} + +static uint16_t get_events(vrc4173_socket_t *socket) +{ + uint16_t events = 0; + uint8_t csc, status; + + status = exca_readb(socket, IF_STATUS); + csc = exca_readb(socket, CARD_SC); + if ((csc & CARD_DT_CHG) && + ((status & (CARD_DETECT1|CARD_DETECT2)) == (CARD_DETECT1|CARD_DETECT2))) + events |= SS_DETECT; + + if ((csc & RDY_CHG) && (status & READY)) + events |= SS_READY; + + if (exca_readb(socket, INT_GEN_CNT) & CARD_TYPE_IO) { + if ((csc & BAT_DEAD_ST_CHG) && (status & STSCHG)) + events |= SS_STSCHG; + } else { + if (csc & (BAT_WAR_CHG|BAT_DEAD_ST_CHG)) { + if ((status & BV_DETECT_MASK) != BV_DETECT_GOOD) { + if (status == BV_DETECT_WARN) events |= SS_BATWARN; + else events |= SS_BATDEAD; + } + } + } + + return events; +} + +static void cardu_interrupt(int irq, void *dev_id, struct pt_regs *regs) +{ + vrc4173_socket_t *socket = (vrc4173_socket_t *)dev_id; + uint16_t events; + + INIT_WORK(&socket->tq_work, cardu_bh, socket); + + events = get_events(socket); + if (events) { + spin_lock(&socket->event_lock); + socket->events |= events; + spin_unlock(&socket->event_lock); + schedule_work(&socket->tq_work); + } +} + +static int __devinit vrc4173_cardu_probe(struct pci_dev *dev, + const struct pci_device_id *ent) +{ + vrc4173_socket_t *socket; + unsigned long start, len, flags; + int slot, err; + + slot = vrc4173_cardu_slots++; + socket = &cardu_sockets[slot]; + if (socket->noprobe != 0) + return -EBUSY; + + sprintf(socket->name, "NEC VRC4173 CARDU%1d", slot+1); + + if ((err = pci_enable_device(dev)) < 0) + return err; + + start = pci_resource_start(dev, 0); + if (start == 0) + return -ENODEV; + + len = pci_resource_len(dev, 0); + if (len == 0) + return -ENODEV; + + if (((flags = pci_resource_flags(dev, 0)) & IORESOURCE_MEM) == 0) + return -EBUSY; + + if ((err = pci_request_regions(dev, socket->name)) < 0) + return err; + + socket->base = ioremap(start, len); + if (socket->base == NULL) + return -ENODEV; + + socket->dev = dev; + + socket->pcmcia_socket = pcmcia_register_socket(slot, &cardu_operations, 1); + if (socket->pcmcia_socket == NULL) { + iounmap(socket->base); + socket->base = NULL; + return -ENOMEM; + } + + if (request_irq(dev->irq, cardu_interrupt, SA_SHIRQ, socket->name, socket) < 0) { + pcmcia_unregister_socket(socket->pcmcia_socket); + socket->pcmcia_socket = NULL; + iounmap(socket->base); + socket->base = NULL; + return -EBUSY; + } + + printk(KERN_INFO "%s at %#08lx, IRQ %d\n", socket->name, start, dev->irq); + + return 0; +} + +static int __devinit vrc4173_cardu_setup(char *options) +{ + if (options == NULL || *options == '\0') + return 0; + + if (strncmp(options, "cardu1:", 7) == 0) { + options += 7; + if (*options != '\0') { + if (strncmp(options, "noprobe", 7) == 0) { + cardu_sockets[CARDU1].noprobe = 1; + options += 7; + } + + if (*options != ',') + return 0; + } else + return 0; + } + + if (strncmp(options, "cardu2:", 7) == 0) { + options += 7; + if ((*options != '\0') && (strncmp(options, "noprobe", 7) == 0)) + cardu_sockets[CARDU2].noprobe = 1; + } + + return 0; +} + +__setup("vrc4173_cardu=", vrc4173_cardu_setup); + +static struct pci_device_id vrc4173_cardu_id_table[] __devinitdata = { + { .vendor = PCI_VENDOR_ID_NEC, + .device = PCI_DEVICE_ID_NEC_NAPCCARD, + .subvendor = PCI_ANY_ID, + .subdevice = PCI_ANY_ID, }, + {0, } +}; + +static struct pci_driver vrc4173_cardu_driver = { + .name = "NEC VRC4173 CARDU", + .probe = vrc4173_cardu_probe, + .id_table = vrc4173_cardu_id_table, +}; + +static int __devinit vrc4173_cardu_init(void) +{ + vrc4173_cardu_slots = 0; + + return pci_module_init(&vrc4173_cardu_driver); +} + +static void __devexit vrc4173_cardu_exit(void) +{ + pci_unregister_driver(&vrc4173_cardu_driver); +} + +module_init(vrc4173_cardu_init); +module_exit(vrc4173_cardu_exit); diff -puN /dev/null drivers/pcmcia/vrc4173_cardu.h --- /dev/null 2003-09-15 06:40:47.000000000 -0700 +++ 25-akpm/drivers/pcmcia/vrc4173_cardu.h 2005-01-29 11:26:09.193350320 -0800 @@ -0,0 +1,247 @@ +/* + * FILE NAME + * drivers/pcmcia/vrc4173_cardu.h + * + * BRIEF MODULE DESCRIPTION + * Include file for NEC VRC4173 CARDU. + * + * Copyright 2002 Yoichi Yuasa + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR + * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#ifndef _VRC4173_CARDU_H +#define _VRC4173_CARDU_H + +#include + +#include + +#define CARDU_MAX_SOCKETS 2 +#define CARDU1 0 +#define CARDU2 1 + +/* + * PCI Configuration Registers + */ +#define BRGCNT 0x3e + #define POST_WR_EN 0x0400 + #define MEM1_PREF_EN 0x0200 + #define MEM0_PREF_EN 0x0100 + #define IREQ_INT 0x0080 + #define CARD_RST 0x0040 + #define MABORT_MODE 0x0020 + #define VGA_EN 0x0008 + #define ISA_EN 0x0004 + #define SERR_EN 0x0002 + #define PERR_EN 0x0001 + +#define SYSCNT 0x80 + #define BAD_VCC_REQ_DISB 0x00200000 + #define PCPCI_EN 0x00080000 + #define CH_ASSIGN_MASK 0x00070000 + #define CH_ASSIGN_NODMA 0x00040000 + #define SUB_ID_WR_EN 0x00000008 + #define ASYN_INT_MODE 0x00000004 + #define PCI_CLK_RIN 0x00000002 + +#define DEVCNT 0x91 + #define ZOOM_VIDEO_EN 0x40 + #define SR_PCI_INT_SEL_MASK 0x18 + #define SR_PCI_INT_SEL_NONE 0x00 + #define PCI_INT_MODE 0x04 + #define IRQ_MODE 0x02 + #define IFG 0x01 + +#define CHIPCNT 0x9c + #define S_PREF_DISB 0x10 + +#define SERRDIS 0x9f + #define SERR_DIS_MAB 0x10 + #define SERR_DIS_TAB 0x08 + #define SERR_DIS_DT_PERR 0x04 + +/* + * ExCA Registers + */ +#define EXCA_REGS_BASE 0x800 +#define EXCA_REGS_SIZE 0x800 + +#define ID_REV 0x000 + #define IF_TYPE_16BIT 0x80 + +#define IF_STATUS 0x001 + #define CARD_PWR 0x40 + #define READY 0x20 + #define CARD_WP 0x10 + #define CARD_DETECT2 0x08 + #define CARD_DETECT1 0x04 + #define BV_DETECT_MASK 0x03 + #define BV_DETECT_GOOD 0x03 /* Memory card */ + #define BV_DETECT_WARN 0x02 + #define BV_DETECT_BAD1 0x01 + #define BV_DETECT_BAD0 0x00 + #define STSCHG 0x02 /* I/O card */ + #define SPKR 0x01 + +#define PWR_CNT 0x002 + #define CARD_OUT_EN 0x80 + #define VCC_MASK 0x18 + #define VCC_3V 0x18 + #define VCC_5V 0x10 + #define VCC_0V 0x00 + #define VPP_MASK 0x03 + #define VPP_12V 0x02 + #define VPP_VCC 0x01 + #define VPP_0V 0x00 + +#define INT_GEN_CNT 0x003 + #define CARD_REST0 0x40 + #define CARD_TYPE_MASK 0x20 + #define CARD_TYPE_IO 0x20 + #define CARD_TYPE_MEM 0x00 + +#define CARD_SC 0x004 + #define CARD_DT_CHG 0x08 + #define RDY_CHG 0x04 + #define BAT_WAR_CHG 0x02 + #define BAT_DEAD_ST_CHG 0x01 + +#define CARD_SCI 0x005 + #define CARD_DT_EN 0x08 + #define RDY_EN 0x04 + #define BAT_WAR_EN 0x02 + #define BAT_DEAD_EN 0x01 + +#define ADR_WIN_EN 0x006 + #define IO_WIN_EN(x) (0x40 << (x)) + #define MEM_WIN_EN(x) (0x01 << (x)) + +#define IO_WIN_CNT 0x007 + #define IO_WIN_CNT_MASK(x) (0x03 << ((x) << 2)) + #define IO_WIN_DATA_AUTOSZ(x) (0x02 << ((x) << 2)) + #define IO_WIN_DATA_16BIT(x) (0x01 << ((x) << 2)) + +#define IO_WIN_SA(x) (0x008 + ((x) << 2)) +#define IO_WIN_EA(x) (0x00a + ((x) << 2)) + +#define MEM_WIN_SA(x) (0x010 + ((x) << 3)) + #define MEM_WIN_DSIZE 0x8000 + +#define MEM_WIN_EA(x) (0x012 + ((x) << 3)) + +#define MEM_WIN_OA(x) (0x014 + ((x) << 3)) + #define MEM_WIN_WP 0x8000 + #define MEM_WIN_REGSET 0x4000 + +#define GEN_CNT 0x016 + #define VS2_STATUS 0x80 + #define VS1_STATUS 0x40 + #define EXCA_REG_RST_EN 0x02 + +#define GLO_CNT 0x01e + #define FUN_INT_LEV 0x08 + #define INT_WB_CLR 0x04 + #define CSC_INT_LEV 0x02 + +#define IO_WIN_OAL(x) (0x036 + ((x) << 1)) +#define IO_WIN_OAH(x) (0x037 + ((x) << 1)) + +#define MEM_WIN_SAU(x) (0x040 + (x)) + +#define IO_SETUP_TIM 0x080 +#define IO_CMD_TIM 0x081 +#define IO_HOLD_TIM 0x082 +#define MEM_SETUP_TIM(x) (0x084 + ((x) << 2)) +#define MEM_CMD_TIM(x) (0x085 + ((x) << 2)) +#define MEM_HOLD_TIM(x) (0x086 + ((x) << 2)) + #define TIM_CLOCKS(x) ((x) - 1) + +#define MEM_TIM_SEL1 0x08c +#define MEM_TIM_SEL2 0x08d + #define MEM_WIN_TIMSEL1(x) (0x03 << (((x) & 3) << 1)) + +#define MEM_WIN_PWEN 0x091 + #define POSTWEN 0x01 + +/* + * CardBus Socket Registers + */ +#define CARDBUS_SOCKET_REGS_BASE 0x000 +#define CARDBUS_SOCKET_REGS_SIZE 0x800 + +#define SKT_EV 0x000 + #define POW_CYC_EV 0x00000008 + #define CCD2_EV 0x00000004 + #define CCD1_EV 0x00000002 + #define CSTSCHG_EV 0x00000001 + +#define SKT_MASK 0x004 + #define POW_CYC_MASK 0x00000008 + #define CCD_MASK 0x00000006 + #define CSC_MASK 0x00000001 + +#define SKT_PRE_STATE 0x008 +#define SKT_FORCE_EV 0x00c + #define VOL_3V_SKT 0x20000000 + #define VOL_5V_SKT 0x10000000 + #define CVS_TEST 0x00004000 + #define VOL_YV_CARD_DT 0x00002000 + #define VOL_XV_CARD_DT 0x00001000 + #define VOL_3V_CARD_DT 0x00000800 + #define VOL_5V_CARD_DT 0x00000400 + #define BAD_VCC_REQ 0x00000200 + #define DATA_LOST 0x00000100 + #define NOT_A_CARD 0x00000080 + #define CREADY 0x00000040 + #define CB_CARD_DT 0x00000020 + #define R2_CARD_DT 0x00000010 + #define POW_UP 0x00000008 + #define CCD20 0x00000004 + #define CCD10 0x00000002 + #define CSTSCHG 0x00000001 + +#define SKT_CNT 0x010 + #define STP_CLK_EN 0x00000080 + #define VCC_CNT_MASK 0x00000070 + #define VCC_CNT_3V 0x00000030 + #define VCC_CNT_5V 0x00000020 + #define VCC_CNT_0V 0x00000000 + #define VPP_CNT_MASK 0x00000007 + #define VPP_CNT_3V 0x00000003 + #define VPP_CNT_5V 0x00000002 + #define VPP_CNT_12V 0x00000001 + #define VPP_CNT_0V 0x00000000 + +typedef struct vrc4173_socket { + int noprobe; + struct pci_dev *dev; + void *base; + void (*handler)(void *, unsigned int); + void *info; + socket_cap_t cap; + spinlock_t event_lock; + uint16_t events; + struct socket_info_t *pcmcia_socket; + struct work_struct tq_work; + char name[20]; +} vrc4173_socket_t; + +#endif /* _VRC4173_CARDU_H */ diff -puN /dev/null include/asm-mips/vr41xx/cmbvr4133.h --- /dev/null 2003-09-15 06:40:47.000000000 -0700 +++ 25-akpm/include/asm-mips/vr41xx/cmbvr4133.h 2005-01-29 11:26:09.185351536 -0800 @@ -0,0 +1,61 @@ +/* + * include/asm-mips/vr41xx/cmbvr4133.h + * + * Include file for NEC CMB-VR4133. + * + * Author: Yoichi Yuasa and + * Jun Sun and + * Alex Sapkov + * + * 2002-2004 (c) MontaVista, Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + */ +#ifndef __NEC_CMBVR4133_H +#define __NEC_CMBVR4133_H + +#include +#include + +/* + * General-Purpose I/O Pin Number + */ +#define CMBVR41XX_INTA_PIN 1 +#define CMBVR41XX_INTB_PIN 1 +#define CMBVR41XX_INTC_PIN 3 +#define CMBVR41XX_INTD_PIN 1 +#define CMBVR41XX_INTE_PIN 1 + +/* + * Interrupt Number + */ +#define CMBVR41XX_INTA_IRQ GIU_IRQ(CMBVR41XX_INTA_PIN) +#define CMBVR41XX_INTB_IRQ GIU_IRQ(CMBVR41XX_INTB_PIN) +#define CMBVR41XX_INTC_IRQ GIU_IRQ(CMBVR41XX_INTC_PIN) +#define CMBVR41XX_INTD_IRQ GIU_IRQ(CMBVR41XX_INTD_PIN) +#define CMBVR41XX_INTE_IRQ GIU_IRQ(CMBVR41XX_INTE_PIN) + +#define I8259_IRQ_BASE 72 +#define I8259_IRQ(x) (I8259_IRQ_BASE + (x)) +#define TIMER_IRQ I8259_IRQ(0) +#define KEYBOARD_IRQ I8259_IRQ(1) +#define I8259_SLAVE_IRQ I8259_IRQ(2) +#define UART3_IRQ I8259_IRQ(3) +#define UART1_IRQ I8259_IRQ(4) +#define UART2_IRQ I8259_IRQ(5) +#define FDC_IRQ I8259_IRQ(6) +#define PARPORT_IRQ I8259_IRQ(7) +#define RTC_IRQ I8259_IRQ(8) +#define USB_IRQ I8259_IRQ(9) +#define I8259_INTA_IRQ I8259_IRQ(10) +#define AUDIO_IRQ I8259_IRQ(11) +#define AUX_IRQ I8259_IRQ(12) +#define IDE_PRIMARY_IRQ I8259_IRQ(14) +#define IDE_SECONDARY_IRQ I8259_IRQ(15) +#define I8259_IRQ_LAST IDE_SECONDARY_IRQ + +#define RTC_PORT(x) (0xaf000100 + (x)) +#define RTC_IO_EXTENT 0x140 + +#endif /* __NEC_CMBVR4133_H */ diff -puN include/asm-mips/vr41xx/vrc4173.h~mips-vr41xx-updates include/asm-mips/vr41xx/vrc4173.h --- 25/include/asm-mips/vr41xx/vrc4173.h~mips-vr41xx-updates 2005-01-29 11:26:09.165354576 -0800 +++ 25-akpm/include/asm-mips/vr41xx/vrc4173.h 2005-01-29 11:26:09.185351536 -0800 @@ -5,6 +5,7 @@ * Copyright (C) 2001-2003 Montavista Software Inc. * Author: Yoichi Yuasa * Copyright (C) 2004 Yoichi Yuasa + * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -23,6 +24,7 @@ #ifndef __NEC_VRC4173_H #define __NEC_VRC4173_H +#include #include /* diff -puN include/linux/pci_ids.h~mips-vr41xx-updates include/linux/pci_ids.h --- 25/include/linux/pci_ids.h~mips-vr41xx-updates 2005-01-29 11:26:09.167354272 -0800 +++ 25-akpm/include/linux/pci_ids.h 2005-01-29 11:26:09.196349864 -0800 @@ -586,6 +586,7 @@ #define PCI_DEVICE_ID_NEC_CBUS_2 0x002d /* PCI-Cbus Bridge */ #define PCI_DEVICE_ID_NEC_USB 0x0035 /* PCI-USB Host */ #define PCI_DEVICE_ID_NEC_CBUS_3 0x003b +#define PCI_DEVICE_ID_NEC_NAPCCARD 0x003e #define PCI_DEVICE_ID_NEC_PCX2 0x0046 /* PowerVR */ #define PCI_DEVICE_ID_NEC_NILE4 0x005a #define PCI_DEVICE_ID_NEC_VRC5476 0x009b @@ -2343,6 +2344,7 @@ #define PCI_DEVICE_ID_INTEL_IXP4XX 0x8500 #define PCI_DEVICE_ID_INTEL_IXP2400 0x9001 #define PCI_DEVICE_ID_INTEL_IXP2800 0x9004 +#define PCI_DEVICE_ID_INTEL_S21152BB 0xb152 #define PCI_VENDOR_ID_COMPUTONE 0x8e0e #define PCI_DEVICE_ID_COMPUTONE_IP2EX 0x0291 _