From: Jesse Barnes There are a few spots in qla1280.c that don't need a full PCI write flush to the device, but rather a simple write ordering guarantee. This patch changes some of the PIO reads that cause write flushes into mmiowb calls instead, which is a lighter weight way of ensuring ordering. Signed-off-by: Jeremy Higdon Signed-off-by: Jesse Barnes Signed-off-by: Andrew Morton --- 25-akpm/drivers/scsi/qla1280.c | 22 ++++++++++++++++++---- 1 files changed, 18 insertions(+), 4 deletions(-) diff -puN drivers/scsi/qla1280.c~use-mmiowb-in-qla1280c drivers/scsi/qla1280.c --- 25/drivers/scsi/qla1280.c~use-mmiowb-in-qla1280c 2004-10-21 21:20:30.656407840 -0700 +++ 25-akpm/drivers/scsi/qla1280.c 2004-10-21 21:20:30.678404496 -0700 @@ -3400,7 +3400,8 @@ qla1280_64bit_start_scsi(struct scsi_qla sp->flags |= SRB_SENT; ha->actthreads++; WRT_REG_WORD(®->mailbox4, ha->req_ring_index); - (void) RD_REG_WORD(®->mailbox4); /* PCI posted write flush */ + /* Enforce mmio write ordering; see comment in qla1280_isp_cmd(). */ + mmiowb(); out: if (status) @@ -3668,7 +3669,8 @@ qla1280_32bit_start_scsi(struct scsi_qla sp->flags |= SRB_SENT; ha->actthreads++; WRT_REG_WORD(®->mailbox4, ha->req_ring_index); - (void) RD_REG_WORD(®->mailbox4); /* PCI posted write flush */ + /* Enforce mmio write ordering; see comment in qla1280_isp_cmd(). */ + mmiowb(); out: if (status) @@ -3778,9 +3780,21 @@ qla1280_isp_cmd(struct scsi_qla_host *ha } else ha->request_ring_ptr++; - /* Set chip new ring index. */ + /* + * Update request index to mailbox4 (Request Queue In). + * The mmiowb() ensures that this write is ordered with writes by other + * CPUs. Without the mmiowb(), it is possible for the following: + * CPUA posts write of index 5 to mailbox4 + * CPUA releases host lock + * CPUB acquires host lock + * CPUB posts write of index 6 to mailbox4 + * On PCI bus, order reverses and write of 6 posts, then index 5, + * causing chip to issue full queue of stale commands + * The mmiowb() prevents future writes from crossing the barrier. + * See Documentation/DocBook/deviceiobook.tmpl for more information. + */ WRT_REG_WORD(®->mailbox4, ha->req_ring_index); - (void) RD_REG_WORD(®->mailbox4); /* PCI posted write flush */ + mmiowb(); LEAVE("qla1280_isp_cmd"); } _