From: David Howells The attached patch makes byte and word writes to PCI config space work. The problem was that the pointer to the appropriate chunk of the config port needs to be juggled to allow for the fact that FRV is big endian in this case. Signed-Off-By: David Howells Signed-off-by: Andrew Morton --- 25-akpm/arch/frv/mb93090-mb00/pci-vdk.c | 11 ++++++++--- 1 files changed, 8 insertions(+), 3 deletions(-) diff -puN arch/frv/mb93090-mb00/pci-vdk.c~fix-frv-pci-config-space-write arch/frv/mb93090-mb00/pci-vdk.c --- 25/arch/frv/mb93090-mb00/pci-vdk.c~fix-frv-pci-config-space-write Mon Nov 22 14:30:41 2004 +++ 25-akpm/arch/frv/mb93090-mb00/pci-vdk.c Mon Nov 22 14:30:41 2004 @@ -44,9 +44,14 @@ struct pci_ops *__nongpreldata pci_root_ #define __get_PciCfgDataW(A) readw((volatile void __iomem *) __region_CS1 + 0x88 + ((A) & 2)) #define __get_PciCfgDataL(A) readl((volatile void __iomem *) __region_CS1 + 0x88) -#define __set_PciCfgDataB(A,V) writeb((V), (volatile void __iomem *) __region_CS1 + 0x88 + ((A) & 3)) -#define __set_PciCfgDataW(A,V) writew((V), (volatile void __iomem *) __region_CS1 + 0x88 + ((A) & 2)) -#define __set_PciCfgDataL(A,V) writel((V), (volatile void __iomem *) __region_CS1 + 0x88) +#define __set_PciCfgDataB(A,V) \ + writeb((V), (volatile void __iomem *) __region_CS1 + 0x88 + (3 - ((A) & 3))) + +#define __set_PciCfgDataW(A,V) \ + writew((V), (volatile void __iomem *) __region_CS1 + 0x88 + (2 - ((A) & 2))) + +#define __set_PciCfgDataL(A,V) \ + writel((V), (volatile void __iomem *) __region_CS1 + 0x88) #define __get_PciBridgeDataB(A) readb((volatile void __iomem *) __region_CS1 + 0x800 + (A)) #define __get_PciBridgeDataW(A) readw((volatile void __iomem *) __region_CS1 + 0x800 + (A)) _