diff -urN -X /home/jsimmons/dontdiff linus-2.6/Documentation/fb/neofb.txt fbdev-2.6/Documentation/fb/neofb.txt --- linus-2.6/Documentation/fb/neofb.txt Wed Dec 31 16:00:00 1969 +++ fbdev-2.6/Documentation/fb/neofb.txt Thu Oct 16 14:07:38 2003 @@ -0,0 +1,27 @@ +the neofb framebuffer driver supports the following Neomagic chipsets: + +NM2070 MagicGraph 128 +NM2090 MagicGraph 128V +NM2093 MagicGraph 128ZV +NM2097 MagicGraph 128ZV+ +NM2160 MagicGraph 128XD +NM2200 MagicGraph 256AV +NM2230 MagicGraph 256AV+ +NM2360 MagicGraph 256ZX +NM2380 MagicGraph 256XL+ + +with the following options: + +disabled Disable this driver's initialization. +internal Enable output on internal LCD Display. +external Enable output on external CRT. +nostretch Disable stretching of modes smaller than LCD. +nopciburst Disable PCI burst mode. +libretto Force Libretto 100/110 800x480 LCD. +picturebook Force Picturebook 1024x480 LCD. + +at the boot prompt: + video=neofb:picturebook + +as a module: + modprobe neofb picturebook=1 diff -urN -X /home/jsimmons/dontdiff linus-2.6/MAINTAINERS fbdev-2.6/MAINTAINERS --- linus-2.6/MAINTAINERS Thu Oct 16 14:07:44 2003 +++ fbdev-2.6/MAINTAINERS Thu Oct 16 14:06:50 2003 @@ -722,6 +722,11 @@ W: http://sourceforge.net/projects/emu10k1/ S: Maintained +EPSON 1355 FRAMEBUFFER DRIVER +P: Christopher Hoover +M: ch@murgatroid.com, ch@hpl.hp.com +S: Maintained + ETHEREXPRESS-16 NETWORK DRIVER P: Philip Blundell M: Philip.Blundell@pobox.com diff -urN -X /home/jsimmons/dontdiff linus-2.6/drivers/video/Kconfig fbdev-2.6/drivers/video/Kconfig --- linus-2.6/drivers/video/Kconfig Thu Oct 16 14:13:27 2003 +++ fbdev-2.6/drivers/video/Kconfig Thu Oct 16 14:13:29 2003 @@ -55,7 +55,7 @@ config FB_PM2 tristate "Permedia2 support" - depends on FB && (AMIGA || PCI) && BROKEN + depends on FB && (AMIGA || PCI) help This is the frame buffer device driver for the Permedia2 AGP frame buffer card from ASK, aka `Graphic Blaster Exxtreme'. There is a @@ -68,16 +68,9 @@ help Support the Permedia2 FIFOI disconnect feature (see CONFIG_FB_PM2). -config FB_PM2_PCI - bool "generic Permedia2 PCI board support" - depends on FB_PM2 && PCI - help - Say Y to enable support for Permedia2 AGP frame buffer card from - 3Dlabs (aka `Graphic Blaster Exxtreme') on the PCI bus. - config FB_PM2_CVPPC bool "Phase5 CVisionPPC/BVisionPPC support" - depends on FB_PM2 && AMIGA + depends on FB_PM2 && AMIGA && BROKEN help Say Y to enable support for the Amiga Phase 5 CVisionPPC BVisionPPC framebuffer cards. Phase 5 is no longer with us, alas. @@ -266,6 +259,10 @@ This is the frame buffer device driver for the Chips & Technologies 65550 graphics chip in PowerBooks. +config FB_ASILIANT + bool "Chips 69000 display support" + depends on FB && PCI + config FB_IMSTT bool "IMS Twin Turbo display support" depends on FB && PCI @@ -414,35 +411,15 @@ messages. Most people will want to say N here. If unsure, you will also want to say N. -config FB_E1355 +config FB_EPSON1355 bool "Epson 1355 framebuffer support" - depends on FB && SUPERH + depends on FB && (SUPERH || ARCH_CEIVA) help Build in support for the SED1355 Epson Research Embedded RAMDAC LCD/CRT Controller (since redesignated as the S1D13505) as a framebuffer. Product specs at . -config E1355_REG_BASE - hex "Register Base Address" - depends on FB_E1355 - default "a8000000" - help - Epson SED1355/S1D13505 LCD/CRT controller register base address. - See the manuals at - for - discussion. - -config E1355_FB_BASE - hex "Framebuffer Base Address" - depends on FB_E1355 - default "a8200000" - help - Epson SED1355/S1D13505 LCD/CRT controller memory base address. See - the manuals at - for - discussion. - config FB_RIVA tristate "nVidia Riva support" depends on FB && PCI @@ -685,6 +662,19 @@ framebuffer device. The ATI product support page for these boards is at . +config FB_ATY_GENERIC_LCD + bool "Mach64 generic LCD support (EXPERIMENTAL)" + depends on FB_ATY_CT + help + Say Y if you have a laptop with an ATI Rage LT PRO, Rage Mobility, + Rage XC, or Rage XL chipset. + +config FB_ATY_XL_INIT + bool "Rage XL No-BIOS Init support" + depends on FB_ATY_CT + help + Say Y here to support booting a Rage XL without BIOS support. + config FB_ATY_GX bool "Mach64 GX support" if PCI depends on FB_ATY @@ -696,33 +686,41 @@ is at . -config FB_ATY_XL_INIT - bool " Rage XL No-BIOS Init support" if FB_ATY_CT - depends on FB_ATY - help - Say Y here to support booting a Rage XL without BIOS support. - config FB_SIS - tristate "SIS acceleration" + tristate "SiS acceleration" depends on FB && PCI help - This is the frame buffer device driver for the SiS 630 and 640 Super - Socket 7 UMA cards. Specs available at . + This is the frame buffer device driver for the SiS 300, 315 and Xabre + series VGA controller. + + Specs available at . + + See for + documentation and updates. + + The driver is also available as a module ( = code which can be + inserted and removed from the running kernel whenever you want). The + module will be called sisfb. If you want to compile it as a + module, say M here and read Documentation/modules.txt. config FB_SIS_300 - bool "SIS 630/540/730 support" + bool "SIS 300 series support" depends on FB_SIS help - This is the frame buffer device driver for the SiS 630 and related - Super Socket 7 UMA cards. Specs available at - . + This is the frame buffer device driver for the SiS 300 series VGA + controllers. This includes the 300, 540, 630, 730. + Documentation and updates available at + http://www.winischhofer.net/linuxsisvga.shtml config FB_SIS_315 - bool "SIS 315H/315 support" + bool "SIS 315/Xabre support" depends on FB_SIS help - This is the frame buffer device driver for the SiS 315 graphics - card. Specs available at . + This is the frame buffer device driver for the SiS 315 and Xabre + series VGA controllers. This includes the 315, 315H, 315PRO, 650, + 651, M650, 652, M652, 740, 330 (Xabre), 660, M660, 760, M760. + Documentation and updates available at + http://www.winischhofer.net/linuxsisvga.shtml config FB_NEOMAGIC tristate "NeoMagic display support" diff -urN -X /home/jsimmons/dontdiff linus-2.6/drivers/video/Makefile fbdev-2.6/drivers/video/Makefile --- linus-2.6/drivers/video/Makefile Thu Oct 16 14:13:28 2003 +++ fbdev-2.6/drivers/video/Makefile Wed Oct 15 16:50:03 2003 @@ -15,14 +15,13 @@ obj-$(CONFIG_FB_ACORN) += acornfb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o obj-$(CONFIG_FB_AMIGA) += amifb.o c2p.o -obj-$(CONFIG_FB_PM2) += pm2fb.o +obj-$(CONFIG_FB_PM2) += pm2fb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o obj-$(CONFIG_FB_PM3) += pm3fb.o obj-$(CONFIG_FB_APOLLO) += dnfb.o cfbfillrect.o cfbimgblt.o obj-$(CONFIG_FB_Q40) += q40fb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o obj-$(CONFIG_FB_ATARI) += atafb.o obj-$(CONFIG_FB_68328) += 68328fb.o -obj-$(CONFIG_FB_RADEON) += radeonfb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o -obj-$(CONFIG_FB_NEOMAGIC) += neofb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o +obj-$(CONFIG_FB_NEOMAGIC) += neofb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o vgastate.o obj-$(CONFIG_FB_IGA) += igafb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o obj-$(CONFIG_FB_CONTROL) += controlfb.o macmodes.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o obj-$(CONFIG_FB_PLATINUM) += platinumfb.o macmodes.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o @@ -33,7 +32,7 @@ obj-$(CONFIG_FB_CYBER) += cyberfb.o obj-$(CONFIG_FB_CYBER2000) += cyber2000fb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o obj-$(CONFIG_FB_SGIVW) += sgivwfb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o -obj-$(CONFIG_FB_3DFX) += tdfxfb.o cfbimgblt.o +obj-$(CONFIG_FB_3DFX) += tdfxfb.o obj-$(CONFIG_FB_MAC) += macfb.o macmodes.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o obj-$(CONFIG_FB_HP300) += hpfb.o cfbfillrect.o cfbimgblt.o obj-$(CONFIG_FB_OF) += offb.o cfbfillrect.o cfbimgblt.o cfbcopyarea.o @@ -60,6 +59,7 @@ obj-$(CONFIG_FB_SIS) += sis/ cfbcopyarea.o cfbfillrect.o cfbimgblt.o obj-$(CONFIG_FB_ATY) += aty/ cfbcopyarea.o cfbfillrect.o cfbimgblt.o obj-$(CONFIG_FB_ATY128) += aty/ cfbcopyarea.o cfbfillrect.o cfbimgblt.o +obj-$(CONFIG_FB_RADEON) += aty/ cfbcopyarea.o cfbfillrect.o cfbimgblt.o obj-$(CONFIG_FB_I810) += i810/ cfbfillrect.o cfbcopyarea.o \ cfbimgblt.o vgastate.o @@ -68,9 +68,10 @@ obj-$(CONFIG_FB_SA1100) += sa1100fb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o obj-$(CONFIG_FB_VIRTUAL) += vfb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o obj-$(CONFIG_FB_HIT) += hitfb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o -obj-$(CONFIG_FB_E1355) += epson1355fb.o -obj-$(CONFIG_FB_PVR2) += pvr2fb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o +obj-$(CONFIG_FB_EPSON1355) += epson1355fb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o +obj-$(CONFIG_FB_PVR2) += pvr2fb.o cfbcillrect.o cfbcopyarea.o cfbimgblt.o obj-$(CONFIG_FB_VOODOO1) += sstfb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o +obj-$(CONFIG_FB_ASILIANT) += asiliantfb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o obj-$(CONFIG_FB_FFB) += ffb.o sbuslib.o cfbimgblt.o cfbcopyarea.o obj-$(CONFIG_FB_CG6) += cg6.o sbuslib.o cfbimgblt.o cfbcopyarea.o diff -urN -X /home/jsimmons/dontdiff linus-2.6/drivers/video/acornfb.c fbdev-2.6/drivers/video/acornfb.c --- linus-2.6/drivers/video/acornfb.c Thu Oct 16 14:13:29 2003 +++ fbdev-2.6/drivers/video/acornfb.c Thu Oct 16 14:13:30 2003 @@ -1287,7 +1287,6 @@ } } - fb_info.currcon = -1; fb_info.screen_base = (char *)SCREEN_BASE; fb_info.fix.smem_start = SCREEN_START; current_par.using_vram = 0; diff -urN -X /home/jsimmons/dontdiff linus-2.6/drivers/video/asiliantfb.c fbdev-2.6/drivers/video/asiliantfb.c --- linus-2.6/drivers/video/asiliantfb.c Wed Dec 31 16:00:00 1969 +++ fbdev-2.6/drivers/video/asiliantfb.c Thu Oct 16 14:13:30 2003 @@ -0,0 +1,619 @@ +/* + * drivers/video/asiliantfb.c + * frame buffer driver for Asiliant 69000 chip + * Copyright (C) 2001-2003 Saito.K & Jeanne + * + * from driver/video/chipsfb.c and, + * + * drivers/video/asiliantfb.c -- frame buffer device for + * Asiliant 69030 chip (formerly Intel, formerly Chips & Technologies) + * Author: apc@agelectronics.co.uk + * Copyright (C) 2000 AG Electronics + * Note: the data sheets don't seem to be available from Asiliant. + * They are available by searching developer.intel.com, but are not otherwise + * linked to. + * + * This driver should be portable with minimal effort to the 69000 display + * chip, and to the twin-display mode of the 69030. + * Contains code from Thomas Hhenleitner (thanks) + * + * Derived from the CT65550 driver chipsfb.c: + * Copyright (C) 1998 Paul Mackerras + * ...which was derived from the Powermac "chips" driver: + * Copyright (C) 1997 Fabio Riccardi. + * And from the frame buffer device for Open Firmware-initialized devices: + * Copyright (C) 1997 Geert Uytterhoeven. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive for + * more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static struct fb_info asiliantfb_info; + +/* Built in clock of the 69030 */ +const unsigned Fref = 14318180; + +static u32 pseudo_palette[17]; + +#define mmio_base (p->screen_base + 0x400000) + +#define mm_write_ind(num, val, ap, dp) do { \ + writeb((num), mmio_base + (ap)); writeb((val), mmio_base + (dp)); \ +} while (0) + +static void mm_write_xr(struct fb_info *p, u8 reg, u8 data) +{ + mm_write_ind(reg, data, 0x7ac, 0x7ad); +} +#define write_xr(num, val) mm_write_xr(p, num, val) + +static void mm_write_fr(struct fb_info *p, u8 reg, u8 data) +{ + mm_write_ind(reg, data, 0x7a0, 0x7a1); +} +#define write_fr(num, val) mm_write_fr(p, num, val) + +static void mm_write_cr(struct fb_info *p, u8 reg, u8 data) +{ + mm_write_ind(reg, data, 0x7a8, 0x7a9); +} +#define write_cr(num, val) mm_write_cr(p, num, val) + +static void mm_write_gr(struct fb_info *p, u8 reg, u8 data) +{ + mm_write_ind(reg, data, 0x79c, 0x79d); +} +#define write_gr(num, val) mm_write_gr(p, num, val) + +static void mm_write_sr(struct fb_info *p, u8 reg, u8 data) +{ + mm_write_ind(reg, data, 0x788, 0x789); +} +#define write_sr(num, val) mm_write_sr(p, num, val) + +static void mm_write_ar(struct fb_info *p, u8 reg, u8 data) +{ + readb(mmio_base + 0x7b4); + mm_write_ind(reg, data, 0x780, 0x780); +} +#define write_ar(num, val) mm_write_ar(p, num, val) + +/* + * Exported functions + */ +int asiliantfb_init(void); + +static int asiliantfb_pci_init(struct pci_dev *dp, const struct pci_device_id *); +static int asiliantfb_check_var(struct fb_var_screeninfo *var, + struct fb_info *info); +static int asiliantfb_set_par(struct fb_info *info); +static int asiliantfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, + u_int transp, struct fb_info *info); + +static struct fb_ops asiliantfb_ops = { + .owner = THIS_MODULE, + .fb_check_var = asiliantfb_check_var, + .fb_set_par = asiliantfb_set_par, + .fb_setcolreg = asiliantfb_setcolreg, + .fb_fillrect = cfb_fillrect, + .fb_copyarea = cfb_copyarea, + .fb_imageblit = cfb_imageblit, + .fb_cursor = soft_cursor, +}; + +/* Calculate the ratios for the dot clocks without using a single long long + * value */ +static void asiliant_calc_dclk2(u32 *ppixclock, u8 *dclk2_m, u8 *dclk2_n, u8 *dclk2_div) +{ + unsigned pixclock = *ppixclock; + unsigned Ftarget = 1000000 * (1000000 / pixclock); + unsigned n; + unsigned best_error = 0xffffffff; + unsigned best_m = 0xffffffff, + best_n = 0xffffffff; + unsigned ratio; + unsigned remainder; + unsigned char divisor = 0; + + /* Calculate the frequency required. This is hard enough. */ + ratio = 1000000 / pixclock; + remainder = 1000000 % pixclock; + Ftarget = 1000000 * ratio + (1000000 * remainder) / pixclock; + + while (Ftarget < 100000000) { + divisor += 0x10; + Ftarget <<= 1; + } + + ratio = Ftarget / Fref; + remainder = Ftarget % Fref; + + /* This expresses the constraint that 150kHz <= Fref/n <= 5Mhz, + * together with 3 <= n <= 257. */ + for (n = 3; n <= 257; n++) { + unsigned m = n * ratio + (n * remainder) / Fref; + + /* 3 <= m <= 257 */ + if (m >= 3 && m <= 257) { + unsigned new_error = ((Ftarget * n) - (Fref * m)) >= 0 ? + ((Ftarget * n) - (Fref * m)) : ((Fref * m) - (Ftarget * n)); + if (new_error < best_error) { + best_n = n; + best_m = m; + best_error = new_error; + } + } + /* But if VLD = 4, then 4m <= 1028 */ + else if (m <= 1028) { + /* remember there are still only 8-bits of precision in m, so + * avoid over-optimistic error calculations */ + unsigned new_error = ((Ftarget * n) - (Fref * (m & ~3))) >= 0 ? + ((Ftarget * n) - (Fref * (m & ~3))) : ((Fref * (m & ~3)) - (Ftarget * n)); + if (new_error < best_error) { + best_n = n; + best_m = m; + best_error = new_error; + } + } + } + if (best_m > 257) + best_m >>= 2; /* divide m by 4, and leave VCO loop divide at 4 */ + else + divisor |= 4; /* or set VCO loop divide to 1 */ + *dclk2_m = best_m - 2; + *dclk2_n = best_n - 2; + *dclk2_div = divisor; + *ppixclock = pixclock; + return; +} + +static void asiliant_set_timing(struct fb_info *p) +{ + unsigned hd = p->var.xres / 8; + unsigned hs = (p->var.xres + p->var.right_margin) / 8; + unsigned he = (p->var.xres + p->var.right_margin + p->var.hsync_len) / 8; + unsigned ht = (p->var.left_margin + p->var.xres + p->var.right_margin + p->var.hsync_len) / 8; + unsigned vd = p->var.yres; + unsigned vs = p->var.yres + p->var.lower_margin; + unsigned ve = p->var.yres + p->var.lower_margin + p->var.vsync_len; + unsigned vt = p->var.upper_margin + p->var.yres + p->var.lower_margin + p->var.vsync_len; + unsigned wd = (p->var.xres_virtual * ((p->var.bits_per_pixel+7)/8)) / 8; + + if ((p->var.xres == 640) && (p->var.yres == 480) && (p->var.pixclock == 39722)) { + write_fr(0x01, 0x02); /* LCD */ + } else { + write_fr(0x01, 0x01); /* CRT */ + } + + write_cr(0x11, (ve - 1) & 0x0f); + write_cr(0x00, (ht - 5) & 0xff); + write_cr(0x01, hd - 1); + write_cr(0x02, hd); + write_cr(0x03, ((ht - 1) & 0x1f) | 0x80); + write_cr(0x04, hs); + write_cr(0x05, (((ht - 1) & 0x20) <<2) | (he & 0x1f)); + write_cr(0x3c, (ht - 1) & 0xc0); + write_cr(0x06, (vt - 2) & 0xff); + write_cr(0x30, (vt - 2) >> 8); + write_cr(0x07, 0x00); + write_cr(0x08, 0x00); + write_cr(0x09, 0x00); + write_cr(0x10, (vs - 1) & 0xff); + write_cr(0x32, ((vs - 1) >> 8) & 0xf); + write_cr(0x11, ((ve - 1) & 0x0f) | 0x80); + write_cr(0x12, (vd - 1) & 0xff); + write_cr(0x31, ((vd - 1) & 0xf00) >> 8); + write_cr(0x13, wd & 0xff); + write_cr(0x41, (wd & 0xf00) >> 8); + write_cr(0x15, (vs - 1) & 0xff); + write_cr(0x33, ((vs - 1) >> 8) & 0xf); + write_cr(0x38, ((ht - 5) & 0x100) >> 8); + write_cr(0x16, (vt - 1) & 0xff); + write_cr(0x18, 0x00); + + if (p->var.xres == 640) { + writeb(0xc7, mmio_base + 0x784); /* set misc output reg */ + } else { + writeb(0x07, mmio_base + 0x784); /* set misc output reg */ + } +} + +static int asiliantfb_check_var(struct fb_var_screeninfo *var, + struct fb_info *p) +{ + unsigned long Ftarget, ratio, remainder; + + ratio = 1000000 / var->pixclock; + remainder = 1000000 % var->pixclock; + Ftarget = 1000000 * ratio + (1000000 * remainder) / var->pixclock; + + /* First check the constraint that the maximum post-VCO divisor is 32, + * and the maximum Fvco is 220MHz */ + if (Ftarget > 220000000 || Ftarget < 3125000) { + printk(KERN_ERR "asiliantfb dotclock must be between 3.125 and 220MHz\n"); + return -ENXIO; + } + var->xres_virtual = var->xres; + var->yres_virtual = var->yres; + + if (var->bits_per_pixel == 24) { + var->red.offset = 16; + var->green.offset = 8; + var->blue.offset = 0; + var->red.length = var->blue.length = var->green.length = 8; + } else if (var->bits_per_pixel == 16) { + switch (var->red.offset) { + case 11: + var->green.length = 6; + break; + case 10: + var->green.length = 5; + break; + default: + return -EINVAL; + } + var->green.offset = 5; + var->blue.offset = 0; + var->red.length = var->blue.length = 5; + } else if (var->bits_per_pixel == 8) { + var->red.offset = var->green.offset = var->blue.offset = 0; + var->red.length = var->green.length = var->blue.length = 8; + } + return 0; +} + +static int asiliantfb_set_par(struct fb_info *p) +{ + u8 dclk2_m; /* Holds m-2 value for register */ + u8 dclk2_n; /* Holds n-2 value for register */ + u8 dclk2_div; /* Holds divisor bitmask */ + + /* Set pixclock */ + asiliant_calc_dclk2(&p->var.pixclock, &dclk2_m, &dclk2_n, &dclk2_div); + + /* Set color depth */ + if (p->var.bits_per_pixel == 24) { + write_xr(0x81, 0x16); /* 24 bit packed color mode */ + write_xr(0x82, 0x00); /* Disable palettes */ + write_xr(0x20, 0x20); /* 24 bit blitter mode */ + } else if (p->var.bits_per_pixel == 16) { + if (p->var.red.offset == 11) + write_xr(0x81, 0x15); /* 16 bit color mode */ + else + write_xr(0x81, 0x14); /* 15 bit color mode */ + write_xr(0x82, 0x00); /* Disable palettes */ + write_xr(0x20, 0x10); /* 16 bit blitter mode */ + } else if (p->var.bits_per_pixel == 8) { + write_xr(0x0a, 0x02); /* Linear */ + write_xr(0x81, 0x12); /* 8 bit color mode */ + write_xr(0x82, 0x00); /* Graphics gamma enable */ + write_xr(0x20, 0x00); /* 8 bit blitter mode */ + } + p->fix.line_length = p->var.xres * (p->var.bits_per_pixel >> 3); + p->fix.visual = (p->var.bits_per_pixel == 8) ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR; + write_xr(0xc4, dclk2_m); + write_xr(0xc5, dclk2_n); + write_xr(0xc7, dclk2_div); + /* Set up the CR registers */ + asiliant_set_timing(p); + return 0; +} + +static int asiliantfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, + u_int transp, struct fb_info *p) +{ + if (regno > 255) + return 1; + red >>= 8; + green >>= 8; + blue >>= 8; + + /* Set hardware palete */ + writeb(regno, mmio_base + 0x790); + udelay(1); + writeb(red, mmio_base + 0x791); + writeb(green, mmio_base + 0x791); + writeb(blue, mmio_base + 0x791); + + switch(p->var.bits_per_pixel) { + case 15: + if (regno < 16) { + ((u32 *)(p->pseudo_palette))[regno] = + ((red & 0xf8) << 7) | + ((green & 0xf8) << 2) | + ((blue & 0xf8) >> 3); + } + break; + case 16: + if (regno < 16) { + ((u32 *)(p->pseudo_palette))[regno] = + ((red & 0xf8) << 8) | + ((green & 0xfc) << 3) | + ((blue & 0xf8) >> 3); + } + break; + case 24: + if (regno < 24) { + ((u32 *)(p->pseudo_palette))[regno] = + (red << 16) | + (green << 8) | + (blue); + } + break; + } + return 0; +} + +struct chips_init_reg { + unsigned char addr; + unsigned char data; +}; + +#define N_ELTS(x) (sizeof(x) / sizeof(x[0])) + +static struct chips_init_reg chips_init_sr[] = +{ + {0x00, 0x03}, /* Reset register */ + {0x01, 0x01}, /* Clocking mode */ + {0x02, 0x0f}, /* Plane mask */ + {0x04, 0x0e} /* Memory mode */ +}; + +static struct chips_init_reg chips_init_gr[] = +{ + {0x03, 0x00}, /* Data rotate */ + {0x05, 0x00}, /* Graphics mode */ + {0x06, 0x01}, /* Miscellaneous */ + {0x08, 0x00} /* Bit mask */ +}; + +static struct chips_init_reg chips_init_ar[] = +{ + {0x10, 0x01}, /* Mode control */ + {0x11, 0x00}, /* Overscan */ + {0x12, 0x0f}, /* Memory plane enable */ + {0x13, 0x00} /* Horizontal pixel panning */ +}; + +static struct chips_init_reg chips_init_cr[] = +{ + {0x0c, 0x00}, /* Start address high */ + {0x0d, 0x00}, /* Start address low */ + {0x40, 0x00}, /* Extended Start Address */ + {0x41, 0x00}, /* Extended Start Address */ + {0x14, 0x00}, /* Underline location */ + {0x17, 0xe3}, /* CRT mode control */ + {0x70, 0x00} /* Interlace control */ +}; + + +static struct chips_init_reg chips_init_fr[] = +{ + {0x01, 0x02}, + {0x03, 0x08}, + {0x08, 0xcc}, + {0x0a, 0x08}, + {0x18, 0x00}, + {0x1e, 0x80}, + {0x40, 0x83}, + {0x41, 0x00}, + {0x48, 0x13}, + {0x4d, 0x60}, + {0x4e, 0x0f}, + + {0x0b, 0x01}, + + {0x21, 0x51}, + {0x22, 0x1d}, + {0x23, 0x5f}, + {0x20, 0x4f}, + {0x34, 0x00}, + {0x24, 0x51}, + {0x25, 0x00}, + {0x27, 0x0b}, + {0x26, 0x00}, + {0x37, 0x80}, + {0x33, 0x0b}, + {0x35, 0x11}, + {0x36, 0x02}, + {0x31, 0xea}, + {0x32, 0x0c}, + {0x30, 0xdf}, + {0x10, 0x0c}, + {0x11, 0xe0}, + {0x12, 0x50}, + {0x13, 0x00}, + {0x16, 0x03}, + {0x17, 0xbd}, + {0x1a, 0x00}, +}; + + +static struct chips_init_reg chips_init_xr[] = +{ + {0xce, 0x00}, /* set default memory clock */ + {0xcc, 200 }, /* MCLK ratio M */ + {0xcd, 18 }, /* MCLK ratio N */ + {0xce, 0x90}, /* MCLK divisor = 2 */ + + {0xc4, 209 }, + {0xc5, 118 }, + {0xc7, 32 }, + {0xcf, 0x06}, + {0x09, 0x01}, /* IO Control - CRT controller extensions */ + {0x0a, 0x02}, /* Frame buffer mapping */ + {0x0b, 0x01}, /* PCI burst write */ + {0x40, 0x03}, /* Memory access control */ + {0x80, 0x82}, /* Pixel pipeline configuration 0 */ + {0x81, 0x12}, /* Pixel pipeline configuration 1 */ + {0x82, 0x08}, /* Pixel pipeline configuration 2 */ + + {0xd0, 0x0f}, + {0xd1, 0x01}, +}; + +static void __init chips_hw_init(struct fb_info *p) +{ + int i; + + for (i = 0; i < N_ELTS(chips_init_xr); ++i) + write_xr(chips_init_xr[i].addr, chips_init_xr[i].data); + write_xr(0x81, 0x12); + write_xr(0x82, 0x08); + write_xr(0x20, 0x00); + for (i = 0; i < N_ELTS(chips_init_sr); ++i) + write_sr(chips_init_sr[i].addr, chips_init_sr[i].data); + for (i = 0; i < N_ELTS(chips_init_gr); ++i) + write_gr(chips_init_gr[i].addr, chips_init_gr[i].data); + for (i = 0; i < N_ELTS(chips_init_ar); ++i) + write_ar(chips_init_ar[i].addr, chips_init_ar[i].data); + /* Enable video output in attribute index register */ + writeb(0x20, mmio_base + 0x780); + for (i = 0; i < N_ELTS(chips_init_cr); ++i) + write_cr(chips_init_cr[i].addr, chips_init_cr[i].data); + for (i = 0; i < N_ELTS(chips_init_fr); ++i) + write_fr(chips_init_fr[i].addr, chips_init_fr[i].data); +} + +static struct fb_fix_screeninfo asiliantfb_fix __initdata = { + .id = "Asiliant 69000", + .type = FB_TYPE_PACKED_PIXELS, + .visual = FB_VISUAL_PSEUDOCOLOR, + .accel = FB_ACCEL_NONE, + .line_length = 640, + .smem_len = 0x200000, /* 2MB */ +}; + +static struct fb_var_screeninfo asiliantfb_var __initdata = { + .xres = 640, + .yres = 480, + .xres_virtual = 640, + .yres_virtual = 480, + .bits_per_pixel = 8, + .red = { .length = 8 }, + .green = { .length = 8 }, + .blue = { .length = 8 }, + .height = -1, + .width = -1, + .vmode = FB_VMODE_NONINTERLACED, + .pixclock = 39722, + .left_margin = 48, + .right_margin = 16, + .upper_margin = 33, + .lower_margin = 10, + .hsync_len = 96, + .vsync_len = 2, +}; + +static void __init init_asiliant(struct fb_info *p, unsigned long addr) +{ + p->fix = asiliantfb_fix; + p->fix.smem_start = addr; + p->var = asiliantfb_var; + p->fbops = &asiliantfb_ops; + p->pseudo_palette = pseudo_palette; + p->flags = FBINFO_FLAG_DEFAULT; + + fb_alloc_cmap(&p->cmap, 256, 0); + + if (register_framebuffer(p) < 0) { + printk(KERN_ERR "C&T 69000 framebuffer failed to register\n"); + return; + } + + printk(KERN_INFO "fb%d: Asiliant 69000 frame buffer (%dK RAM detected)\n", + p->node, p->fix.smem_len / 1024); + + writeb(0xff, mmio_base + 0x78c); + chips_hw_init(p); +} + +static int __devinit +asiliantfb_pci_init(struct pci_dev *dp, const struct pci_device_id *ent) +{ + struct fb_info *p = &asiliantfb_info; + unsigned long addr, size; + + if ((dp->resource[0].flags & IORESOURCE_MEM) == 0) + return -ENODEV; + addr = pci_resource_start(dp, 0); + size = pci_resource_len(dp, 0); + if (addr == 0) + return -ENODEV; + if (p->screen_base != 0) + return -EBUSY; + if (!request_mem_region(addr, size, "asiliantfb")) + return -EBUSY; + + p->screen_base = ioremap(addr, 0x800000); + if (p->screen_base == NULL) { + release_mem_region(addr, size); + return -ENOMEM; + } + + pci_write_config_dword(dp, 4, 0x02800083); + writeb(3, addr + 0x400784); + + init_asiliant(p, addr); + + /* Clear the entire framebuffer */ + memset(p->screen_base, 0, 0x200000); + + pci_set_drvdata(dp, p); + return 0; +} + +static void __devexit asiliantfb_remove(struct pci_dev *dp) +{ + struct fb_info *p = pci_get_drvdata(dp); + + if (p != &asiliantfb_info || p->screen_base == NULL) + return; + unregister_framebuffer(p); + iounmap(p->screen_base); + p->screen_base = NULL; + release_mem_region(pci_resource_start(dp, 0), pci_resource_len(dp, 0)); +} + +static struct pci_device_id asiliantfb_pci_tbl[] __devinitdata = { + { PCI_VENDOR_ID_CT, PCI_DEVICE_ID_CT_69000, PCI_ANY_ID, PCI_ANY_ID }, + { 0 } +}; + +MODULE_DEVICE_TABLE(pci, asiliantfb_pci_tbl); + +static struct pci_driver asiliantfb_driver = { + .name = "asiliantfb", + .id_table = asiliantfb_pci_tbl, + .probe = asiliantfb_pci_init, + .remove = __devexit_p(asiliantfb_remove), +}; + +int __init asiliantfb_init(void) +{ + return pci_module_init(&asiliantfb_driver); +} + +static void __exit asiliantfb_exit(void) +{ + pci_unregister_driver(&asiliantfb_driver); +} + +MODULE_LICENSE("GPL"); diff -urN -X /home/jsimmons/dontdiff linus-2.6/drivers/video/aty/Makefile fbdev-2.6/drivers/video/aty/Makefile --- linus-2.6/drivers/video/aty/Makefile Thu Oct 16 14:13:32 2003 +++ fbdev-2.6/drivers/video/aty/Makefile Wed Oct 15 17:31:13 2003 @@ -1,7 +1,11 @@ obj-$(CONFIG_FB_ATY) += atyfb.o obj-$(CONFIG_FB_ATY128) += aty128fb.o +obj-$(CONFIG_FB_RADEON) += radeonfb.o atyfb-y := atyfb_base.o mach64_accel.o atyfb-$(CONFIG_FB_ATY_GX) += mach64_gx.o atyfb-$(CONFIG_FB_ATY_CT) += mach64_ct.o mach64_cursor.o -atyfb-objs := $(atyfb-y) + +radeonfb-y := radeon_base.o radeon_pm.o radeon_monitor.o +radeonfb-$(CONFIG_FB_RADEON_I2C) += radeon_i2c.o +radeonfb-objs := $(radeonfb-y) diff -urN -X /home/jsimmons/dontdiff linus-2.6/drivers/video/aty/aty128fb.c fbdev-2.6/drivers/video/aty/aty128fb.c --- linus-2.6/drivers/video/aty/aty128fb.c Thu Oct 16 14:13:34 2003 +++ fbdev-2.6/drivers/video/aty/aty128fb.c Thu Oct 16 14:13:34 2003 @@ -24,6 +24,10 @@ * Paul Mundt * - PCI hotplug * + * Jon Smirl + * - PCI ID update + * - replace ROM BIOS search + * * Based off of Geert's atyfb.c and vfb.c. * * TODO: @@ -43,6 +47,7 @@ #include #include +#include #include #include #include @@ -136,8 +141,25 @@ /* Chip generations */ enum { rage_128, + rage_128_pci, rage_128_pro, - rage_M3 + rage_128_pro_pci, + rage_M3, + rage_M3_pci, + rage_M4, + rage_128_ultra, +}; + +/* Must match above enum */ +static const char *r128_family[] __devinitdata = { + "AGP", + "PCI", + "PRO AGP", + "PRO PCI", + "M3 AGP", + "M3 PCI", + "M4 AGP", + "Ultra AGP", }; /* @@ -149,32 +171,100 @@ /* supported Rage128 chipsets */ static struct pci_device_id aty128_pci_tbl[] = { - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RE, - PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 }, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RF, - PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 }, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RI, - PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 }, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RK, - PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 }, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RL, - PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 }, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_Rage128_PD, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_LE, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_M3_pci }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_LF, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_M3 }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_MF, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_M4 }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_ML, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_M4 }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PA, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PB, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PC, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PD, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro_pci }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PR, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PG, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PH, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PI, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PJ, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PK, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PL, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PM, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PN, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PP, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro_pci }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PQ, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PR, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro_pci }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PS, PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_U3, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PT, PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_U1, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PU, PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_LE, - PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_M3 }, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_LF, - PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_M3 }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PV, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PW, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PX, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RE, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pci }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RF, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RG, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RK, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pci }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RL, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_SE, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_SF, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pci }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_SG, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_SH, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_SK, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_SL, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_SM, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_SN, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_TF, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_ultra }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_TL, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_ultra }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_TR, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_ultra }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_TS, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_ultra }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_TT, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_ultra }, + { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_TU, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_ultra }, { 0, } }; @@ -250,14 +340,7 @@ .accel = FB_ACCEL_ATI_RAGE128, }; -#ifdef MODULE static char *mode __initdata = NULL; -#ifdef CONFIG_MTRR -static int nomtrr __initdata = 0; -#endif /* CONFIG_MTRR */ -#endif /* MODULE */ - -static char *mode_option __initdata = NULL; #ifdef CONFIG_PPC_PMAC static int default_vmode __initdata = VMODE_1024_768_60; @@ -349,7 +432,6 @@ * Interface used by the world */ int aty128fb_init(void); -int aty128fb_setup(char *options); static int aty128fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info); @@ -374,7 +456,7 @@ #if !defined(CONFIG_PPC) && !defined(__sparc__) static void __init aty128_get_pllinfo(struct aty128fb_par *par, void *bios); -static void __init *aty128_map_ROM(struct pci_dev *pdev); +static void __init *aty128_map_ROM(struct pci_dev *pdev, const struct aty128fb_par *par); static void __init aty128_unmap_ROM(struct pci_dev *dev, void * rom); #endif static void aty128_timings(struct aty128fb_par *par); @@ -1410,61 +1492,6 @@ return 0; } -int __init -aty128fb_setup(char *options) -{ - char *this_opt; - - if (!options || !*options) - return 0; - - while ((this_opt = strsep(&options, ",")) != NULL) { -#ifdef CONFIG_PMAC_PBOOK - if (!strncmp(this_opt, "lcd:", 4)) { - default_lcd_on = simple_strtoul(this_opt+4, NULL, 0); - continue; - } else if (!strncmp(this_opt, "crt:", 4)) { - default_crt_on = simple_strtoul(this_opt+4, NULL, 0); - continue; - } -#endif -#ifdef CONFIG_MTRR - if(!strncmp(this_opt, "nomtrr", 6)) { - mtrr = 0; - continue; - } -#endif -#ifdef CONFIG_PPC_PMAC - /* vmode and cmode deprecated */ - if (!strncmp(this_opt, "vmode:", 6)) { - unsigned int vmode = simple_strtoul(this_opt+6, NULL, 0); - if (vmode > 0 && vmode <= VMODE_MAX) - default_vmode = vmode; - continue; - } else if (!strncmp(this_opt, "cmode:", 6)) { - unsigned int cmode = simple_strtoul(this_opt+6, NULL, 0); - switch (cmode) { - case 0: - case 8: - default_cmode = CMODE_8; - break; - case 15: - case 16: - default_cmode = CMODE_16; - break; - case 24: - case 32: - default_cmode = CMODE_32; - break; - } - continue; - } -#endif /* CONFIG_PPC_PMAC */ - mode_option = this_opt; - } - return 0; -} - /* * Initialisation @@ -1476,7 +1503,7 @@ struct fb_info *info = pci_get_drvdata(pdev); struct aty128fb_par *par = info->par; struct fb_var_screeninfo var; - char video_card[25]; + char video_card[DEVICE_NAME_SIZE]; u8 chip_rev; u32 dac; @@ -1486,43 +1513,13 @@ /* Get the chip revision */ chip_rev = (aty_ld_le32(CONFIG_CNTL) >> 16) & 0x1F; - switch (pdev->device) { - case PCI_DEVICE_ID_ATI_RAGE128_RE: - strcpy(video_card, "Rage128 RE (PCI)"); - break; - case PCI_DEVICE_ID_ATI_RAGE128_RF: - strcpy(video_card, "Rage128 RF (AGP)"); - break; - case PCI_DEVICE_ID_ATI_RAGE128_RK: - strcpy(video_card, "Rage128 RK (PCI)"); - break; - case PCI_DEVICE_ID_ATI_RAGE128_RL: - strcpy(video_card, "Rage128 RL (AGP)"); - break; - case PCI_DEVICE_ID_ATI_Rage128_PD: - strcpy(video_card, "Rage128 Pro PD (PCI)"); - break; - case PCI_DEVICE_ID_ATI_RAGE128_PF: - strcpy(video_card, "Rage128 Pro PF (AGP)"); - break; - case PCI_DEVICE_ID_ATI_RAGE128_PR: - strcpy(video_card, "Rage128 Pro PR (PCI)"); - break; - case PCI_DEVICE_ID_ATI_RAGE128_U3: - strcpy(video_card, "Rage128 Pro TR (AGP)"); - break; - case PCI_DEVICE_ID_ATI_RAGE128_U1: - strcpy(video_card, "Rage128 Pro TF (AGP)"); - break; - case PCI_DEVICE_ID_ATI_RAGE128_LE: - strcpy(video_card, "Rage Mobility M3 (PCI)"); - break; - case PCI_DEVICE_ID_ATI_RAGE128_LF: - strcpy(video_card, "Rage Mobility M3 (AGP)"); - break; - default: - return -ENODEV; - } + strcpy(video_card, "Rage128 XX "); + video_card[8] = ent->device >> 8; + video_card[9] = ent->device & 0xFF; + + /* range check to make sure */ + if (ent->driver_data < (sizeof(r128_family)/sizeof(char *))) + strncat(video_card, r128_family[ent->driver_data], sizeof(video_card)); printk(KERN_INFO "aty128fb: %s [chip rev 0x%x] ", video_card, chip_rev); @@ -1536,17 +1533,17 @@ /* fill in info */ info->fbops = &aty128fb_ops; info->flags = FBINFO_FLAG_DEFAULT; - + #ifdef CONFIG_PMAC_PBOOK par->lcd_on = default_lcd_on; par->crt_on = default_crt_on; #endif - + var = default_var; #ifdef CONFIG_PPC_PMAC if (_machine == _MACH_Pmac) { - if (mode_option) { - if (!mac_find_mode(&var, info, mode_option, 8)) + if (mode) { + if (!mac_find_mode(&var, info, mode, 8)) var = default_var; } else { if (default_vmode <= 0 || default_vmode > VMODE_MAX) @@ -1575,8 +1572,12 @@ if (machine_is_compatible("PowerBook3,2")) default_vmode = VMODE_1152_768_60; - if (default_cmode < CMODE_8 || default_cmode > CMODE_32) - default_cmode = CMODE_8; + if (default_cmode > 16) + default_cmode = CMODE_32; + else if (default_cmode > 8) + default_cmode = CMODE_16; + else + default_cmode = CMODE_8; if (mac_vmode_to_var(default_vmode, default_cmode, &var)) var = default_var; @@ -1584,9 +1585,10 @@ } else #endif /* CONFIG_PPC_PMAC */ { - if (fb_find_mode(&var, info, mode_option, NULL, 0, - &defaultmode, 8) == 0) - var = default_var; + if (mode) + if (fb_find_mode(&var, info, mode, NULL, + 0, &defaultmode, 8) == 0) + var = default_var; } var.accel_flags &= ~FB_ACCELF_TEXT; @@ -1614,7 +1616,7 @@ var.activate = FB_ACTIVATE_NOW; aty128_init_engine(par); - + if (register_framebuffer(info) < 0) return 0; @@ -1647,7 +1649,7 @@ unsigned long fb_addr, reg_addr; struct aty128fb_par *par; struct fb_info *info; - int err, size; + int err; #if !defined(CONFIG_PPC) && !defined(__sparc__) void *bios = NULL; #endif @@ -1675,17 +1677,13 @@ } /* We have the resources. Now virtualize them */ - size = sizeof(struct fb_info) + sizeof(struct aty128fb_par); - if (!(info = kmalloc(size, GFP_ATOMIC))) { + if (!(info = framebuffer_alloc(sizeof(struct aty128fb_par), &pdev->dev))) { printk(KERN_ERR "aty128fb: can't alloc fb_info_aty128\n"); goto err_free_mmio; } - memset(info, 0, size); + par = info->par; - par = (struct aty128fb_par *)(info + 1); info->pseudo_palette = par->pseudo_palette; - - info->par = par; info->fix = aty128fb_fix; /* Virtualize mmio region */ @@ -1716,7 +1714,7 @@ } #if !defined(CONFIG_PPC) && !defined(__sparc__) - if (!(bios = aty128_map_ROM(pdev))) + if (!(bios = aty128_map_ROM(pdev, par))) printk(KERN_INFO "aty128fb: BIOS not located, guessing timings.\n"); else { printk(KERN_INFO "aty128fb: Rage128 BIOS located at %lx\n", @@ -1776,47 +1774,61 @@ release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); - release_mem_region(pci_resource_start(pdev, 1), - pci_resource_len(pdev, 1)); release_mem_region(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2)); #ifdef CONFIG_PMAC_PBOOK if (info == aty128_fb) aty128_fb = NULL; #endif - kfree(info); + framebuffer_release(info); } #endif /* CONFIG_PCI */ /* PPC and Sparc cannot read video ROM */ #if !defined(CONFIG_PPC) && !defined(__sparc__) -static void * __init aty128_map_ROM(struct pci_dev *dev) +static void * __init aty128_map_ROM(struct pci_dev *dev, const struct aty128fb_par *par) { + struct resource *r; + void *rom; + // If this is a primary card, there is a shadow copy of the // ROM somewhere in the first meg. We will just ignore the copy // and use the ROM directly. + /* Fix from ATI for problem with Rage128 hardware not leaving ROM enabled */ + unsigned int temp; + temp = aty_ld_le32(RAGE128_MPP_TB_CONFIG); + temp &= 0x00ffffffu; + temp |= 0x04 << 24; + aty_st_le32(RAGE128_MPP_TB_CONFIG, temp); + temp = aty_ld_le32(RAGE128_MPP_TB_CONFIG); + // no need to search for the ROM, just ask the card where it is. - struct resource *r = &dev->resource[PCI_ROM_RESOURCE]; - unsigned char *addr; - + r = &dev->resource[PCI_ROM_RESOURCE]; + // assign the ROM an address if it doesn't have one - if (r->start == 0) + if (r->parent == NULL) pci_assign_resource(dev, PCI_ROM_RESOURCE); // enable if needed - if (!(r->flags & PCI_ROM_ADDRESS_ENABLE)) + if (!(r->flags & PCI_ROM_ADDRESS_ENABLE)) { pci_write_config_dword(dev, dev->rom_base_reg, r->start | PCI_ROM_ADDRESS_ENABLE); + r->flags |= PCI_ROM_ADDRESS_ENABLE; + } - addr = ioremap(r->start, r->end - r->start + 1); + rom = ioremap(r->start, r->end - r->start + 1); + if (!rom) { + printk(KERN_ERR "aty128fb: ROM failed to map\n"); + return NULL; + } // Very simple test to make sure it appeared - if (addr && (*addr != 0x55)) { - printk("aty128fb: Invalid ROM signature %x\n", *addr); - iounmap(addr); + if (readb(rom) != 0x55) { + printk(KERN_ERR "aty128fb: Invalid ROM signature %x should be 0x55\n", readb(rom)); + aty128_unmap_ROM(dev, rom); return NULL; } - return (void *)addr; + return rom; } static void __init aty128_unmap_ROM(struct pci_dev *dev, void * rom) @@ -1826,10 +1838,12 @@ iounmap(rom); - r->flags &= !PCI_ROM_ADDRESS_ENABLE; + r->flags &= ~PCI_ROM_ADDRESS_ENABLE; r->end -= r->start; r->start = 0; + /* This will disable and set address to unassigned */ pci_write_config_dword(dev, dev->rom_base_reg, 0); + release_resource(r); } static void __init @@ -2331,6 +2345,7 @@ return pci_module_init(&aty128fb_driver); } +#ifdef MODULE static void __exit aty128fb_exit(void) { #ifdef CONFIG_PMAC_PBOOK @@ -2338,14 +2353,32 @@ #endif pci_unregister_driver(&aty128fb_driver); } +#endif + +#ifdef MODULE +module_init(aty128fb_init); +module_exit(aty128fb_exit); +#endif MODULE_AUTHOR("(c)1999-2003 Brad Douglas "); MODULE_DESCRIPTION("FBDev driver for ATI Rage128 / Pro cards"); MODULE_LICENSE("GPL"); -MODULE_PARM(mode, "s"); +module_param(mode, charp, 0); MODULE_PARM_DESC(mode, "Specify resolution as \"x[-][@]\" "); #ifdef CONFIG_MTRR -MODULE_PARM(nomtrr, "i"); -MODULE_PARM_DESC(nomtrr, "Disable MTRR support (0 or 1=disabled) (default=0)"); +module_param_named(nomtrr, mtrr, invbool, 0); +MODULE_PARM_DESC(mtrr, "bool: Disable MTRR support (0 or 1=disabled) (default=0)"); +#endif +#ifdef CONFIG_PPC_PMAC +module_param_named(vmode, default_vmode, int, 0); +MODULE_PARM_DESC(default_vmode, "Deprecated: video mode int"); +module_param_named(cmode, default_cmode, int, 0); +MODULE_PARM_DESC(default_cmode, "Deprecated: color mode int"); +#endif +#ifdef CONFIG_PMAC_PBOOK +module_param_named(lcd, default_lcd_on, bool, 0); +MODULE_PARM_DESC(default_lcd_on, "bool: Default LCD on"); +module_param_named(crt, default_crt_on, bool, 0); +MODULE_PARM_DESC(default_crt_on, "bool: Default CRT on"); #endif diff -urN -X /home/jsimmons/dontdiff linus-2.6/drivers/video/aty/atyfb.h fbdev-2.6/drivers/video/aty/atyfb.h --- linus-2.6/drivers/video/aty/atyfb.h Thu Oct 16 14:13:34 2003 +++ fbdev-2.6/drivers/video/aty/atyfb.h Thu Oct 16 14:13:34 2003 @@ -55,18 +55,10 @@ /* * The hardware parameters for each card */ - -struct aty_cursor { - u8 bits[8][64]; - u8 mask[8][64]; - u8 *ram; -}; - struct atyfb_par { struct aty_cmap_regs *aty_cmap_regs; const struct aty_dac_ops *dac_ops; const struct aty_pll_ops *pll_ops; - struct aty_cursor *cursor; unsigned long ati_regbase; unsigned long clk_wr_offset; struct crtc crtc; @@ -237,10 +229,10 @@ * Hardware cursor support */ -extern struct aty_cursor *aty_init_cursor(struct fb_info *info); +extern int aty_init_cursor(struct fb_info *info); extern int atyfb_cursor(struct fb_info *info, struct fb_cursor *cursor); extern void aty_set_cursor_color(struct fb_info *info); -extern void aty_set_cursor_shape(struct fb_info *info); +extern void aty_set_cursor_shape(struct fb_info *info, u8 *src, u8 *dst, unsigned int width); /* * Hardware acceleration diff -urN -X /home/jsimmons/dontdiff linus-2.6/drivers/video/aty/atyfb_base.c fbdev-2.6/drivers/video/aty/atyfb_base.c --- linus-2.6/drivers/video/aty/atyfb_base.c Thu Oct 16 14:13:35 2003 +++ fbdev-2.6/drivers/video/aty/atyfb_base.c Thu Oct 16 14:13:35 2003 @@ -202,7 +202,7 @@ .fb_fillrect = atyfb_fillrect, .fb_copyarea = atyfb_copyarea, .fb_imageblit = atyfb_imageblit, - .fb_cursor = soft_cursor, + .fb_cursor = atyfb_cursor, #ifdef __sparc__ .fb_mmap = atyfb_mmap, #endif @@ -1889,7 +1889,7 @@ #ifdef CONFIG_FB_ATY_CT if (curblink && M64_HAS(INTEGRATED)) - par->cursor = aty_init_cursor(info); + aty_init_cursor(info); #endif /* CONFIG_FB_ATY_CT */ info->var = var; @@ -2470,22 +2470,6 @@ } #endif /* CONFIG_ATARI */ -/* -#ifdef CONFIG_FB_ATY_CT - * Erase HW Cursor * - if (par->cursor && (info->currcon >= 0)) - atyfb_cursor(&fb_display[par->currcon], CM_ERASE, - par->cursor->pos.x, par->cursor->pos.y); -#endif * CONFIG_FB_ATY_CT * - -#ifdef CONFIG_FB_ATY_CT - * Install hw cursor * - if (par->cursor) { - aty_set_cursor_color(info); - aty_set_cursor_shape(info); - } -#endif * CONFIG_FB_ATY_CT */ - /* * Blank the display. */ @@ -2595,13 +2579,9 @@ iounmap((void *) par->ati_regbase); if (info->screen_base) iounmap((void *) info->screen_base); -#ifdef __BIG_ENDIAN - if (par->cursor && par->cursor->ram) - iounmap(par->cursor->ram); -#endif #endif - if (par->cursor) - kfree(par->cursor); + if (info->sprite.addr) + iounmap(info->sprite.addr); #ifdef __sparc__ if (par->mmap_map) kfree(par->mmap_map); diff -urN -X /home/jsimmons/dontdiff linus-2.6/drivers/video/aty/mach64_cursor.c fbdev-2.6/drivers/video/aty/mach64_cursor.c --- linus-2.6/drivers/video/aty/mach64_cursor.c Thu Oct 16 14:13:35 2003 +++ fbdev-2.6/drivers/video/aty/mach64_cursor.c Thu Oct 16 14:13:35 2003 @@ -1,12 +1,11 @@ - /* * ATI Mach64 CT/VT/GT/LT Cursor Support */ #include -#include #include #include +#include #include #include @@ -22,104 +21,70 @@ /* * Hardware Cursor support. */ - -static const u8 cursor_pixel_map[2] = { 0, 15 }; -static const u8 cursor_color_map[2] = { 0, 0xff }; - static const u8 cursor_bits_lookup[16] = { - 0x00, 0x40, 0x10, 0x50, 0x04, 0x44, 0x14, 0x54, - 0x01, 0x41, 0x11, 0x51, 0x05, 0x45, 0x15, 0x55 + 0x55, 0x15, 0x45, 0x05, 0x51, 0x11, 0x41, 0x01, + 0x54, 0x14, 0x44, 0x04, 0x50, 0x10, 0x40, 0x00 }; static const u8 cursor_mask_lookup[16] = { 0xaa, 0x2a, 0x8a, 0x0a, 0xa2, 0x22, 0x82, 0x02, 0xa8, 0x28, 0x88, 0x08, 0xa0, 0x20, 0x80, 0x00 -}; - -void aty_set_cursor_color(struct fb_info *info) -{ - struct atyfb_par *par = (struct atyfb_par *) info->par; - struct aty_cursor *c = par->cursor; - const u8 *pixel = cursor_pixel_map; /* ++Geert: Why?? */ - const u8 *red = cursor_color_map; - const u8 *green = cursor_color_map; - const u8 *blue = cursor_color_map; - u32 fg_color, bg_color; - - if (!c) - return; - -#ifdef __sparc__ - if (par->mmaped) - return; -#endif - fg_color = (u32) red[0] << 24; - fg_color |= (u32) green[0] << 16; - fg_color |= (u32) blue[0] << 8; - fg_color |= (u32) pixel[0]; - - bg_color = (u32) red[1] << 24; - bg_color |= (u32) green[1] << 16; - bg_color |= (u32) blue[1] << 8; - bg_color |= (u32) pixel[1]; - - wait_for_fifo(2, par); - aty_st_le32(CUR_CLR0, fg_color, par); - aty_st_le32(CUR_CLR1, bg_color, par); -} +}; -void aty_set_cursor_shape(struct fb_info *info) +void aty_set_cursor_shape(struct fb_info *info, u8 *src, u8 *dst, unsigned int width) { - struct atyfb_par *par = (struct atyfb_par *) info->par; - struct fb_cursor *cursor = &info->cursor; - struct aty_cursor *c = par->cursor; - u8 *ram, m, b; - int x, y; + int i, j, offset = info->sprite.scan_align - width; + u8 *mask = info->cursor.mask, m, b; - if (!c) - return; -#ifdef __sparc__ - if (par->mmaped) - return; -#endif - - ram = c->ram; - for (y = 0; y < cursor->image.height; y++) { - for (x = 0; x < cursor->image.width >> 2; x++) { - m = c->mask[x][y]; - b = c->bits[x][y]; - fb_writeb(cursor_mask_lookup[m >> 4] | - cursor_bits_lookup[(b & m) >> 4], ram++); - fb_writeb(cursor_mask_lookup[m & 0x0f] | - cursor_bits_lookup[(b & m) & 0x0f], - ram++); - } - for (; x < 8; x++) { - fb_writeb(0xaa, ram++); - fb_writeb(0xaa, ram++); + // Clear cursor image with 1010101010... + fb_memset(dst, 0xaa, 1024); + + for (i = 0; i < info->cursor.image.height; i++) { + for (j = 0; j < width; j++) { + b = *src++; + m = *mask++; + // Upper 4 bits of mask data + fb_writeb(cursor_mask_lookup[m >> 4 ] | + cursor_bits_lookup[(b & m) >> 4], dst++); + // Lower 4 bits of mask + fb_writeb(cursor_mask_lookup[m & 0x0f ] | + cursor_bits_lookup[(b & m) & 0x0f], dst++); } + dst += offset*2; } - fb_memset(ram, 0xaa, (64 - cursor->image.height) * 16); } -static void aty_set_cursor(struct fb_info *info) +int atyfb_cursor(struct fb_info *info, struct fb_cursor *cursor) { struct atyfb_par *par = (struct atyfb_par *) info->par; - struct fb_cursor *cursor = &info->cursor; - struct aty_cursor *c = par->cursor; u16 xoff, yoff; int x, y; - - if (!c) - return; - + #ifdef __sparc__ if (par->mmaped) - return; + return -EPERM; #endif - if (cursor->enable) { - x = cursor->image.dx - cursor->hot.x - info->var.xoffset; + /* Hide cursor */ + wait_for_fifo(1, par); + aty_st_le32(GEN_TEST_CNTL, aty_ld_le32(GEN_TEST_CNTL, par) & ~HWCURSOR_ENABLE, par); + + /* Set size */ + if (cursor->set & FB_CUR_SETSIZE) { + info->cursor.image.height = cursor->image.height; + info->cursor.image.width = cursor->image.width; + } + + /* Set hot spot */ + if (cursor->set & FB_CUR_SETHOT) + info->cursor.hot = cursor->hot; + + /* set position */ + if (cursor->set & FB_CUR_SETPOS) { + info->cursor.image.dx = cursor->image.dx; + info->cursor.image.dy = cursor->image.dy; + + x = info->cursor.image.dx - info->cursor.hot.x - info->var.xoffset; if (x < 0) { xoff = -x; x = 0; @@ -127,7 +92,7 @@ xoff = 0; } - y = cursor->image.dy - cursor->hot.y - info->var.yoffset; + y = info->cursor.image.dy - info->cursor.hot.y - info->var.yoffset; if (y < 0) { yoff = -y; y = 0; @@ -135,107 +100,78 @@ yoff = 0; } + /* + * In doublescan mode, the cursor location also needs to be + * doubled. + */ + if (par->crtc.gen_cntl & CRTC_DBL_SCAN_EN) + y<<=1; wait_for_fifo(4, par); - aty_st_le32(CUR_OFFSET, (info->fix.smem_len >> 3) + (yoff << 1), - par); + aty_st_le32(CUR_OFFSET, (info->fix.smem_len >> 3) + (yoff << 1), par); aty_st_le32(CUR_HORZ_VERT_OFF, - ((u32) (64 - cursor->image.height + yoff) << 16) | xoff, + ((u32) (64 - info->cursor.image.height + yoff) << 16) | xoff, par); aty_st_le32(CUR_HORZ_VERT_POSN, ((u32) y << 16) | x, par); + } + + /* Set color map */ + if (cursor->set & FB_CUR_SETCMAP) { + u32 fg_idx, bg_idx, fg, bg; + + info->cursor.image.fg_color = cursor->image.fg_color; + info->cursor.image.bg_color = cursor->image.bg_color; + fg_idx = info->cursor.image.fg_color; + bg_idx = info->cursor.image.bg_color; + + fg = (info->cmap.red[fg_idx] << 24) | + (info->cmap.green[fg_idx] << 16) | + (info->cmap.blue[fg_idx] << 8) | 15; + + bg = (info->cmap.red[bg_idx] << 24) | + (info->cmap.green[bg_idx] << 16) | + (info->cmap.blue[bg_idx] << 8) | 15; + + wait_for_fifo(2, par); + aty_st_le32(CUR_CLR0, fg, par); + aty_st_le32(CUR_CLR1, bg, par); + } + + if (cursor->set & FB_CUR_SETSHAPE) + load_cursor_image(info); + + if (info->cursor.enable) { + wait_for_fifo(1, par); aty_st_le32(GEN_TEST_CNTL, aty_ld_le32(GEN_TEST_CNTL, par) | HWCURSOR_ENABLE, par); - } else { - wait_for_fifo(1, par); - aty_st_le32(GEN_TEST_CNTL, - aty_ld_le32(GEN_TEST_CNTL, - par) & ~HWCURSOR_ENABLE, par); - } - if (par->blitter_may_be_busy) - wait_for_idle(par); -} - -int atyfb_cursor(struct fb_info *info, struct fb_cursor *cursor) -{ - struct atyfb_par *par = (struct atyfb_par *) info->par; - struct aty_cursor *c = par->cursor; - - if (!c) - return -1; - -#ifdef __sparc__ - if (par->mmaped) - return 0; -#endif - - aty_set_cursor(info); - cursor->image.dx = info->cursor.image.dx; - cursor->image.dy = info->cursor.image.dy; - - aty_set_cursor(info); + } return 0; } -struct aty_cursor *__init aty_init_cursor(struct fb_info *info) +int __init aty_init_cursor(struct fb_info *info) { - struct aty_cursor *cursor; unsigned long addr; - cursor = kmalloc(sizeof(struct aty_cursor), GFP_ATOMIC); - if (!cursor) - return 0; - memset(cursor, 0, sizeof(*cursor)); - info->fix.smem_len -= PAGE_SIZE; #ifdef __sparc__ addr = (unsigned long) info->screen_base - 0x800000 + info->fix.smem_len; - cursor->ram = (u8 *) addr; + info->sprite.addr = (u8 *) addr; #else #ifdef __BIG_ENDIAN addr = info->fix.smem_start - 0x800000 + info->fix.smem_len; - cursor->ram = (u8 *) ioremap(addr, 1024); + info->sprite.addr = (u8 *) ioremap(addr, 1024); #else addr = (unsigned long) info->screen_base + info->fix.smem_len; - cursor->ram = (u8 *) addr; + info->sprite.addr = (u8 *) addr; #endif #endif - if (!cursor->ram) { - kfree(cursor); - return NULL; - } - return cursor; + if (!info->sprite.addr) + return -ENXIO; + info->sprite.size = PAGE_SIZE; + info->sprite.scan_align = 8; // Scratch pad 8 bytes wide + info->sprite.buf_align = 8; // *64; // and 64 lines tall. + info->sprite.flags = FB_PIXMAP_IO; + info->sprite.outbuf = aty_set_cursor_shape; + return 0; } -int atyfb_set_font(struct fb_info *info, int width, int height) -{ - struct atyfb_par *par = (struct atyfb_par *) info->par; - struct fb_cursor *cursor = &info->cursor; - struct aty_cursor *c = par->cursor; - int i, j; - - if (c) { - if (!width || !height) { - width = 8; - height = 16; - } - - cursor->hot.x = 0; - cursor->hot.y = 0; - cursor->image.width = width; - cursor->image.height = height; - - memset(c->bits, 0xff, sizeof(c->bits)); - memset(c->mask, 0, sizeof(c->mask)); - - for (i = 0, j = width; j >= 0; j -= 8, i++) { - c->mask[i][height - 2] = - (j >= 8) ? 0xff : (0xff << (8 - j)); - c->mask[i][height - 1] = - (j >= 8) ? 0xff : (0xff << (8 - j)); - } - - aty_set_cursor_color(info); - aty_set_cursor_shape(info); - } - return 1; -} diff -urN -X /home/jsimmons/dontdiff linus-2.6/drivers/video/aty/radeon_base.c fbdev-2.6/drivers/video/aty/radeon_base.c --- linus-2.6/drivers/video/aty/radeon_base.c Wed Dec 31 16:00:00 1969 +++ fbdev-2.6/drivers/video/aty/radeon_base.c Thu Oct 16 12:08:22 2003 @@ -0,0 +1,2228 @@ +/* + * drivers/video/radeonfb.c + * framebuffer driver for ATI Radeon chipset video boards + * + * Copyright 2003 Ben. Herrenschmidt + * Copyright 2000 Ani Joshi + * + * i2c bits from Luca Tettamanti + * + * Special thanks to ATI DevRel team for their hardware donations. + * + * ...Insert GPL boilerplate here... + * + * TODO: - Bring a couple of cleanups from 2.4 to the mode setting code, + * - Split CRT vs. FP register calc/setting + * - Add CRTC2 support for mirror at least, dual head then + * - Add back some accel + * + */ + + +#define RADEON_VERSION "0.2.0" + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#if CONFIG_PPC_OF + +#include +#include +#include "../macmodes.h" + +#ifdef CONFIG_PMAC_BACKLIGHT +#include +#endif + +#ifdef CONFIG_BOOTX_TEXT +#include +#endif + +#endif /* CONFIG_PPC_OF */ + +#ifdef CONFIG_MTRR +#include +#endif + +#include