From: "Martin J. Bligh" Patch from Martin Bligh, based on observations by Andrew Theurer and Bill Irwin. TARGET_CPUS is used as a cpu mask by some things, and an apic mask for others. For SMP, that doesn't matter (they're the same), but for Summit it does. This patch changes TARGET_CPUS to consistently be a cpu mask everywhere. Should be a no-op for normal platforms. Invalid arguments to cpu_mask_to_apicid for clustered apic mode architectures will now return the broadcast apicid, in order to ensure someone still gets the interrupt (was the default init value, and is safest). arch/i386/kernel/io_apic.c | 7 ++++--- include/asm-i386/mach-bigsmp/mach_apic.h | 4 ++-- include/asm-i386/mach-numaq/mach_apic.h | 2 +- include/asm-i386/mach-summit/mach_apic.h | 4 ++-- 4 files changed, 9 insertions(+), 8 deletions(-) diff -puN arch/i386/kernel/io_apic.c~TARGET_CPUS-cleanup-fix arch/i386/kernel/io_apic.c --- 25/arch/i386/kernel/io_apic.c~TARGET_CPUS-cleanup-fix 2003-06-06 17:13:54.000000000 -0700 +++ 25-akpm/arch/i386/kernel/io_apic.c 2003-06-06 17:13:54.000000000 -0700 @@ -1160,7 +1160,8 @@ void __init setup_IO_APIC_irqs(void) entry.delivery_mode = INT_DELIVERY_MODE; entry.dest_mode = INT_DEST_MODE; entry.mask = 0; /* enable IRQ */ - entry.dest.logical.logical_dest = TARGET_CPUS; + entry.dest.logical.logical_dest = + cpu_mask_to_apicid(TARGET_CPUS); idx = find_irq_entry(apic,pin,mp_INT); if (idx == -1) { @@ -1239,7 +1240,7 @@ void __init setup_ExtINT_IRQ0_pin(unsign */ entry.dest_mode = INT_DEST_MODE; entry.mask = 0; /* unmask IRQ now */ - entry.dest.logical.logical_dest = TARGET_CPUS; + entry.dest.logical.logical_dest = cpu_mask_to_apicid(TARGET_CPUS); entry.delivery_mode = INT_DELIVERY_MODE; entry.polarity = 0; entry.trigger = 0; @@ -2309,7 +2310,7 @@ int io_apic_set_pci_routing (int ioapic, entry.delivery_mode = INT_DELIVERY_MODE; entry.dest_mode = INT_DEST_MODE; - entry.dest.logical.logical_dest = TARGET_CPUS; + entry.dest.logical.logical_dest = cpu_mask_to_apicid(TARGET_CPUS); entry.mask = 1; /* Disabled (masked) */ entry.trigger = 1; /* Level sensitive */ entry.polarity = 1; /* Low active */ diff -puN include/asm-i386/mach-bigsmp/mach_apic.h~TARGET_CPUS-cleanup-fix include/asm-i386/mach-bigsmp/mach_apic.h --- 25/include/asm-i386/mach-bigsmp/mach_apic.h~TARGET_CPUS-cleanup-fix 2003-06-06 17:13:54.000000000 -0700 +++ 25-akpm/include/asm-i386/mach-bigsmp/mach_apic.h 2003-06-06 17:13:54.000000000 -0700 @@ -22,7 +22,7 @@ static inline int apic_id_registered(voi #define APIC_DFR_VALUE (APIC_DFR_CLUSTER) static inline unsigned long target_cpus(void) { - return ((cpu_online_map < 0xf)?cpu_online_map:0xf); + return cpu_online_map; } #define TARGET_CPUS (target_cpus()) @@ -151,7 +151,7 @@ static inline unsigned int cpu_mask_to_a if (apicid_cluster(apicid) != apicid_cluster(new_apicid)){ printk ("%s: Not a valid mask!\n",__FUNCTION__); - return TARGET_CPUS; + return 0xFF; } apicid = apicid | new_apicid; cpus_found++; diff -puN include/asm-i386/mach-numaq/mach_apic.h~TARGET_CPUS-cleanup-fix include/asm-i386/mach-numaq/mach_apic.h --- 25/include/asm-i386/mach-numaq/mach_apic.h~TARGET_CPUS-cleanup-fix 2003-06-06 17:13:54.000000000 -0700 +++ 25-akpm/include/asm-i386/mach-numaq/mach_apic.h 2003-06-06 17:13:54.000000000 -0700 @@ -6,7 +6,7 @@ #define APIC_DFR_VALUE (APIC_DFR_CLUSTER) -#define TARGET_CPUS (0xf) +#define TARGET_CPUS (~0UL) #define NO_BALANCE_IRQ (1) #define esr_disable (1) diff -puN include/asm-i386/mach-summit/mach_apic.h~TARGET_CPUS-cleanup-fix include/asm-i386/mach-summit/mach_apic.h --- 25/include/asm-i386/mach-summit/mach_apic.h~TARGET_CPUS-cleanup-fix 2003-06-06 17:13:54.000000000 -0700 +++ 25-akpm/include/asm-i386/mach-summit/mach_apic.h 2003-06-06 17:13:54.000000000 -0700 @@ -20,7 +20,7 @@ static inline unsigned long xapic_phys_t static inline unsigned long target_cpus(void) { - return XAPIC_DEST_CPUS_MASK; + return (~0UL); } #define TARGET_CPUS (target_cpus()) @@ -141,7 +141,7 @@ static inline unsigned int cpu_mask_to_a if (apicid_cluster(apicid) != apicid_cluster(new_apicid)){ printk ("%s: Not a valid mask!\n",__FUNCTION__); - return TARGET_CPUS; + return 0xFF; } apicid = apicid | new_apicid; cpus_found++; _