Patch from Stephen Cameron <steve.cameron@hp.com>

* Fix driver to wait for firmware to indicate that it is ready.
  (Needed for PCI hotplug case, but for normal warm/cold reboot, by the
  time driver inits, firmware will already be ready.)



 drivers/block/cciss.c |   16 +++++++++++++++-
 drivers/block/cciss.h |    2 ++
 2 files changed, 17 insertions(+), 1 deletion(-)

diff -puN drivers/block/cciss.c~cciss-pci-hotplug-fix drivers/block/cciss.c
--- 25/drivers/block/cciss.c~cciss-pci-hotplug-fix	2003-03-03 13:52:06.000000000 -0800
+++ 25-akpm/drivers/block/cciss.c	2003-03-03 14:00:41.000000000 -0800
@@ -2064,7 +2064,7 @@ static int cciss_pci_init(ctlr_info_t *c
 	unchar cache_line_size, latency_timer;
 	unchar irq, revision;
 	uint addr[6];
-	__u32 board_id;
+	__u32 board_id, scratchpad = 0;
 	int cfg_offset;
 	int cfg_base_addr;
 	int cfg_base_addr_index;
@@ -2156,6 +2156,20 @@ static int cciss_pci_init(ctlr_info_t *c
 #endif /* CCISS_DEBUG */ 
 	c->vaddr = remap_pci_mem(c->paddr, 200);
 
+	/* Wait for the board to become ready.  (PCI hotplug needs this.)
+	 * We poll for up to 120 secs, once per 100ms. */
+	for (i=0; i < 1200; i++) {
+		scratchpad = readl(c->vaddr + SA5_SCRATCHPAD_OFFSET);
+		if (scratchpad == CCISS_FIRMWARE_READY)
+			break;
+		set_current_state(TASK_INTERRUPTIBLE);
+		schedule_timeout(HZ / 10); /* wait 100ms */
+	}
+	if (scratchpad != CCISS_FIRMWARE_READY) {
+		printk(KERN_WARNING "cciss: Board not ready.  Timed out.\n");
+		return -1;
+	}
+
 	/* get the address index number */
 	cfg_base_addr = readl(c->vaddr + SA5_CTCFG_OFFSET);
 	/* I am not prepared to deal with a 64 bit address value */
diff -puN drivers/block/cciss.h~cciss-pci-hotplug-fix drivers/block/cciss.h
--- 25/drivers/block/cciss.h~cciss-pci-hotplug-fix	2003-03-03 13:52:06.000000000 -0800
+++ 25-akpm/drivers/block/cciss.h	2003-03-03 13:52:06.000000000 -0800
@@ -95,6 +95,7 @@ struct ctlr_info 
 #define SA5_REPLY_INTR_MASK_OFFSET	0x34
 #define SA5_REPLY_PORT_OFFSET		0x44
 #define SA5_INTR_STATUS		0x30
+#define SA5_SCRATCHPAD_OFFSET	0xB0
 
 #define SA5_CTCFG_OFFSET	0xB4
 #define SA5_CTMEM_OFFSET	0xB8
@@ -104,6 +105,7 @@ struct ctlr_info 
 #define SA5_INTR_PENDING	0x08
 #define SA5B_INTR_PENDING	0x04
 #define FIFO_EMPTY		0xffffffff	
+#define CCISS_FIRMWARE_READY	0xffff0000 /* value in scratchpad register */
 
 #define  CISS_ERROR_BIT		0x02
 

_