The Linux Kernel
5.17.0
The Linux kernel user’s and administrator’s guide
Kernel Build System
The Linux kernel firmware guide
Open Firmware and Devicetree
The Linux kernel user-space API guide
Working with the kernel development community
Development tools for the kernel
How to write kernel documentation
Kernel Hacking Guides
Linux Tracing Technologies
Kernel Maintainer Handbook
fault-injection
Kernel Livepatching
The Linux driver implementer’s API guide
Core API Documentation
locking
Accounting
Block
cdrom
Linux CPUFreq - CPU frequency and voltage scaling code in the Linux(TM) kernel
Integrated Drive Electronics (IDE)
Frame Buffer
fpga
Human Interface Devices (HID)
I2C/SMBus Subsystem
Industrial I/O
ISDN
InfiniBand
LEDs
NetLabel
Linux Networking Documentation
pcmcia
Power Management
TCM Virtual Device
timers
Serial Peripheral Interface (SPI)
1-Wire Subsystem
Linux Watchdog Support
Linux Virtualization Support
The Linux Input Documentation
Linux Hardware Monitoring
Linux GPU Driver Developer’s Guide
Security Documentation
Linux Sound Subsystem Documentation
Linux Kernel Crypto API
Filesystems in the Linux kernel
Linux Memory Management Documentation
BPF Documentation
USB support
Linux PCI Bus Subsystem
Linux SCSI Subsystem
Assorted Miscellaneous Devices Documentation
Linux Scheduler
MHI
TTY
Assembler Annotations
CPU Architectures
ARC architecture
ARM Architecture
ARM64 Architecture
IA-64 Architecture
m68k Architecture
MIPS-specific Documentation
1. BMIPS DeviceTree Booting
2. Ingenic JZ47xx SoCs Timer/Counter Unit hardware
3. Feature status on mips architecture
Nios II Specific Documentation
OpenRISC Architecture
PA-RISC Architecture
powerpc
RISC-V architecture
s390 Architecture
SuperH Interfaces Guide
Sparc Architecture
x86-specific Documentation
Xtensa Architecture
Kernel tools
Unsorted Documentation
Atomic Types
Atomic bitops
Memory Barriers
General notification mechanism
Translations
The Linux Kernel
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CPU Architectures
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MIPS-specific Documentation
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MIPS-specific Documentation
¶
1. BMIPS DeviceTree Booting
2. Ingenic JZ47xx SoCs Timer/Counter Unit hardware
2.1. Implementation
3. Feature status on mips architecture