8.26. ioctl VIDIOC_G_DV_TIMINGS, VIDIOC_S_DV_TIMINGS¶
VIDIOC_G_DV_TIMINGS - VIDIOC_S_DV_TIMINGS - VIDIOC_SUBDEV_G_DV_TIMINGS - VIDIOC_SUBDEV_S_DV_TIMINGS - Get or set DV timings for input or output
To set DV timings for the input or output, applications use the
VIDIOC_S_DV_TIMINGS ioctl and to get the current timings,
applications use the VIDIOC_G_DV_TIMINGS ioctl. The detailed timing
information is filled in using the structure struct
v4l2_dv_timings. These ioctls take a
pointer to the struct
structure as argument. If the ioctl is not supported or the timing
values are not correct, the driver returns
EINVAL error code.
linux/v4l2-dv-timings.h header can be used to get the timings of
the formats in the CEA-861-E and VESA DMT standards. If
the current input or output does not support DV timings (e.g. if
ioctl VIDIOC_ENUMINPUT does not set the
V4L2_IN_CAP_DV_TIMINGS flag), then
ENODATA error code is returned.
8.26.5. Return Value¶
On success 0 is returned, on error -1 and the
errno variable is set
appropriately. The generic error codes are described at the
Generic Error Codes chapter.
- This ioctl is not supported, or the VIDIOC_S_DV_TIMINGS parameter was unsuitable.
- Digital video timings are not supported for this input or output.
- The device is busy and therefore can not change the timings.
|Width of the active video in pixels.
|Height of the active video frame in lines. So for interlaced
formats the height of the active video in each field is
V4L2_DV_PROGRESSIVE) or interlaced (
|This is a bit mask that defines polarities of sync signals. bit 0
V4L2_DV_VSYNC_POS_POL) is for vertical sync polarity and bit
V4L2_DV_HSYNC_POS_POL) is for horizontal sync polarity. If
the bit is set (1) it is positive polarity and if is cleared (0),
it is negative polarity.
|Pixel clock in Hz. Ex. 74.25MHz->74250000
|Horizontal front porch in pixels
|Horizontal sync length in pixels
|Horizontal back porch in pixels
|Vertical front porch in lines. For interlaced formats this refers to the odd field (aka field 1).
|Vertical sync length in lines. For interlaced formats this refers to the odd field (aka field 1).
|Vertical back porch in lines. For interlaced formats this refers to the odd field (aka field 1).
|Vertical front porch in lines for the even field (aka field 2) of interlaced field formats. Must be 0 for progressive formats.
|Vertical sync length in lines for the even field (aka field 2) of interlaced field formats. Must be 0 for progressive formats.
|Vertical back porch in lines for the even field (aka field 2) of interlaced field formats. Must be 0 for progressive formats.
|The video standard(s) this format belongs to. This will be filled in by the driver. Applications must set this to 0. See DV BT Timing standards for a list of standards.
|Several flags giving more information about the format. See DV BT Timing flags for a description of the flags.
|Reserved for future extensions. Drivers and applications must set the array to zero.
|Type of DV timings as listed in DV Timing types.
|Timings defined by BT.656/1120 specifications
|The timings follow the CEA-861 Digital TV Profile standard
|The timings follow the VESA Discrete Monitor Timings standard
|The timings follow the VESA Coordinated Video Timings standard
|The timings follow the VESA Generalized Timings Formula standard
|The timings follow the SDI Timings standard. There are no horizontal syncs/porches at all in this format. Total blanking timings must be set in hsync or vsync fields only.
|CVT/GTF specific: the timings use reduced blanking (CVT) or the ‘Secondary GTF’ curve (GTF). In both cases the horizontal and/or vertical blanking intervals are reduced, allowing a higher resolution over the same bandwidth. This is a read-only flag, applications must not set this.
|CEA-861 specific: set for CEA-861 formats with a framerate that is a multiple of six. These formats can be optionally played at 1 / 1.001 speed to be compatible with 60 Hz based standards such as NTSC and PAL-M that use a framerate of 29.97 frames per second. If the transmitter can’t generate such frequencies, then the flag will also be cleared. This is a read-only flag, applications must not set this.
|CEA-861 specific: only valid for video transmitters, the flag is
cleared by receivers. It is also only valid for formats with the
V4L2_DV_FL_CAN_REDUCE_FPS flag set, for other formats the
flag will be cleared by the driver. If the application sets this
flag, then the pixelclock used to set up the transmitter is
divided by 1.001 to make it compatible with NTSC framerates. If
the transmitter can’t generate such frequencies, then the flag
will also be cleared.
|Specific to interlaced formats: if set, then the vertical frontporch of field 1 (aka the odd field) is really one half-line longer and the vertical backporch of field 2 (aka the even field) is really one half-line shorter, so each field has exactly the same number of half-lines. Whether half-lines can be detected or used depends on the hardware.
|If set, then this is a Consumer Electronics (CE) video format. Such formats differ from other formats (commonly called IT formats) in that if R’G’B’ encoding is used then by default the R’G’B’ values use limited range (i.e. 16-235) as opposed to full range (i.e. 0-255). All formats defined in CEA-861 except for the 640x480p59.94 format are CE formats.
|Some formats like SMPTE-125M have an interlaced signal with a odd total height. For these formats, if this flag is set, the first field has the extra line. Else, it is the second field.