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If CRC checking mode is enabled only fully aligned blocks of 32 bytes with valid CRC16 values (in bytes 30 and 31) are allowed to be written. ”h]”(hÌ)”}”(hŒeA read operation on the "eeprom" file reads the given amount of bytes from the EEPROM of the DS28E04.”h]”hŒiA read operation on the “eeprom†file reads the given amount of bytes from the EEPROM of the DS28E04.”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´KhjþubhÌ)”}”(hŒñA write operation on the "eeprom" file writes the given byte sequence to the EEPROM of the DS28E04. If CRC checking mode is enabled only fully aligned blocks of 32 bytes with valid CRC16 values (in bytes 30 and 31) are allowed to be written.”h]”hŒõA write operation on the “eeprom†file writes the given byte sequence to the EEPROM of the DS28E04. If CRC checking mode is enabled only fully aligned blocks of 32 bytes with valid CRC16 values (in bytes 30 and 31) are allowed to be written.”…””}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´Khjþubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÛh³hÊh´KhjÑh²hubhÌ)”}”(hŒ PIO Access”h]”hŒ PIO Access”…””}”(hj$h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K#hjÑh²hubhÜ)”}”(hXThe 2 PIOs of the DS28E04-100 are accessible via the "pio" sysfs file. The current status of the PIO's is returned as an 8 bit value. Bit 0/1 represent the state of PIO_0/PIO_1. Bits 2..7 do not care. The PIO's are driven low-active, i.e. the driver delivers/expects low-active values.”h]”(hÌ)”}”(hŒFThe 2 PIOs of the DS28E04-100 are accessible via the "pio" sysfs file.”h]”hŒJThe 2 PIOs of the DS28E04-100 are accessible via the “pio†sysfs file.”…””}”(hj6h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hËh³hÊh´K%hj2ubhÌ)”}”(hŒÖThe current status of the PIO's is returned as an 8 bit value. Bit 0/1 represent the state of PIO_0/PIO_1. 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