S4sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget'/translations/zh_CN/w1/slaves/w1_ds2413modnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget'/translations/zh_TW/w1/slaves/w1_ds2413modnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget'/translations/it_IT/w1/slaves/w1_ds2413modnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget'/translations/ja_JP/w1/slaves/w1_ds2413modnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget'/translations/ko_KR/w1/slaves/w1_ds2413modnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget'/translations/sp_SP/w1/slaves/w1_ds2413modnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhsection)}(hhh](htitle)}(hKernel driver w1_ds2413h]hKernel driver w1_ds2413}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhA/var/lib/git/docbuild/linux/Documentation/w1/slaves/w1_ds2413.rsthKubh paragraph)}(hSupported chips:h]hSupported chips:}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh block_quote)}(h6* Maxim DS2413 1-Wire Dual Channel Addressable Switch h]h bullet_list)}(hhh]h list_item)}(h4Maxim DS2413 1-Wire Dual Channel Addressable Switch h]h)}(h3Maxim DS2413 1-Wire Dual Channel Addressable Switchh]h3Maxim DS2413 1-Wire Dual Channel Addressable Switch}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhubah}(h]h ]h"]h$]h&]uh1hhhubah}(h]h ]h"]h$]h&]bullet*uh1hhhhKhhubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hsupported family codes:h]hsupported family codes:}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hhhhubh)}(hW================ ==== W1_FAMILY_DS2413 0x3A ================ ==== h]htable)}(hhh]htgroup)}(hhh](hcolspec)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjubhtbody)}(hhh]hrow)}(hhh](hentry)}(hhh]h)}(hW1_FAMILY_DS2413h]hW1_FAMILY_DS2413}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hj8ubah}(h]h ]h"]h$]h&]uh1j6hj3ubj7)}(hhh]h)}(h0x3Ah]h0x3A}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hjOubah}(h]h ]h"]h$]h&]uh1j6hj3ubeh}(h]h ]h"]h$]h&]uh1j1hj.ubah}(h]h ]h"]h$]h&]uh1j,hjubeh}(h]h ]h"]h$]h&]colsKuh1jhjubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1hhhhK hhhhubh)}(h-Author: Mariusz Bialonczyk h](hAuthor: Mariusz Bialonczyk <}(hjhhhNhNubh reference)}(hmanio@skyboo.neth]hmanio@skyboo.net}(hjhhhNhNubah}(h]h ]h"]h$]h&]refurimailto:manio@skyboo.netuh1jhjubh>}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hhh](h)}(h Descriptionh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hThe DS2413 chip has two open-drain outputs (PIO A and PIO B). Support is provided through the sysfs files "output" and "state".h]hThe DS2413 chip has two open-drain outputs (PIO A and PIO B). Support is provided through the sysfs files “output” and “state”.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubeh}(h] descriptionah ]h"] descriptionah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(h Reading stateh]h Reading state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hThe "state" file provides one-byte value which is in the same format as for the chip PIO_ACCESS_READ command (refer the datasheet for details):h]hThe “state” file provides one-byte value which is in the same format as for the chip PIO_ACCESS_READ command (refer the datasheet for details):}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubj )}(hhh]j)}(hhh](j)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthK=uh1jhjubj-)}(hhh](j2)}(hhh](j7)}(hhh]h)}(hBit 0:h]hBit 0:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1j6hj ubj7)}(hhh]h)}(hPIOA Pin Stateh]hPIOA Pin State}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj&ubah}(h]h ]h"]h$]h&]uh1j6hj ubeh}(h]h ]h"]h$]h&]uh1j1hj ubj2)}(hhh](j7)}(hhh]h)}(hBit 1:h]hBit 1:}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjFubah}(h]h ]h"]h$]h&]uh1j6hjCubj7)}(hhh]h)}(hPIOA Output Latch Stateh]hPIOA Output Latch State}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj]ubah}(h]h ]h"]h$]h&]uh1j6hjCubeh}(h]h ]h"]h$]h&]uh1j1hj ubj2)}(hhh](j7)}(hhh]h)}(hBit 2:h]hBit 2:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj}ubah}(h]h ]h"]h$]h&]uh1j6hjzubj7)}(hhh]h)}(hPIOB Pin Stateh]hPIOB Pin State}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1j6hjzubeh}(h]h ]h"]h$]h&]uh1j1hj ubj2)}(hhh](j7)}(hhh]h)}(hBit 3:h]hBit 3:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hjubah}(h]h ]h"]h$]h&]uh1j6hjubj7)}(hhh]h)}(hPIOB Output Latch Stateh]hPIOB Output Latch State}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hjubah}(h]h ]h"]h$]h&]uh1j6hjubeh}(h]h ]h"]h$]h&]uh1j1hj ubj2)}(hhh](j7)}(hhh]h)}(hBit 4-7:h]hBit 4-7:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK!hjubah}(h]h ]h"]h$]h&]uh1j6hjubj7)}(hhh]h)}(h