€•ß$      Œsphinx.addnodes”Œdocument”“”)”}”(Œ	rawsource”Œ ”Œchildren”]”(Œtranslations”ŒLanguagesNode”“”)”}”(hhh]”(h Œpending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ
attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ	refdomain”Œstd”Œreftype”Œdoc”Œ	reftarget”Œ&/translations/zh_CN/w1/masters/w1-uart”Œmodname”NŒ	classname”NŒrefexplicit”ˆuŒtagname”hhhubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ&/translations/zh_TW/w1/masters/w1-uart”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ&/translations/it_IT/w1/masters/w1-uart”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ&/translations/ja_JP/w1/masters/w1-uart”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ&/translations/ko_KR/w1/masters/w1-uart”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒSpanish”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ&/translations/sp_SP/w1/masters/w1-uart”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h
hhŒ	_document”hŒsource”NŒline”NubhŒcomment”“”)”}”(hŒ)SPDX-License-Identifier: GPL-2.0-or-later”h]”hŒ)SPDX-License-Identifier: GPL-2.0-or-later”…””}”hh£sbah}”(h]”h ]”h"]”h$]”h&]”Œ	xml:space”Œpreserve”uh1h¡hhhžhhŸŒ@/var/lib/git/docbuild/linux/Documentation/w1/masters/w1-uart.rst”h KubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒKernel driver w1-uart”h]”hŒKernel driver w1-uart”…””}”(hh»hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hh¶hžhhŸh³h KubhŒ	paragraph”“”)”}”(hŒ6Author: Christoph Winklhofer <cj.winklhofer@gmail.com>”h]”(hŒAuthor: Christoph Winklhofer <”…””}”(hhËhžhhŸNh NubhŒ	reference”“”)”}”(hŒcj.winklhofer@gmail.com”h]”hŒcj.winklhofer@gmail.com”…””}”(hhÕhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”Œmailto:cj.winklhofer@gmail.com”uh1hÓhhËubhŒ>”…””}”(hhËhžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khh¶hžhubhµ)”}”(hhh]”(hº)”}”(hŒDescription”h]”hŒDescription”…””}”(hhòhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hhïhžhhŸh³h KubhÊ)”}”(hŒÎUART 1-Wire bus driver. The driver utilizes the UART interface via the
Serial Device Bus to create the 1-Wire timing patterns as described in
the document `"Using a UART to Implement a 1-Wire Bus Master"`_.”h]”(hŒ›UART 1-Wire bus driver. The driver utilizes the UART interface via the
Serial Device Bus to create the 1-Wire timing patterns as described in
the document ”…””}”(hj   hžhhŸNh NubhÔ)”}”(hŒ2`"Using a UART to Implement a 1-Wire Bus Master"`_”h]”hŒ3â€œUsing a UART to Implement a 1-Wire Bus Masterâ€”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”Œname”Œ/"Using a UART to Implement a 1-Wire Bus Master"”Œrefuri”Œ^https://www.analog.com/en/technical-articles/using-a-uart-to-implement-a-1wire-bus-master.html”uh1hÓhj   Œresolved”KubhŒ.”…””}”(hj   hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KhhïhžhubhŒtarget”“”)”}”(hŒ“.. _"Using a UART to Implement a 1-Wire Bus Master": https://www.analog.com/en/technical-articles/using-a-uart-to-implement-a-1wire-bus-master.html”h]”h}”(h]”Œ-using-a-uart-to-implement-a-1-wire-bus-master”ah ]”h"]”Œ/"using a uart to implement a 1-wire bus master"”ah$]”h&]”j  j  uh1j%  h KhhïhžhhŸh³Œ
referenced”KubhÊ)”}”(hŒ÷In short, the UART peripheral must support full-duplex and operate in
open-drain mode. The timing patterns are generated by a specific
combination of baud-rate and transmitted byte, which corresponds to a
1-Wire read bit, write bit or reset pulse.”h]”hŒ÷In short, the UART peripheral must support full-duplex and operate in
open-drain mode. The timing patterns are generated by a specific
combination of baud-rate and transmitted byte, which corresponds to a
1-Wire read bit, write bit or reset pulse.”…””}”(hj4  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KhhïhžhubhÊ)”}”(hXŒ  For instance the timing pattern for a 1-Wire reset and presence detect uses
the baud-rate 9600, i.e. 104.2 us per bit. The transmitted byte 0xf0 over
UART (least significant bit first, start-bit low) sets the reset low time
for 1-Wire to 521 us. A present 1-Wire device changes the received byte by
pulling the line low, which is used by the driver to evaluate the result of
the 1-Wire operation.”h]”hXŒ  For instance the timing pattern for a 1-Wire reset and presence detect uses
the baud-rate 9600, i.e. 104.2 us per bit. The transmitted byte 0xf0 over
UART (least significant bit first, start-bit low) sets the reset low time
for 1-Wire to 521 us. A present 1-Wire device changes the received byte by
pulling the line low, which is used by the driver to evaluate the result of
the 1-Wire operation.”…””}”(hjB  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KhhïhžhubhÊ)”}”(hŒðSimilar for a 1-Wire read bit or write bit, which uses the baud-rate
115200, i.e. 8.7 us per bit. The transmitted byte 0x80 is used for a
Write-0 operation (low time 69.6us) and the byte 0xff for Read-0, Read-1
and Write-1 (low time 8.7us).”h]”hŒðSimilar for a 1-Wire read bit or write bit, which uses the baud-rate
115200, i.e. 8.7 us per bit. The transmitted byte 0x80 is used for a
Write-0 operation (low time 69.6us) and the byte 0xff for Read-0, Read-1
and Write-1 (low time 8.7us).”…””}”(hjP  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KhhïhžhubhÊ)”}”(hŒùThe default baud-rate for reset and presence detection is 9600 and for
a 1-Wire read or write operation 115200. In case the actual baud-rate
is different from the requested one, the transmitted byte is adapted
to generate the 1-Wire timing patterns.”h]”hŒùThe default baud-rate for reset and presence detection is 9600 and for
a 1-Wire read or write operation 115200. In case the actual baud-rate
is different from the requested one, the transmitted byte is adapted
to generate the 1-Wire timing patterns.”…””}”(hj^  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K$hhïhžhubeh}”(h]”Œdescription”ah ]”h"]”Œdescription”ah$]”h&]”uh1h´hh¶hžhhŸh³h Kubhµ)”}”(hhh]”(hº)”}”(hŒUsage”h]”hŒUsage”…””}”(hjw  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hjt  hžhhŸh³h K+ubhÊ)”}”(hŒ‚Specify the UART 1-wire bus in the device tree by adding the single child
onewire to the serial node (e.g. uart0). For example:
::”h]”hŒSpecify the UART 1-wire bus in the device tree by adding the single child
onewire to the serial node (e.g. uart0). For example:”…””}”(hj…  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K-hjt  hžhubhŒliteral_block”“”)”}”(hŒ>@uart0 {
  ...
  onewire {
    compatible = "w1-uart";
  };
};”h]”hŒ>@uart0 {
  ...
  onewire {
    compatible = "w1-uart";
  };
};”…””}”hj•  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1j“  hŸh³h K1hjt  hžhubeh}”(h]”Œusage”ah ]”h"]”Œusage”ah$]”h&]”uh1h´hh¶hžhhŸh³h K+ubeh}”(h]”Œkernel-driver-w1-uart”ah ]”h"]”Œkernel driver w1-uart”ah$]”h&]”uh1h´hhhžhhŸh³h Kubeh}”(h]”h ]”h"]”h$]”h&]”Œsource”h³uh1hŒcurrent_source”NŒcurrent_line”NŒsettings”Œdocutils.frontend”ŒValues”“”)”}”(h¹NŒ	generator”NŒ	datestamp”NŒsource_link”NŒ
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