M^sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget&/translations/zh_CN/virt/kvm/x86/cpuidmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget&/translations/zh_TW/virt/kvm/x86/cpuidmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget&/translations/it_IT/virt/kvm/x86/cpuidmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget&/translations/ja_JP/virt/kvm/x86/cpuidmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget&/translations/ko_KR/virt/kvm/x86/cpuidmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget&/translations/sp_SP/virt/kvm/x86/cpuidmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhcomment)}(h SPDX-License-Identifier: GPL-2.0h]h SPDX-License-Identifier: GPL-2.0}hhsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1hhhhhh@/var/lib/git/docbuild/linux/Documentation/virt/kvm/x86/cpuid.rsthKubhsection)}(hhh](htitle)}(hKVM CPUID bitsh]hKVM CPUID bits}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh field_list)}(hhh]hfield)}(hhh](h field_name)}(hAuthorh]hAuthor}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhKubh field_body)}(h"Glauber Costa h]h paragraph)}(h!Glauber Costa h](hGlauber Costa <}(hhhhhNhNubh reference)}(hglommer@gmail.comh]hglommer@gmail.com}(hhhhhNhNubah}(h]h ]h"]h$]h&]refurimailto:glommer@gmail.comuh1hhhubh>}(hhhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhhubah}(h]h ]h"]h$]h&]uh1hhhubeh}(h]h ]h"]h$]h&]uh1hhhhKhhhhubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh)}(hA guest running on a kvm host, can check some of its features using cpuid. This is not always guaranteed to work, since userspace can mask-out some, or even all KVM-related cpuid features before launching a guest.h]hA guest running on a kvm host, can check some of its features using cpuid. This is not always guaranteed to work, since userspace can mask-out some, or even all KVM-related cpuid features before launching a guest.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hhhhubh)}(hKVM cpuid functions are:h]hKVM cpuid functions are:}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(h*function: KVM_CPUID_SIGNATURE (0x40000000)h]h*function: KVM_CPUID_SIGNATURE (0x40000000)}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(h returns::h]hreturns:}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh literal_block)}(h=eax = 0x40000001 ebx = 0x4b4d564b ecx = 0x564b4d56 edx = 0x4dh]h=eax = 0x40000001 ebx = 0x4b4d564b ecx = 0x564b4d56 edx = 0x4d}hj[sbah}(h]h ]h"]h$]h&]hhuh1jYhhhKhhhhubh)}(hXNote that this value in ebx, ecx and edx corresponds to the string "KVMKVMKVM". The value in eax corresponds to the maximum cpuid function present in this leaf, and will be updated if more functions are added in the future. Note also that old hosts set eax value to 0x0. This should be interpreted as if the value was 0x40000001. This function queries the presence of KVM cpuid leafs.h]hXNote that this value in ebx, ecx and edx corresponds to the string “KVMKVMKVM”. The value in eax corresponds to the maximum cpuid function present in this leaf, and will be updated if more functions are added in the future. Note also that old hosts set eax value to 0x0. This should be interpreted as if the value was 0x40000001. This function queries the presence of KVM cpuid leafs.}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(h0function: define KVM_CPUID_FEATURES (0x40000001)h]h0function: define KVM_CPUID_FEATURES (0x40000001)}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hhhhubh)}(h returns::h]hreturns:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK"hhhhubjZ)}(h,ebx, ecx eax = an OR'ed group of (1 << flag)h]h,ebx, ecx eax = an OR'ed group of (1 << flag)}hjsbah}(h]h ]h"]h$]h&]hhuh1jYhhhK$hhhhubh)}(h#where ``flag`` is defined as below:h](hwhere }(hjhhhNhNubhliteral)}(h``flag``h]hflag}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh is defined as below:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhK'hhhhubhtable)}(hhh]htgroup)}(hhh](hcolspec)}(hhh]h}(h]h ]h"]h$]h&]colwidthK"uh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthK uh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthK$uh1jhjubhthead)}(hhh]hrow)}(hhh](hentry)}(hhh]h)}(hflagh]hflag}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK*hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hvalueh]hvalue}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK*hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hmeaningh]hmeaning}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK*hj'ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhjubhtbody)}(hhh](j)}(hhh](j)}(hhh]h)}(hKVM_FEATURE_CLOCKSOURCEh]hKVM_FEATURE_CLOCKSOURCE}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK,hjRubah}(h]h ]h"]h$]h&]uh1jhjOubj)}(hhh]h)}(h0h]h0}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK,hjiubah}(h]h ]h"]h$]h&]uh1jhjOubj)}(hhh]h)}(h(kvmclock available at msrs 0x11 and 0x12h]h(kvmclock available at msrs 0x11 and 0x12}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK,hjubah}(h]h ]h"]h$]h&]uh1jhjOubeh}(h]h ]h"]h$]h&]uh1jhjLubj)}(hhh](j)}(hhh]h)}(hKVM_FEATURE_NOP_IO_DELAYh]hKVM_FEATURE_NOP_IO_DELAY}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK/hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h1h]h1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK/hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h1not necessary to perform delays on PIO operationsh]h1not necessary to perform delays on PIO operations}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK/hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjLubj)}(hhh](j)}(hhh]h)}(hKVM_FEATURE_MMU_OPh]hKVM_FEATURE_MMU_OP}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK2hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h2h]h2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK2hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h deprecatedh]h deprecated}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK2hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjLubj)}(hhh](j)}(hhh]h)}(hKVM_FEATURE_CLOCKSOURCE2h]hKVM_FEATURE_CLOCKSOURCE2}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK4hj<ubah}(h]h ]h"]h$]h&]uh1jhj9ubj)}(hhh]h)}(h3h]h3}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK4hjSubah}(h]h ]h"]h$]h&]uh1jhj9ubj)}(hhh]h)}(h4kvmclock available at msrs 0x4b564d00 and 0x4b564d01h]h4kvmclock available at msrs 0x4b564d00 and 0x4b564d01}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK4hjjubah}(h]h ]h"]h$]h&]uh1jhj9ubeh}(h]h ]h"]h$]h&]uh1jhjLubj)}(hhh](j)}(hhh]h)}(hKVM_FEATURE_ASYNC_PFh]hKVM_FEATURE_ASYNC_PF}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK7hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h4h]h4}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK7hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h4async pf can be enabled by writing to msr 0x4b564d02h]h4async pf can be enabled by writing to msr 0x4b564d02}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK7hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjLubj)}(hhh](j)}(hhh]h)}(hKVM_FEATURE_STEAL_TIMEh]hKVM_FEATURE_STEAL_TIME}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK:hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h5h]h5}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK:hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h6steal time can be enabled by writing to msr 0x4b564d03h]h6steal time can be enabled by writing to msr 0x4b564d03}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK:hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjLubj)}(hhh](j)}(hhh]h)}(hKVM_FEATURE_PV_EOIh]hKVM_FEATURE_PV_EOI}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK=hj&ubah}(h]h ]h"]h$]h&]uh1jhj#ubj)}(hhh]h)}(h6h]h6}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK=hj=ubah}(h]h ]h"]h$]h&]uh1jhj#ubj)}(hhh]h)}(hTparavirtualized end of interrupt handler can be enabled by writing to msr 0x4b564d04h]hTparavirtualized end of interrupt handler can be enabled by writing to msr 0x4b564d04}(hjWhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK=hjTubah}(h]h ]h"]h$]h&]uh1jhj#ubeh}(h]h ]h"]h$]h&]uh1jhjLubj)}(hhh](j)}(hhh]h)}(hKVM_FEATURE_PV_UNHALTh]hKVM_FEATURE_PV_UNHALT}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKAhjtubah}(h]h ]h"]h$]h&]uh1jhjqubj)}(hhh]h)}(h7h]h7}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKAhjubah}(h]h ]h"]h$]h&]uh1jhjqubj)}(hhh]h)}(hNguest checks this feature bit before enabling paravirtualized spinlock supporth]hNguest checks this feature bit before enabling paravirtualized spinlock support}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKAhjubah}(h]h ]h"]h$]h&]uh1jhjqubeh}(h]h ]h"]h$]h&]uh1jhjLubj)}(hhh](j)}(hhh]h)}(hKVM_FEATURE_PV_TLB_FLUSHh]hKVM_FEATURE_PV_TLB_FLUSH}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKEhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h9h]h9}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKEhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hGguest checks this feature bit before enabling paravirtualized tlb flushh]hGguest checks this feature bit before enabling paravirtualized tlb flush}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKEhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjLubj)}(hhh](j)}(hhh]h)}(hKVM_FEATURE_ASYNC_PF_VMEXITh]hKVM_FEATURE_ASYNC_PF_VMEXIT}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKIhjubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(h10h]h10}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKIhj'ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(h_paravirtualized async PF VM EXIT can be enabled by setting bit 2 when writing to msr 0x4b564d02h]h_paravirtualized async PF VM EXIT can be enabled by setting bit 2 when writing to msr 0x4b564d02}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKIhj>ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjLubj)}(hhh](j)}(hhh]h)}(hKVM_FEATURE_PV_SEND_IPIh]hKVM_FEATURE_PV_SEND_IPI}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKMhj^ubah}(h]h ]h"]h$]h&]uh1jhj[ubj)}(hhh]h)}(h11h]h11}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKMhjuubah}(h]h ]h"]h$]h&]uh1jhj[ubj)}(hhh]h)}(hGguest checks this feature bit before enabling paravirtualized send IPIsh]hGguest checks this feature bit before enabling paravirtualized send IPIs}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKMhjubah}(h]h ]h"]h$]h&]uh1jhj[ubeh}(h]h ]h"]h$]h&]uh1jhjLubj)}(hhh](j)}(hhh]h)}(hKVM_FEATURE_POLL_CONTROLh]hKVM_FEATURE_POLL_CONTROL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKQhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h12h]h12}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKQhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hFhost-side polling on HLT can be disabled by writing to msr 0x4b564d05.h]hFhost-side polling on HLT can be disabled by writing to msr 0x4b564d05.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKQhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjLubj)}(hhh](j)}(hhh]h)}(hKVM_FEATURE_PV_SCHED_YIELDh]hKVM_FEATURE_PV_SCHED_YIELD}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKUhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h13h]h13}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKUhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hGguest checks this feature bit before using paravirtualized sched yield.h]hGguest checks this feature bit before using paravirtualized sched yield.}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKUhj(ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjLubj)}(hhh](j)}(hhh]h)}(hKVM_FEATURE_ASYNC_PF_INTh]hKVM_FEATURE_ASYNC_PF_INT}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKYhjHubah}(h]h ]h"]h$]h&]uh1jhjEubj)}(hhh]h)}(h14h]h14}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKYhj_ubah}(h]h ]h"]h$]h&]uh1jhjEubj)}(hhh]h)}(hguest checks this feature bit before using the second async pf control msr 0x4b564d06 and async pf acknowledgment msr 0x4b564d07.h]hguest checks this feature bit before using the second async pf control msr 0x4b564d06 and async pf acknowledgment msr 0x4b564d07.}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKYhjvubah}(h]h ]h"]h$]h&]uh1jhjEubeh}(h]h ]h"]h$]h&]uh1jhjLubj)}(hhh](j)}(hhh]h)}(hKVM_FEATURE_MSI_EXT_DEST_IDh]hKVM_FEATURE_MSI_EXT_DEST_ID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK_hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h15h]h15}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK_hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(haguest checks this feature bit before using extended destination ID bits in MSI address bits 11-5.h]haguest checks this feature bit before using extended destination ID bits in MSI address bits 11-5.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK_hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjLubj)}(hhh](j)}(hhh]h)}(hKVM_FEATURE_HC_MAP_GPA_RANGEh]hKVM_FEATURE_HC_MAP_GPA_RANGE}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKchjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h16h]h16}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKchjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hfguest checks this feature bit before using the map gpa range hypercall to notify the page state changeh]hfguest checks this feature bit before using the map gpa range hypercall to notify the page state change}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKchjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjLubj)}(hhh](j)}(hhh]h)}(hKVM_FEATURE_MIGRATION_CONTROLh]hKVM_FEATURE_MIGRATION_CONTROL}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKghj2ubah}(h]h ]h"]h$]h&]uh1jhj/ubj)}(hhh]h)}(h17h]h17}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKghjIubah}(h]h ]h"]h$]h&]uh1jhj/ubj)}(hhh]h)}(hDguest checks this feature bit before using MSR_KVM_MIGRATION_CONTROLh]hDguest checks this feature bit before using MSR_KVM_MIGRATION_CONTROL}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKghj`ubah}(h]h ]h"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]uh1jhjLubj)}(hhh](j)}(hhh]h)}(h"KVM_FEATURE_CLOCKSOURCE_STABLE_BITh]h"KVM_FEATURE_CLOCKSOURCE_STABLE_BIT}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKjhjubah}(h]h ]h"]h$]h&]uh1jhj}ubj)}(hhh]h)}(h24h]h24}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKjhjubah}(h]h ]h"]h$]h&]uh1jhj}ubj)}(hhh]h)}(hFhost will warn if no guest-side per-cpu warps are expected in kvmclockh]hFhost will warn if no guest-side per-cpu warps are expected in kvmclock}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKjhjubah}(h]h ]h"]h$]h&]uh1jhj}ubeh}(h]h ]h"]h$]h&]uh1jhjLubeh}(h]h ]h"]h$]h&]uh1jJhjubeh}(h]h ]h"]h$]h&]colsKuh1jhjubah}(h]h ]h"]h$]h&]uh1jhhhhhhhNubjZ)}(h#edx = an OR'ed group of (1 << flag)h]h#edx = an OR'ed group of (1 << flag)}hjsbah}(h]h ]h"]h$]h&]hhuh1jYhhhKqhhhhubh)}(h(Where ``flag`` here is defined as below:h](hWhere }(hjhhhNhNubj)}(h``flag``h]hflag}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh here is defined as below:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKshhhhubj)}(hhh]j)}(hhh](j)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthK uh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthK!uh1jhjubj)}(hhh]j)}(hhh](j)}(hhh]h)}(hflagh]hflag}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKvhj6ubah}(h]h ]h"]h$]h&]uh1jhj3ubj)}(hhh]h)}(hvalueh]hvalue}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKvhjMubah}(h]h ]h"]h$]h&]uh1jhj3ubj)}(hhh]h)}(hmeaningh]hmeaning}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKvhjdubah}(h]h ]h"]h$]h&]uh1jhj3ubeh}(h]h ]h"]h$]h&]uh1jhj0ubah}(h]h ]h"]h$]h&]uh1jhjubjK)}(hhh]j)}(hhh](j)}(hhh]h)}(hKVM_HINTS_REALTIMEh]hKVM_HINTS_REALTIME}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKxhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hjnh]h0}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKxhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hvguest checks this feature bit to determine that vCPUs are never preempted for an unlimited time allowing optimizationsh]hvguest checks this feature bit to determine that vCPUs are never preempted for an unlimited time allowing optimizations}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKxhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jJhjubeh}(h]h ]h"]h$]h&]colsKuh1jhj ubah}(h]h ]h"]h$]h&]uh1jhhhhhhhNubeh}(h]kvm-cpuid-bitsah ]h"]kvm cpuid bitsah$]h&]uh1hhhhhhhhKubeh}(h]h ]h"]h$]h&]sourcehuh1hcurrent_sourceN current_lineNsettingsdocutils.frontendValues)}(hN generatorN datestampN source_linkN source_urlN toc_backlinksjfootnote_backlinksK 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