€•:HŒsphinx.addnodes”Œdocument”“”)”}”(Œ rawsource”Œ”Œchildren”]”(Œ translations”Œ LanguagesNode”“”)”}”(hhh]”(hŒ pending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ refdomain”Œstd”Œreftype”Œdoc”Œ reftarget”Œ)/translations/zh_CN/virt/kvm/devices/xics”Œmodname”NŒ classname”NŒ refexplicit”ˆuŒtagname”hhh ubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ)/translations/zh_TW/virt/kvm/devices/xics”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ)/translations/it_IT/virt/kvm/devices/xics”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ)/translations/ja_JP/virt/kvm/devices/xics”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ)/translations/ko_KR/virt/kvm/devices/xics”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒSpanish”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ)/translations/sp_SP/virt/kvm/devices/xics”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h hhŒ _document”hŒsource”NŒline”NubhŒcomment”“”)”}”(hŒ SPDX-License-Identifier: GPL-2.0”h]”hŒ SPDX-License-Identifier: GPL-2.0”…””}”hh£sbah}”(h]”h ]”h"]”h$]”h&]”Œ xml:space”Œpreserve”uh1h¡hhhžhhŸŒC/var/lib/git/docbuild/linux/Documentation/virt/kvm/devices/xics.rst”h KubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒXICS interrupt controller”h]”hŒXICS interrupt controller”…””}”(hh»hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hh¶hžhhŸh³h KubhŒ paragraph”“”)”}”(hŒ(Device type supported: KVM_DEV_TYPE_XICS”h]”hŒ(Device type supported: KVM_DEV_TYPE_XICS”…””}”(hhËhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khh¶hžhubhŒdefinition_list”“”)”}”(hhh]”hŒdefinition_list_item”“”)”}”(hXgGroups: 1. KVM_DEV_XICS_GRP_SOURCES Attributes: One per interrupt source, indexed by the source number. 2. KVM_DEV_XICS_GRP_CTRL Attributes: 2.1 KVM_DEV_XICS_NR_SERVERS (write only) The kvm_device_attr.addr points to a __u32 value which is the number of interrupt server numbers (ie, highest possible vcpu id plus one). Errors: ======= ========================================== -EINVAL Value greater than KVM_MAX_VCPU_IDS. -EFAULT Invalid user pointer for attr->addr. -EBUSY A vcpu is already connected to the device. ======= ========================================== ”h]”(hŒterm”“”)”}”(hŒGroups:”h]”hŒGroups:”…””}”(hhæhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hähŸh³h KhhàubhŒ definition”“”)”}”(hhh]”(hŒenumerated_list”“”)”}”(hhh]”(hŒ list_item”“”)”}”(hŒcKVM_DEV_XICS_GRP_SOURCES Attributes: One per interrupt source, indexed by the source number.”h]”hÚ)”}”(hhh]”hß)”}”(hŒ_KVM_DEV_XICS_GRP_SOURCES Attributes: One per interrupt source, indexed by the source number.”h]”(hå)”}”(hŒKVM_DEV_XICS_GRP_SOURCES”h]”hŒKVM_DEV_XICS_GRP_SOURCES”…””}”(hj hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hähŸh³h K hjubhõ)”}”(hhh]”(hÊ)”}”(hŒ Attributes:”h]”hŒ Attributes:”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K hjubhŒ block_quote”“”)”}”(hŒ7One per interrupt source, indexed by the source number.”h]”hÊ)”}”(hj.h]”hŒ7One per interrupt source, indexed by the source number.”…””}”(hj0hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K hj,ubah}”(h]”h ]”h"]”h$]”h&]”uh1j*hŸh³h K hjubeh}”(h]”h ]”h"]”h$]”h&]”uh1hôhjubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÞhŸh³h K hjubah}”(h]”h ]”h"]”h$]”h&]”uh1hÙhjubah}”(h]”h ]”h"]”h$]”h&]”uh1hþhhûubhÿ)”}”(hŒRKVM_DEV_XICS_GRP_CTRL Attributes: 2.1 KVM_DEV_XICS_NR_SERVERS (write only) ”h]”hÚ)”}”(hhh]”hß)”}”(hŒNKVM_DEV_XICS_GRP_CTRL Attributes: 2.1 KVM_DEV_XICS_NR_SERVERS (write only) ”h]”(hå)”}”(hŒKVM_DEV_XICS_GRP_CTRL”h]”hŒKVM_DEV_XICS_GRP_CTRL”…””}”(hjfhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hähŸh³h Khjbubhõ)”}”(hhh]”(hÊ)”}”(hŒ Attributes:”h]”hŒ Attributes:”…””}”(hjwhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khjtubj+)”}”(hŒ)2.1 KVM_DEV_XICS_NR_SERVERS (write only) ”h]”hÊ)”}”(hŒ(2.1 KVM_DEV_XICS_NR_SERVERS (write only)”h]”hŒ(2.1 KVM_DEV_XICS_NR_SERVERS (write only)”…””}”(hj‰hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khj…ubah}”(h]”h ]”h"]”h$]”h&]”uh1j*hŸh³h Khjtubeh}”(h]”h ]”h"]”h$]”h&]”uh1hôhjbubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÞhŸh³h Khj_ubah}”(h]”h ]”h"]”h$]”h&]”uh1hÙhj[ubah}”(h]”h ]”h"]”h$]”h&]”uh1hþhhûubeh}”(h]”h ]”h"]”h$]”h&]”Œenumtype”Œarabic”Œprefix”hŒsuffix”Œ.”uh1hùhhöubhÊ)”}”(hŒ‰The kvm_device_attr.addr points to a __u32 value which is the number of interrupt server numbers (ie, highest possible vcpu id plus one).”h]”hŒ‰The kvm_device_attr.addr points to a __u32 value which is the number of interrupt server numbers (ie, highest possible vcpu id plus one).”…””}”(hjÀhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KhhöubhÊ)”}”(hŒErrors:”h]”hŒErrors:”…””}”(hjÎhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khhöubj+)”}”(hŒø======= ========================================== -EINVAL Value greater than KVM_MAX_VCPU_IDS. -EFAULT Invalid user pointer for attr->addr. -EBUSY A vcpu is already connected to the device. ======= ========================================== ”h]”hŒtable”“”)”}”(hhh]”hŒtgroup”“”)”}”(hhh]”(hŒcolspec”“”)”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”Œcolwidth”Kuh1jêhjçubjë)”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”Œcolwidth”K*uh1jêhjçubhŒtbody”“”)”}”(hhh]”(hŒrow”“”)”}”(hhh]”(hŒentry”“”)”}”(hhh]”hÊ)”}”(hŒ-EINVAL”h]”hŒ-EINVAL”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khj ubah}”(h]”h ]”h"]”h$]”h&]”uh1j hjubj )”}”(hhh]”hÊ)”}”(hŒ$Value greater than KVM_MAX_VCPU_IDS.”h]”hŒ$Value greater than KVM_MAX_VCPU_IDS.”…””}”(hj&hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khj#ubah}”(h]”h ]”h"]”h$]”h&]”uh1j hjubeh}”(h]”h ]”h"]”h$]”h&]”uh1jhjubj)”}”(hhh]”(j )”}”(hhh]”hÊ)”}”(hŒ-EFAULT”h]”hŒ-EFAULT”…””}”(hjFhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KhjCubah}”(h]”h ]”h"]”h$]”h&]”uh1j hj@ubj )”}”(hhh]”hÊ)”}”(hŒ$Invalid user pointer for attr->addr.”h]”hŒ$Invalid user pointer for attr->addr.”…””}”(hj]hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KhjZubah}”(h]”h ]”h"]”h$]”h&]”uh1j hj@ubeh}”(h]”h ]”h"]”h$]”h&]”uh1jhjubj)”}”(hhh]”(j )”}”(hhh]”hÊ)”}”(hŒ-EBUSY”h]”hŒ-EBUSY”…””}”(hj}hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khjzubah}”(h]”h ]”h"]”h$]”h&]”uh1j hjwubj )”}”(hhh]”hÊ)”}”(hŒ*A vcpu is already connected to the device.”h]”hŒ*A vcpu is already connected to the device.”…””}”(hj”hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khj‘ubah}”(h]”h ]”h"]”h$]”h&]”uh1j hjwubeh}”(h]”h ]”h"]”h$]”h&]”uh1jhjubeh}”(h]”h ]”h"]”h$]”h&]”uh1jhjçubeh}”(h]”h ]”h"]”h$]”h&]”Œcols”Kuh1jåhjâubah}”(h]”h ]”h"]”h$]”h&]”uh1jàhjÜubah}”(h]”h ]”h"]”h$]”h&]”uh1j*hŸh³h Khhöubeh}”(h]”h ]”h"]”h$]”h&]”uh1hôhhàubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÞhŸh³h KhhÛubah}”(h]”h ]”h"]”h$]”h&]”uh1hÙhh¶hžhhŸh³h NubhÊ)”}”(hX(This device emulates the XICS (eXternal Interrupt Controller Specification) defined in PAPR. The XICS has a set of interrupt sources, each identified by a 20-bit source number, and a set of Interrupt Control Presentation (ICP) entities, also called "servers", each associated with a virtual CPU.”h]”hX,This device emulates the XICS (eXternal Interrupt Controller Specification) defined in PAPR. The XICS has a set of interrupt sources, each identified by a 20-bit source number, and a set of Interrupt Control Presentation (ICP) entities, also called “serversâ€, each associated with a virtual CPU.”…””}”(hjÙhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khh¶hžhubhÊ)”}”(hXâThe ICP entities are created by enabling the KVM_CAP_IRQ_ARCH capability for each vcpu, specifying KVM_CAP_IRQ_XICS in args[0] and the interrupt server number (i.e. the vcpu number from the XICS's point of view) in args[1] of the kvm_enable_cap struct. Each ICP has 64 bits of state which can be read and written using the KVM_GET_ONE_REG and KVM_SET_ONE_REG ioctls on the vcpu. The 64 bit state word has the following bitfields, starting at the least-significant end of the word:”h]”hXäThe ICP entities are created by enabling the KVM_CAP_IRQ_ARCH capability for each vcpu, specifying KVM_CAP_IRQ_XICS in args[0] and the interrupt server number (i.e. the vcpu number from the XICS’s point of view) in args[1] of the kvm_enable_cap struct. Each ICP has 64 bits of state which can be read and written using the KVM_GET_ONE_REG and KVM_SET_ONE_REG ioctls on the vcpu. The 64 bit state word has the following bitfields, starting at the least-significant end of the word:”…””}”(hjçhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K$hh¶hžhubhŒ bullet_list”“”)”}”(hhh]”(hÿ)”}”(hŒUnused, 16 bits ”h]”hÊ)”}”(hŒUnused, 16 bits”h]”hŒUnused, 16 bits”…””}”(hjþhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K-hjúubah}”(h]”h ]”h"]”h$]”h&]”uh1hþhj÷hžhhŸh³h Nubhÿ)”}”(hŒdPending interrupt priority, 8 bits Zero is the highest priority, 255 means no interrupt is pending. ”h]”hÊ)”}”(hŒcPending interrupt priority, 8 bits Zero is the highest priority, 255 means no interrupt is pending.”h]”hŒcPending interrupt priority, 8 bits Zero is the highest priority, 255 means no interrupt is pending.”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K/hjubah}”(h]”h ]”h"]”h$]”h&]”uh1hþhj÷hžhhŸh³h Nubhÿ)”}”(hŒtPending IPI (inter-processor interrupt) priority, 8 bits Zero is the highest priority, 255 means no IPI is pending. ”h]”hÊ)”}”(hŒsPending IPI (inter-processor interrupt) priority, 8 bits Zero is the highest priority, 255 means no IPI is pending.”h]”hŒsPending IPI (inter-processor interrupt) priority, 8 bits Zero is the highest priority, 255 means no IPI is pending.”…””}”(hj.hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K2hj*ubah}”(h]”h ]”h"]”h$]”h&]”uh1hþhj÷hžhhŸh³h Nubhÿ)”}”(hŒdPending interrupt source number, 24 bits Zero means no interrupt pending, 2 means an IPI is pending ”h]”hÊ)”}”(hŒcPending interrupt source number, 24 bits Zero means no interrupt pending, 2 means an IPI is pending”h]”hŒcPending interrupt source number, 24 bits Zero means no interrupt pending, 2 means an IPI is pending”…””}”(hjFhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K5hjBubah}”(h]”h ]”h"]”h$]”h&]”uh1hþhj÷hžhhŸh³h Nubhÿ)”}”(hŒ‰Current processor priority, 8 bits Zero is the highest priority, meaning no interrupts can be delivered, and 255 is the lowest priority. ”h]”hÊ)”}”(hŒˆCurrent processor priority, 8 bits Zero is the highest priority, meaning no interrupts can be delivered, and 255 is the lowest priority.”h]”hŒˆCurrent processor priority, 8 bits Zero is the highest priority, meaning no interrupts can be delivered, and 255 is the lowest priority.”…””}”(hj^hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K8hjZubah}”(h]”h ]”h"]”h$]”h&]”uh1hþhj÷hžhhŸh³h Nubeh}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ*”uh1jõhŸh³h K-hh¶hžhubhÊ)”}”(hXZEach source has 64 bits of state that can be read and written using the KVM_GET_DEVICE_ATTR and KVM_SET_DEVICE_ATTR ioctls, specifying the KVM_DEV_XICS_GRP_SOURCES attribute group, with the attribute number being the interrupt source number. The 64 bit state word has the following bitfields, starting from the least-significant end of the word:”h]”hXZEach source has 64 bits of state that can be read and written using the KVM_GET_DEVICE_ATTR and KVM_SET_DEVICE_ATTR ioctls, specifying the KVM_DEV_XICS_GRP_SOURCES attribute group, with the attribute number being the interrupt source number. The 64 bit state word has the following bitfields, starting from the least-significant end of the word:”…””}”(hjzhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K