€•Ò-Œsphinx.addnodes”Œdocument”“”)”}”(Œ rawsource”Œ”Œchildren”]”(Œ translations”Œ LanguagesNode”“”)”}”(hhh]”(hŒ pending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ refdomain”Œstd”Œreftype”Œdoc”Œ reftarget”Œ./translations/zh_CN/virt/kvm/arm/vcpu-features”Œmodname”NŒ classname”NŒ refexplicit”ˆuŒtagname”hhh ubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ./translations/zh_TW/virt/kvm/arm/vcpu-features”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ./translations/it_IT/virt/kvm/arm/vcpu-features”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ./translations/ja_JP/virt/kvm/arm/vcpu-features”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ./translations/ko_KR/virt/kvm/arm/vcpu-features”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒSpanish”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ./translations/sp_SP/virt/kvm/arm/vcpu-features”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h hhŒ _document”hŒsource”NŒline”NubhŒcomment”“”)”}”(hŒ SPDX-License-Identifier: GPL-2.0”h]”hŒ SPDX-License-Identifier: GPL-2.0”…””}”hh£sbah}”(h]”h ]”h"]”h$]”h&]”Œ xml:space”Œpreserve”uh1h¡hhhžhhŸŒH/var/lib/git/docbuild/linux/Documentation/virt/kvm/arm/vcpu-features.rst”h KubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒvCPU feature selection on arm64”h]”hŒvCPU feature selection on arm64”…””}”(hh»hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hh¶hžhhŸh³h KubhŒ paragraph”“”)”}”(hŒlKVM/arm64 provides two mechanisms that allow userspace to configure the CPU features presented to the guest.”h]”hŒlKVM/arm64 provides two mechanisms that allow userspace to configure the CPU features presented to the guest.”…””}”(hhËhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khh¶hžhubhµ)”}”(hhh]”(hº)”}”(hŒKVM_ARM_VCPU_INIT”h]”hŒKVM_ARM_VCPU_INIT”…””}”(hhÜhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hhÙhžhhŸh³h K ubhÊ)”}”(hXThe ``KVM_ARM_VCPU_INIT`` ioctl accepts a bitmap of feature flags (``struct kvm_vcpu_init::features``). Features enabled by this interface are *opt-in* and may change/extend UAPI. See :ref:`KVM_ARM_VCPU_INIT` for complete documentation of the features controlled by the ioctl.”h]”(hŒThe ”…””}”(hhêhžhhŸNh NubhŒliteral”“”)”}”(hŒ``KVM_ARM_VCPU_INIT``”h]”hŒKVM_ARM_VCPU_INIT”…””}”(hhôhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hòhhêubhŒ* ioctl accepts a bitmap of feature flags (”…””}”(hhêhžhhŸNh Nubhó)”}”(hŒ"``struct kvm_vcpu_init::features``”h]”hŒstruct kvm_vcpu_init::features”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hòhhêubhŒ*). Features enabled by this interface are ”…””}”(hhêhžhhŸNh NubhŒemphasis”“”)”}”(hŒ*opt-in*”h]”hŒopt-in”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jhhêubhŒ! and may change/extend UAPI. See ”…””}”(hhêhžhhŸNh Nubh)”}”(hŒ:ref:`KVM_ARM_VCPU_INIT`”h]”hŒinline”“”)”}”(hj.h]”hŒKVM_ARM_VCPU_INIT”…””}”(hj2hžhhŸNh Nubah}”(h]”h ]”(Œxref”Œstd”Œstd-ref”eh"]”h$]”h&]”uh1j0hj,ubah}”(h]”h ]”h"]”h$]”h&]”Œrefdoc”Œvirt/kvm/arm/vcpu-features”Œ refdomain”j=Œreftype”Œref”Œ refexplicit”‰Œrefwarn”ˆŒ reftarget”Œkvm_arm_vcpu_init”uh1hhŸh³h K hhêubhŒD for complete documentation of the features controlled by the ioctl.”…””}”(hhêhžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K hhÙhžhubhÊ)”}”(hŒ[Otherwise, all CPU features supported by KVM are described by the architected ID registers.”h]”hŒ[Otherwise, all CPU features supported by KVM are described by the architected ID registers.”…””}”(hj[hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KhhÙhžhubeh}”(h]”Œkvm-arm-vcpu-init”ah ]”h"]”Œkvm_arm_vcpu_init”ah$]”h&]”uh1h´hh¶hžhhŸh³h K ubhµ)”}”(hhh]”(hº)”}”(hŒThe ID Registers”h]”hŒThe ID Registers”…””}”(hjthžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hjqhžhhŸh³h KubhÊ)”}”(hXaThe Arm architecture specifies a range of *ID Registers* that describe the set of architectural features supported by the CPU implementation. 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The ID registers are mutable until the VM has started, i.e. userspace has called ``KVM_RUN`` on at least one vCPU in the VM. Userspace can discover what fields are mutable in the ID registers using the ``KVM_ARM_GET_REG_WRITABLE_MASKS``. See the :ref:`ioctl documentation ` for more details.”h]”(hŒKVM allows userspace to ”…””}”(hj¢hžhhŸNh Nubj)”}”(hŒ *opt-out*”h]”hŒopt-out”…””}”(hjªhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jhj¢ubhŒY of certain CPU features described by the ID registers by writing values to them via the ”…””}”(hj¢hžhhŸNh Nubhó)”}”(hŒ``KVM_SET_ONE_REG``”h]”hŒKVM_SET_ONE_REG”…””}”(hj¼hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hòhj¢ubhŒY ioctl. The ID registers are mutable until the VM has started, i.e. userspace has called ”…””}”(hj¢hžhhŸNh Nubhó)”}”(hŒ ``KVM_RUN``”h]”hŒKVM_RUN”…””}”(hjÎhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hòhj¢ubhŒn on at least one vCPU in the VM. Userspace can discover what fields are mutable in the ID registers using the ”…””}”(hj¢hžhhŸNh Nubhó)”}”(hŒ"``KVM_ARM_GET_REG_WRITABLE_MASKS``”h]”hŒKVM_ARM_GET_REG_WRITABLE_MASKS”…””}”(hjàhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hòhj¢ubhŒ . See the ”…””}”(hj¢hžhhŸNh Nubh)”}”(hŒ;:ref:`ioctl documentation `”h]”j1)”}”(hjôh]”hŒioctl documentation”…””}”(hjöhžhhŸNh Nubah}”(h]”h ]”(j<Œstd”Œstd-ref”eh"]”h$]”h&]”uh1j0hjòubah}”(h]”h ]”h"]”h$]”h&]”Œrefdoc”jIŒ refdomain”jŒreftype”Œref”Œ refexplicit”ˆŒrefwarn”ˆjOŒkvm_arm_get_reg_writable_masks”uh1hhŸh³h Khj¢ubhŒ for more details.”…””}”(hj¢hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KhjqhžhubhÊ)”}”(hX Userspace is allowed to *limit* or *mask* CPU features according to the rules outlined by the architecture in DDI0487J.a D19.1.3 'Principles of the ID scheme for fields in ID register'. KVM does not allow ID register values that exceed the capabilities of the system.”h]”(hŒUserspace is allowed to ”…””}”(hjhžhhŸNh Nubj)”}”(hŒ*limit*”h]”hŒlimit”…””}”(hj$hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jhjubhŒ or ”…””}”(hjhžhhŸNh Nubj)”}”(hŒ*mask*”h]”hŒmask”…””}”(hj6hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jhjubhŒæ CPU features according to the rules outlined by the architecture in DDI0487J.a D19.1.3 ‘Principles of the ID scheme for fields in ID register’. KVM does not allow ID register values that exceed the capabilities of the system.”…””}”(hjhžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K&hjqhžhubhŒwarning”“”)”}”(hX6It is **strongly recommended** that userspace modify the ID register values before accessing the rest of the vCPU's CPU register state. KVM may use the ID register values to control feature emulation. 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