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It doesn't cover the interaction of the kernel with the hypervisor when running as a guest (under Xen, KVM or any other hypervisor), or any hypervisor-specific interaction when the kernel is used as a host.”h]”hX\This file documents the interaction between the Linux kernel and the hypervisor layer when running Linux as a hypervisor (for example KVM). It doesn’t cover the interaction of the kernel with the hypervisor when running as a guest (under Xen, KVM or any other hypervisor), or any hypervisor-specific interaction when the kernel is used as a host.”…””}”(hhËhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khh¶hžhubhÊ)”}”(hŒÓNote: KVM/arm has been removed from the kernel. The API described here is still valid though, as it allows the kernel to kexec when booted at HYP. It can also be used by a hypervisor other than KVM if necessary.”h]”hŒÓNote: KVM/arm has been removed from the kernel. The API described here is still valid though, as it allows the kernel to kexec when booted at HYP. It can also be used by a hypervisor other than KVM if necessary.”…””}”(hhÙhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khh¶hžhubhÊ)”}”(hŒ³On arm and arm64 (without VHE), the kernel doesn't run in hypervisor mode, but still needs to interact with it, allowing a built-in hypervisor to be either installed or torn down.”h]”hŒµOn arm and arm64 (without VHE), the kernel doesn’t run in hypervisor mode, but still needs to interact with it, allowing a built-in hypervisor to be either installed or torn down.”…””}”(hhçhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khh¶hžhubhÊ)”}”(hŒïIn order to achieve this, the kernel must be booted at HYP (arm) or EL2 (arm64), allowing it to install a set of stubs before dropping to SVC/EL1. These stubs are accessible by using a 'hvc #0' instruction, and only act on individual CPUs.”h]”hŒóIn order to achieve this, the kernel must be booted at HYP (arm) or EL2 (arm64), allowing it to install a set of stubs before dropping to SVC/EL1. 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Only implemented by the initial stubs, not by Linux hypervisors. ”h]”(hŒ literal_block”“”)”}”(hŒ'r0/x0 = HVC_SET_VECTORS r1/x1 = vectors”h]”hŒ'r0/x0 = HVC_SET_VECTORS r1/x1 = vectors”…””}”hjsbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1jhŸh³h K!hjubhÊ)”}”(hŒÚSet HVBAR/VBAR_EL2 to 'vectors' to enable a hypervisor. 'vectors' must be a physical address, and respect the alignment requirements of the architecture. Only implemented by the initial stubs, not by Linux hypervisors.”h]”hŒâSet HVBAR/VBAR_EL2 to ‘vectors’ to enable a hypervisor. ‘vectors’ must be a physical address, and respect the alignment requirements of the architecture. Only implemented by the initial stubs, not by Linux hypervisors.”…””}”(hj,hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K$hjubeh}”(h]”h ]”h"]”h$]”h&]”uh1jhjhžhhŸh³h Nubj)”}”(hŒ±:: r0/x0 = HVC_RESET_VECTORS Turn HYP/EL2 MMU off, and reset HVBAR/VBAR_EL2 to the initials stubs' exception vector value. This effectively disables an existing hypervisor. ”h]”(j)”}”(hŒr0/x0 = HVC_RESET_VECTORS”h]”hŒr0/x0 = HVC_RESET_VECTORS”…””}”hjDsbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1jhŸh³h K+hj@ubhÊ)”}”(hŒTurn HYP/EL2 MMU off, and reset HVBAR/VBAR_EL2 to the initials stubs' exception vector value. This effectively disables an existing hypervisor.”h]”hŒ‘Turn HYP/EL2 MMU off, and reset HVBAR/VBAR_EL2 to the initials stubs’ exception vector value. This effectively disables an existing hypervisor.”…””}”(hjRhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K-hj@ubeh}”(h]”h ]”h"]”h$]”h&]”uh1jhjhžhhŸh³h Nubj)”}”(hX±:: r0/x0 = HVC_SOFT_RESTART r1/x1 = restart address x2 = x0's value when entering the next payload (arm64) x3 = x1's value when entering the next payload (arm64) x4 = x2's value when entering the next payload (arm64) Mask all exceptions, disable the MMU, clear I+D bits, move the arguments into place (arm64 only), and jump to the restart address while at HYP/EL2. This hypercall is not expected to return to its caller. ”h]”(j)”}”(hŒÕr0/x0 = HVC_SOFT_RESTART r1/x1 = restart address x2 = x0's value when entering the next payload (arm64) x3 = x1's value when entering the next payload (arm64) x4 = x2's value when entering the next payload (arm64)”h]”hŒÕr0/x0 = HVC_SOFT_RESTART r1/x1 = restart address x2 = x0's value when entering the next payload (arm64) x3 = x1's value when entering the next payload (arm64) x4 = x2's value when entering the next payload (arm64)”…””}”hjjsbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1jhŸh³h K3hjfubhÊ)”}”(hŒËMask all exceptions, disable the MMU, clear I+D bits, move the arguments into place (arm64 only), and jump to the restart address while at HYP/EL2. This hypercall is not expected to return to its caller.”h]”hŒËMask all exceptions, disable the MMU, clear I+D bits, move the arguments into place (arm64 only), and jump to the restart address while at HYP/EL2. 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This is conditioned by the CPU supporting VHE, the EL2 MMU being off, and VHE not being disabled by any other means (command line option, for example).”h]”hX>Finish configuring EL2 depending on the command-line options, including an attempt to upgrade the kernel’s exception level from EL1 to EL2 by enabling the VHE mode. This is conditioned by the CPU supporting VHE, the EL2 MMU being off, and VHE not being disabled by any other means (command line option, for example).”…””}”(hjžhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KAhjŒubeh}”(h]”h ]”h"]”h$]”h&]”uh1jhjhžhhŸh³h Nubeh}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ*”uh1jhŸh³h Khh¶hžhubhÊ)”}”(hŒ_Any other value of r0/x0 triggers a hypervisor-specific handling, which is not documented here.”h]”hŒ_Any other value of r0/x0 triggers a hypervisor-specific handling, which is not documented here.”…””}”(hjºhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KGhh¶hžhubhÊ)”}”(hXThe return value of a stub hypercall is held by r0/x0, and is 0 on success, and HVC_STUB_ERR on error. A stub hypercall is allowed to clobber any of the caller-saved registers (x0-x18 on arm64, r0-r3 and ip on arm). It is thus recommended to use a function call to perform the hypercall.”h]”hXThe return value of a stub hypercall is held by r0/x0, and is 0 on success, and HVC_STUB_ERR on error. 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