€•&      Œsphinx.addnodes”Œdocument”“”)”}”(Œ	rawsource”Œ ”Œchildren”]”(Œtranslations”ŒLanguagesNode”“”)”}”(hhh]”(h Œpending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ
attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ	refdomain”Œstd”Œreftype”Œdoc”Œ	reftarget”Œ2/translations/zh_CN/userspace-api/perf_ring_buffer”Œmodname”NŒ	classname”NŒrefexplicit”ˆuŒtagname”hhhubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ2/translations/zh_TW/userspace-api/perf_ring_buffer”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ2/translations/it_IT/userspace-api/perf_ring_buffer”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ2/translations/ja_JP/userspace-api/perf_ring_buffer”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ2/translations/ko_KR/userspace-api/perf_ring_buffer”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒPortuguese (Brazilian)”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ2/translations/pt_BR/userspace-api/perf_ring_buffer”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒSpanish”…””}”hh–sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ2/translations/sp_SP/userspace-api/perf_ring_buffer”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h
hhŒ	_document”hŒsource”NŒline”NubhŒcomment”“”)”}”(hŒ SPDX-License-Identifier: GPL-2.0”h]”hŒ SPDX-License-Identifier: GPL-2.0”…””}”hh·sbah}”(h]”h ]”h"]”h$]”h&]”Œ	xml:space”Œpreserve”uh1hµhhh²hh³ŒL/var/lib/git/docbuild/linux/Documentation/userspace-api/perf_ring_buffer.rst”h´KubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒPerf ring buffer”h]”hŒPerf ring buffer”…””}”(hhÏh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhhÊh²hh³hÇh´Kubh¶)”}”(hX@  CONTENTS

1. Introduction

2. Ring buffer implementation
2.1  Basic algorithm
2.2  Ring buffer for different tracing modes
2.2.1       Default mode
2.2.2       Per-thread mode
2.2.3       Per-CPU mode
2.2.4       System wide mode
2.3  Accessing buffer
2.3.1       Producer-consumer model
2.3.2       Properties of the ring buffers
2.3.3       Writing samples into buffer
2.3.4       Reading samples from buffer
2.3.5       Memory synchronization

3. The mechanism of AUX ring buffer
3.1  The relationship between AUX and regular ring buffers
3.2  AUX events
3.3  Snapshot mode”h]”hX@  CONTENTS

1. Introduction

2. Ring buffer implementation
2.1  Basic algorithm
2.2  Ring buffer for different tracing modes
2.2.1       Default mode
2.2.2       Per-thread mode
2.2.3       Per-CPU mode
2.2.4       System wide mode
2.3  Accessing buffer
2.3.1       Producer-consumer model
2.3.2       Properties of the ring buffers
2.3.3       Writing samples into buffer
2.3.4       Reading samples from buffer
2.3.5       Memory synchronization

3. The mechanism of AUX ring buffer
3.1  The relationship between AUX and regular ring buffers
3.2  AUX events
3.3  Snapshot mode”…””}”hhÝsbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1hµhhÊh²hh³hÇh´KubhÉ)”}”(hhh]”(hÎ)”}”(hŒ1. Introduction”h]”hŒ1. Introduction”…””}”(hhîh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhhëh²hh³hÇh´K ubhŒ	paragraph”“”)”}”(hX'  The ring buffer is a fundamental mechanism for data transfer.  perf uses
ring buffers to transfer event data from kernel to user space, another
kind of ring buffer which is so called auxiliary (AUX) ring buffer also
plays an important role for hardware tracing with Intel PT, Arm
CoreSight, etc.”h]”hX'  The ring buffer is a fundamental mechanism for data transfer.  perf uses
ring buffers to transfer event data from kernel to user space, another
kind of ring buffer which is so called auxiliary (AUX) ring buffer also
plays an important role for hardware tracing with Intel PT, Arm
CoreSight, etc.”…””}”(hhþh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´K"hhëh²hubhý)”}”(hX„  The ring buffer implementation is critical but it's also a very
challenging work.  On the one hand, the kernel and perf tool in the user
space use the ring buffer to exchange data and stores data into data
file, thus the ring buffer needs to transfer data with high throughput;
on the other hand, the ring buffer management should avoid significant
overload to distract profiling results.”h]”hX†  The ring buffer implementation is critical but itâ€™s also a very
challenging work.  On the one hand, the kernel and perf tool in the user
space use the ring buffer to exchange data and stores data into data
file, thus the ring buffer needs to transfer data with high throughput;
on the other hand, the ring buffer management should avoid significant
overload to distract profiling results.”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´K(hhëh²hubhý)”}”(hŒÅThis documentation dives into the details for perf ring buffer with two
parts: firstly it explains the perf ring buffer implementation, then the
second part discusses the AUX ring buffer mechanism.”h]”hŒÅThis documentation dives into the details for perf ring buffer with two
parts: firstly it explains the perf ring buffer implementation, then the
second part discusses the AUX ring buffer mechanism.”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´K/hhëh²hubeh}”(h]”Œintroduction”ah ]”h"]”Œ1. introduction”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´K ubhÉ)”}”(hhh]”(hÎ)”}”(hŒ2. Ring buffer implementation”h]”hŒ2. Ring buffer implementation”…””}”(hj3  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhj0  h²hh³hÇh´K4ubhÉ)”}”(hhh]”(hÎ)”}”(hŒ2.1 Basic algorithm”h]”hŒ2.1 Basic algorithm”…””}”(hjD  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjA  h²hh³hÇh´K7ubhý)”}”(hŒ·That said, a typical ring buffer is managed by a head pointer and a tail
pointer; the head pointer is manipulated by a writer and the tail
pointer is updated by a reader respectively.”h]”hŒ·That said, a typical ring buffer is managed by a head pointer and a tail
pointer; the head pointer is manipulated by a writer and the tail
pointer is updated by a reader respectively.”…””}”(hjR  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´K9hjA  h²hubhŒliteral_block”“”)”}”(hŒ¼+---------------------------+
|   |   |***|***|***|   |   |
+---------------------------+
        `-> Tail    `-> Head

* : the data is filled by the writer.

        Figure 1. Ring buffer”h]”hŒ¼+---------------------------+
|   |   |***|***|***|   |   |
+---------------------------+
        `-> Tail    `-> Head

* : the data is filled by the writer.

        Figure 1. Ring buffer”…””}”hjb  sbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1j`  h³hÇh´K?hjA  h²hubhý)”}”(hX¢  Perf uses the same way to manage its ring buffer.  In the implementation
there are two key data structures held together in a set of consecutive
pages, the control structure and then the ring buffer itself.  The page
with the control structure in is known as the "user page".  Being held
in continuous virtual addresses simplifies locating the ring buffer
address, it is in the pages after the page with the user page.”h]”hX¦  Perf uses the same way to manage its ring buffer.  In the implementation
there are two key data structures held together in a set of consecutive
pages, the control structure and then the ring buffer itself.  The page
with the control structure in is known as the â€œuser pageâ€.  Being held
in continuous virtual addresses simplifies locating the ring buffer
address, it is in the pages after the page with the user page.”…””}”(hjp  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´KHhjA  h²hubhý)”}”(hXX  The control structure is named as ``perf_event_mmap_page``, it contains a
head pointer ``data_head`` and a tail pointer ``data_tail``.  When the
kernel starts to fill records into the ring buffer, it updates the head
pointer to reserve the memory so later it can safely store events into
the buffer.  On the other side, when the user page is a writable mapping,
the perf tool has the permission to update the tail pointer after consuming
data from the ring buffer.  Yet another case is for the user page's
read-only mapping, which is to be addressed in the section
:ref:`writing_samples_into_buffer`.”h]”(hŒ"The control structure is named as ”…””}”(hj~  h²hh³Nh´NubhŒliteral”“”)”}”(hŒ``perf_event_mmap_page``”h]”hŒperf_event_mmap_page”…””}”(hjˆ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj~  ubhŒ, it contains a
head pointer ”…””}”(hj~  h²hh³Nh´Nubj‡  )”}”(hŒ``data_head``”h]”hŒ	data_head”…””}”(hjš  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj~  ubhŒ and a tail pointer ”…””}”(hj~  h²hh³Nh´Nubj‡  )”}”(hŒ``data_tail``”h]”hŒ	data_tail”…””}”(hj¬  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj~  ubhX²  .  When the
kernel starts to fill records into the ring buffer, it updates the head
pointer to reserve the memory so later it can safely store events into
the buffer.  On the other side, when the user page is a writable mapping,
the perf tool has the permission to update the tail pointer after consuming
data from the ring buffer.  Yet another case is for the user pageâ€™s
read-only mapping, which is to be addressed in the section
”…””}”(hj~  h²hh³Nh´Nubh)”}”(hŒ":ref:`writing_samples_into_buffer`”h]”hŒinline”“”)”}”(hjÀ  h]”hŒwriting_samples_into_buffer”…””}”(hjÄ  h²hh³Nh´Nubah}”(h]”h ]”(Œxref”Œstd”Œstd-ref”eh"]”h$]”h&]”uh1jÂ  hj¾  ubah}”(h]”h ]”h"]”h$]”h&]”Œrefdoc”Œuserspace-api/perf_ring_buffer”Œ	refdomain”jÏ  Œreftype”Œref”Œrefexplicit”‰Œrefwarn”ˆŒ	reftarget”Œwriting_samples_into_buffer”uh1hh³hÇh´KOhj~  ubhŒ.”…””}”(hj~  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´KOhjA  h²hubja  )”}”(hX¿        user page                          ring buffer
+---------+---------+   +---------------------------------------+
|data_head|data_tail|...|   |   |***|***|***|***|***|   |   |   |
+---------+---------+   +---------------------------------------+
    `          `----------------^                   ^
     `----------------------------------------------|

          * : the data is filled by the writer.

            Figure 2. Perf ring buffer”h]”hX¿        user page                          ring buffer
+---------+---------+   +---------------------------------------+
|data_head|data_tail|...|   |   |***|***|***|***|***|   |   |   |
+---------+---------+   +---------------------------------------+
    `          `----------------^                   ^
     `----------------------------------------------|

          * : the data is filled by the writer.

            Figure 2. Perf ring buffer”…””}”hjí  sbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1j`  h³hÇh´K[hjA  h²hubhý)”}”(hX°  When using the ``perf record`` tool, we can specify the ring buffer size
with option ``-m`` or ``--mmap-pages=``, the given size will be rounded up
to a power of two that is a multiple of a page size.  Though the kernel
allocates at once for all memory pages, it's deferred to map the pages
to VMA area until the perf tool accesses the buffer from the user space.
In other words, at the first time accesses the buffer's page from user
space in the perf tool, a data abort exception for page fault is taken
and the kernel uses this occasion to map the page into process VMA
(see ``perf_mmap_fault()``), thus the perf tool can continue to access
the page after returning from the exception.”h]”(hŒWhen using the ”…””}”(hjû  h²hh³Nh´Nubj‡  )”}”(hŒ``perf record``”h]”hŒperf record”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjû  ubhŒ7 tool, we can specify the ring buffer size
with option ”…””}”(hjû  h²hh³Nh´Nubj‡  )”}”(hŒ``-m``”h]”hŒ-m”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjû  ubhŒ or ”…””}”(hjû  h²hh³Nh´Nubj‡  )”}”(hŒ``--mmap-pages=``”h]”hŒ--mmap-pages=”…””}”(hj'  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjû  ubhXÖ  , the given size will be rounded up
to a power of two that is a multiple of a page size.  Though the kernel
allocates at once for all memory pages, itâ€™s deferred to map the pages
to VMA area until the perf tool accesses the buffer from the user space.
In other words, at the first time accesses the bufferâ€™s page from user
space in the perf tool, a data abort exception for page fault is taken
and the kernel uses this occasion to map the page into process VMA
(see ”…””}”(hjû  h²hh³Nh´Nubj‡  )”}”(hŒ``perf_mmap_fault()``”h]”hŒperf_mmap_fault()”…””}”(hj9  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjû  ubhŒY), thus the perf tool can continue to access
the page after returning from the exception.”…””}”(hjû  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´KfhjA  h²hubeh}”(h]”Œbasic-algorithm”ah ]”h"]”Œ2.1 basic algorithm”ah$]”h&]”uh1hÈhj0  h²hh³hÇh´K7ubhÉ)”}”(hhh]”(hÎ)”}”(hŒ+2.2 Ring buffer for different tracing modes”h]”hŒ+2.2 Ring buffer for different tracing modes”…””}”(hj\  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjY  h²hh³hÇh´Krubhý)”}”(hX  The perf profiles programs with different modes: default mode, per thread
mode, per cpu mode, and system wide mode.  This section describes these
modes and how the ring buffer meets requirements for them.  At last we
will review the race conditions caused by these modes.”h]”hX  The perf profiles programs with different modes: default mode, per thread
mode, per cpu mode, and system wide mode.  This section describes these
modes and how the ring buffer meets requirements for them.  At last we
will review the race conditions caused by these modes.”…””}”(hjj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´KthjY  h²hubhÉ)”}”(hhh]”(hÎ)”}”(hŒ2.2.1 Default mode”h]”hŒ2.2.1 Default mode”…””}”(hj{  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjx  h²hh³hÇh´Kzubhý)”}”(hŒeUsually we execute ``perf record`` command followed by a profiling program
name, like below command::”h]”(hŒUsually we execute ”…””}”(hj‰  h²hh³Nh´Nubj‡  )”}”(hŒ``perf record``”h]”hŒperf record”…””}”(hj‘  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj‰  ubhŒB command followed by a profiling program
name, like below command:”…””}”(hj‰  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´K|hjx  h²hubja  )”}”(hŒperf record test_program”h]”hŒperf record test_program”…””}”hj©  sbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1j`  h³hÇh´Khjx  h²hubhý)”}”(hXX  This command doesn't specify any options for CPU and thread modes, the
perf tool applies the default mode on the perf event.  It maps all the
CPUs in the system and the profiled program's PID on the perf event, and
it enables inheritance mode on the event so that child tasks inherits
the events.  As a result, the perf event is attributed as::”h]”hX[  This command doesnâ€™t specify any options for CPU and thread modes, the
perf tool applies the default mode on the perf event.  It maps all the
CPUs in the system and the profiled programâ€™s PID on the perf event, and
it enables inheritance mode on the event so that child tasks inherits
the events.  As a result, the perf event is attributed as:”…””}”(hj·  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´Khjx  h²hubja  )”}”(hŒqevsel::cpus::map[]    = { 0 .. _SC_NPROCESSORS_ONLN-1 }
evsel::threads::map[] = { pid }
evsel::attr::inherit  = 1”h]”hŒqevsel::cpus::map[]    = { 0 .. _SC_NPROCESSORS_ONLN-1 }
evsel::threads::map[] = { pid }
evsel::attr::inherit  = 1”…””}”hjÅ  sbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1j`  h³hÇh´K‡hjx  h²hubhý)”}”(hX  These attributions finally will be reflected on the deployment of ring
buffers.  As shown below, the perf tool allocates individual ring buffer
for each CPU, but it only enables events for the profiled program rather
than for all threads in the system.  The *T1* thread represents the
thread context of the 'test_program', whereas *T2* and *T3* are irrelevant
threads in the system.   The perf samples are exclusively collected for
the *T1* thread and stored in the ring buffer associated with the CPU on
which the *T1* thread is running.”h]”(hX  These attributions finally will be reflected on the deployment of ring
buffers.  As shown below, the perf tool allocates individual ring buffer
for each CPU, but it only enables events for the profiled program rather
than for all threads in the system.  The ”…””}”(hjÓ  h²hh³Nh´NubhŒemphasis”“”)”}”(hŒ*T1*”h]”hŒT1”…””}”(hjÝ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÛ  hjÓ  ubhŒI thread represents the
thread context of the â€˜test_programâ€™, whereas ”…””}”(hjÓ  h²hh³Nh´NubjÜ  )”}”(hŒ*T2*”h]”hŒT2”…””}”(hjï  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÛ  hjÓ  ubhŒ and ”…””}”(hjÓ  h²hh³Nh´NubjÜ  )”}”(hŒ*T3*”h]”hŒT3”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÛ  hjÓ  ubhŒ\ are irrelevant
threads in the system.   The perf samples are exclusively collected for
the ”…””}”(hjÓ  h²hh³Nh´NubjÜ  )”}”(hŒ*T1*”h]”hŒT1”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÛ  hjÓ  ubhŒK thread and stored in the ring buffer associated with the CPU on
which the ”…””}”(hjÓ  h²hh³Nh´NubjÜ  )”}”(hŒ*T1*”h]”hŒT1”…””}”(hj%  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÛ  hjÓ  ubhŒ thread is running.”…””}”(hjÓ  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´K‹hjx  h²hubja  )”}”(hX¨            T1                      T2                 T1
        +----+              +-----------+          +----+
CPU0    |xxxx|              |xxxxxxxxxxx|          |xxxx|
        +----+--------------+-----------+----------+----+-------->
          |                                          |
          v                                          v
        +-----------------------------------------------------+
        |                  Ring buffer 0                      |
        +-----------------------------------------------------+

               T1
             +-----+
CPU1         |xxxxx|
        -----+-----+--------------------------------------------->
                |
                v
        +-----------------------------------------------------+
        |                  Ring buffer 1                      |
        +-----------------------------------------------------+

                                    T1              T3
                                  +----+        +-------+
CPU2                              |xxxx|        |xxxxxxx|
        --------------------------+----+--------+-------+-------->
                                    |
                                    v
        +-----------------------------------------------------+
        |                  Ring buffer 2                      |
        +-----------------------------------------------------+

                          T1
                   +--------------+
CPU3               |xxxxxxxxxxxxxx|
        -----------+--------------+------------------------------>
                          |
                          v
        +-----------------------------------------------------+
        |                  Ring buffer 3                      |
        +-----------------------------------------------------+

        T1: Thread 1; T2: Thread 2; T3: Thread 3
        x: Thread is in running state

            Figure 3. Ring buffer for default mode”h]”hX¨            T1                      T2                 T1
        +----+              +-----------+          +----+
CPU0    |xxxx|              |xxxxxxxxxxx|          |xxxx|
        +----+--------------+-----------+----------+----+-------->
          |                                          |
          v                                          v
        +-----------------------------------------------------+
        |                  Ring buffer 0                      |
        +-----------------------------------------------------+

               T1
             +-----+
CPU1         |xxxxx|
        -----+-----+--------------------------------------------->
                |
                v
        +-----------------------------------------------------+
        |                  Ring buffer 1                      |
        +-----------------------------------------------------+

                                    T1              T3
                                  +----+        +-------+
CPU2                              |xxxx|        |xxxxxxx|
        --------------------------+----+--------+-------+-------->
                                    |
                                    v
        +-----------------------------------------------------+
        |                  Ring buffer 2                      |
        +-----------------------------------------------------+

                          T1
                   +--------------+
CPU3               |xxxxxxxxxxxxxx|
        -----------+--------------+------------------------------>
                          |
                          v
        +-----------------------------------------------------+
        |                  Ring buffer 3                      |
        +-----------------------------------------------------+

        T1: Thread 1; T2: Thread 2; T3: Thread 3
        x: Thread is in running state

            Figure 3. Ring buffer for default mode”…””}”hj=  sbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1j`  h³hÇh´K–hjx  h²hubeh}”(h]”Œdefault-mode”ah ]”h"]”Œ2.2.1 default mode”ah$]”h&]”uh1hÈhjY  h²hh³hÇh´KzubhÉ)”}”(hhh]”(hÎ)”}”(hŒ2.2.2 Per-thread mode”h]”hŒ2.2.2 Per-thread mode”…””}”(hjV  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjS  h²hh³hÇh´KÄubhý)”}”(hŒ;By specifying option ``--per-thread`` in perf command, e.g.”h]”(hŒBy specifying option ”…””}”(hjd  h²hh³Nh´Nubj‡  )”}”(hŒ``--per-thread``”h]”hŒ--per-thread”…””}”(hjl  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjd  ubhŒ in perf command, e.g.”…””}”(hjd  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´KÆhjS  h²hubja  )”}”(hŒ%perf record --per-thread test_program”h]”hŒ%perf record --per-thread test_program”…””}”hj„  sbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1j`  h³hÇh´KÊhjS  h²hubhý)”}”(hŒ{The perf event doesn't map to any CPUs and is only bound to the
profiled process, thus, the perf event's attributions are::”h]”hŒ~The perf event doesnâ€™t map to any CPUs and is only bound to the
profiled process, thus, the perf eventâ€™s attributions are:”…””}”(hj’  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´KÌhjS  h²hubja  )”}”(hŒXevsel::cpus::map[0]   = { -1 }
evsel::threads::map[] = { pid }
evsel::attr::inherit  = 0”h]”hŒXevsel::cpus::map[0]   = { -1 }
evsel::threads::map[] = { pid }
evsel::attr::inherit  = 0”…””}”hj   sbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1j`  h³hÇh´KÏhjS  h²hubhý)”}”(hXƒ  In this mode, a single ring buffer is allocated for the profiled thread;
if the thread is scheduled on a CPU, the events on that CPU will be
enabled; and if the thread is scheduled out from the CPU, the events on
the CPU will be disabled.  When the thread is migrated from one CPU to
another, the events are to be disabled on the previous CPU and enabled
on the next CPU correspondingly.”h]”hXƒ  In this mode, a single ring buffer is allocated for the profiled thread;
if the thread is scheduled on a CPU, the events on that CPU will be
enabled; and if the thread is scheduled out from the CPU, the events on
the CPU will be disabled.  When the thread is migrated from one CPU to
another, the events are to be disabled on the previous CPU and enabled
on the next CPU correspondingly.”…””}”(hj®  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´KÓhjS  h²hubja  )”}”(hXú            T1                      T2                 T1
        +----+              +-----------+          +----+
CPU0    |xxxx|              |xxxxxxxxxxx|          |xxxx|
        +----+--------------+-----------+----------+----+-------->
          |                                           |
          |    T1                                     |
          |  +-----+                                  |
CPU1      |  |xxxxx|                                  |
        --|--+-----+----------------------------------|---------->
          |     |                                     |
          |     |                   T1            T3  |
          |     |                 +----+        +---+ |
CPU2      |     |                 |xxxx|        |xxx| |
        --|-----|-----------------+----+--------+---+-|---------->
          |     |                   |                 |
          |     |         T1        |                 |
          |     |  +--------------+ |                 |
CPU3      |     |  |xxxxxxxxxxxxxx| |                 |
        --|-----|--+--------------+-|-----------------|---------->
          |     |         |         |                 |
          v     v         v         v                 v
        +-----------------------------------------------------+
        |                  Ring buffer                        |
        +-----------------------------------------------------+

        T1: Thread 1
        x: Thread is in running state

            Figure 4. Ring buffer for per-thread mode”h]”hXú            T1                      T2                 T1
        +----+              +-----------+          +----+
CPU0    |xxxx|              |xxxxxxxxxxx|          |xxxx|
        +----+--------------+-----------+----------+----+-------->
          |                                           |
          |    T1                                     |
          |  +-----+                                  |
CPU1      |  |xxxxx|                                  |
        --|--+-----+----------------------------------|---------->
          |     |                                     |
          |     |                   T1            T3  |
          |     |                 +----+        +---+ |
CPU2      |     |                 |xxxx|        |xxx| |
        --|-----|-----------------+----+--------+---+-|---------->
          |     |                   |                 |
          |     |         T1        |                 |
          |     |  +--------------+ |                 |
CPU3      |     |  |xxxxxxxxxxxxxx| |                 |
        --|-----|--+--------------+-|-----------------|---------->
          |     |         |         |                 |
          v     v         v         v                 v
        +-----------------------------------------------------+
        |                  Ring buffer                        |
        +-----------------------------------------------------+

        T1: Thread 1
        x: Thread is in running state

            Figure 4. Ring buffer for per-thread mode”…””}”hj¼  sbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1j`  h³hÇh´KÜhjS  h²hubhý)”}”(hX_  When perf runs in per-thread mode, a ring buffer is allocated for the
profiled thread *T1*.  The ring buffer is dedicated for thread *T1*, if the
thread *T1* is running, the perf events will be recorded into the ring
buffer; when the thread is sleeping, all associated events will be
disabled, thus no trace data will be recorded into the ring buffer.”h]”(hŒVWhen perf runs in per-thread mode, a ring buffer is allocated for the
profiled thread ”…””}”(hjÊ  h²hh³Nh´NubjÜ  )”}”(hŒ*T1*”h]”hŒT1”…””}”(hjÒ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÛ  hjÊ  ubhŒ+.  The ring buffer is dedicated for thread ”…””}”(hjÊ  h²hh³Nh´NubjÜ  )”}”(hŒ*T1*”h]”hŒT1”…””}”(hjä  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÛ  hjÊ  ubhŒ, if the
thread ”…””}”(hjÊ  h²hh³Nh´NubjÜ  )”}”(hŒ*T1*”h]”hŒT1”…””}”(hjö  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÛ  hjÊ  ubhŒÂ is running, the perf events will be recorded into the ring
buffer; when the thread is sleeping, all associated events will be
disabled, thus no trace data will be recorded into the ring buffer.”…””}”(hjÊ  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´KúhjS  h²hubeh}”(h]”Œper-thread-mode”ah ]”h"]”Œ2.2.2 per-thread mode”ah$]”h&]”uh1hÈhjY  h²hh³hÇh´KÄubhÉ)”}”(hhh]”(hÎ)”}”(hŒ2.2.3 Per-CPU mode”h]”hŒ2.2.3 Per-CPU mode”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhj  h²hh³hÇh´Mubhý)”}”(hŒThe option ``-C`` is used to collect samples on the list of CPUs, for
example the below perf command receives option ``-C 0,2``::”h]”(hŒThe option ”…””}”(hj'  h²hh³Nh´Nubj‡  )”}”(hŒ``-C``”h]”hŒ-C”…””}”(hj/  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj'  ubhŒd is used to collect samples on the list of CPUs, for
example the below perf command receives option ”…””}”(hj'  h²hh³Nh´Nubj‡  )”}”(hŒ
``-C 0,2``”h]”hŒ-C 0,2”…””}”(hjA  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj'  ubhŒ:”…””}”(hj'  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´Mhj  h²hubja  )”}”(hŒperf record -C 0,2 test_program”h]”hŒperf record -C 0,2 test_program”…””}”hjY  sbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1j`  h³hÇh´Mhj  h²hubhý)”}”(hŒ‚It maps the perf event to CPUs 0 and 2, and the event is not associated to any
PID.  Thus the perf event attributions are set as::”h]”hŒIt maps the perf event to CPUs 0 and 2, and the event is not associated to any
PID.  Thus the perf event attributions are set as:”…””}”(hjg  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´Mhj  h²hubja  )”}”(hŒYevsel::cpus::map[0]   = { 0, 2 }
evsel::threads::map[] = { -1 }
evsel::attr::inherit  = 0”h]”hŒYevsel::cpus::map[0]   = { 0, 2 }
evsel::threads::map[] = { -1 }
evsel::attr::inherit  = 0”…””}”hju  sbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1j`  h³hÇh´Mhj  h²hubhý)”}”(hX  This results in the session of ``perf record`` will sample all threads on CPU0
and CPU2, and be terminated until test_program exits.  Even there have tasks
running on CPU1 and CPU3, since the ring buffer is absent for them, any
activities on these two CPUs will be ignored.  A usage case is to combine the
options for per-thread mode and per-CPU mode, e.g. the options ``â€“C 0,2`` and
``â€“â€“perâ€“thread`` are specified together, the samples are recorded only when
the profiled thread is scheduled on any of the listed CPUs.”h]”(hŒThis results in the session of ”…””}”(hjƒ  h²hh³Nh´Nubj‡  )”}”(hŒ``perf record``”h]”hŒperf record”…””}”(hj‹  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjƒ  ubhXC   will sample all threads on CPU0
and CPU2, and be terminated until test_program exits.  Even there have tasks
running on CPU1 and CPU3, since the ring buffer is absent for them, any
activities on these two CPUs will be ignored.  A usage case is to combine the
options for per-thread mode and per-CPU mode, e.g. the options ”…””}”(hjƒ  h²hh³Nh´Nubj‡  )”}”(hŒ``â€“C 0,2``”h]”hŒâ€“C 0,2”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjƒ  ubhŒ and
”…””}”(hjƒ  h²hh³Nh´Nubj‡  )”}”(hŒ``â€“â€“perâ€“thread``”h]”hŒâ€“â€“perâ€“thread”…””}”(hj¯  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjƒ  ubhŒw are specified together, the samples are recorded only when
the profiled thread is scheduled on any of the listed CPUs.”…””}”(hjƒ  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´Mhj  h²hubja  )”}”(hXì            T1                      T2                 T1
        +----+              +-----------+          +----+
CPU0    |xxxx|              |xxxxxxxxxxx|          |xxxx|
        +----+--------------+-----------+----------+----+-------->
          |                       |                  |
          v                       v                  v
        +-----------------------------------------------------+
        |                  Ring buffer 0                      |
        +-----------------------------------------------------+

               T1
             +-----+
CPU1         |xxxxx|
        -----+-----+--------------------------------------------->

                                    T1              T3
                                  +----+        +-------+
CPU2                              |xxxx|        |xxxxxxx|
        --------------------------+----+--------+-------+-------->
                                    |               |
                                    v               v
        +-----------------------------------------------------+
        |                  Ring buffer 1                      |
        +-----------------------------------------------------+

                          T1
                   +--------------+
CPU3               |xxxxxxxxxxxxxx|
        -----------+--------------+------------------------------>

        T1: Thread 1; T2: Thread 2; T3: Thread 3
        x: Thread is in running state

            Figure 5. Ring buffer for per-CPU mode”h]”hXì            T1                      T2                 T1
        +----+              +-----------+          +----+
CPU0    |xxxx|              |xxxxxxxxxxx|          |xxxx|
        +----+--------------+-----------+----------+----+-------->
          |                       |                  |
          v                       v                  v
        +-----------------------------------------------------+
        |                  Ring buffer 0                      |
        +-----------------------------------------------------+

               T1
             +-----+
CPU1         |xxxxx|
        -----+-----+--------------------------------------------->

                                    T1              T3
                                  +----+        +-------+
CPU2                              |xxxx|        |xxxxxxx|
        --------------------------+----+--------+-------+-------->
                                    |               |
                                    v               v
        +-----------------------------------------------------+
        |                  Ring buffer 1                      |
        +-----------------------------------------------------+

                          T1
                   +--------------+
CPU3               |xxxxxxxxxxxxxx|
        -----------+--------------+------------------------------>

        T1: Thread 1; T2: Thread 2; T3: Thread 3
        x: Thread is in running state

            Figure 5. Ring buffer for per-CPU mode”…””}”hjÇ  sbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1j`  h³hÇh´Mhj  h²hubeh}”(h]”Œper-cpu-mode”ah ]”h"]”Œ2.2.3 per-cpu mode”ah$]”h&]”uh1hÈhjY  h²hh³hÇh´MubhÉ)”}”(hhh]”(hÎ)”}”(hŒ2.2.4 System wide mode”h]”hŒ2.2.4 System wide mode”…””}”(hjà  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjÝ  h²hh³hÇh´M=ubhý)”}”(hŒ—By using option ``â€“a`` or ``â€“â€“allâ€“cpus``, perf collects samples on all CPUs
for all tasks, we call it as the system wide mode, the command is::”h]”(hŒBy using option ”…””}”(hjî  h²hh³Nh´Nubj‡  )”}”(hŒ``â€“a``”h]”hŒâ€“a”…””}”(hjö  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjî  ubhŒ or ”…””}”(hjî  h²hh³Nh´Nubj‡  )”}”(hŒ``â€“â€“allâ€“cpus``”h]”hŒâ€“â€“allâ€“cpus”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjî  ubhŒf, perf collects samples on all CPUs
for all tasks, we call it as the system wide mode, the command is:”…””}”(hjî  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´M?hjÝ  h²hubja  )”}”(hŒperf record -a test_program”h]”hŒperf record -a test_program”…””}”hj   sbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1j`  h³hÇh´MBhjÝ  h²hubhý)”}”(hŒlSimilar to the per-CPU mode, the perf event doesn't bind to any PID, and
it maps to all CPUs in the system::”h]”hŒmSimilar to the per-CPU mode, the perf event doesnâ€™t bind to any PID, and
it maps to all CPUs in the system:”…””}”(hj.  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´MDhjÝ  h²hubja  )”}”(hŒpevsel::cpus::map[]    = { 0 .. _SC_NPROCESSORS_ONLN-1 }
evsel::threads::map[] = { -1 }
evsel::attr::inherit  = 0”h]”hŒpevsel::cpus::map[]    = { 0 .. _SC_NPROCESSORS_ONLN-1 }
evsel::threads::map[] = { -1 }
evsel::attr::inherit  = 0”…””}”hj<  sbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1j`  h³hÇh´MGhjÝ  h²hubhý)”}”(hŒÓIn the system wide mode, every CPU has its own ring buffer, all threads
are monitored during the running state and the samples are recorded into
the ring buffer belonging to the CPU which the events occurred on.”h]”hŒÓIn the system wide mode, every CPU has its own ring buffer, all threads
are monitored during the running state and the samples are recorded into
the ring buffer belonging to the CPU which the events occurred on.”…””}”(hjJ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´MKhjÝ  h²hubja  )”}”(hXÌ            T1                      T2                 T1
        +----+              +-----------+          +----+
CPU0    |xxxx|              |xxxxxxxxxxx|          |xxxx|
        +----+--------------+-----------+----------+----+-------->
          |                       |                  |
          v                       v                  v
        +-----------------------------------------------------+
        |                  Ring buffer 0                      |
        +-----------------------------------------------------+

               T1
             +-----+
CPU1         |xxxxx|
        -----+-----+--------------------------------------------->
                |
                v
        +-----------------------------------------------------+
        |                  Ring buffer 1                      |
        +-----------------------------------------------------+

                                    T1              T3
                                  +----+        +-------+
CPU2                              |xxxx|        |xxxxxxx|
        --------------------------+----+--------+-------+-------->
                                    |               |
                                    v               v
        +-----------------------------------------------------+
        |                  Ring buffer 2                      |
        +-----------------------------------------------------+

                          T1
                   +--------------+
CPU3               |xxxxxxxxxxxxxx|
        -----------+--------------+------------------------------>
                          |
                          v
        +-----------------------------------------------------+
        |                  Ring buffer 3                      |
        +-----------------------------------------------------+

        T1: Thread 1; T2: Thread 2; T3: Thread 3
        x: Thread is in running state

            Figure 6. Ring buffer for system wide mode”h]”hXÌ            T1                      T2                 T1
        +----+              +-----------+          +----+
CPU0    |xxxx|              |xxxxxxxxxxx|          |xxxx|
        +----+--------------+-----------+----------+----+-------->
          |                       |                  |
          v                       v                  v
        +-----------------------------------------------------+
        |                  Ring buffer 0                      |
        +-----------------------------------------------------+

               T1
             +-----+
CPU1         |xxxxx|
        -----+-----+--------------------------------------------->
                |
                v
        +-----------------------------------------------------+
        |                  Ring buffer 1                      |
        +-----------------------------------------------------+

                                    T1              T3
                                  +----+        +-------+
CPU2                              |xxxx|        |xxxxxxx|
        --------------------------+----+--------+-------+-------->
                                    |               |
                                    v               v
        +-----------------------------------------------------+
        |                  Ring buffer 2                      |
        +-----------------------------------------------------+

                          T1
                   +--------------+
CPU3               |xxxxxxxxxxxxxx|
        -----------+--------------+------------------------------>
                          |
                          v
        +-----------------------------------------------------+
        |                  Ring buffer 3                      |
        +-----------------------------------------------------+

        T1: Thread 1; T2: Thread 2; T3: Thread 3
        x: Thread is in running state

            Figure 6. Ring buffer for system wide mode”…””}”hjX  sbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1j`  h³hÇh´MQhjÝ  h²hubeh}”(h]”Œsystem-wide-mode”ah ]”h"]”Œ2.2.4 system wide mode”ah$]”h&]”uh1hÈhjY  h²hh³hÇh´M=ubeh}”(h]”Œ'ring-buffer-for-different-tracing-modes”ah ]”h"]”Œ+2.2 ring buffer for different tracing modes”ah$]”h&]”uh1hÈhj0  h²hh³hÇh´KrubhÉ)”}”(hhh]”(hÎ)”}”(hŒ2.3 Accessing buffer”h]”hŒ2.3 Accessing buffer”…””}”(hjy  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjv  h²hh³hÇh´Mubhý)”}”(hŒ~Based on the understanding of how the ring buffer is allocated in
various modes, this section explains access the ring buffer.”h]”hŒ~Based on the understanding of how the ring buffer is allocated in
various modes, this section explains access the ring buffer.”…””}”(hj‡  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´Mhjv  h²hubhÉ)”}”(hhh]”(hÎ)”}”(hŒ2.3.1 Producer-consumer model”h]”hŒ2.3.1 Producer-consumer model”…””}”(hj˜  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhj•  h²hh³hÇh´M…ubhý)”}”(hX<  In the Linux kernel, the PMU events can produce samples which are stored
into the ring buffer; the perf command in user space consumes the
samples by reading out data from the ring buffer and finally saves the
data into the file for post analysis.  Itâ€™s a typical producer-consumer
model for using the ring buffer.”h]”hX<  In the Linux kernel, the PMU events can produce samples which are stored
into the ring buffer; the perf command in user space consumes the
samples by reading out data from the ring buffer and finally saves the
data into the file for post analysis.  Itâ€™s a typical producer-consumer
model for using the ring buffer.”…””}”(hj¦  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´M‡hj•  h²hubhý)”}”(hX£  The perf process polls on the PMU events and sleeps when no events are
incoming.  To prevent frequent exchanges between the kernel and user
space, the kernel event core layer introduces a watermark, which is
stored in the ``perf_buffer::watermark``.  When a sample is recorded into
the ring buffer, and if the used buffer exceeds the watermark, the
kernel wakes up the perf process to read samples from the ring buffer.”h]”(hŒÞThe perf process polls on the PMU events and sleeps when no events are
incoming.  To prevent frequent exchanges between the kernel and user
space, the kernel event core layer introduces a watermark, which is
stored in the ”…””}”(hj´  h²hh³Nh´Nubj‡  )”}”(hŒ``perf_buffer::watermark``”h]”hŒperf_buffer::watermark”…””}”(hj¼  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj´  ubhŒ«.  When a sample is recorded into
the ring buffer, and if the used buffer exceeds the watermark, the
kernel wakes up the perf process to read samples from the ring buffer.”…””}”(hj´  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´Mhj•  h²hubja  )”}”(hXÎ                     Perf
                   / | Read samples
         Polling  /  `--------------|               Ring buffer
                 v                  v    ;---------------------v
+----------------+     +---------+---------+   +-------------------+
|Event wait queue|     |data_head|data_tail|   |***|***|   |   |***|
+----------------+     +---------+---------+   +-------------------+
         ^                  ^ `------------------------^
         | Wake up tasks    | Store samples
      +-----------------------------+
      |  Kernel event core layer    |
      +-----------------------------+

          * : the data is filled by the writer.

            Figure 7. Writing and reading the ring buffer”h]”hXÎ                     Perf
                   / | Read samples
         Polling  /  `--------------|               Ring buffer
                 v                  v    ;---------------------v
+----------------+     +---------+---------+   +-------------------+
|Event wait queue|     |data_head|data_tail|   |***|***|   |   |***|
+----------------+     +---------+---------+   +-------------------+
         ^                  ^ `------------------------^
         | Wake up tasks    | Store samples
      +-----------------------------+
      |  Kernel event core layer    |
      +-----------------------------+

          * : the data is filled by the writer.

            Figure 7. Writing and reading the ring buffer”…””}”hjÔ  sbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1j`  h³hÇh´M–hj•  h²hubhý)”}”(hX:  When the kernel event core layer notifies the user space, because
multiple events might share the same ring buffer for recording samples,
the core layer iterates every event associated with the ring buffer and
wakes up tasks waiting on the event.  This is fulfilled by the kernel
function ``ring_buffer_wakeup()``.”h]”(hX!  When the kernel event core layer notifies the user space, because
multiple events might share the same ring buffer for recording samples,
the core layer iterates every event associated with the ring buffer and
wakes up tasks waiting on the event.  This is fulfilled by the kernel
function ”…””}”(hjâ  h²hh³Nh´Nubj‡  )”}”(hŒ``ring_buffer_wakeup()``”h]”hŒring_buffer_wakeup()”…””}”(hjê  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjâ  ubhŒ.”…””}”(hjâ  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´M§hj•  h²hubhý)”}”(hXÑ  After the perf process is woken up, it starts to check the ring buffers
one by one, if it finds any ring buffer containing samples it will read
out the samples for statistics or saving into the data file.  Given the
perf process is able to run on any CPU, this leads to the ring buffer
potentially being accessed from multiple CPUs simultaneously, which
causes race conditions.  The race condition handling is described in the
section :ref:`memory_synchronization`.”h]”(hX³  After the perf process is woken up, it starts to check the ring buffers
one by one, if it finds any ring buffer containing samples it will read
out the samples for statistics or saving into the data file.  Given the
perf process is able to run on any CPU, this leads to the ring buffer
potentially being accessed from multiple CPUs simultaneously, which
causes race conditions.  The race condition handling is described in the
section ”…””}”(hj  h²hh³Nh´Nubh)”}”(hŒ:ref:`memory_synchronization`”h]”jÃ  )”}”(hj  h]”hŒmemory_synchronization”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”(jÎ  Œstd”Œstd-ref”eh"]”h$]”h&]”uh1jÂ  hj
  ubah}”(h]”h ]”h"]”h$]”h&]”Œrefdoc”jÛ  Œ	refdomain”j  Œreftype”Œref”Œrefexplicit”‰Œrefwarn”ˆjá  Œmemory_synchronization”uh1hh³hÇh´M­hj  ubhŒ.”…””}”(hj  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´M­hj•  h²hubeh}”(h]”Œproducer-consumer-model”ah ]”h"]”Œ2.3.1 producer-consumer model”ah$]”h&]”uh1hÈhjv  h²hh³hÇh´M…ubhÉ)”}”(hhh]”(hÎ)”}”(hŒ$2.3.2 Properties of the ring buffers”h]”hŒ$2.3.2 Properties of the ring buffers”…””}”(hj?  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhj<  h²hh³hÇh´M¶ubhý)”}”(hX.  Linux kernel supports two write directions for the ring buffer: forward and
backward.  The forward writing saves samples from the beginning of the ring
buffer, the backward writing stores data from the end of the ring buffer with
the reversed direction.  The perf tool determines the writing direction.”h]”hX.  Linux kernel supports two write directions for the ring buffer: forward and
backward.  The forward writing saves samples from the beginning of the ring
buffer, the backward writing stores data from the end of the ring buffer with
the reversed direction.  The perf tool determines the writing direction.”…””}”(hjM  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´M¸hj<  h²hubhý)”}”(hŒeAdditionally, the tool can map buffers in either read-write mode or read-only
mode to the user space.”h]”hŒeAdditionally, the tool can map buffers in either read-write mode or read-only
mode to the user space.”…””}”(hj[  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´M½hj<  h²hubhý)”}”(hXh  The ring buffer in the read-write mode is mapped with the property
``PROT_READ | PROT_WRITE``.  With the write permission, the perf tool
updates the ``data_tail`` to indicate the data start position.  Combining
with the head pointer ``data_head``, which works as the end position of
the current data, the perf tool can easily know where read out the data
from.”h]”(hŒCThe ring buffer in the read-write mode is mapped with the property
”…””}”(hji  h²hh³Nh´Nubj‡  )”}”(hŒ``PROT_READ | PROT_WRITE``”h]”hŒPROT_READ | PROT_WRITE”…””}”(hjq  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hji  ubhŒ8.  With the write permission, the perf tool
updates the ”…””}”(hji  h²hh³Nh´Nubj‡  )”}”(hŒ``data_tail``”h]”hŒ	data_tail”…””}”(hjƒ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hji  ubhŒG to indicate the data start position.  Combining
with the head pointer ”…””}”(hji  h²hh³Nh´Nubj‡  )”}”(hŒ``data_head``”h]”hŒ	data_head”…””}”(hj•  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hji  ubhŒr, which works as the end position of
the current data, the perf tool can easily know where read out the data
from.”…””}”(hji  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´MÀhj<  h²hubhý)”}”(hŒ·Alternatively, in the read-only mode, only the kernel keeps to update
the ``data_head`` while the user space cannot access the ``data_tail`` due
to the mapping property ``PROT_READ``.”h]”(hŒJAlternatively, in the read-only mode, only the kernel keeps to update
the ”…””}”(hj­  h²hh³Nh´Nubj‡  )”}”(hŒ``data_head``”h]”hŒ	data_head”…””}”(hjµ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj­  ubhŒ( while the user space cannot access the ”…””}”(hj­  h²hh³Nh´Nubj‡  )”}”(hŒ``data_tail``”h]”hŒ	data_tail”…””}”(hjÇ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj­  ubhŒ due
to the mapping property ”…””}”(hj­  h²hh³Nh´Nubj‡  )”}”(hŒ``PROT_READ``”h]”hŒ	PROT_READ”…””}”(hjÙ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj­  ubhŒ.”…””}”(hj­  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´MÇhj<  h²hubhý)”}”(hŒìAs a result, the matrix below illustrates the various combinations of
direction and mapping characteristics.  The perf tool employs two of these
combinations to support buffer types: the non-overwrite buffer and the
overwritable buffer.”h]”hŒìAs a result, the matrix below illustrates the various combinations of
direction and mapping characteristics.  The perf tool employs two of these
combinations to support buffer types: the non-overwrite buffer and the
overwritable buffer.”…””}”(hjñ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´MËhj<  h²hubhŒtable”“”)”}”(hhh]”hŒtgroup”“”)”}”(hhh]”(hŒcolspec”“”)”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”Œcolwidth”Kuh1j	  hj  ubj
  )”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”j  Kuh1j	  hj  ubj
  )”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”j  Kuh1j	  hj  ubhŒthead”“”)”}”(hhh]”hŒrow”“”)”}”(hhh]”(hŒentry”“”)”}”(hhh]”hý)”}”(hŒMapping mode”h]”hŒMapping mode”…””}”(hj6  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´MÔhj3  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j1  hj.  ubj2  )”}”(hhh]”hý)”}”(hŒForward”h]”hŒForward”…””}”(hjM  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´MÕhjJ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j1  hj.  ubj2  )”}”(hhh]”hý)”}”(hŒBackward”h]”hŒBackward”…””}”(hjd  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´MÖhja  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j1  hj.  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j,  hj)  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j'  hj  ubhŒtbody”“”)”}”(hhh]”(j-  )”}”(hhh]”(j2  )”}”(hhh]”hý)”}”(hŒ
read-write”h]”hŒ
read-write”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´M×hjŒ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j1  hj‰  ubj2  )”}”(hhh]”hý)”}”(hŒNon-overwrite ring buffer”h]”hŒNon-overwrite ring buffer”…””}”(hj¦  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´MØhj£  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j1  hj‰  ubj2  )”}”(hhh]”hý)”}”(hŒNot used”h]”hŒNot used”…””}”(hj½  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´MÙhjº  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j1  hj‰  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j,  hj†  ubj-  )”}”(hhh]”(j2  )”}”(hhh]”hý)”}”(hŒ	read-only”h]”hŒ	read-only”…””}”(hjÝ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´MÚhjÚ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j1  hj×  ubj2  )”}”(hhh]”hý)”}”(hŒNot used”h]”hŒNot used”…””}”(hjô  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´MÛhjñ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j1  hj×  ubj2  )”}”(hhh]”hý)”}”(hŒOverwritable ring buffer”h]”hŒOverwritable ring buffer”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´MÜhj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j1  hj×  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j,  hj†  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j„  hj  ubeh}”(h]”h ]”h"]”h$]”h&]”Œcols”Kuh1j  hj  ubah}”(h]”h ]”Œcolwidths-given”ah"]”h$]”h&]”uh1jÿ  hj<  h²hh³Nh´Nubhý)”}”(hXÑ  The non-overwrite ring buffer uses the read-write mapping with forward
writing.  It starts to save data from the beginning of the ring buffer
and wrap around when overflow, which is used with the read-write mode in
the normal ring buffer.  When the consumer doesn't keep up with the
producer, it would lose some data, the kernel keeps how many records it
lost and generates the ``PERF_RECORD_LOST`` records in the next time
when it finds a space in the ring buffer.”h]”(hX|  The non-overwrite ring buffer uses the read-write mapping with forward
writing.  It starts to save data from the beginning of the ring buffer
and wrap around when overflow, which is used with the read-write mode in
the normal ring buffer.  When the consumer doesnâ€™t keep up with the
producer, it would lose some data, the kernel keeps how many records it
lost and generates the ”…””}”(hj9  h²hh³Nh´Nubj‡  )”}”(hŒ``PERF_RECORD_LOST``”h]”hŒPERF_RECORD_LOST”…””}”(hjA  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj9  ubhŒC records in the next time
when it finds a space in the ring buffer.”…””}”(hj9  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´MÞhj<  h²hubhý)”}”(hX|  The overwritable ring buffer uses the backward writing with the
read-only mode.  It saves the data from the end of the ring buffer and
the ``data_head`` keeps the position of current data, the perf always
knows where it starts to read and until the end of the ring buffer, thus
it don't need the ``data_tail``.  In this mode, it will not generate the
``PERF_RECORD_LOST`` records.”h]”(hŒ‹The overwritable ring buffer uses the backward writing with the
read-only mode.  It saves the data from the end of the ring buffer and
the ”…””}”(hjY  h²hh³Nh´Nubj‡  )”}”(hŒ``data_head``”h]”hŒ	data_head”…””}”(hja  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjY  ubhŒ’ keeps the position of current data, the perf always
knows where it starts to read and until the end of the ring buffer, thus
it donâ€™t need the ”…””}”(hjY  h²hh³Nh´Nubj‡  )”}”(hŒ``data_tail``”h]”hŒ	data_tail”…””}”(hjs  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjY  ubhŒ*.  In this mode, it will not generate the
”…””}”(hjY  h²hh³Nh´Nubj‡  )”}”(hŒ``PERF_RECORD_LOST``”h]”hŒPERF_RECORD_LOST”…””}”(hj…  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjY  ubhŒ	 records.”…””}”(hjY  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´Mæhj<  h²hubhŒtarget”“”)”}”(hŒ .. _writing_samples_into_buffer:”h]”h}”(h]”h ]”h"]”h$]”h&]”Œrefid”Œwriting-samples-into-buffer”uh1j  h´Míhj<  h²hh³hÇubeh}”(h]”Œproperties-of-the-ring-buffers”ah ]”h"]”Œ$2.3.2 properties of the ring buffers”ah$]”h&]”uh1hÈhjv  h²hh³hÇh´M¶ubhÉ)”}”(hhh]”(hÎ)”}”(hŒ!2.3.3 Writing samples into buffer”h]”hŒ!2.3.3 Writing samples into buffer”…””}”(hj¶  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhj³  h²hh³hÇh´Mðubhý)”}”(hXv  When a sample is taken and saved into the ring buffer, the kernel
prepares sample fields based on the sample type; then it prepares the
info for writing ring buffer which is stored in the structure
``perf_output_handle``.  In the end, the kernel outputs the sample into
the ring buffer and updates the head pointer in the user page so the
perf tool can see the latest value.”h]”(hŒÆWhen a sample is taken and saved into the ring buffer, the kernel
prepares sample fields based on the sample type; then it prepares the
info for writing ring buffer which is stored in the structure
”…””}”(hjÄ  h²hh³Nh´Nubj‡  )”}”(hŒ``perf_output_handle``”h]”hŒperf_output_handle”…””}”(hjÌ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjÄ  ubhŒš.  In the end, the kernel outputs the sample into
the ring buffer and updates the head pointer in the user page so the
perf tool can see the latest value.”…””}”(hjÄ  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´Mòhj³  h²hubhý)”}”(hX  The structure ``perf_output_handle`` serves as a temporary context for
tracking the information related to the buffer.  The advantages of it is
that it enables concurrent writing to the buffer by different events.
For example, a software event and a hardware PMU event both are enabled
for profiling, two instances of ``perf_output_handle`` serve as separate
contexts for the software event and the hardware event respectively.
This allows each event to reserve its own memory space for populating
the record data.”h]”(hŒThe structure ”…””}”(hjä  h²hh³Nh´Nubj‡  )”}”(hŒ``perf_output_handle``”h]”hŒperf_output_handle”…””}”(hjì  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjä  ubhX   serves as a temporary context for
tracking the information related to the buffer.  The advantages of it is
that it enables concurrent writing to the buffer by different events.
For example, a software event and a hardware PMU event both are enabled
for profiling, two instances of ”…””}”(hjä  h²hh³Nh´Nubj‡  )”}”(hŒ``perf_output_handle``”h]”hŒperf_output_handle”…””}”(hjþ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjä  ubhŒ® serve as separate
contexts for the software event and the hardware event respectively.
This allows each event to reserve its own memory space for populating
the record data.”…””}”(hjä  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´Mùhj³  h²hubeh}”(h]”(jª  Œid1”eh ]”h"]”(Œ!2.3.3 writing samples into buffer”Œwriting_samples_into_buffer”eh$]”h&]”uh1hÈhjv  h²hh³hÇh´MðŒexpect_referenced_by_name”}”j	  jŸ  sŒexpect_referenced_by_id”}”jª  jŸ  subhÉ)”}”(hhh]”(hÎ)”}”(hŒ!2.3.4 Reading samples from buffer”h]”hŒ!2.3.4 Reading samples from buffer”…””}”(hj&	  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhj#	  h²hh³hÇh´Mubhý)”}”(hX  In the user space, the perf tool utilizes the ``perf_event_mmap_page``
structure to handle the head and tail of the buffer.  It also uses
``perf_mmap`` structure to keep track of a context for the ring buffer, this
context includes information about the buffer's starting and ending
addresses.  Additionally, the mask value can be utilized to compute the
circular buffer pointer even for an overflow.”h]”(hŒ.In the user space, the perf tool utilizes the ”…””}”(hj4	  h²hh³Nh´Nubj‡  )”}”(hŒ``perf_event_mmap_page``”h]”hŒperf_event_mmap_page”…””}”(hj<	  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj4	  ubhŒD
structure to handle the head and tail of the buffer.  It also uses
”…””}”(hj4	  h²hh³Nh´Nubj‡  )”}”(hŒ``perf_mmap``”h]”hŒ	perf_mmap”…””}”(hjN	  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj4	  ubhŒû structure to keep track of a context for the ring buffer, this
context includes information about the bufferâ€™s starting and ending
addresses.  Additionally, the mask value can be utilized to compute the
circular buffer pointer even for an overflow.”…””}”(hj4	  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´Mhj#	  h²hubhý)”}”(hŒ¾Similar to the kernel, the perf tool in the user space first reads out
the recorded data from the ring buffer, and then updates the buffer's
tail pointer ``perf_event_mmap_page::data_tail``.”h]”(hŒœSimilar to the kernel, the perf tool in the user space first reads out
the recorded data from the ring buffer, and then updates the bufferâ€™s
tail pointer ”…””}”(hjf	  h²hh³Nh´Nubj‡  )”}”(hŒ#``perf_event_mmap_page::data_tail``”h]”hŒperf_event_mmap_page::data_tail”…””}”(hjn	  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjf	  ubhŒ.”…””}”(hjf	  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´Mhj#	  h²hubjž  )”}”(hŒ.. _memory_synchronization:”h]”h}”(h]”h ]”h"]”h$]”h&]”j©  Œmemory-synchronization”uh1j  h´Mhj#	  h²hh³hÇubeh}”(h]”Œreading-samples-from-buffer”ah ]”h"]”Œ!2.3.4 reading samples from buffer”ah$]”h&]”uh1hÈhjv  h²hh³hÇh´MubhÉ)”}”(hhh]”(hÎ)”}”(hŒ2.3.5 Memory synchronization”h]”hŒ2.3.5 Memory synchronization”…””}”(hjœ	  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhj™	  h²hh³hÇh´Mubhý)”}”(hXw  The modern CPUs with relaxed memory model cannot promise the memory
ordering, this means itâ€™s possible to access the ring buffer and the
``perf_event_mmap_page`` structure out of order.  To assure the specific
sequence for memory accessing perf ring buffer, memory barriers are
used to assure the data dependency.  The rationale for the memory
synchronization is as below::”h]”(hŒ‹The modern CPUs with relaxed memory model cannot promise the memory
ordering, this means itâ€™s possible to access the ring buffer and the
”…””}”(hjª	  h²hh³Nh´Nubj‡  )”}”(hŒ``perf_event_mmap_page``”h]”hŒperf_event_mmap_page”…””}”(hj²	  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjª	  ubhŒÓ structure out of order.  To assure the specific
sequence for memory accessing perf ring buffer, memory barriers are
used to assure the data dependency.  The rationale for the memory
synchronization is as below:”…””}”(hjª	  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´Mhj™	  h²hubja  )”}”(hX%  Kernel                          User space

if (LOAD ->data_tail) {         LOAD ->data_head
                 (A)            smp_rmb()        (C)
  STORE $data                   LOAD $data
  smp_wmb()      (B)            smp_mb()         (D)
  STORE ->data_head             STORE ->data_tail
}”h]”hX%  Kernel                          User space

if (LOAD ->data_tail) {         LOAD ->data_head
                 (A)            smp_rmb()        (C)
  STORE $data                   LOAD $data
  smp_wmb()      (B)            smp_mb()         (D)
  STORE ->data_head             STORE ->data_tail
}”…””}”hjÊ	  sbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1j`  h³hÇh´Mhj™	  h²hubhý)”}”(hŒ¦The comments in tools/include/linux/ring_buffer.h gives nice description
for why and how to use memory barriers, here we will just provide an
alternative explanation:”h]”hŒ¦The comments in tools/include/linux/ring_buffer.h gives nice description
for why and how to use memory barriers, here we will just provide an
alternative explanation:”…””}”(hjØ	  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´M%hj™	  h²hubhý)”}”(hŒ—(A) is a control dependency so that CPU assures order between checking
pointer ``perf_event_mmap_page::data_tail`` and filling sample into ring
buffer;”h]”(hŒO(A) is a control dependency so that CPU assures order between checking
pointer ”…””}”(hjæ	  h²hh³Nh´Nubj‡  )”}”(hŒ#``perf_event_mmap_page::data_tail``”h]”hŒperf_event_mmap_page::data_tail”…””}”(hjî	  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjæ	  ubhŒ% and filling sample into ring
buffer;”…””}”(hjæ	  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´M)hj™	  h²hubhý)”}”(hX+  (D) pairs with (A).  (D) separates the ring buffer data reading from
writing the pointer ``data_tail``, perf tool first consumes samples and then
tells the kernel that the data chunk has been released.  Since a reading
operation is followed by a writing operation, thus (D) is a full memory
barrier.”h]”(hŒY(D) pairs with (A).  (D) separates the ring buffer data reading from
writing the pointer ”…””}”(hj
  h²hh³Nh´Nubj‡  )”}”(hŒ``data_tail``”h]”hŒ	data_tail”…””}”(hj
  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj
  ubhŒÅ, perf tool first consumes samples and then
tells the kernel that the data chunk has been released.  Since a reading
operation is followed by a writing operation, thus (D) is a full memory
barrier.”…””•¢      }”(hj
  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´M-hj™	  h²hubhý)”}”(hŒ–(B) is a writing barrier in the middle of two writing operations, which
makes sure that recording a sample must be prior to updating the head
pointer.”h]”hŒ–(B) is a writing barrier in the middle of two writing operations, which
makes sure that recording a sample must be prior to updating the head
pointer.”…””}”(hj&
  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´M3hj™	  h²hubhý)”}”(hŒo(C) pairs with (B).  (C) is a read memory barrier to ensure the head
pointer is fetched before reading samples.”h]”hŒo(C) pairs with (B).  (C) is a read memory barrier to ensure the head
pointer is fetched before reading samples.”…””}”(hj4
  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´M7hj™	  h²hubhý)”}”(hX  To implement the above algorithm, the ``perf_output_put_handle()`` function
in the kernel and two helpers ``ring_buffer_read_head()`` and
``ring_buffer_write_tail()`` in the user space are introduced, they rely
on memory barriers as described above to ensure the data dependency.”h]”(hŒ&To implement the above algorithm, the ”…””}”(hjB
  h²hh³Nh´Nubj‡  )”}”(hŒ``perf_output_put_handle()``”h]”hŒperf_output_put_handle()”…””}”(hjJ
  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjB
  ubhŒ( function
in the kernel and two helpers ”…””}”(hjB
  h²hh³Nh´Nubj‡  )”}”(hŒ``ring_buffer_read_head()``”h]”hŒring_buffer_read_head()”…””}”(hj\
  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjB
  ubhŒ and
”…””}”(hjB
  h²hh³Nh´Nubj‡  )”}”(hŒ``ring_buffer_write_tail()``”h]”hŒring_buffer_write_tail()”…””}”(hjn
  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjB
  ubhŒq in the user space are introduced, they rely
on memory barriers as described above to ensure the data dependency.”…””}”(hjB
  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´M:hj™	  h²hubhý)”}”(hX  Some architectures support one-way permeable barrier with load-acquire
and store-release operations, these barriers are more relaxed with less
performance penalty, so (C) and (D) can be optimized to use barriers
``smp_load_acquire()`` and ``smp_store_release()`` respectively.”h]”(hŒÔSome architectures support one-way permeable barrier with load-acquire
and store-release operations, these barriers are more relaxed with less
performance penalty, so (C) and (D) can be optimized to use barriers
”…””}”(hj†
  h²hh³Nh´Nubj‡  )”}”(hŒ``smp_load_acquire()``”h]”hŒsmp_load_acquire()”…””}”(hjŽ
  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj†
  ubhŒ and ”…””}”(hj†
  h²hh³Nh´Nubj‡  )”}”(hŒ``smp_store_release()``”h]”hŒsmp_store_release()”…””}”(hj 
  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj†
  ubhŒ respectively.”…””}”(hj†
  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´M?hj™	  h²hubhý)”}”(hX  If an architecture doesnâ€™t support load-acquire and store-release in its
memory model, it will roll back to the old fashion of memory barrier
operations.  In this case, ``smp_load_acquire()`` encapsulates
``READ_ONCE()`` + ``smp_mb()``, since ``smp_mb()`` is costly,
``ring_buffer_read_head()`` doesn't invoke ``smp_load_acquire()`` and it uses
the barriers ``READ_ONCE()`` + ``smp_rmb()`` instead.”h]”(hŒ«If an architecture doesnâ€™t support load-acquire and store-release in its
memory model, it will roll back to the old fashion of memory barrier
operations.  In this case, ”…””}”(hj¸
  h²hh³Nh´Nubj‡  )”}”(hŒ``smp_load_acquire()``”h]”hŒsmp_load_acquire()”…””}”(hjÀ
  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj¸
  ubhŒ encapsulates
”…””}”(hj¸
  h²hh³Nh´Nubj‡  )”}”(hŒ``READ_ONCE()``”h]”hŒREAD_ONCE()”…””}”(hjÒ
  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj¸
  ubhŒ + ”…””}”(hj¸
  h²hh³Nh´Nubj‡  )”}”(hŒ``smp_mb()``”h]”hŒsmp_mb()”…””}”(hjä
  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj¸
  ubhŒ, since ”…””}”(hj¸
  h²hh³Nh´Nubj‡  )”}”(hŒ``smp_mb()``”h]”hŒsmp_mb()”…””}”(hjö
  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj¸
  ubhŒ is costly,
”…””}”(hj¸
  h²hh³Nh´Nubj‡  )”}”(hŒ``ring_buffer_read_head()``”h]”hŒring_buffer_read_head()”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj¸
  ubhŒ doesnâ€™t invoke ”…””}”(hj¸
  h²hh³Nh´Nubj‡  )”}”(hŒ``smp_load_acquire()``”h]”hŒsmp_load_acquire()”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj¸
  ubhŒ and it uses
the barriers ”…””}”(hj¸
  h²hh³Nh´Nubj‡  )”}”(hŒ``READ_ONCE()``”h]”hŒREAD_ONCE()”…””}”(hj,  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj¸
  ubhŒ + ”…””}”hj¸
  sbj‡  )”}”(hŒ``smp_rmb()``”h]”hŒ	smp_rmb()”…””}”(hj>  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj¸
  ubhŒ	 instead.”…””}”(hj¸
  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´MDhj™	  h²hubeh}”(h]”(j	  Œid2”eh ]”h"]”(Œ2.3.5 memory synchronization”Œmemory_synchronization”eh$]”h&]”uh1hÈhjv  h²hh³hÇh´Mj	  }”j\  j†	  sj!	  }”j	  j†	  subeh}”(h]”Œaccessing-buffer”ah ]”h"]”Œ2.3 accessing buffer”ah$]”h&]”uh1hÈhj0  h²hh³hÇh´Mubeh}”(h]”Œring-buffer-implementation”ah ]”h"]”Œ2. ring buffer implementation”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´K4ubhÉ)”}”(hhh]”(hÎ)”}”(hŒ#3. The mechanism of AUX ring buffer”h]”hŒ#3. The mechanism of AUX ring buffer”…””}”(hjt  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjq  h²hh³hÇh´MLubhý)”}”(hXx  In this chapter, we will explain the implementation of the AUX ring
buffer.  In the first part it will discuss the connection between the
AUX ring buffer and the regular ring buffer, then the second part will
examine how the AUX ring buffer co-works with the regular ring buffer,
as well as the additional features introduced by the AUX ring buffer for
the sampling mechanism.”h]”hXx  In this chapter, we will explain the implementation of the AUX ring
buffer.  In the first part it will discuss the connection between the
AUX ring buffer and the regular ring buffer, then the second part will
examine how the AUX ring buffer co-works with the regular ring buffer,
as well as the additional features introduced by the AUX ring buffer for
the sampling mechanism.”…””}”(hj‚  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´MNhjq  h²hubhÉ)”}”(hhh]”(hÎ)”}”(hŒ93.1 The relationship between AUX and regular ring buffers”h]”hŒ93.1 The relationship between AUX and regular ring buffers”…””}”(hj“  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhj  h²hh³hÇh´MVubhý)”}”(hXS  Generally, the AUX ring buffer is an auxiliary for the regular ring
buffer.  The regular ring buffer is primarily used to store the event
samples and every event format complies with the definition in the
union ``perf_event``; the AUX ring buffer is for recording the hardware
trace data and the trace data format is hardware IP dependent.”h]”(hŒÓGenerally, the AUX ring buffer is an auxiliary for the regular ring
buffer.  The regular ring buffer is primarily used to store the event
samples and every event format complies with the definition in the
union ”…””}”(hj¡  h²hh³Nh´Nubj‡  )”}”(hŒ``perf_event``”h]”hŒ
perf_event”…””}”(hj©  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj¡  ubhŒr; the AUX ring buffer is for recording the hardware
trace data and the trace data format is hardware IP dependent.”…””}”(hj¡  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´MXhj  h²hubhý)”}”(hXá  The general use and advantage of the AUX ring buffer is that it is
written directly by hardware rather than by the kernel.  For example,
regular profile samples that write to the regular ring buffer cause an
interrupt.  Tracing execution requires a high number of samples and
using interrupts would be overwhelming for the regular ring buffer
mechanism.  Having an AUX buffer allows for a region of memory more
decoupled from the kernel and written to directly by hardware tracing.”h]”hXá  The general use and advantage of the AUX ring buffer is that it is
written directly by hardware rather than by the kernel.  For example,
regular profile samples that write to the regular ring buffer cause an
interrupt.  Tracing execution requires a high number of samples and
using interrupts would be overwhelming for the regular ring buffer
mechanism.  Having an AUX buffer allows for a region of memory more
decoupled from the kernel and written to directly by hardware tracing.”…””}”(hjÁ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´M^hj  h²hubhý)”}”(hX  The AUX ring buffer reuses the same algorithm with the regular ring
buffer for the buffer management.  The control structure
``perf_event_mmap_page`` extends the new fields ``aux_head`` and ``aux_tail``
for the head and tail pointers of the AUX ring buffer.”h]”(hŒ}The AUX ring buffer reuses the same algorithm with the regular ring
buffer for the buffer management.  The control structure
”…””}”(hjÏ  h²hh³Nh´Nubj‡  )”}”(hŒ``perf_event_mmap_page``”h]”hŒperf_event_mmap_page”…””}”(hj×  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjÏ  ubhŒ extends the new fields ”…””}”(hjÏ  h²hh³Nh´Nubj‡  )”}”(hŒ``aux_head``”h]”hŒaux_head”…””}”(hjé  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjÏ  ubhŒ and ”…””}”(hjÏ  h²hh³Nh´Nubj‡  )”}”(hŒ``aux_tail``”h]”hŒaux_tail”…””}”(hjû  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjÏ  ubhŒ7
for the head and tail pointers of the AUX ring buffer.”…””}”(hjÏ  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´Mfhj  h²hubhý)”}”(hX¢  During the initialisation phase, besides the mmap()-ed regular ring
buffer, the perf tool invokes a second syscall in the
``auxtrace_mmap__mmap()`` function for the mmap of the AUX buffer with
non-zero file offset; ``rb_alloc_aux()`` in the kernel allocates pages
correspondingly, these pages will be deferred to map into VMA when
handling the page fault, which is the same lazy mechanism with the
regular ring buffer.”h]”(hŒzDuring the initialisation phase, besides the mmap()-ed regular ring
buffer, the perf tool invokes a second syscall in the
”…””}”(hj  h²hh³Nh´Nubj‡  )”}”(hŒ``auxtrace_mmap__mmap()``”h]”hŒauxtrace_mmap__mmap()”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj  ubhŒD function for the mmap of the AUX buffer with
non-zero file offset; ”…””}”(hj  h²hh³Nh´Nubj‡  )”}”(hŒ``rb_alloc_aux()``”h]”hŒrb_alloc_aux()”…””}”(hj-  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj  ubhŒ¹ in the kernel allocates pages
correspondingly, these pages will be deferred to map into VMA when
handling the page fault, which is the same lazy mechanism with the
regular ring buffer.”…””}”(hj  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´Mkhj  h²hubhý)”}”(hŒOAUX events and AUX trace data are two different things.  Let's see an
example::”h]”hŒPAUX events and AUX trace data are two different things.  Letâ€™s see an
example:”…””}”(hjE  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´Mshj  h²hubja  )”}”(hŒ/perf record -a -e cycles -e cs_etm// -- sleep 2”h]”hŒ/perf record -a -e cycles -e cs_etm// -- sleep 2”…””}”hjS  sbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1j`  h³hÇh´Mvhj  h²hubhý)”}”(hŒõThe above command enables two events: one is the event *cycles* from PMU
and another is the AUX event *cs_etm* from Arm CoreSight, both are saved
into the regular ring buffer while the CoreSight's AUX trace data is
stored in the AUX ring buffer.”h]”(hŒ7The above command enables two events: one is the event ”…””}”(hja  h²hh³Nh´NubjÜ  )”}”(hŒ*cycles*”h]”hŒcycles”…””}”(hji  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÛ  hja  ubhŒ' from PMU
and another is the AUX event ”…””}”(hja  h²hh³Nh´NubjÜ  )”}”(hŒ*cs_etm*”h]”hŒcs_etm”…””}”(hj{  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÛ  hja  ubhŒ‰ from Arm CoreSight, both are saved
into the regular ring buffer while the CoreSightâ€™s AUX trace data is
stored in the AUX ring buffer.”…””}”(hja  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´Mxhj  h²hubhý)”}”(hXf  As a result, we can see the regular ring buffer and the AUX ring buffer
are allocated in pairs.  The perf in default mode allocates the regular
ring buffer and the AUX ring buffer per CPU-wise, which is the same as
the system wide mode, however, the default mode records samples only for
the profiled program, whereas the latter mode profiles for all programs
in the system.  For per-thread mode, the perf tool allocates only one
regular ring buffer and one AUX ring buffer for the whole session.  For
the per-CPU mode, the perf allocates two kinds of ring buffers for
selected CPUs specified by the option ``-C``.”h]”(hX_  As a result, we can see the regular ring buffer and the AUX ring buffer
are allocated in pairs.  The perf in default mode allocates the regular
ring buffer and the AUX ring buffer per CPU-wise, which is the same as
the system wide mode, however, the default mode records samples only for
the profiled program, whereas the latter mode profiles for all programs
in the system.  For per-thread mode, the perf tool allocates only one
regular ring buffer and one AUX ring buffer for the whole session.  For
the per-CPU mode, the perf allocates two kinds of ring buffers for
selected CPUs specified by the option ”…””}”(hj“  h²hh³Nh´Nubj‡  )”}”(hŒ``-C``”h]”hŒ-C”…””}”(hj›  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj“  ubhŒ.”…””}”(hj“  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´M}hj  h²hubhý)”}”(hŒÝThe below figure demonstrates the buffers' layout in the system wide
mode; if there are any activities on one CPU, the AUX event samples and
the hardware trace data will be recorded into the dedicated buffers for
the CPU.”h]”hŒßThe below figure demonstrates the buffersâ€™ layout in the system wide
mode; if there are any activities on one CPU, the AUX event samples and
the hardware trace data will be recorded into the dedicated buffers for
the CPU.”…””}”(hj³  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´M‡hj  h²hubja  )”}”(hX            T1                      T2                 T1
        +----+              +-----------+          +----+
CPU0    |xxxx|              |xxxxxxxxxxx|          |xxxx|
        +----+--------------+-----------+----------+----+-------->
          |                       |                  |
          v                       v                  v
        +-----------------------------------------------------+
        |                  Ring buffer 0                      |
        +-----------------------------------------------------+
          |                       |                  |
          v                       v                  v
        +-----------------------------------------------------+
        |               AUX Ring buffer 0                     |
        +-----------------------------------------------------+

               T1
             +-----+
CPU1         |xxxxx|
        -----+-----+--------------------------------------------->
                |
                v
        +-----------------------------------------------------+
        |                  Ring buffer 1                      |
        +-----------------------------------------------------+
                |
                v
        +-----------------------------------------------------+
        |               AUX Ring buffer 1                     |
        +-----------------------------------------------------+

                                    T1              T3
                                  +----+        +-------+
CPU2                              |xxxx|        |xxxxxxx|
        --------------------------+----+--------+-------+-------->
                                    |               |
                                    v               v
        +-----------------------------------------------------+
        |                  Ring buffer 2                      |
        +-----------------------------------------------------+
                                    |               |
                                    v               v
        +-----------------------------------------------------+
        |               AUX Ring buffer 2                     |
        +-----------------------------------------------------+

                          T1
                   +--------------+
CPU3               |xxxxxxxxxxxxxx|
        -----------+--------------+------------------------------>
                          |
                          v
        +-----------------------------------------------------+
        |                  Ring buffer 3                      |
        +-----------------------------------------------------+
                          |
                          v
        +-----------------------------------------------------+
        |               AUX Ring buffer 3                     |
        +-----------------------------------------------------+

        T1: Thread 1; T2: Thread 2; T3: Thread 3
        x: Thread is in running state

            Figure 8. AUX ring buffer for system wide mode”h]”hX            T1                      T2                 T1
        +----+              +-----------+          +----+
CPU0    |xxxx|              |xxxxxxxxxxx|          |xxxx|
        +----+--------------+-----------+----------+----+-------->
          |                       |                  |
          v                       v                  v
        +-----------------------------------------------------+
        |                  Ring buffer 0                      |
        +-----------------------------------------------------+
          |                       |                  |
          v                       v                  v
        +-----------------------------------------------------+
        |               AUX Ring buffer 0                     |
        +-----------------------------------------------------+

               T1
             +-----+
CPU1         |xxxxx|
        -----+-----+--------------------------------------------->
                |
                v
        +-----------------------------------------------------+
        |                  Ring buffer 1                      |
        +-----------------------------------------------------+
                |
                v
        +-----------------------------------------------------+
        |               AUX Ring buffer 1                     |
        +-----------------------------------------------------+

                                    T1              T3
                                  +----+        +-------+
CPU2                              |xxxx|        |xxxxxxx|
        --------------------------+----+--------+-------+-------->
                                    |               |
                                    v               v
        +-----------------------------------------------------+
        |                  Ring buffer 2                      |
        +-----------------------------------------------------+
                                    |               |
                                    v               v
        +-----------------------------------------------------+
        |               AUX Ring buffer 2                     |
        +-----------------------------------------------------+

                          T1
                   +--------------+
CPU3               |xxxxxxxxxxxxxx|
        -----------+--------------+------------------------------>
                          |
                          v
        +-----------------------------------------------------+
        |                  Ring buffer 3                      |
        +-----------------------------------------------------+
                          |
                          v
        +-----------------------------------------------------+
        |               AUX Ring buffer 3                     |
        +-----------------------------------------------------+

        T1: Thread 1; T2: Thread 2; T3: Thread 3
        x: Thread is in running state

            Figure 8. AUX ring buffer for system wide mode”…””}”hjÁ  sbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1j`  h³hÇh´MŽhj  h²hubeh}”(h]”Œ5the-relationship-between-aux-and-regular-ring-buffers”ah ]”h"]”Œ93.1 the relationship between aux and regular ring buffers”ah$]”h&]”uh1hÈhjq  h²hh³hÇh´MVubhÉ)”}”(hhh]”(hÎ)”}”(hŒ3.2 AUX events”h]”hŒ3.2 AUX events”…””}”(hjÚ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhj×  h²hh³hÇh´MÐubhý)”}”(hŒãSimilar to ``perf_output_begin()`` and ``perf_output_end()``'s working for the
regular ring buffer, ``perf_aux_output_begin()`` and ``perf_aux_output_end()``
serve for the AUX ring buffer for processing the hardware trace data.”h]”(hŒSimilar to ”…””}”(hjè  h²hh³Nh´Nubj‡  )”}”(hŒ``perf_output_begin()``”h]”hŒperf_output_begin()”…””}”(hjð  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjè  ubhŒ and ”…””}”(hjè  h²hh³Nh´Nubj‡  )”}”(hŒ``perf_output_end()``”h]”hŒperf_output_end()”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjè  ubhŒ*â€™s working for the
regular ring buffer, ”…””}”(hjè  h²hh³Nh´Nubj‡  )”}”(hŒ``perf_aux_output_begin()``”h]”hŒperf_aux_output_begin()”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjè  ubhŒ and ”…””}”hjè  sbj‡  )”}”(hŒ``perf_aux_output_end()``”h]”hŒperf_aux_output_end()”…””}”(hj&  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjè  ubhŒF
serve for the AUX ring buffer for processing the hardware trace data.”…””}”(hjè  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´MÒhj×  h²hubhý)”}”(hX   Once the hardware trace data is stored into the AUX ring buffer, the PMU
driver will stop hardware tracing by calling the ``pmu::stop()`` callback.
Similar to the regular ring buffer, the AUX ring buffer needs to apply
the memory synchronization mechanism as discussed in the section
:ref:`memory_synchronization`.  Since the AUX ring buffer is managed by the
PMU driver, the barrier (B), which is a writing barrier to ensure the trace
data is externally visible prior to updating the head pointer, is asked
to be implemented in the PMU driver.”h]”(hŒzOnce the hardware trace data is stored into the AUX ring buffer, the PMU
driver will stop hardware tracing by calling the ”…””}”(hj>  h²hh³Nh´Nubj‡  )”}”(hŒ``pmu::stop()``”h]”hŒpmu::stop()”…””}”(hjF  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj>  ubhŒ“ callback.
Similar to the regular ring buffer, the AUX ring buffer needs to apply
the memory synchronization mechanism as discussed in the section
”…””}”(hj>  h²hh³Nh´Nubh)”}”(hŒ:ref:`memory_synchronization`”h]”jÃ  )”}”(hjZ  h]”hŒmemory_synchronization”…””}”(hj\  h²hh³Nh´Nubah}”(h]”h ]”(jÎ  Œstd”Œstd-ref”eh"]”h$]”h&]”uh1jÂ  hjX  ubah}”(h]”h ]”h"]”h$]”h&]”Œrefdoc”jÛ  Œ	refdomain”jf  Œreftype”Œref”Œrefexplicit”‰Œrefwarn”ˆjá  Œmemory_synchronization”uh1hh³hÇh´MÖhj>  ubhŒç.  Since the AUX ring buffer is managed by the
PMU driver, the barrier (B), which is a writing barrier to ensure the trace
data is externally visible prior to updating the head pointer, is asked
to be implemented in the PMU driver.”…””}”(hj>  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´MÖhj×  h²hubhý)”}”(hŒaThen ``pmu::stop()`` can safely call the ``perf_aux_output_end()`` function to
finish two things:”h]”(hŒThen ”…””}”(hj‚  h²hh³Nh´Nubj‡  )”}”(hŒ``pmu::stop()``”h]”hŒpmu::stop()”…””}”(hjŠ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj‚  ubhŒ can safely call the ”…””}”(hj‚  h²hh³Nh´Nubj‡  )”}”(hŒ``perf_aux_output_end()``”h]”hŒperf_aux_output_end()”…””}”(hjœ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj‚  ubhŒ function to
finish two things:”…””}”(hj‚  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´Mßhj×  h²hubhŒbullet_list”“”)”}”(hhh]”(hŒ	list_item”“”)”}”(hŒØIt fills an event ``PERF_RECORD_AUX`` into the regular ring buffer, this
event delivers the information of the start address and data size for a
chunk of hardware trace data has been stored into the AUX ring buffer;
”h]”hý)”}”(hŒ×It fills an event ``PERF_RECORD_AUX`` into the regular ring buffer, this
event delivers the information of the start address and data size for a
chunk of hardware trace data has been stored into the AUX ring buffer;”h]”(hŒIt fills an event ”…””}”(hj¿  h²hh³Nh´Nubj‡  )”}”(hŒ``PERF_RECORD_AUX``”h]”hŒPERF_RECORD_AUX”…””}”(hjÇ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj¿  ubhŒ² into the regular ring buffer, this
event delivers the information of the start address and data size for a
chunk of hardware trace data has been stored into the AUX ring buffer;”…””}”(hj¿  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´Mâhj»  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¹  hj¶  h²hh³hÇh´Nubjº  )”}”(hX%  Since the hardware trace driver has stored new trace data into the AUX
ring buffer, the argument *size* indicates how many bytes have been
consumed by the hardware tracing, thus ``perf_aux_output_end()`` updates the
header pointer ``perf_buffer::aux_head`` to reflect the latest buffer usage.
”h]”hý)”}”(hX$  Since the hardware trace driver has stored new trace data into the AUX
ring buffer, the argument *size* indicates how many bytes have been
consumed by the hardware tracing, thus ``perf_aux_output_end()`` updates the
header pointer ``perf_buffer::aux_head`` to reflect the latest buffer usage.”h]”(hŒaSince the hardware trace driver has stored new trace data into the AUX
ring buffer, the argument ”…””}”(hjé  h²hh³Nh´NubjÜ  )”}”(hŒ*size*”h]”hŒsize”…””}”(hjñ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÛ  hjé  ubhŒK indicates how many bytes have been
consumed by the hardware tracing, thus ”…””}”(hjé  h²hh³Nh´Nubj‡  )”}”(hŒ``perf_aux_output_end()``”h]”hŒperf_aux_output_end()”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjé  ubhŒ updates the
header pointer ”…””}”(hjé  h²hh³Nh´Nubj‡  )”}”(hŒ``perf_buffer::aux_head``”h]”hŒperf_buffer::aux_head”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjé  ubhŒ$ to reflect the latest buffer usage.”…””}”(hjé  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´Mæhjå  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¹  hj¶  h²hh³hÇh´Nubeh}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ-”uh1j´  h³hÇh´Mâhj×  h²hubhý)”}”(hŒÁAt the end, the PMU driver will restart hardware tracing.  During this
temporary suspending period, it will lose hardware trace data, which
will introduce a discontinuity during decoding phase.”h]”hŒÁAt the end, the PMU driver will restart hardware tracing.  During this
temporary suspending period, it will lose hardware trace data, which
will introduce a discontinuity during decoding phase.”…””}”(hj;  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´Mëhj×  h²hubhý)”}”(hX  The event ``PERF_RECORD_AUX`` presents an AUX event which is handled in the
kernel, but it lacks the information for saving the AUX trace data in
the perf file.  When the perf tool copies the trace data from AUX ring
buffer to the perf data file, it synthesizes a ``PERF_RECORD_AUXTRACE``
event which is not a kernel ABI, it's defined by the perf tool to describe
which portion of data in the AUX ring buffer is saved.  Afterwards, the perf
tool reads out the AUX trace data from the perf file based on the
``PERF_RECORD_AUXTRACE`` events, and the ``PERF_RECORD_AUX`` event is used to
decode a chunk of data by correlating with time order.”h]”(hŒ
The event ”…””}”(hjI  h²hh³Nh´Nubj‡  )”}”(hŒ``PERF_RECORD_AUX``”h]”hŒPERF_RECORD_AUX”…””}”(hjQ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjI  ubhŒë presents an AUX event which is handled in the
kernel, but it lacks the information for saving the AUX trace data in
the perf file.  When the perf tool copies the trace data from AUX ring
buffer to the perf data file, it synthesizes a ”…””}”(hjI  h²hh³Nh´Nubj‡  )”}”(hŒ``PERF_RECORD_AUXTRACE``”h]”hŒPERF_RECORD_AUXTRACE”…””}”(hjc  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjI  ubhŒÝ
event which is not a kernel ABI, itâ€™s defined by the perf tool to describe
which portion of data in the AUX ring buffer is saved.  Afterwards, the perf
tool reads out the AUX trace data from the perf file based on the
”…””}”(hjI  h²hh³Nh´Nubj‡  )”}”(hŒ``PERF_RECORD_AUXTRACE``”h]”hŒPERF_RECORD_AUXTRACE”…””}”(hju  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjI  ubhŒ events, and the ”…””}”(hjI  h²hh³Nh´Nubj‡  )”}”(hŒ``PERF_RECORD_AUX``”h]”hŒPERF_RECORD_AUX”…””}”(hj‡  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjI  ubhŒH event is used to
decode a chunk of data by correlating with time order.”…””}”(hjI  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´Mïhj×  h²hubeh}”(h]”Œ
aux-events”ah ]”h"]”Œ3.2 aux events”ah$]”h&]”uh1hÈhjq  h²hh³hÇh´MÐubhÉ)”}”(hhh]”(hÎ)”}”(hŒ3.3 Snapshot mode”h]”hŒ3.3 Snapshot mode”…””}”(hjª  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhj§  h²hh³hÇh´Múubhý)”}”(hŒùPerf supports snapshot mode for AUX ring buffer, in this mode, users
only record AUX trace data at a specific time point which users are
interested in.  E.g. below gives an example of how to take snapshots
with 1 second interval with Arm CoreSight::”h]”hŒøPerf supports snapshot mode for AUX ring buffer, in this mode, users
only record AUX trace data at a specific time point which users are
interested in.  E.g. below gives an example of how to take snapshots
with 1 second interval with Arm CoreSight:”…””}”(hj¸  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´Mühj§  h²hubja  )”}”(hŒkperf record -e cs_etm//u -S -a program &
PERFPID=$!
while true; do
    kill -USR2 $PERFPID
    sleep 1
done”h]”hŒkperf record -e cs_etm//u -S -a program &
PERFPID=$!
while true; do
    kill -USR2 $PERFPID
    sleep 1
done”…””}”hjÆ  sbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1j`  h³hÇh´Mhj§  h²hubhý)”}”(hŒ#The main flow for snapshot mode is:”h]”hŒ#The main flow for snapshot mode is:”…””}”(hjÔ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´Mhj§  h²hubjµ  )”}”(hhh]”(jº  )”}”(hŒšBefore a snapshot is taken, the AUX ring buffer acts in free run mode.
During free run mode the perf doesn't record any of the AUX events and
trace data;
”h]”hý)”}”(hŒ™Before a snapshot is taken, the AUX ring buffer acts in free run mode.
During free run mode the perf doesn't record any of the AUX events and
trace data;”h]”hŒ›Before a snapshot is taken, the AUX ring buffer acts in free run mode.
During free run mode the perf doesnâ€™t record any of the AUX events and
trace data;”…””}”(hjé  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´M
hjå  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¹  hjâ  h²hh³hÇh´Nubjº  )”}”(hX3  Once the perf tool receives the *USR2* signal, it triggers the callback
function ``auxtrace_record::snapshot_start()`` to deactivate hardware
tracing.  The kernel driver then populates the AUX ring buffer with the
hardware trace data, and the event ``PERF_RECORD_AUX`` is stored in the
regular ring buffer;
”h]”hý)”}”(hX2  Once the perf tool receives the *USR2* signal, it triggers the callback
function ``auxtrace_record::snapshot_start()`` to deactivate hardware
tracing.  The kernel driver then populates the AUX ring buffer with the
hardware trace data, and the event ``PERF_RECORD_AUX`` is stored in the
regular ring buffer;”h]”(hŒ Once the perf tool receives the ”…””}”(hj  h²hh³Nh´NubjÜ  )”}”(hŒ*USR2*”h]”hŒUSR2”…””}”(hj	  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÛ  hj  ubhŒ+ signal, it triggers the callback
function ”…””}”(hj  h²hh³Nh´Nubj‡  )”}”(hŒ%``auxtrace_record::snapshot_start()``”h]”hŒ!auxtrace_record::snapshot_start()”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj  ubhŒƒ to deactivate hardware
tracing.  The kernel driver then populates the AUX ring buffer with the
hardware trace data, and the event ”…””}”(hj  h²hh³Nh´Nubj‡  )”}”(hŒ``PERF_RECORD_AUX``”h]”hŒPERF_RECORD_AUX”…””}”(hj-  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj  ubhŒ& is stored in the
regular ring buffer;”…””}”(hj  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´Mhjý  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¹  hjâ  h²hh³hÇh´Nubjº  )”}”(hŒ£Then perf tool takes a snapshot, ``record__read_auxtrace_snapshot()``
reads out the hardware trace data from the AUX ring buffer and saves it
into perf data file;
”h]”hý)”}”(hŒ¢Then perf tool takes a snapshot, ``record__read_auxtrace_snapshot()``
reads out the hardware trace data from the AUX ring buffer and saves it
into perf data file;”h]”(hŒ!Then perf tool takes a snapshot, ”…””}”(hjO  h²hh³Nh´Nubj‡  )”}”(hŒ$``record__read_auxtrace_snapshot()``”h]”hŒ record__read_auxtrace_snapshot()”…””}”(hjW  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjO  ubhŒ]
reads out the hardware trace data from the AUX ring buffer and saves it
into perf data file;”…””}”(hjO  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´MhjK  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¹  hjâ  h²hh³hÇh´Nubjº  )”}”(hŒoAfter the snapshot is finished, ``auxtrace_record::snapshot_finish()``
restarts the PMU event for AUX tracing.
”h]”hý)”}”(hŒnAfter the snapshot is finished, ``auxtrace_record::snapshot_finish()``
restarts the PMU event for AUX tracing.”h]”(hŒ After the snapshot is finished, ”…””}”(hjy  h²hh³Nh´Nubj‡  )”}”(hŒ&``auxtrace_record::snapshot_finish()``”h]”hŒ"auxtrace_record::snapshot_finish()”…””}”(hj  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hjy  ubhŒ(
restarts the PMU event for AUX tracing.”…””}”(hjy  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´Mhju  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¹  hjâ  h²hh³hÇh´Nubeh}”(h]”h ]”h"]”h$]”h&]”j9  j:  uh1j´  h³hÇh´M
hj§  h²hubhý)”}”(hXü  The perf only accesses the head pointer ``perf_event_mmap_page::aux_head``
in snapshot mode and doesnâ€™t touch tail pointer ``aux_tail``, this is
because the AUX ring buffer can overflow in free run mode, the tail
pointer is useless in this case.  Alternatively, the callback
``auxtrace_record::find_snapshot()`` is introduced for making the decision
of whether the AUX ring buffer has been wrapped around or not, at the
end it fixes up the AUX buffer's head which are used to calculate the
trace data size.”h]”(hŒ(The perf only accesses the head pointer ”…””}”(hj¥  h²hh³Nh´Nubj‡  )”}”(hŒ"``perf_event_mmap_page::aux_head``”h]”hŒperf_event_mmap_page::aux_head”…””}”(hj­  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj¥  ubhŒ3
in snapshot mode and doesnâ€™t touch tail pointer ”…””}”(hj¥  h²hh³Nh´Nubj‡  )”}”(hŒ``aux_tail``”h]”hŒaux_tail”…””}”(hj¿  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj¥  ubhŒŒ, this is
because the AUX ring buffer can overflow in free run mode, the tail
pointer is useless in this case.  Alternatively, the callback
”…””}”(hj¥  h²hh³Nh´Nubj‡  )”}”(hŒ$``auxtrace_record::find_snapshot()``”h]”hŒ auxtrace_record::find_snapshot()”…””}”(hjÑ  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j†  hj¥  ubhŒÅ is introduced for making the decision
of whether the AUX ring buffer has been wrapped around or not, at the
end it fixes up the AUX bufferâ€™s head which are used to calculate the
trace data size.”…””}”(hj¥  h²hh³Nh´Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´Mhj§  h²hubhý)”}”(hŒÔAs we know, the buffers' deployment can be per-thread mode, per-CPU
mode, or system wide mode, and the snapshot can be applied to any of
these modes.  Below is an example of taking snapshot with system wide
mode.”h]”hŒÖAs we know, the buffersâ€™ deployment can be per-thread mode, per-CPU
mode, or system wide mode, and the snapshot can be applied to any of
these modes.  Below is an example of taking snapshot with system wide
mode.”…””}”(hjé  h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hüh³hÇh´M$hj§  h²hubja  )”}”(hX»                                       Snapshot is taken
                                             |
                                             v
                    +------------------------+
                    |  AUX Ring buffer 0     | <- aux_head
                    +------------------------+
                                             v
            +--------------------------------+
            |          AUX Ring buffer 1     | <- aux_head
            +--------------------------------+
                                             v
+--------------------------------------------+
|                      AUX Ring buffer 2     | <- aux_head
+--------------------------------------------+
                                             v
     +---------------------------------------+
     |                 AUX Ring buffer 3     | <- aux_head
     +---------------------------------------+

            Figure 9. Snapshot with system wide mode”h]”hX»                                       Snapshot is taken
                                             |
                                             v
                    +------------------------+
                    |  AUX Ring buffer 0     | <- aux_head
                    +------------------------+
                                             v
            +--------------------------------+
            |          AUX Ring buffer 1     | <- aux_head
            +--------------------------------+
                                             v
+--------------------------------------------+
|                      AUX Ring buffer 2     | <- aux_head
+--------------------------------------------+
                                             v
     +---------------------------------------+
     |                 AUX Ring buffer 3     | <- aux_head
     +---------------------------------------+

            Figure 9. Snapshot with system wide mode”…””}”hj÷  sbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1j`  h³hÇh´M+hj§  h²hubeh}”(h]”Œsnapshot-mode”ah ]”h"]”Œ3.3 snapshot mode”ah$]”h&]”uh1hÈhjq  h²hh³hÇh´Múubeh}”(h]”Œ the-mechanism-of-aux-ring-buffer”ah ]”h"]”Œ#3. the mechanism of aux ring buffer”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´MLubeh}”(h]”Œperf-ring-buffer”ah ]”h"]”Œperf ring buffer”ah$]”h&]”uh1hÈhhh²hh³hÇh´Kubeh}”(h]”h ]”h"]”h$]”h&]”Œsource”hÇuh1hŒcurrent_source”NŒcurrent_line”NŒsettings”Œdocutils.frontend”ŒValues”“”)”}”(hÍNŒ	generator”NŒ	datestamp”NŒsource_link”NŒ
source_url”NŒtoc_backlinks”j1  Œfootnote_backlinks”KŒsectnum_xform”KŒstrip_comments”NŒstrip_elements_with_classes”NŒstrip_classes”NŒreport_level”KŒ
halt_level”KŒexit_status_level”KŒdebug”NŒwarning_stream”NŒ	traceback”ˆŒinput_encoding”Œ	utf-8-sig”Œinput_encoding_error_handler”Œstrict”Œoutput_encoding”Œutf-8”Œoutput_encoding_error_handler”j?  Œerror_encoding”Œutf-8”Œerror_encoding_error_handler”Œbackslashreplace”Œlanguage_code”Œen”Œrecord_dependencies”NŒconfig”NŒ	id_prefix”hŒauto_id_prefix”Œid”Œdump_settings”NŒdump_internals”NŒdump_transforms”NŒdump_pseudo_xml”NŒexpose_internals”NŒstrict_visitor”NŒ_disable_config”NŒ_source”hÇŒ_destination”NŒ_config_files”]”Œ7/var/lib/git/docbuild/linux/Documentation/docutils.conf”aŒfile_insertion_enabled”ˆŒraw_enabled”KŒline_length_limit”M'Œpep_references”NŒpep_base_url”Œhttps://peps.python.org/”Œpep_file_url_template”Œpep-%04d”Œrfc_references”NŒrfc_base_url”Œ&https://datatracker.ietf.org/doc/html/”Œ	tab_width”KŒtrim_footnote_reference_space”‰Œsyntax_highlight”Œlong”Œsmart_quotes”ˆŒsmartquotes_locales”]”Œcharacter_level_inline_markup”‰Œdoctitle_xform”‰Œdocinfo_xform”KŒsectsubtitle_xform”‰Œimage_loading”Œlink”Œembed_stylesheet”‰Œcloak_email_addresses”ˆŒsection_self_link”‰Œenv”NubŒreporter”NŒindirect_targets”]”Œsubstitution_defs”}”Œsubstitution_names”}”Œrefnames”}”Œrefids”}”(jª  ]”jŸ  aj	  ]”j†	  auŒnameids”}”(j  j  j-  j*  jn  jk  jV  jS  js  jp  jP  jM  j  j  jÚ  j×  jk  jh  jf  jc  j9  j6  j°  j­  j	  jª  j	  j	  j–	  j“	  j\  j	  j[  jX  j  j  jÔ  jÑ  j¤  j¡  j
  j  uŒ	nametypes”}”(j  ‰j-  ‰jn  ‰jV  ‰js  ‰jP  ‰j  ‰jÚ  ‰jk  ‰jf  ‰j9  ‰j°  ‰j	  ˆj	  ‰j–	  ‰j\  ˆj[  ‰j  ‰jÔ  ‰j¤  ‰j
  ‰uh}”(j  hÊj*  hëjk  j0  jS  jA  jp  jY  jM  jx  j  jS  j×  j  jh  jÝ  jc  jv  j6  j•  j­  j<  jª  j³  j	  j³  j“	  j#	  j	  j™	  jX  j™	  j  jq  jÑ  j  j¡  j×  j  j§  uŒfootnote_refs”}”Œcitation_refs”}”Œautofootnotes”]”Œautofootnote_refs”]”Œsymbol_footnotes”]”Œsymbol_footnote_refs”]”Œ	footnotes”]”Œ	citations”]”Œautofootnote_start”KŒsymbol_footnote_start”K Œ
id_counter”Œcollections”ŒCounter”“”}”jM  Ks…”R”Œparse_messages”]”Œtransform_messages”]”(hŒsystem_message”“”)”}”(hhh]”hý)”}”(hhh]”hŒAHyperlink target "writing-samples-into-buffer" is not referenced.”…””}”hjª  sbah}”(h]”h ]”h"]”h$]”h&]”uh1hühj§  ubah}”(h]”h ]”h"]”h$]”h&]”Œlevel”KŒtype”ŒINFO”Œsource”hÇŒline”Míuh1j¥  ubj¦  )”}”(hhh]”hý)”}”(hhh]”hŒ<Hyperlink target "memory-synchronization" is not referenced.”…””}”hjÅ  sbah}”(h]”h ]”h"]”h$]”h&]”uh1hühjÂ  ubah}”(h]”h ]”h"]”h$]”h&]”Œlevel”KŒtype”j¿  Œsource”hÇŒline”Muh1j¥  ubeŒtransformer”NŒinclude_log”]”Œ
decoration”Nh²hub.