3sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget2/translations/zh_CN/userspace-api/perf_ring_buffermodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget2/translations/zh_TW/userspace-api/perf_ring_buffermodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget2/translations/it_IT/userspace-api/perf_ring_buffermodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget2/translations/ja_JP/userspace-api/perf_ring_buffermodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget2/translations/ko_KR/userspace-api/perf_ring_buffermodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget2/translations/sp_SP/userspace-api/perf_ring_buffermodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhcomment)}(h SPDX-License-Identifier: GPL-2.0h]h SPDX-License-Identifier: GPL-2.0}hhsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1hhhhhhL/var/lib/git/docbuild/linux/Documentation/userspace-api/perf_ring_buffer.rsthKubhsection)}(hhh](htitle)}(hPerf ring bufferh]hPerf ring buffer}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh)}(hX@CONTENTS 1. Introduction 2. Ring buffer implementation 2.1 Basic algorithm 2.2 Ring buffer for different tracing modes 2.2.1 Default mode 2.2.2 Per-thread mode 2.2.3 Per-CPU mode 2.2.4 System wide mode 2.3 Accessing buffer 2.3.1 Producer-consumer model 2.3.2 Properties of the ring buffers 2.3.3 Writing samples into buffer 2.3.4 Reading samples from buffer 2.3.5 Memory synchronization 3. The mechanism of AUX ring buffer 3.1 The relationship between AUX and regular ring buffers 3.2 AUX events 3.3 Snapshot modeh]hX@CONTENTS 1. Introduction 2. Ring buffer implementation 2.1 Basic algorithm 2.2 Ring buffer for different tracing modes 2.2.1 Default mode 2.2.2 Per-thread mode 2.2.3 Per-CPU mode 2.2.4 System wide mode 2.3 Accessing buffer 2.3.1 Producer-consumer model 2.3.2 Properties of the ring buffers 2.3.3 Writing samples into buffer 2.3.4 Reading samples from buffer 2.3.5 Memory synchronization 3. The mechanism of AUX ring buffer 3.1 The relationship between AUX and regular ring buffers 3.2 AUX events 3.3 Snapshot mode}hhsbah}(h]h ]h"]h$]h&]hhuh1hhhhhhhhKubh)}(hhh](h)}(h1. Introductionh]h1. Introduction}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhK ubh paragraph)}(hX'The ring buffer is a fundamental mechanism for data transfer. perf uses ring buffers to transfer event data from kernel to user space, another kind of ring buffer which is so called auxiliary (AUX) ring buffer also plays an important role for hardware tracing with Intel PT, Arm CoreSight, etc.h]hX'The ring buffer is a fundamental mechanism for data transfer. perf uses ring buffers to transfer event data from kernel to user space, another kind of ring buffer which is so called auxiliary (AUX) ring buffer also plays an important role for hardware tracing with Intel PT, Arm CoreSight, etc.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK"hhhhubh)}(hXThe ring buffer implementation is critical but it's also a very challenging work. On the one hand, the kernel and perf tool in the user space use the ring buffer to exchange data and stores data into data file, thus the ring buffer needs to transfer data with high throughput; on the other hand, the ring buffer management should avoid significant overload to distract profiling results.h]hXThe ring buffer implementation is critical but it’s also a very challenging work. On the one hand, the kernel and perf tool in the user space use the ring buffer to exchange data and stores data into data file, thus the ring buffer needs to transfer data with high throughput; on the other hand, the ring buffer management should avoid significant overload to distract profiling results.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK(hhhhubh)}(hThis documentation dives into the details for perf ring buffer with two parts: firstly it explains the perf ring buffer implementation, then the second part discusses the AUX ring buffer mechanism.h]hThis documentation dives into the details for perf ring buffer with two parts: firstly it explains the perf ring buffer implementation, then the second part discusses the AUX ring buffer mechanism.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK/hhhhubeh}(h] introductionah ]h"]1. introductionah$]h&]uh1hhhhhhhhK ubh)}(hhh](h)}(h2. Ring buffer implementationh]h2. Ring buffer implementation}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhK4ubh)}(hhh](h)}(h2.1 Basic algorithmh]h2.1 Basic algorithm}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hhhhhK7ubh)}(hThat said, a typical ring buffer is managed by a head pointer and a tail pointer; the head pointer is manipulated by a writer and the tail pointer is updated by a reader respectively.h]hThat said, a typical ring buffer is managed by a head pointer and a tail pointer; the head pointer is manipulated by a writer and the tail pointer is updated by a reader respectively.}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK9hj-hhubh literal_block)}(h+---------------------------+ | | |***|***|***| | | +---------------------------+ `-> Tail `-> Head * : the data is filled by the writer. Figure 1. Ring bufferh]h+---------------------------+ | | |***|***|***| | | +---------------------------+ `-> Tail `-> Head * : the data is filled by the writer. Figure 1. Ring buffer}hjNsbah}(h]h ]h"]h$]h&]hhuh1jLhhhK?hj-hhubh)}(hXPerf uses the same way to manage its ring buffer. In the implementation there are two key data structures held together in a set of consecutive pages, the control structure and then the ring buffer itself. The page with the control structure in is known as the "user page". Being held in continuous virtual addresses simplifies locating the ring buffer address, it is in the pages after the page with the user page.h]hXPerf uses the same way to manage its ring buffer. In the implementation there are two key data structures held together in a set of consecutive pages, the control structure and then the ring buffer itself. The page with the control structure in is known as the “user page”. Being held in continuous virtual addresses simplifies locating the ring buffer address, it is in the pages after the page with the user page.}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKHhj-hhubh)}(hXXThe control structure is named as ``perf_event_mmap_page``, it contains a head pointer ``data_head`` and a tail pointer ``data_tail``. When the kernel starts to fill records into the ring buffer, it updates the head pointer to reserve the memory so later it can safely store events into the buffer. On the other side, when the user page is a writable mapping, the perf tool has the permission to update the tail pointer after consuming data from the ring buffer. Yet another case is for the user page's read-only mapping, which is to be addressed in the section :ref:`writing_samples_into_buffer`.h](h"The control structure is named as }(hjjhhhNhNubhliteral)}(h``perf_event_mmap_page``h]hperf_event_mmap_page}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjjubh, it contains a head pointer }(hjjhhhNhNubjs)}(h ``data_head``h]h data_head}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjjubh and a tail pointer }(hjjhhhNhNubjs)}(h ``data_tail``h]h data_tail}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjjubhX. When the kernel starts to fill records into the ring buffer, it updates the head pointer to reserve the memory so later it can safely store events into the buffer. On the other side, when the user page is a writable mapping, the perf tool has the permission to update the tail pointer after consuming data from the ring buffer. Yet another case is for the user page’s read-only mapping, which is to be addressed in the section }(hjjhhhNhNubh)}(h":ref:`writing_samples_into_buffer`h]hinline)}(hjh]hwriting_samples_into_buffer}(hjhhhNhNubah}(h]h ](xrefstdstd-refeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocuserspace-api/perf_ring_buffer refdomainjreftyperef refexplicitrefwarn reftargetwriting_samples_into_bufferuh1hhhhKOhjjubh.}(hjjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKOhj-hhubjM)}(hX user page ring buffer +---------+---------+ +---------------------------------------+ |data_head|data_tail|...| | |***|***|***|***|***| | | | +---------+---------+ +---------------------------------------+ ` `----------------^ ^ `----------------------------------------------| * : the data is filled by the writer. Figure 2. Perf ring bufferh]hX user page ring buffer +---------+---------+ +---------------------------------------+ |data_head|data_tail|...| | |***|***|***|***|***| | | | +---------+---------+ +---------------------------------------+ ` `----------------^ ^ `----------------------------------------------| * : the data is filled by the writer. Figure 2. Perf ring buffer}hjsbah}(h]h ]h"]h$]h&]hhuh1jLhhhK[hj-hhubh)}(hXWhen using the ``perf record`` tool, we can specify the ring buffer size with option ``-m`` or ``--mmap-pages=``, the given size will be rounded up to a power of two that is a multiple of a page size. Though the kernel allocates at once for all memory pages, it's deferred to map the pages to VMA area until the perf tool accesses the buffer from the user space. In other words, at the first time accesses the buffer's page from user space in the perf tool, a data abort exception for page fault is taken and the kernel uses this occasion to map the page into process VMA (see ``perf_mmap_fault()``), thus the perf tool can continue to access the page after returning from the exception.h](hWhen using the }(hjhhhNhNubjs)}(h``perf record``h]h perf record}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjubh7 tool, we can specify the ring buffer size with option }(hjhhhNhNubjs)}(h``-m``h]h-m}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjubh or }(hjhhhNhNubjs)}(h``--mmap-pages=``h]h --mmap-pages=}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjubhX, the given size will be rounded up to a power of two that is a multiple of a page size. Though the kernel allocates at once for all memory pages, it’s deferred to map the pages to VMA area until the perf tool accesses the buffer from the user space. In other words, at the first time accesses the buffer’s page from user space in the perf tool, a data abort exception for page fault is taken and the kernel uses this occasion to map the page into process VMA (see }(hjhhhNhNubjs)}(h``perf_mmap_fault()``h]hperf_mmap_fault()}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjubhY), thus the perf tool can continue to access the page after returning from the exception.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKfhj-hhubeh}(h]basic-algorithmah ]h"]2.1 basic algorithmah$]h&]uh1hhjhhhhhK7ubh)}(hhh](h)}(h+2.2 Ring buffer for different tracing modesh]h+2.2 Ring buffer for different tracing modes}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEhhhhhKrubh)}(hXThe perf profiles programs with different modes: default mode, per thread mode, per cpu mode, and system wide mode. This section describes these modes and how the ring buffer meets requirements for them. At last we will review the race conditions caused by these modes.h]hXThe perf profiles programs with different modes: default mode, per thread mode, per cpu mode, and system wide mode. This section describes these modes and how the ring buffer meets requirements for them. At last we will review the race conditions caused by these modes.}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKthjEhhubh)}(hhh](h)}(h2.2.1 Default modeh]h2.2.1 Default mode}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdhhhhhKzubh)}(heUsually we execute ``perf record`` command followed by a profiling program name, like below command::h](hUsually we execute }(hjuhhhNhNubjs)}(h``perf record``h]h perf record}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjuubhB command followed by a profiling program name, like below command:}(hjuhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhK|hjdhhubjM)}(hperf record test_programh]hperf record test_program}hjsbah}(h]h ]h"]h$]h&]hhuh1jLhhhKhjdhhubh)}(hXXThis command doesn't specify any options for CPU and thread modes, the perf tool applies the default mode on the perf event. It maps all the CPUs in the system and the profiled program's PID on the perf event, and it enables inheritance mode on the event so that child tasks inherits the events. As a result, the perf event is attributed as::h]hX[This command doesn’t specify any options for CPU and thread modes, the perf tool applies the default mode on the perf event. It maps all the CPUs in the system and the profiled program’s PID on the perf event, and it enables inheritance mode on the event so that child tasks inherits the events. As a result, the perf event is attributed as:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjdhhubjM)}(hqevsel::cpus::map[] = { 0 .. _SC_NPROCESSORS_ONLN-1 } evsel::threads::map[] = { pid } evsel::attr::inherit = 1h]hqevsel::cpus::map[] = { 0 .. _SC_NPROCESSORS_ONLN-1 } evsel::threads::map[] = { pid } evsel::attr::inherit = 1}hjsbah}(h]h ]h"]h$]h&]hhuh1jLhhhKhjdhhubh)}(hXThese attributions finally will be reflected on the deployment of ring buffers. As shown below, the perf tool allocates individual ring buffer for each CPU, but it only enables events for the profiled program rather than for all threads in the system. The *T1* thread represents the thread context of the 'test_program', whereas *T2* and *T3* are irrelevant threads in the system. The perf samples are exclusively collected for the *T1* thread and stored in the ring buffer associated with the CPU on which the *T1* thread is running.h](hXThese attributions finally will be reflected on the deployment of ring buffers. As shown below, the perf tool allocates individual ring buffer for each CPU, but it only enables events for the profiled program rather than for all threads in the system. The }(hjhhhNhNubhemphasis)}(h*T1*h]hT1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubhI thread represents the thread context of the ‘test_program’, whereas }(hjhhhNhNubj)}(h*T2*h]hT2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh and }(hjhhhNhNubj)}(h*T3*h]hT3}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh\ are irrelevant threads in the system. The perf samples are exclusively collected for the }(hjhhhNhNubj)}(h*T1*h]hT1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubhK thread and stored in the ring buffer associated with the CPU on which the }(hjhhhNhNubj)}(h*T1*h]hT1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh thread is running.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjdhhubjM)}(hX T1 T2 T1 +----+ +-----------+ +----+ CPU0 |xxxx| |xxxxxxxxxxx| |xxxx| +----+--------------+-----------+----------+----+--------> | | v v +-----------------------------------------------------+ | Ring buffer 0 | +-----------------------------------------------------+ T1 +-----+ CPU1 |xxxxx| -----+-----+---------------------------------------------> | v +-----------------------------------------------------+ | Ring buffer 1 | +-----------------------------------------------------+ T1 T3 +----+ +-------+ CPU2 |xxxx| |xxxxxxx| --------------------------+----+--------+-------+--------> | v +-----------------------------------------------------+ | Ring buffer 2 | +-----------------------------------------------------+ T1 +--------------+ CPU3 |xxxxxxxxxxxxxx| -----------+--------------+------------------------------> | v +-----------------------------------------------------+ | Ring buffer 3 | +-----------------------------------------------------+ T1: Thread 1; T2: Thread 2; T3: Thread 3 x: Thread is in running state Figure 3. Ring buffer for default modeh]hX T1 T2 T1 +----+ +-----------+ +----+ CPU0 |xxxx| |xxxxxxxxxxx| |xxxx| +----+--------------+-----------+----------+----+--------> | | v v +-----------------------------------------------------+ | Ring buffer 0 | +-----------------------------------------------------+ T1 +-----+ CPU1 |xxxxx| -----+-----+---------------------------------------------> | v +-----------------------------------------------------+ | Ring buffer 1 | +-----------------------------------------------------+ T1 T3 +----+ +-------+ CPU2 |xxxx| |xxxxxxx| --------------------------+----+--------+-------+--------> | v +-----------------------------------------------------+ | Ring buffer 2 | +-----------------------------------------------------+ T1 +--------------+ CPU3 |xxxxxxxxxxxxxx| -----------+--------------+------------------------------> | v +-----------------------------------------------------+ | Ring buffer 3 | +-----------------------------------------------------+ T1: Thread 1; T2: Thread 2; T3: Thread 3 x: Thread is in running state Figure 3. Ring buffer for default mode}hj)sbah}(h]h ]h"]h$]h&]hhuh1jLhhhKhjdhhubeh}(h] default-modeah ]h"]2.2.1 default modeah$]h&]uh1hhjEhhhhhKzubh)}(hhh](h)}(h2.2.2 Per-thread modeh]h2.2.2 Per-thread mode}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj?hhhhhKubh)}(h;By specifying option ``--per-thread`` in perf command, e.g.h](hBy specifying option }(hjPhhhNhNubjs)}(h``--per-thread``h]h --per-thread}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjPubh in perf command, e.g.}(hjPhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj?hhubjM)}(h%perf record --per-thread test_programh]h%perf record --per-thread test_program}hjpsbah}(h]h ]h"]h$]h&]hhuh1jLhhhKhj?hhubh)}(h{The perf event doesn't map to any CPUs and is only bound to the profiled process, thus, the perf event's attributions are::h]h~The perf event doesn’t map to any CPUs and is only bound to the profiled process, thus, the perf event’s attributions are:}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj?hhubjM)}(hXevsel::cpus::map[0] = { -1 } evsel::threads::map[] = { pid } evsel::attr::inherit = 0h]hXevsel::cpus::map[0] = { -1 } evsel::threads::map[] = { pid } evsel::attr::inherit = 0}hjsbah}(h]h ]h"]h$]h&]hhuh1jLhhhKhj?hhubh)}(hXIn this mode, a single ring buffer is allocated for the profiled thread; if the thread is scheduled on a CPU, the events on that CPU will be enabled; and if the thread is scheduled out from the CPU, the events on the CPU will be disabled. When the thread is migrated from one CPU to another, the events are to be disabled on the previous CPU and enabled on the next CPU correspondingly.h]hXIn this mode, a single ring buffer is allocated for the profiled thread; if the thread is scheduled on a CPU, the events on that CPU will be enabled; and if the thread is scheduled out from the CPU, the events on the CPU will be disabled. When the thread is migrated from one CPU to another, the events are to be disabled on the previous CPU and enabled on the next CPU correspondingly.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj?hhubjM)}(hX T1 T2 T1 +----+ +-----------+ +----+ CPU0 |xxxx| |xxxxxxxxxxx| |xxxx| +----+--------------+-----------+----------+----+--------> | | | T1 | | +-----+ | CPU1 | |xxxxx| | --|--+-----+----------------------------------|----------> | | | | | T1 T3 | | | +----+ +---+ | CPU2 | | |xxxx| |xxx| | --|-----|-----------------+----+--------+---+-|----------> | | | | | | T1 | | | | +--------------+ | | CPU3 | | |xxxxxxxxxxxxxx| | | --|-----|--+--------------+-|-----------------|----------> | | | | | v v v v v +-----------------------------------------------------+ | Ring buffer | +-----------------------------------------------------+ T1: Thread 1 x: Thread is in running state Figure 4. Ring buffer for per-thread modeh]hX T1 T2 T1 +----+ +-----------+ +----+ CPU0 |xxxx| |xxxxxxxxxxx| |xxxx| +----+--------------+-----------+----------+----+--------> | | | T1 | | +-----+ | CPU1 | |xxxxx| | --|--+-----+----------------------------------|----------> | | | | | T1 T3 | | | +----+ +---+ | CPU2 | | |xxxx| |xxx| | --|-----|-----------------+----+--------+---+-|----------> | | | | | | T1 | | | | +--------------+ | | CPU3 | | |xxxxxxxxxxxxxx| | | --|-----|--+--------------+-|-----------------|----------> | | | | | v v v v v +-----------------------------------------------------+ | Ring buffer | +-----------------------------------------------------+ T1: Thread 1 x: Thread is in running state Figure 4. Ring buffer for per-thread mode}hjsbah}(h]h ]h"]h$]h&]hhuh1jLhhhKhj?hhubh)}(hX_When perf runs in per-thread mode, a ring buffer is allocated for the profiled thread *T1*. The ring buffer is dedicated for thread *T1*, if the thread *T1* is running, the perf events will be recorded into the ring buffer; when the thread is sleeping, all associated events will be disabled, thus no trace data will be recorded into the ring buffer.h](hVWhen perf runs in per-thread mode, a ring buffer is allocated for the profiled thread }(hjhhhNhNubj)}(h*T1*h]hT1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh+. The ring buffer is dedicated for thread }(hjhhhNhNubj)}(h*T1*h]hT1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh, if the thread }(hjhhhNhNubj)}(h*T1*h]hT1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh is running, the perf events will be recorded into the ring buffer; when the thread is sleeping, all associated events will be disabled, thus no trace data will be recorded into the ring buffer.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj?hhubeh}(h]per-thread-modeah ]h"]2.2.2 per-thread modeah$]h&]uh1hhjEhhhhhKubh)}(hhh](h)}(h2.2.3 Per-CPU modeh]h2.2.3 Per-CPU mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhMubh)}(hThe option ``-C`` is used to collect samples on the list of CPUs, for example the below perf command receives option ``-C 0,2``::h](h The option }(hjhhhNhNubjs)}(h``-C``h]h-C}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjubhd is used to collect samples on the list of CPUs, for example the below perf command receives option }(hjhhhNhNubjs)}(h ``-C 0,2``h]h-C 0,2}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhjhhubjM)}(hperf record -C 0,2 test_programh]hperf record -C 0,2 test_program}hjEsbah}(h]h ]h"]h$]h&]hhuh1jLhhhMhjhhubh)}(hIt maps the perf event to CPUs 0 and 2, and the event is not associated to any PID. Thus the perf event attributions are set as::h]hIt maps the perf event to CPUs 0 and 2, and the event is not associated to any PID. Thus the perf event attributions are set as:}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubjM)}(hYevsel::cpus::map[0] = { 0, 2 } evsel::threads::map[] = { -1 } evsel::attr::inherit = 0h]hYevsel::cpus::map[0] = { 0, 2 } evsel::threads::map[] = { -1 } evsel::attr::inherit = 0}hjasbah}(h]h ]h"]h$]h&]hhuh1jLhhhM hjhhubh)}(hXThis results in the session of ``perf record`` will sample all threads on CPU0 and CPU2, and be terminated until test_program exits. Even there have tasks running on CPU1 and CPU3, since the ring buffer is absent for them, any activities on these two CPUs will be ignored. A usage case is to combine the options for per-thread mode and per-CPU mode, e.g. the options ``–C 0,2`` and ``––per–thread`` are specified together, the samples are recorded only when the profiled thread is scheduled on any of the listed CPUs.h](hThis results in the session of }(hjohhhNhNubjs)}(h``perf record``h]h perf record}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjoubhXC will sample all threads on CPU0 and CPU2, and be terminated until test_program exits. Even there have tasks running on CPU1 and CPU3, since the ring buffer is absent for them, any activities on these two CPUs will be ignored. A usage case is to combine the options for per-thread mode and per-CPU mode, e.g. the options }(hjohhhNhNubjs)}(h ``–C 0,2``h]h–C 0,2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjoubh and }(hjohhhNhNubjs)}(h``––per–thread``h]h––per–thread}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjoubhw are specified together, the samples are recorded only when the profiled thread is scheduled on any of the listed CPUs.}(hjohhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhjhhubjM)}(hX T1 T2 T1 +----+ +-----------+ +----+ CPU0 |xxxx| |xxxxxxxxxxx| |xxxx| +----+--------------+-----------+----------+----+--------> | | | v v v +-----------------------------------------------------+ | Ring buffer 0 | +-----------------------------------------------------+ T1 +-----+ CPU1 |xxxxx| -----+-----+---------------------------------------------> T1 T3 +----+ +-------+ CPU2 |xxxx| |xxxxxxx| --------------------------+----+--------+-------+--------> | | v v +-----------------------------------------------------+ | Ring buffer 1 | +-----------------------------------------------------+ T1 +--------------+ CPU3 |xxxxxxxxxxxxxx| -----------+--------------+------------------------------> T1: Thread 1; T2: Thread 2; T3: Thread 3 x: Thread is in running state Figure 5. Ring buffer for per-CPU modeh]hX T1 T2 T1 +----+ +-----------+ +----+ CPU0 |xxxx| |xxxxxxxxxxx| |xxxx| +----+--------------+-----------+----------+----+--------> | | | v v v +-----------------------------------------------------+ | Ring buffer 0 | +-----------------------------------------------------+ T1 +-----+ CPU1 |xxxxx| -----+-----+---------------------------------------------> T1 T3 +----+ +-------+ CPU2 |xxxx| |xxxxxxx| --------------------------+----+--------+-------+--------> | | v v +-----------------------------------------------------+ | Ring buffer 1 | +-----------------------------------------------------+ T1 +--------------+ CPU3 |xxxxxxxxxxxxxx| -----------+--------------+------------------------------> T1: Thread 1; T2: Thread 2; T3: Thread 3 x: Thread is in running state Figure 5. Ring buffer for per-CPU mode}hjsbah}(h]h ]h"]h$]h&]hhuh1jLhhhMhjhhubeh}(h] per-cpu-modeah ]h"]2.2.3 per-cpu modeah$]h&]uh1hhjEhhhhhMubh)}(hhh](h)}(h2.2.4 System wide modeh]h2.2.4 System wide mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhM=ubh)}(hBy using option ``–a`` or ``––all–cpus``, perf collects samples on all CPUs for all tasks, we call it as the system wide mode, the command is::h](hBy using option }(hjhhhNhNubjs)}(h``–a``h]h–a}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjubh or }(hjhhhNhNubjs)}(h``––all–cpus``h]h––all–cpus}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjubhf, perf collects samples on all CPUs for all tasks, we call it as the system wide mode, the command is:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhM?hjhhubjM)}(hperf record -a test_programh]hperf record -a test_program}hj sbah}(h]h ]h"]h$]h&]hhuh1jLhhhMBhjhhubh)}(hlSimilar to the per-CPU mode, the perf event doesn't bind to any PID, and it maps to all CPUs in the system::h]hmSimilar to the per-CPU mode, the perf event doesn’t bind to any PID, and it maps to all CPUs in the system:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMDhjhhubjM)}(hpevsel::cpus::map[] = { 0 .. _SC_NPROCESSORS_ONLN-1 } evsel::threads::map[] = { -1 } evsel::attr::inherit = 0h]hpevsel::cpus::map[] = { 0 .. _SC_NPROCESSORS_ONLN-1 } evsel::threads::map[] = { -1 } evsel::attr::inherit = 0}hj(sbah}(h]h ]h"]h$]h&]hhuh1jLhhhMGhjhhubh)}(hIn the system wide mode, every CPU has its own ring buffer, all threads are monitored during the running state and the samples are recorded into the ring buffer belonging to the CPU which the events occurred on.h]hIn the system wide mode, every CPU has its own ring buffer, all threads are monitored during the running state and the samples are recorded into the ring buffer belonging to the CPU which the events occurred on.}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMKhjhhubjM)}(hX T1 T2 T1 +----+ +-----------+ +----+ CPU0 |xxxx| |xxxxxxxxxxx| |xxxx| +----+--------------+-----------+----------+----+--------> | | | v v v +-----------------------------------------------------+ | Ring buffer 0 | +-----------------------------------------------------+ T1 +-----+ CPU1 |xxxxx| -----+-----+---------------------------------------------> | v +-----------------------------------------------------+ | Ring buffer 1 | +-----------------------------------------------------+ T1 T3 +----+ +-------+ CPU2 |xxxx| |xxxxxxx| --------------------------+----+--------+-------+--------> | | v v +-----------------------------------------------------+ | Ring buffer 2 | +-----------------------------------------------------+ T1 +--------------+ CPU3 |xxxxxxxxxxxxxx| -----------+--------------+------------------------------> | v +-----------------------------------------------------+ | Ring buffer 3 | +-----------------------------------------------------+ T1: Thread 1; T2: Thread 2; T3: Thread 3 x: Thread is in running state Figure 6. Ring buffer for system wide modeh]hX T1 T2 T1 +----+ +-----------+ +----+ CPU0 |xxxx| |xxxxxxxxxxx| |xxxx| +----+--------------+-----------+----------+----+--------> | | | v v v +-----------------------------------------------------+ | Ring buffer 0 | +-----------------------------------------------------+ T1 +-----+ CPU1 |xxxxx| -----+-----+---------------------------------------------> | v +-----------------------------------------------------+ | Ring buffer 1 | +-----------------------------------------------------+ T1 T3 +----+ +-------+ CPU2 |xxxx| |xxxxxxx| --------------------------+----+--------+-------+--------> | | v v +-----------------------------------------------------+ | Ring buffer 2 | +-----------------------------------------------------+ T1 +--------------+ CPU3 |xxxxxxxxxxxxxx| -----------+--------------+------------------------------> | v +-----------------------------------------------------+ | Ring buffer 3 | +-----------------------------------------------------+ T1: Thread 1; T2: Thread 2; T3: Thread 3 x: Thread is in running state Figure 6. Ring buffer for system wide mode}hjDsbah}(h]h ]h"]h$]h&]hhuh1jLhhhMQhjhhubeh}(h]system-wide-modeah ]h"]2.2.4 system wide modeah$]h&]uh1hhjEhhhhhM=ubeh}(h]'ring-buffer-for-different-tracing-modesah ]h"]+2.2 ring buffer for different tracing modesah$]h&]uh1hhjhhhhhKrubh)}(hhh](h)}(h2.3 Accessing bufferh]h2.3 Accessing buffer}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhjbhhhhhMubh)}(h~Based on the understanding of how the ring buffer is allocated in various modes, this section explains access the ring buffer.h]h~Based on the understanding of how the ring buffer is allocated in various modes, this section explains access the ring buffer.}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjbhhubh)}(hhh](h)}(h2.3.1 Producer-consumer modelh]h2.3.1 Producer-consumer model}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhMubh)}(hX<In the Linux kernel, the PMU events can produce samples which are stored into the ring buffer; the perf command in user space consumes the samples by reading out data from the ring buffer and finally saves the data into the file for post analysis. It’s a typical producer-consumer model for using the ring buffer.h]hX<In the Linux kernel, the PMU events can produce samples which are stored into the ring buffer; the perf command in user space consumes the samples by reading out data from the ring buffer and finally saves the data into the file for post analysis. It’s a typical producer-consumer model for using the ring buffer.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubh)}(hXThe perf process polls on the PMU events and sleeps when no events are incoming. To prevent frequent exchanges between the kernel and user space, the kernel event core layer introduces a watermark, which is stored in the ``perf_buffer::watermark``. When a sample is recorded into the ring buffer, and if the used buffer exceeds the watermark, the kernel wakes up the perf process to read samples from the ring buffer.h](hThe perf process polls on the PMU events and sleeps when no events are incoming. To prevent frequent exchanges between the kernel and user space, the kernel event core layer introduces a watermark, which is stored in the }(hjhhhNhNubjs)}(h``perf_buffer::watermark``h]hperf_buffer::watermark}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjubh. When a sample is recorded into the ring buffer, and if the used buffer exceeds the watermark, the kernel wakes up the perf process to read samples from the ring buffer.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhjhhubjM)}(hX Perf / | Read samples Polling / `--------------| Ring buffer v v ;---------------------v +----------------+ +---------+---------+ +-------------------+ |Event wait queue| |data_head|data_tail| |***|***| | |***| +----------------+ +---------+---------+ +-------------------+ ^ ^ `------------------------^ | Wake up tasks | Store samples +-----------------------------+ | Kernel event core layer | +-----------------------------+ * : the data is filled by the writer. Figure 7. Writing and reading the ring bufferh]hX Perf / | Read samples Polling / `--------------| Ring buffer v v ;---------------------v +----------------+ +---------+---------+ +-------------------+ |Event wait queue| |data_head|data_tail| |***|***| | |***| +----------------+ +---------+---------+ +-------------------+ ^ ^ `------------------------^ | Wake up tasks | Store samples +-----------------------------+ | Kernel event core layer | +-----------------------------+ * : the data is filled by the writer. Figure 7. Writing and reading the ring buffer}hjsbah}(h]h ]h"]h$]h&]hhuh1jLhhhMhjhhubh)}(hX:When the kernel event core layer notifies the user space, because multiple events might share the same ring buffer for recording samples, the core layer iterates every event associated with the ring buffer and wakes up tasks waiting on the event. This is fulfilled by the kernel function ``ring_buffer_wakeup()``.h](hX!When the kernel event core layer notifies the user space, because multiple events might share the same ring buffer for recording samples, the core layer iterates every event associated with the ring buffer and wakes up tasks waiting on the event. This is fulfilled by the kernel function }(hjhhhNhNubjs)}(h``ring_buffer_wakeup()``h]hring_buffer_wakeup()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhjhhubh)}(hXAfter the perf process is woken up, it starts to check the ring buffers one by one, if it finds any ring buffer containing samples it will read out the samples for statistics or saving into the data file. Given the perf process is able to run on any CPU, this leads to the ring buffer potentially being accessed from multiple CPUs simultaneously, which causes race conditions. The race condition handling is described in the section :ref:`memory_synchronization`.h](hXAfter the perf process is woken up, it starts to check the ring buffers one by one, if it finds any ring buffer containing samples it will read out the samples for statistics or saving into the data file. Given the perf process is able to run on any CPU, this leads to the ring buffer potentially being accessed from multiple CPUs simultaneously, which causes race conditions. The race condition handling is described in the section }(hjhhhNhNubh)}(h:ref:`memory_synchronization`h]j)}(hjh]hmemory_synchronization}(hjhhhNhNubah}(h]h ](jstdstd-refeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftyperef refexplicitrefwarnjmemory_synchronizationuh1hhhhMhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhjhhubeh}(h]producer-consumer-modelah ]h"]2.3.1 producer-consumer modelah$]h&]uh1hhjbhhhhhMubh)}(hhh](h)}(h$2.3.2 Properties of the ring buffersh]h$2.3.2 Properties of the ring buffers}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(hhhhhMubh)}(hX.Linux kernel supports two write directions for the ring buffer: forward and backward. The forward writing saves samples from the beginning of the ring buffer, the backward writing stores data from the end of the ring buffer with the reversed direction. The perf tool determines the writing direction.h]hX.Linux kernel supports two write directions for the ring buffer: forward and backward. The forward writing saves samples from the beginning of the ring buffer, the backward writing stores data from the end of the ring buffer with the reversed direction. The perf tool determines the writing direction.}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj(hhubh)}(heAdditionally, the tool can map buffers in either read-write mode or read-only mode to the user space.h]heAdditionally, the tool can map buffers in either read-write mode or read-only mode to the user space.}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj(hhubh)}(hXhThe ring buffer in the read-write mode is mapped with the property ``PROT_READ | PROT_WRITE``. With the write permission, the perf tool updates the ``data_tail`` to indicate the data start position. Combining with the head pointer ``data_head``, which works as the end position of the current data, the perf tool can easily know where read out the data from.h](hCThe ring buffer in the read-write mode is mapped with the property }(hjUhhhNhNubjs)}(h``PROT_READ | PROT_WRITE``h]hPROT_READ | PROT_WRITE}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjUubh8. With the write permission, the perf tool updates the }(hjUhhhNhNubjs)}(h ``data_tail``h]h data_tail}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjUubhG to indicate the data start position. Combining with the head pointer }(hjUhhhNhNubjs)}(h ``data_head``h]h data_head}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjUubhr, which works as the end position of the current data, the perf tool can easily know where read out the data from.}(hjUhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhj(hhubh)}(hAlternatively, in the read-only mode, only the kernel keeps to update the ``data_head`` while the user space cannot access the ``data_tail`` due to the mapping property ``PROT_READ``.h](hJAlternatively, in the read-only mode, only the kernel keeps to update the }(hjhhhNhNubjs)}(h ``data_head``h]h data_head}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjubh( while the user space cannot access the }(hjhhhNhNubjs)}(h ``data_tail``h]h data_tail}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjubh due to the mapping property }(hjhhhNhNubjs)}(h ``PROT_READ``h]h PROT_READ}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhj(hhubh)}(hAs a result, the matrix below illustrates the various combinations of direction and mapping characteristics. The perf tool employs two of these combinations to support buffer types: the non-overwrite buffer and the overwritable buffer.h]hAs a result, the matrix below illustrates the various combinations of direction and mapping characteristics. The perf tool employs two of these combinations to support buffer types: the non-overwrite buffer and the overwritable buffer.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj(hhubhtable)}(hhh]htgroup)}(hhh](hcolspec)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]jKuh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]jKuh1jhjubhthead)}(hhh]hrow)}(hhh](hentry)}(hhh]h)}(h Mapping modeh]h Mapping mode}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hForwardh]hForward}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj6ubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hBackwardh]hBackward}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjMubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhjubhtbody)}(hhh](j)}(hhh](j)}(hhh]h)}(h read-writeh]h read-write}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjxubah}(h]h ]h"]h$]h&]uh1jhjuubj)}(hhh]h)}(hNon-overwrite ring bufferh]hNon-overwrite ring buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjuubj)}(hhh]h)}(hNot usedh]hNot used}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjuubeh}(h]h ]h"]h$]h&]uh1jhjrubj)}(hhh](j)}(hhh]h)}(h read-onlyh]h read-only}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hNot usedh]hNot used}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hOverwritable ring bufferh]hOverwritable ring buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjrubeh}(h]h ]h"]h$]h&]uh1jphjubeh}(h]h ]h"]h$]h&]colsKuh1jhjubah}(h]h ]colwidths-givenah"]h$]h&]uh1jhj(hhhNhNubh)}(hXThe non-overwrite ring buffer uses the read-write mapping with forward writing. It starts to save data from the beginning of the ring buffer and wrap around when overflow, which is used with the read-write mode in the normal ring buffer. When the consumer doesn't keep up with the producer, it would lose some data, the kernel keeps how many records it lost and generates the ``PERF_RECORD_LOST`` records in the next time when it finds a space in the ring buffer.h](hX|The non-overwrite ring buffer uses the read-write mapping with forward writing. It starts to save data from the beginning of the ring buffer and wrap around when overflow, which is used with the read-write mode in the normal ring buffer. When the consumer doesn’t keep up with the producer, it would lose some data, the kernel keeps how many records it lost and generates the }(hj%hhhNhNubjs)}(h``PERF_RECORD_LOST``h]hPERF_RECORD_LOST}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj%ubhC records in the next time when it finds a space in the ring buffer.}(hj%hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhj(hhubh)}(hX|The overwritable ring buffer uses the backward writing with the read-only mode. It saves the data from the end of the ring buffer and the ``data_head`` keeps the position of current data, the perf always knows where it starts to read and until the end of the ring buffer, thus it don't need the ``data_tail``. In this mode, it will not generate the ``PERF_RECORD_LOST`` records.h](hThe overwritable ring buffer uses the backward writing with the read-only mode. It saves the data from the end of the ring buffer and the }(hjEhhhNhNubjs)}(h ``data_head``h]h data_head}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjEubh keeps the position of current data, the perf always knows where it starts to read and until the end of the ring buffer, thus it don’t need the }(hjEhhhNhNubjs)}(h ``data_tail``h]h data_tail}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjEubh*. In this mode, it will not generate the }(hjEhhhNhNubjs)}(h``PERF_RECORD_LOST``h]hPERF_RECORD_LOST}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjEubh records.}(hjEhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhj(hhubhtarget)}(h .. _writing_samples_into_buffer:h]h}(h]h ]h"]h$]h&]refidwriting-samples-into-bufferuh1jhMhj(hhhhubeh}(h]properties-of-the-ring-buffersah ]h"]$2.3.2 properties of the ring buffersah$]h&]uh1hhjbhhhhhMubh)}(hhh](h)}(h!2.3.3 Writing samples into bufferh]h!2.3.3 Writing samples into buffer}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhMubh)}(hXvWhen a sample is taken and saved into the ring buffer, the kernel prepares sample fields based on the sample type; then it prepares the info for writing ring buffer which is stored in the structure ``perf_output_handle``. In the end, the kernel outputs the sample into the ring buffer and updates the head pointer in the user page so the perf tool can see the latest value.h](hWhen a sample is taken and saved into the ring buffer, the kernel prepares sample fields based on the sample type; then it prepares the info for writing ring buffer which is stored in the structure }(hjhhhNhNubjs)}(h``perf_output_handle``h]hperf_output_handle}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjubh. In the end, the kernel outputs the sample into the ring buffer and updates the head pointer in the user page so the perf tool can see the latest value.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhjhhubh)}(hXThe structure ``perf_output_handle`` serves as a temporary context for tracking the information related to the buffer. The advantages of it is that it enables concurrent writing to the buffer by different events. For example, a software event and a hardware PMU event both are enabled for profiling, two instances of ``perf_output_handle`` serve as separate contexts for the software event and the hardware event respectively. This allows each event to reserve its own memory space for populating the record data.h](hThe structure }(hjhhhNhNubjs)}(h``perf_output_handle``h]hperf_output_handle}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjubhX serves as a temporary context for tracking the information related to the buffer. The advantages of it is that it enables concurrent writing to the buffer by different events. For example, a software event and a hardware PMU event both are enabled for profiling, two instances of }(hjhhhNhNubjs)}(h``perf_output_handle``h]hperf_output_handle}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjubh serve as separate contexts for the software event and the hardware event respectively. This allows each event to reserve its own memory space for populating the record data.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhjhhubeh}(h](jid1eh ]h"](!2.3.3 writing samples into bufferwriting_samples_into_buffereh$]h&]uh1hhjbhhhhhMexpect_referenced_by_name}j jsexpect_referenced_by_id}jjsubh)}(hhh](h)}(h!2.3.4 Reading samples from bufferh]h!2.3.4 Reading samples from buffer}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhMubh)}(hXIn the user space, the perf tool utilizes the ``perf_event_mmap_page`` structure to handle the head and tail of the buffer. It also uses ``perf_mmap`` structure to keep track of a context for the ring buffer, this context includes information about the buffer's starting and ending addresses. Additionally, the mask value can be utilized to compute the circular buffer pointer even for an overflow.h](h.In the user space, the perf tool utilizes the }(hj hhhNhNubjs)}(h``perf_event_mmap_page``h]hperf_event_mmap_page}(hj( hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj ubhD structure to handle the head and tail of the buffer. It also uses }(hj hhhNhNubjs)}(h ``perf_mmap``h]h perf_mmap}(hj: hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj ubh structure to keep track of a context for the ring buffer, this context includes information about the buffer’s starting and ending addresses. Additionally, the mask value can be utilized to compute the circular buffer pointer even for an overflow.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhj hhubh)}(hSimilar to the kernel, the perf tool in the user space first reads out the recorded data from the ring buffer, and then updates the buffer's tail pointer ``perf_event_mmap_page::data_tail``.h](hSimilar to the kernel, the perf tool in the user space first reads out the recorded data from the ring buffer, and then updates the buffer’s tail pointer }(hjR hhhNhNubjs)}(h#``perf_event_mmap_page::data_tail``h]hperf_event_mmap_page::data_tail}(hjZ hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjR ubh.}(hjR hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhM hj hhubj)}(h.. _memory_synchronization:h]h}(h]h ]h"]h$]h&]jmemory-synchronizationuh1jhMhj hhhhubeh}(h]reading-samples-from-bufferah ]h"]!2.3.4 reading samples from bufferah$]h&]uh1hhjbhhhhhMubh)}(hhh](h)}(h2.3.5 Memory synchronizationh]h2.3.5 Memory synchronization}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhMubh)}(hXwThe modern CPUs with relaxed memory model cannot promise the memory ordering, this means it’s possible to access the ring buffer and the ``perf_event_mmap_page`` structure out of order. To assure the specific sequence for memory accessing perf ring buffer, memory barriers are used to assure the data dependency. The rationale for the memory synchronization is as below::h](hThe modern CPUs with relaxed memory model cannot promise the memory ordering, this means it’s possible to access the ring buffer and the }(hj hhhNhNubjs)}(h``perf_event_mmap_page``h]hperf_event_mmap_page}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj ubh structure out of order. To assure the specific sequence for memory accessing perf ring buffer, memory barriers are used to assure the data dependency. The rationale for the memory synchronization is as below:}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhj hhubjM)}(hX%Kernel User space if (LOAD ->data_tail) { LOAD ->data_head (A) smp_rmb() (C) STORE $data LOAD $data smp_wmb() (B) smp_mb() (D) STORE ->data_head STORE ->data_tail }h]hX%Kernel User space if (LOAD ->data_tail) { LOAD ->data_head (A) smp_rmb() (C) STORE $data LOAD $data smp_wmb() (B) smp_mb() (D) STORE ->data_head STORE ->data_tail }}hj sbah}(h]h ]h"]h$]h&]hhuh1jLhhhMhj hhubh)}(hThe comments in tools/include/linux/ring_buffer.h gives nice description for why and how to use memory barriers, here we will just provide an alternative explanation:h]hThe comments in tools/include/linux/ring_buffer.h gives nice description for why and how to use memory barriers, here we will just provide an alternative explanation:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM%hj hhubh)}(h(A) is a control dependency so that CPU assures order between checking pointer ``perf_event_mmap_page::data_tail`` and filling sample into ring buffer;h](hO(A) is a control dependency so that CPU assures order between checking pointer }(hj hhhNhNubjs)}(h#``perf_event_mmap_page::data_tail``h]hperf_event_mmap_page::data_tail}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj ubh% and filling sample into ring buffer;}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhM)hj hhubh)}(hX+(D) pairs with (A). (D) separates the ring buffer data reading from writing the pointer ``data_tail``, perf tool first consumes samples and then tells the kernel that the data chunk has been released. Since a reading operation is followed by a writing operation, thus (D) is a full memory barrier.h](hY(D) pairs with (A). (D) separates the ring buffer data reading from writing the pointer }(hj hhhNhNubjs)}(h ``data_tail``h]h data_tail}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj ubh, perf tool first consumes samples and then tells the kernel that the data chunk has been released. Since a reading operation is followed by a writing operation, thus (D) is a full memory barrier.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhM-hj hhubh)}(h(B) is a writing barrier in the middle of two writing operations, which makes sure that recording a sample must be prior to updating the head pointer.h]h(B) is a writing barrier in the middle of two writing operations, which makes sure that recording a sample must be prior to updating the head pointer.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM3hj hhubh)}(ho(C) pairs with (B). (C) is a read memory barrier to ensure the head pointer is fetched before reading samples.h]ho(C) pairs with (B). (C) is a read memory barrier to ensure the head pointer is fetched before reading samples.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM7hj hhubh)}(hXTo implement the above algorithm, the ``perf_output_put_handle()`` function in the kernel and two helpers ``ring_buffer_read_head()`` and ``ring_buffer_write_tail()`` in the user space are introduced, they rely on memory barriers as described above to ensure the data dependency.h](h&To implement the above algorithm, the }(hj. hhhNhNubjs)}(h``perf_output_put_handle()``h]hperf_output_put_handle()}(hj6 hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj. ubh( function in the kernel and two helpers }(hj. hhhNhNubjs)}(h``ring_buffer_read_head()``h]hring_buffer_read_head()}(hjH hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj. ubh and }(hj. hhhNhNubjs)}(h``ring_buffer_write_tail()``h]hring_buffer_write_tail()}(hjZ hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj. ubhq in the user space are introduced, they rely on memory barriers as described above to ensure the data dependency.}(hj. hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhM:hj hhubh)}(hXSome architectures support one-way permeable barrier with load-acquire and store-release operations, these barriers are more relaxed with less performance penalty, so (C) and (D) can be optimized to use barriers ``smp_load_acquire()`` and ``smp_store_release()`` respectively.h](hSome architectures support one-way permeable barrier with load-acquire and store-release operations, these barriers are more relaxed with less performance penalty, so (C) and (D) can be optimized to use barriers }(hjr hhhNhNubjs)}(h``smp_load_acquire()``h]hsmp_load_acquire()}(hjz hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjr ubh and }(hjr hhhNhNubjs)}(h``smp_store_release()``h]hsmp_store_release()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjr ubh respectively.}(hjr hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhM?hj hhubh)}(hXIf an architecture doesn’t support load-acquire and store-release in its memory model, it will roll back to the old fashion of memory barrier operations. In this case, ``smp_load_acquire()`` encapsulates ``READ_ONCE()`` + ``smp_mb()``, since ``smp_mb()`` is costly, ``ring_buffer_read_head()`` doesn't invoke ``smp_load_acquire()`` and it uses the barriers ``READ_ONCE()`` + ``smp_rmb()`` instead.h](hIf an architecture doesn’t support load-acquire and store-release in its memory model, it will roll back to the old fashion of memory barrier operations. In this case, }(hj hhhNhNubjs)}(h``smp_load_acquire()``h]hsmp_load_acquire()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj ubh encapsulates }(hj hhhNhNubjs)}(h``READ_ONCE()``h]h READ_ONCE()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj ubh + }(hj hhhNhNubjs)}(h ``smp_mb()``h]hsmp_mb()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj ubh, since }(hj hhhNhNubjs)}(h ``smp_mb()``h]hsmp_mb()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj ubh is costly, }(hj hhhNhNubjs)}(h``ring_buffer_read_head()``h]hring_buffer_read_head()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj ubh doesn’t invoke }(hj hhhNhNubjs)}(h``smp_load_acquire()``h]hsmp_load_acquire()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj ubh and it uses the barriers }(hj hhhNhNubjs)}(h``READ_ONCE()``h]h READ_ONCE()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj ubh + }hj sbjs)}(h ``smp_rmb()``h]h smp_rmb()}(hj* hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj ubh instead.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMDhj hhubeh}(h](j| id2eh ]h"](2.3.5 memory synchronizationmemory_synchronizationeh$]h&]uh1hhjbhhhhhMj }jH jr sj }j| jr subeh}(h]accessing-bufferah ]h"]2.3 accessing bufferah$]h&]uh1hhjhhhhhMubeh}(h]ring-buffer-implementationah ]h"]2. ring buffer implementationah$]h&]uh1hhhhhhhhK4ubh)}(hhh](h)}(h#3. The mechanism of AUX ring bufferh]h#3. The mechanism of AUX ring buffer}(hj` hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj] hhhhhMLubh)}(hXxIn this chapter, we will explain the implementation of the AUX ring buffer. In the first part it will discuss the connection between the AUX ring buffer and the regular ring buffer, then the second part will examine how the AUX ring buffer co-works with the regular ring buffer, as well as the additional features introduced by the AUX ring buffer for the sampling mechanism.h]hXxIn this chapter, we will explain the implementation of the AUX ring buffer. In the first part it will discuss the connection between the AUX ring buffer and the regular ring buffer, then the second part will examine how the AUX ring buffer co-works with the regular ring buffer, as well as the additional features introduced by the AUX ring buffer for the sampling mechanism.}(hjn hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMNhj] hhubh)}(hhh](h)}(h93.1 The relationship between AUX and regular ring buffersh]h93.1 The relationship between AUX and regular ring buffers}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj| hhhhhMVubh)}(hXSGenerally, the AUX ring buffer is an auxiliary for the regular ring buffer. The regular ring buffer is primarily used to store the event samples and every event format complies with the definition in the union ``perf_event``; the AUX ring buffer is for recording the hardware trace data and the trace data format is hardware IP dependent.h](hGenerally, the AUX ring buffer is an auxiliary for the regular ring buffer. The regular ring buffer is primarily used to store the event samples and every event format complies with the definition in the union }(hj hhhNhNubjs)}(h``perf_event``h]h perf_event}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj ubhr; the AUX ring buffer is for recording the hardware trace data and the trace data format is hardware IP dependent.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMXhj| hhubh)}(hXThe general use and advantage of the AUX ring buffer is that it is written directly by hardware rather than by the kernel. For example, regular profile samples that write to the regular ring buffer cause an interrupt. Tracing execution requires a high number of samples and using interrupts would be overwhelming for the regular ring buffer mechanism. Having an AUX buffer allows for a region of memory more decoupled from the kernel and written to directly by hardware tracing.h]hXThe general use and advantage of the AUX ring buffer is that it is written directly by hardware rather than by the kernel. For example, regular profile samples that write to the regular ring buffer cause an interrupt. Tracing execution requires a high number of samples and using interrupts would be overwhelming for the regular ring buffer mechanism. Having an AUX buffer allows for a region of memory more decoupled from the kernel and written to directly by hardware tracing.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM^hj| hhubh)}(hXThe AUX ring buffer reuses the same algorithm with the regular ring buffer for the buffer management. The control structure ``perf_event_mmap_page`` extends the new fields ``aux_head`` and ``aux_tail`` for the head and tail pointers of the AUX ring buffer.h](h}The AUX ring buffer reuses the same algorithm with the regular ring buffer for the buffer management. The control structure }(hj hhhNhNubjs)}(h``perf_event_mmap_page``h]hperf_event_mmap_page}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj ubh extends the new fields }(hj hhhNhNubjs)}(h ``aux_head``h]haux_head}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj ubh and }(hj hhhNhNubjs)}(h ``aux_tail``h]haux_tail}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj ubh7 for the head and tail pointers of the AUX ring buffer.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMfhj| hhubh)}(hXDuring the initialisation phase, besides the mmap()-ed regular ring buffer, the perf tool invokes a second syscall in the ``auxtrace_mmap__mmap()`` function for the mmap of the AUX buffer with non-zero file offset; ``rb_alloc_aux()`` in the kernel allocates pages correspondingly, these pages will be deferred to map into VMA when handling the page fault, which is the same lazy mechanism with the regular ring buffer.h](hzDuring the initialisation phase, besides the mmap()-ed regular ring buffer, the perf tool invokes a second syscall in the }(hj hhhNhNubjs)}(h``auxtrace_mmap__mmap()``h]hauxtrace_mmap__mmap()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj ubhD function for the mmap of the AUX buffer with non-zero file offset; }(hj hhhNhNubjs)}(h``rb_alloc_aux()``h]hrb_alloc_aux()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj ubh in the kernel allocates pages correspondingly, these pages will be deferred to map into VMA when handling the page fault, which is the same lazy mechanism with the regular ring buffer.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMkhj| hhubh)}(hOAUX events and AUX trace data are two different things. Let's see an example::h]hPAUX events and AUX trace data are two different things. Let’s see an example:}(hj1 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMshj| hhubjM)}(h/perf record -a -e cycles -e cs_etm// -- sleep 2h]h/perf record -a -e cycles -e cs_etm// -- sleep 2}hj? sbah}(h]h ]h"]h$]h&]hhuh1jLhhhMvhj| hhubh)}(hThe above command enables two events: one is the event *cycles* from PMU and another is the AUX event *cs_etm* from Arm CoreSight, both are saved into the regular ring buffer while the CoreSight's AUX trace data is stored in the AUX ring buffer.h](h7The above command enables two events: one is the event }(hjM hhhNhNubj)}(h*cycles*h]hcycles}(hjU hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjM ubh' from PMU and another is the AUX event }(hjM hhhNhNubj)}(h*cs_etm*h]hcs_etm}(hjg hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjM ubh from Arm CoreSight, both are saved into the regular ring buffer while the CoreSight’s AUX trace data is stored in the AUX ring buffer.}(hjM hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMxhj| hhubh)}(hXfAs a result, we can see the regular ring buffer and the AUX ring buffer are allocated in pairs. The perf in default mode allocates the regular ring buffer and the AUX ring buffer per CPU-wise, which is the same as the system wide mode, however, the default mode records samples only for the profiled program, whereas the latter mode profiles for all programs in the system. For per-thread mode, the perf tool allocates only one regular ring buffer and one AUX ring buffer for the whole session. For the per-CPU mode, the perf allocates two kinds of ring buffers for selected CPUs specified by the option ``-C``.h](hX_As a result, we can see the regular ring buffer and the AUX ring buffer are allocated in pairs. The perf in default mode allocates the regular ring buffer and the AUX ring buffer per CPU-wise, which is the same as the system wide mode, however, the default mode records samples only for the profiled program, whereas the latter mode profiles for all programs in the system. For per-thread mode, the perf tool allocates only one regular ring buffer and one AUX ring buffer for the whole session. For the per-CPU mode, the perf allocates two kinds of ring buffers for selected CPUs specified by the option }(hj hhhNhNubjs)}(h``-C``h]h-C}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj ubh.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhM}hj| hhubh)}(hThe below figure demonstrates the buffers' layout in the system wide mode; if there are any activities on one CPU, the AUX event samples and the hardware trace data will be recorded into the dedicated buffers for the CPU.h]hThe below figure demonstrates the buffers’ layout in the system wide mode; if there are any activities on one CPU, the AUX event samples and the hardware trace data will be recorded into the dedicated buffers for the CPU.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj| hhubjM)}(hX T1 T2 T1 +----+ +-----------+ +----+ CPU0 |xxxx| |xxxxxxxxxxx| |xxxx| +----+--------------+-----------+----------+----+--------> | | | v v v +-----------------------------------------------------+ | Ring buffer 0 | +-----------------------------------------------------+ | | | v v v +-----------------------------------------------------+ | AUX Ring buffer 0 | +-----------------------------------------------------+ T1 +-----+ CPU1 |xxxxx| -----+-----+---------------------------------------------> | v +-----------------------------------------------------+ | Ring buffer 1 | +-----------------------------------------------------+ | v +-----------------------------------------------------+ | AUX Ring buffer 1 | +-----------------------------------------------------+ T1 T3 +----+ +-------+ CPU2 |xxxx| |xxxxxxx| --------------------------+----+--------+-------+--------> | | v v +-----------------------------------------------------+ | Ring buffer 2 | +-----------------------------------------------------+ | | v v +-----------------------------------------------------+ | AUX Ring buffer 2 | +-----------------------------------------------------+ T1 +--------------+ CPU3 |xxxxxxxxxxxxxx| -----------+--------------+------------------------------> | v +-----------------------------------------------------+ | Ring buffer 3 | +-----------------------------------------------------+ | v +-----------------------------------------------------+ | AUX Ring buffer 3 | +-----------------------------------------------------+ T1: Thread 1; T2: Thread 2; T3: Thread 3 x: Thread is in running state Figure 8. AUX ring buffer for system wide modeh]hX T1 T2 T1 +----+ +-----------+ +----+ CPU0 |xxxx| |xxxxxxxxxxx| |xxxx| +----+--------------+-----------+----------+----+--------> | | | v v v +-----------------------------------------------------+ | Ring buffer 0 | +-----------------------------------------------------+ | | | v v v +-----------------------------------------------------+ | AUX Ring buffer 0 | +-----------------------------------------------------+ T1 +-----+ CPU1 |xxxxx| -----+-----+---------------------------------------------> | v +-----------------------------------------------------+ | Ring buffer 1 | +-----------------------------------------------------+ | v +-----------------------------------------------------+ | AUX Ring buffer 1 | +-----------------------------------------------------+ T1 T3 +----+ +-------+ CPU2 |xxxx| |xxxxxxx| --------------------------+----+--------+-------+--------> | | v v +-----------------------------------------------------+ | Ring buffer 2 | +-----------------------------------------------------+ | | v v +-----------------------------------------------------+ | AUX Ring buffer 2 | +-----------------------------------------------------+ T1 +--------------+ CPU3 |xxxxxxxxxxxxxx| -----------+--------------+------------------------------> | v +-----------------------------------------------------+ | Ring buffer 3 | +-----------------------------------------------------+ | v +-----------------------------------------------------+ | AUX Ring buffer 3 | +-----------------------------------------------------+ T1: Thread 1; T2: Thread 2; T3: Thread 3 x: Thread is in running state Figure 8. AUX ring buffer for system wide mode}hj sbah}(h]h ]h"]h$]h&]hhuh1jLhhhMhj| hhubeh}(h]5the-relationship-between-aux-and-regular-ring-buffersah ]h"]93.1 the relationship between aux and regular ring buffersah$]h&]uh1hhj] hhhhhMVubh)}(hhh](h)}(h3.2 AUX eventsh]h3.2 AUX events}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhMubh)}(hSimilar to ``perf_output_begin()`` and ``perf_output_end()``'s working for the regular ring buffer, ``perf_aux_output_begin()`` and ``perf_aux_output_end()`` serve for the AUX ring buffer for processing the hardware trace data.h](h Similar to }(hj hhhNhNubjs)}(h``perf_output_begin()``h]hperf_output_begin()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj ubh and }(hj hhhNhNubjs)}(h``perf_output_end()``h]hperf_output_end()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj ubh*’s working for the regular ring buffer, }(hj hhhNhNubjs)}(h``perf_aux_output_begin()``h]hperf_aux_output_begin()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj ubh and }hj sbjs)}(h``perf_aux_output_end()``h]hperf_aux_output_end()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj ubhF serve for the AUX ring buffer for processing the hardware trace data.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhj hhubh)}(hX Once the hardware trace data is stored into the AUX ring buffer, the PMU driver will stop hardware tracing by calling the ``pmu::stop()`` callback. Similar to the regular ring buffer, the AUX ring buffer needs to apply the memory synchronization mechanism as discussed in the section :ref:`memory_synchronization`. Since the AUX ring buffer is managed by the PMU driver, the barrier (B), which is a writing barrier to ensure the trace data is externally visible prior to updating the head pointer, is asked to be implemented in the PMU driver.h](hzOnce the hardware trace data is stored into the AUX ring buffer, the PMU driver will stop hardware tracing by calling the }(hj* hhhNhNubjs)}(h``pmu::stop()``h]h pmu::stop()}(hj2 hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj* ubh callback. Similar to the regular ring buffer, the AUX ring buffer needs to apply the memory synchronization mechanism as discussed in the section }(hj* hhhNhNubh)}(h:ref:`memory_synchronization`h]j)}(hjF h]hmemory_synchronization}(hjH hhhNhNubah}(h]h ](jstdstd-refeh"]h$]h&]uh1jhjD ubah}(h]h ]h"]h$]h&]refdocj refdomainjR reftyperef refexplicitrefwarnjmemory_synchronizationuh1hhhhMhj* ubh. Since the AUX ring buffer is managed by the PMU driver, the barrier (B), which is a writing barrier to ensure the trace data is externally visible prior to updating the head pointer, is asked to be implemented in the PMU driver.}(hj* hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhj hhubh)}(haThen ``pmu::stop()`` can safely call the ``perf_aux_output_end()`` function to finish two things:h](hThen }(hjn hhhNhNubjs)}(h``pmu::stop()``h]h pmu::stop()}(hjv hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjn ubh can safely call the }(hjn hhhNhNubjs)}(h``perf_aux_output_end()``h]hperf_aux_output_end()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjn ubh function to finish two things:}(hjn hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhj hhubh bullet_list)}(hhh](h list_item)}(hIt fills an event ``PERF_RECORD_AUX`` into the regular ring buffer, this event delivers the information of the start address and data size for a chunk of hardware trace data has been stored into the AUX ring buffer; h]h)}(hIt fills an event ``PERF_RECORD_AUX`` into the regular ring buffer, this event delivers the information of the start address and data size for a chunk of hardware trace data has been stored into the AUX ring buffer;h](hIt fills an event }(hj hhhNhNubjs)}(h``PERF_RECORD_AUX``h]hPERF_RECORD_AUX}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj ubh into the regular ring buffer, this event delivers the information of the start address and data size for a chunk of hardware trace data has been stored into the AUX ring buffer;}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhj ubah}(h]h ]h"]h$]h&]uh1j hj hhhhhNubj )}(hX%Since the hardware trace driver has stored new trace data into the AUX ring buffer, the argument *size* indicates how many bytes have been consumed by the hardware tracing, thus ``perf_aux_output_end()`` updates the header pointer ``perf_buffer::aux_head`` to reflect the latest buffer usage. h]h)}(hX$Since the hardware trace driver has stored new trace data into the AUX ring buffer, the argument *size* indicates how many bytes have been consumed by the hardware tracing, thus ``perf_aux_output_end()`` updates the header pointer ``perf_buffer::aux_head`` to reflect the latest buffer usage.h](haSince the hardware trace driver has stored new trace data into the AUX ring buffer, the argument }(hj hhhNhNubj)}(h*size*h]hsize}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubhK indicates how many bytes have been consumed by the hardware tracing, thus }(hj hhhNhNubjs)}(h``perf_aux_output_end()``h]hperf_aux_output_end()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj ubh updates the header pointer }(hj hhhNhNubjs)}(h``perf_buffer::aux_head``h]hperf_buffer::aux_head}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj ubh$ to reflect the latest buffer usage.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhj ubah}(h]h ]h"]h$]h&]uh1j hj hhhhhNubeh}(h]h ]h"]h$]h&]bullet-uh1j hhhMhj hhubh)}(hAt the end, the PMU driver will restart hardware tracing. During this temporary suspending period, it will lose hardware trace data, which will introduce a discontinuity during decoding phase.h]hAt the end, the PMU driver will restart hardware tracing. During this temporary suspending period, it will lose hardware trace data, which will introduce a discontinuity during decoding phase.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj hhubh)}(hXThe event ``PERF_RECORD_AUX`` presents an AUX event which is handled in the kernel, but it lacks the information for saving the AUX trace data in the perf file. When the perf tool copies the trace data from AUX ring buffer to the perf data file, it synthesizes a ``PERF_RECORD_AUXTRACE`` event which is not a kernel ABI, it's defined by the perf tool to describe which portion of data in the AUX ring buffer is saved. Afterwards, the perf tool reads out the AUX trace data from the perf file based on the ``PERF_RECORD_AUXTRACE`` events, and the ``PERF_RECORD_AUX`` event is used to decode a chunk of data by correlating with time order.h](h The event }(hj5hhhNhNubjs)}(h``PERF_RECORD_AUX``h]hPERF_RECORD_AUX}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj5ubh presents an AUX event which is handled in the kernel, but it lacks the information for saving the AUX trace data in the perf file. When the perf tool copies the trace data from AUX ring buffer to the perf data file, it synthesizes a }(hj5hhhNhNubjs)}(h``PERF_RECORD_AUXTRACE``h]hPERF_RECORD_AUXTRACE}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj5ubh event which is not a kernel ABI, it’s defined by the perf tool to describe which portion of data in the AUX ring buffer is saved. Afterwards, the perf tool reads out the AUX trace data from the perf file based on the }(hj5hhhNhNubjs)}(h``PERF_RECORD_AUXTRACE``h]hPERF_RECORD_AUXTRACE}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj5ubh events, and the }(hj5hhhNhNubjs)}(h``PERF_RECORD_AUX``h]hPERF_RECORD_AUX}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj5ubhH event is used to decode a chunk of data by correlating with time order.}(hj5hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhj hhubeh}(h] aux-eventsah ]h"]3.2 aux eventsah$]h&]uh1hhj] hhhhhMubh)}(hhh](h)}(h3.3 Snapshot modeh]h3.3 Snapshot mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhMubh)}(hPerf supports snapshot mode for AUX ring buffer, in this mode, users only record AUX trace data at a specific time point which users are interested in. E.g. below gives an example of how to take snapshots with 1 second interval with Arm CoreSight::h]hPerf supports snapshot mode for AUX ring buffer, in this mode, users only record AUX trace data at a specific time point which users are interested in. E.g. below gives an example of how to take snapshots with 1 second interval with Arm CoreSight:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubjM)}(hkperf record -e cs_etm//u -S -a program & PERFPID=$! while true; do kill -USR2 $PERFPID sleep 1 doneh]hkperf record -e cs_etm//u -S -a program & PERFPID=$! while true; do kill -USR2 $PERFPID sleep 1 done}hjsbah}(h]h ]h"]h$]h&]hhuh1jLhhhMhjhhubh)}(h#The main flow for snapshot mode is:h]h#The main flow for snapshot mode is:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubj )}(hhh](j )}(hBefore a snapshot is taken, the AUX ring buffer acts in free run mode. During free run mode the perf doesn't record any of the AUX events and trace data; h]h)}(hBefore a snapshot is taken, the AUX ring buffer acts in free run mode. During free run mode the perf doesn't record any of the AUX events and trace data;h]hBefore a snapshot is taken, the AUX ring buffer acts in free run mode. During free run mode the perf doesn’t record any of the AUX events and trace data;}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM hjubah}(h]h ]h"]h$]h&]uh1j hjhhhhhNubj )}(hX3Once the perf tool receives the *USR2* signal, it triggers the callback function ``auxtrace_record::snapshot_start()`` to deactivate hardware tracing. The kernel driver then populates the AUX ring buffer with the hardware trace data, and the event ``PERF_RECORD_AUX`` is stored in the regular ring buffer; h]h)}(hX2Once the perf tool receives the *USR2* signal, it triggers the callback function ``auxtrace_record::snapshot_start()`` to deactivate hardware tracing. The kernel driver then populates the AUX ring buffer with the hardware trace data, and the event ``PERF_RECORD_AUX`` is stored in the regular ring buffer;h](h Once the perf tool receives the }(hjhhhNhNubj)}(h*USR2*h]hUSR2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh+ signal, it triggers the callback function }(hjhhhNhNubjs)}(h%``auxtrace_record::snapshot_start()``h]h!auxtrace_record::snapshot_start()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjubh to deactivate hardware tracing. The kernel driver then populates the AUX ring buffer with the hardware trace data, and the event }(hjhhhNhNubjs)}(h``PERF_RECORD_AUX``h]hPERF_RECORD_AUX}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjubh& is stored in the regular ring buffer;}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1j hjhhhhhNubj )}(hThen perf tool takes a snapshot, ``record__read_auxtrace_snapshot()`` reads out the hardware trace data from the AUX ring buffer and saves it into perf data file; h]h)}(hThen perf tool takes a snapshot, ``record__read_auxtrace_snapshot()`` reads out the hardware trace data from the AUX ring buffer and saves it into perf data file;h](h!Then perf tool takes a snapshot, }(hj;hhhNhNubjs)}(h$``record__read_auxtrace_snapshot()``h]h record__read_auxtrace_snapshot()}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1jrhj;ubh] reads out the hardware trace data from the AUX ring buffer and saves it into perf data file;}(hj;hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhj7ubah}(h]h ]h"]h$]h&]uh1j hjhhhhhNubj )}(hoAfter the snapshot is finished, ``auxtrace_record::snapshot_finish()`` restarts the PMU event for AUX tracing. h]h)}(hnAfter the snapshot is finished, ``auxtrace_record::snapshot_finish()`` restarts the PMU event for AUX tracing.h](h After the snapshot is finished, }(hjehhhNhNubjs)}(h&``auxtrace_record::snapshot_finish()``h]h"auxtrace_record::snapshot_finish()}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjeubh( restarts the PMU event for AUX tracing.}(hjehhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhjaubah}(h]h ]h"]h$]h&]uh1j hjhhhhhNubeh}(h]h ]h"]h$]h&]j%j&uh1j hhhM hjhhubh)}(hXThe perf only accesses the head pointer ``perf_event_mmap_page::aux_head`` in snapshot mode and doesn’t touch tail pointer ``aux_tail``, this is because the AUX ring buffer can overflow in free run mode, the tail pointer is useless in this case. Alternatively, the callback ``auxtrace_record::find_snapshot()`` is introduced for making the decision of whether the AUX ring buffer has been wrapped around or not, at the end it fixes up the AUX buffer's head which are used to calculate the trace data size.h](h(The perf only accesses the head pointer }(hjhhhNhNubjs)}(h"``perf_event_mmap_page::aux_head``h]hperf_event_mmap_page::aux_head}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjubh3 in snapshot mode and doesn’t touch tail pointer }(hjhhhNhNubjs)}(h ``aux_tail``h]haux_tail}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjubh, this is because the AUX ring buffer can overflow in free run mode, the tail pointer is useless in this case. Alternatively, the callback }(hjhhhNhNubjs)}(h$``auxtrace_record::find_snapshot()``h]h auxtrace_record::find_snapshot()}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jrhjubh is introduced for making the decision of whether the AUX ring buffer has been wrapped around or not, at the end it fixes up the AUX buffer’s head which are used to calculate the trace data size.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhMhjhhubh)}(hAs we know, the buffers' deployment can be per-thread mode, per-CPU mode, or system wide mode, and the snapshot can be applied to any of these modes. Below is an example of taking snapshot with system wide mode.h]hAs we know, the buffers’ deployment can be per-thread mode, per-CPU mode, or system wide mode, and the snapshot can be applied to any of these modes. Below is an example of taking snapshot with system wide mode.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM$hjhhubjM)}(hX Snapshot is taken | v +------------------------+ | AUX Ring buffer 0 | <- aux_head +------------------------+ v +--------------------------------+ | AUX Ring buffer 1 | <- aux_head +--------------------------------+ v +--------------------------------------------+ | AUX Ring buffer 2 | <- aux_head +--------------------------------------------+ v +---------------------------------------+ | AUX Ring buffer 3 | <- aux_head +---------------------------------------+ Figure 9. Snapshot with system wide modeh]hX Snapshot is taken | v +------------------------+ | AUX Ring buffer 0 | <- aux_head +------------------------+ v +--------------------------------+ | AUX Ring buffer 1 | <- aux_head +--------------------------------+ v +--------------------------------------------+ | AUX Ring buffer 2 | <- aux_head +--------------------------------------------+ v +---------------------------------------+ | AUX Ring buffer 3 | <- aux_head +---------------------------------------+ Figure 9. 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