€•u       Œsphinx.addnodes”Œdocument”“”)”}”(Œ	rawsource”Œ ”Œchildren”]”(Œtranslations”ŒLanguagesNode”“”)”}”(hhh]”(h Œpending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ
attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ	refdomain”Œstd”Œreftype”Œdoc”Œ	reftarget”Œ"/translations/zh_CN/trace/hisi-ptt”Œmodname”NŒ	classname”NŒrefexplicit”ˆuŒtagname”hhhubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ"/translations/zh_TW/trace/hisi-ptt”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ"/translations/it_IT/trace/hisi-ptt”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ"/translations/ja_JP/trace/hisi-ptt”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ"/translations/ko_KR/trace/hisi-ptt”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒSpanish”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ"/translations/sp_SP/trace/hisi-ptt”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h
hhŒ	_document”hŒsource”NŒline”NubhŒcomment”“”)”}”(hŒ SPDX-License-Identifier: GPL-2.0”h]”hŒ SPDX-License-Identifier: GPL-2.0”…””}”hh£sbah}”(h]”h ]”h"]”h$]”h&]”Œ	xml:space”Œpreserve”uh1h¡hhhžhhŸŒ</var/lib/git/docbuild/linux/Documentation/trace/hisi-ptt.rst”h KubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒ$HiSilicon PCIe Tune and Trace device”h]”hŒ$HiSilicon PCIe Tune and Trace device”…””}”(hh»hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hh¶hžhhŸh³h Kubhµ)”}”(hhh]”(hº)”}”(hŒIntroduction”h]”hŒIntroduction”…””}”(hhÌhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hhÉhžhhŸh³h KubhŒ	paragraph”“”)”}”(hX_  HiSilicon PCIe tune and trace device (PTT) is a PCIe Root Complex
integrated Endpoint (RCiEP) device, providing the capability
to dynamically monitor and tune the PCIe link's events (tune),
and trace the TLP headers (trace). The two functions are independent,
but is recommended to use them together to analyze and enhance the
PCIe link's performance.”h]”hXc  HiSilicon PCIe tune and trace device (PTT) is a PCIe Root Complex
integrated Endpoint (RCiEP) device, providing the capability
to dynamically monitor and tune the PCIe linkâ€™s events (tune),
and trace the TLP headers (trace). The two functions are independent,
but is recommended to use them together to analyze and enhance the
PCIe linkâ€™s performance.”…””}”(hhÜhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h K
hhÉhžhubhÛ)”}”(hŒãOn Kunpeng 930 SoC, the PCIe Root Complex is composed of several
PCIe cores. Each PCIe core includes several Root Ports and a PTT
RCiEP, like below. The PTT device is capable of tuning and
tracing the links of the PCIe core.
::”h]”hŒàOn Kunpeng 930 SoC, the PCIe Root Complex is composed of several
PCIe cores. Each PCIe core includes several Root Ports and a PTT
RCiEP, like below. The PTT device is capable of tuning and
tracing the links of the PCIe core.”…””}”(hhêhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h KhhÉhžhubhŒliteral_block”“”)”}”(hXç        +--------------Core 0-------+
      |       |       [   PTT   ] |
      |       |       [Root Port]---[Endpoint]
      |       |       [Root Port]---[Endpoint]
      |       |       [Root Port]---[Endpoint]
Root Complex  |------Core 1-------+
      |       |       [   PTT   ] |
      |       |       [Root Port]---[ Switch ]---[Endpoint]
      |       |       [Root Port]---[Endpoint] `-[Endpoint]
      |       |       [Root Port]---[Endpoint]
      +---------------------------+”h]”hXç        +--------------Core 0-------+
      |       |       [   PTT   ] |
      |       |       [Root Port]---[Endpoint]
      |       |       [Root Port]---[Endpoint]
      |       |       [Root Port]---[Endpoint]
Root Complex  |------Core 1-------+
      |       |       [   PTT   ] |
      |       |       [Root Port]---[ Switch ]---[Endpoint]
      |       |       [Root Port]---[Endpoint] `-[Endpoint]
      |       |       [Root Port]---[Endpoint]
      +---------------------------+”…””}”hhúsbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1høhŸh³h KhhÉhžhubhÛ)”}”(hXa  The PTT device driver registers one PMU device for each PTT device.
The name of each PTT device is composed of 'hisi_ptt' prefix with
the id of the SICL and the Core where it locates. The Kunpeng 930
SoC encapsulates multiple CPU dies (SCCL, Super CPU Cluster) and
IO dies (SICL, Super I/O Cluster), where there's one PCIe Root
Complex for each SICL.
::”h]”hXd  The PTT device driver registers one PMU device for each PTT device.
The name of each PTT device is composed of â€˜hisi_pttâ€™ prefix with
the id of the SICL and the Core where it locates. The Kunpeng 930
SoC encapsulates multiple CPU dies (SCCL, Super CPU Cluster) and
IO dies (SICL, Super I/O Cluster), where thereâ€™s one PCIe Root
Complex for each SICL.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h K#hhÉhžhubhù)”}”(hŒ9/sys/bus/event_source/devices/hisi_ptt<sicl_id>_<core_id>”h]”hŒ9/sys/bus/event_source/devices/hisi_ptt<sicl_id>_<core_id>”…””}”hj  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1høhŸh³h K+hhÉhžhubeh}”(h]”Œintroduction”ah ]”h"]”Œintroduction”ah$]”h&]”uh1h´hh¶hžhhŸh³h Kubhµ)”}”(hhh]”(hº)”}”(hŒTune”h]”hŒTune”…””}”(hj/  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj,  hžhhŸh³h K.ubhÛ)”}”(hŒÈPTT tune is designed for monitoring and adjusting PCIe link parameters (events).
Currently we support events in 2 classes. The scope of the events
covers the PCIe core to which the PTT device belongs.”h]”hŒÈPTT tune is designed for monitoring and adjusting PCIe link parameters (events).
Currently we support events in 2 classes. The scope of the events
covers the PCIe core to which the PTT device belongs.”…””}”(hj=  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h K0hj,  hžhubhÛ)”}”(hŒˆEach event is presented as a file under $(PTT PMU dir)/tune, and
a simple open/read/write/close cycle will be used to tune the event.
::”h]”hŒ…Each event is presented as a file under $(PTT PMU dir)/tune, and
a simple open/read/write/close cycle will be used to tune the event.”…””}”(hjK  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h K4hj,  hžhubhù)”}”(hŒã$ cd /sys/bus/event_source/devices/hisi_ptt<sicl_id>_<core_id>/tune
$ ls
qos_tx_cpl    qos_tx_np    qos_tx_p
tx_path_rx_req_alloc_buf_level
tx_path_tx_req_alloc_buf_level
$ cat qos_tx_dp
1
$ echo 2 > qos_tx_dp
$ cat qos_tx_dp
2”h]”hŒã$ cd /sys/bus/event_source/devices/hisi_ptt<sicl_id>_<core_id>/tune
$ ls
qos_tx_cpl    qos_tx_np    qos_tx_p
tx_path_rx_req_alloc_buf_level
tx_path_tx_req_alloc_buf_level
$ cat qos_tx_dp
1
$ echo 2 > qos_tx_dp
$ cat qos_tx_dp
2”…””}”hjY  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1høhŸh³h K8hj,  hžhubhÛ)”}”(hŒCurrent value (numerical value) of the event can be simply read
from the file, and the desired value written to the file to tune.”h]”hŒCurrent value (numerical value) of the event can be simply read
from the file, and the desired value written to the file to tune.”…””}”(hjg  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h KChj,  hžhubhµ)”}”(hhh]”(hº)”}”(hŒ1. Tx Path QoS Control”h]”hŒ1. Tx Path QoS Control”…””}”(hjx  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hju  hžhhŸh³h KGubhÛ)”}”(hŒQThe following files are provided to tune the QoS of the tx path of
the PCIe core.”h]”hŒQThe following files are provided to tune the QoS of the tx path of
the PCIe core.”…””}”(hj†  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h KIhju  hžhubhŒbullet_list”“”)”}”(hhh]”(hŒ	list_item”“”)”}”(hŒ(qos_tx_cpl: weight of Tx completion TLPs”h]”hÛ)”}”(hj  h]”hŒ(qos_tx_cpl: weight of Tx completion TLPs”…””}”(hjŸ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h KLhj›  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j™  hj–  hžhhŸh³h Nubjš  )”}”(hŒ'qos_tx_np: weight of Tx non-posted TLPs”h]”hÛ)”}”(hj´  h]”hŒ'qos_tx_np: weight of Tx non-posted TLPs”…””}”(hj¶  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h KMhj²  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j™  hj–  hžhhŸh³h Nubjš  )”}”(hŒ#qos_tx_p: weight of Tx posted TLPs
”h]”hÛ)”}”(hŒ"qos_tx_p: weight of Tx posted TLPs”h]”hŒ"qos_tx_p: weight of Tx posted TLPs”…””}”(hjÍ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h KNhjÉ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j™  hj–  hžhhŸh³h Nubeh}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ-”uh1j”  hŸh³h KLhju  hžhubhÛ)”}”(hŒëThe weight influences the proportion of certain packets on the PCIe link.
For example, for the storage scenario, increase the proportion
of the completion packets on the link to enhance the performance as
more completions are consumed.”h]”hŒëThe weight influences the proportion of certain packets on the PCIe link.
For example, for the storage scenario, increase the proportion
of the completion packets on the link to enhance the performance as
more completions are consumed.”…””}”(hjé  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h KPhju  hžhubhÛ)”}”(hŒãThe available tune data of these events is [0, 1, 2].
Writing a negative value will return an error, and out of range
values will be converted to 2. Note that the event value just
indicates a probable level, but is not precise.”h]”hŒãThe available tune data of these events is [0, 1, 2].
Writing a negative value will return an error, and out of range
values will be converted to 2. Note that the event value just
indicates a probable level, but is not precise.”…””}”(hj÷  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h KUhju  hžhubeh}”(h]”Œtx-path-qos-control”ah ]”h"]”Œ1. tx path qos control”ah$]”h&]”uh1h´hj,  hžhhŸh³h KGubhµ)”}”(hhh]”(hº)”}”(hŒ2. Tx Path Buffer Control”h]”hŒ2. Tx Path Buffer Control”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj  hžhhŸh³h K[ubhÛ)”}”(hŒLFollowing files are provided to tune the buffer of tx path of the PCIe core.”h]”hŒLFollowing files are provided to tune the buffer of tx path of the PCIe core.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h K]hj  hžhubj•  )”}”(hhh]”(jš  )”}”(hŒ-rx_alloc_buf_level: watermark of Rx requested”h]”hÛ)”}”(hj1  h]”hŒ-rx_alloc_buf_level: watermark of Rx requested”…””}”(hj3  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h K_hj/  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j™  hj,  hžhhŸh³h Nubjš  )”}”(hŒ.tx_alloc_buf_level: watermark of Tx requested
”h]”hÛ)”}”(hŒ-tx_alloc_buf_level: watermark of Tx requested”h]”hŒ-tx_alloc_buf_level: watermark of Tx requested”…””}”(hjJ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h K`hjF  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j™  hj,  hžhhŸh³h Nubeh}”(h]”h ]”h"]”h$]”h&]”jç  jè  uh1j”  hŸh³h K_hj  hžhubhÛ)”}”(hX¢  These events influence the watermark of the buffer allocated for each
type. Rx means the inbound while Tx means outbound. The packets will
be stored in the buffer first and then transmitted either when the
watermark reached or when timed out. For a busy direction, you should
increase the related buffer watermark to avoid frequently posting and
thus enhance the performance. In most cases just keep the default value.”h]”hX¢  These events influence the watermark of the buffer allocated for each
type. Rx means the inbound while Tx means outbound. The packets will
be stored in the buffer first and then transmitted either when the
watermark reached or when timed out. For a busy direction, you should
increase the related buffer watermark to avoid frequently posting and
thus enhance the performance. In most cases just keep the default value.”…””}”(hjd  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h Kbhj  hžhubhÛ)”}”(hŒãThe available tune data of above events is [0, 1, 2].
Writing a negative value will return an error, and out of range
values will be converted to 2. Note that the event value just
indicates a probable level, but is not precise.”h]”hŒãThe available tune data of above events is [0, 1, 2].
Writing a negative value will return an error, and out of range
values will be converted to 2. Note that the event value just
indicates a probable level, but is not precise.”…””}”(hjr  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h Kihj  hžhubeh}”(h]”Œtx-path-buffer-control”ah ]”h"]”Œ2. tx path buffer control”ah$]”h&]”uh1h´hj,  hžhhŸh³h K[ubeh}”(h]”Œtune”ah ]”h"]”Œtune”ah$]”h&]”uh1h´hh¶hžhhŸh³h K.ubhµ)”}”(hhh]”(hº)”}”(hŒTrace”h]”hŒTrace”…””}”(hj“  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj  hžhhŸh³h KoubhÛ)”}”(hXz  PTT trace is designed for dumping the TLP headers to the memory, which
can be used to analyze the transactions and usage condition of the PCIe
Link. You can choose to filter the traced headers by either Requester ID,
or those downstream of a set of Root Ports on the same core of the PTT
device. It's also supported to trace the headers of certain type and of
certain direction.”h]”hX|  PTT trace is designed for dumping the TLP headers to the memory, which
can be used to analyze the transactions and usage condition of the PCIe
Link. You can choose to filter the traced headers by either Requester ID,
or those downstream of a set of Root Ports on the same core of the PTT
device. Itâ€™s also supported to trace the headers of certain type and of
certain direction.”…””}”(hj¡  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h Kqhj  hžhubhÛ)”}”(hX1  You can use the perf command `perf record` to set the parameters, start
trace and get the data. It's also supported to decode the trace
data with `perf report`. The control parameters for trace is inputted
as event code for each events, which will be further illustrated later.
An example usage is like
::”h]”(hŒYou can use the perf command ”…””}”(hj¯  hžhhŸNh NubhŒtitle_reference”“”)”}”(hŒ`perf record`”h]”hŒperf record”…””}”(hj¹  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j·  hj¯  ubhŒj to set the parameters, start
trace and get the data. Itâ€™s also supported to decode the trace
data with ”…””}”(hj¯  hžhhŸNh Nubj¸  )”}”(hŒ`perf report`”h]”hŒperf report”…””}”(hjË  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j·  hj¯  ubhŒ. The control parameters for trace is inputted
as event code for each events, which will be further illustrated later.
An example usage is like”…””}”(hj¯  hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h Kxhj  hžhubhù)”}”(hŒV$ perf record -e hisi_ptt0_2/filter=0x80001,type=1,direction=1,
  format=1/ -- sleep 5”h]”hŒV$ perf record -e hisi_ptt0_2/filter=0x80001,type=1,direction=1,
  format=1/ -- sleep 5”…””}”hjã  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1høhŸh³h Khj  hžhubhÛ)”}”(hŒÂThis will trace the TLP headers downstream root port 0000:00:10.1 (event
code for event 'filter' is 0x80001) with type of posted TLP requests,
direction of inbound and traced data format of 8DW.”h]”hŒÆThis will trace the TLP headers downstream root port 0000:00:10.1 (event
code for event â€˜filterâ€™ is 0x80001) with type of posted TLP requests,
direction of inbound and traced data format of 8DW.”…””}”(hjñ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h K‚hj  hžhubhµ)”}”(hhh]”(hº)”}”(hŒ	1. Filter”h]”hŒ	1. Filter”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hjÿ  hžhhŸh³h K‡ubhÛ)”}”(hX‡  The TLP headers to trace can be filtered by the Root Ports or the Requester ID
of the Endpoint, which are located on the same core of the PTT device. You can
set the filter by specifying the `filter` parameter which is required to start
the trace. The parameter value is 20 bit. Bit 19 indicates the filter type.
1 for Root Port filter and 0 for Requester filter. Bit[15:0] indicates the
filter value. The value for a Root Port is a mask of the core port id which is
calculated from its PCI Slot ID as (slotid & 7) * 2. The value for a Requester
is the Requester ID (Device ID of the PCIe function). Bit[18:16] is currently
reserved for extension.”h]”(hŒ¿The TLP headers to trace can be filtered by the Root Ports or the Requester ID
of the Endpoint, which are located on the same core of the PTT device. You can
set the filter by specifying the ”…””}”(hj  hžhhŸNh Nubj¸  )”}”(hŒ`filter`”h]”hŒfilter”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j·  hj  ubhXÀ   parameter which is required to start
the trace. The parameter value is 20 bit. Bit 19 indicates the filter type.
1 for Root Port filter and 0 for Requester filter. Bit[15:0] indicates the
filter value. The value for a Root Port is a mask of the core port id which is
calculated from its PCI Slot ID as (slotid & 7) * 2. The value for a Requester
is the Requester ID (Device ID of the PCIe function). Bit[18:16] is currently
reserved for extension.”…””}”(hj  hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h K‰hjÿ  hžhubhÛ)”}”(hŒÇFor example, if the desired filter is Endpoint function 0000:01:00.1 the filter
value will be 0x00101. If the desired filter is Root Port 0000:00:10.0 then
then filter value is calculated as 0x80001.”h]”hŒÇFor example, if the desired filter is Endpoint function 0000:01:00.1 the filter
value will be 0x00101. If the desired filter is Root Port 0000:00:10.0 then
then filter value is calculated as 0x80001.”…””}”(hj0  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h K“hjÿ  hžhubhÛ)”}”(hXZ  The driver also presents every supported Root Port and Requester filter through
sysfs. Each filter will be an individual file with name of its related PCIe
device name (domain:bus:device.function). The files of Root Port filters are
under $(PTT PMU dir)/root_port_filters and files of Requester filters
are under $(PTT PMU dir)/requester_filters.”h]”hXZ  The driver also presents every supported Root Port and Requester filter through
sysfs. Each filter will be an individual file with name of its related PCIe
device name (domain:bus:device.function). The files of Root Port filters are
under $(PTT PMU dir)/root_port_filters and files of Requester filters
are under $(PTT PMU dir)/requester_filters.”…””}”(hj>  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h K—hjÿ  hžhubhÛ)”}”(hX  Note that multiple Root Ports can be specified at one time, but only one
Endpoint function can be specified in one trace. Specifying both Root Port
and function at the same time is not supported. Driver maintains a list of
available filters and will check the invalid inputs.”h]”hX  Note that multiple Root Ports can be specified at one time, but only one
Endpoint function can be specified in one trace. Specifying both Root Port
and function at the same time is not supported. Driver maintains a list of
available filters and will check the invalid inputs.”…””}”(hjL  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h Khjÿ  hžhubhÛ)”}”(hŒ¹The available filters will be dynamically updated, which means you will always
get correct filter information when hotplug events happen, or when you manually
remove/rescan the devices.”h]”hŒ¹The available filters will be dynamically updated, which means you will always
get correct filter information when hotplug events happen, or when you manually
remove/rescan the devices.”…””}”(hjZ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h K¢hjÿ  hžhubeh}”(h]”Œfilter”ah ]”h"]”Œ	1. filter”ah$]”h&]”uh1h´hj  hžhhŸh³h K‡ubhµ)”}”(hhh]”(hº)”}”(hŒ2. Type”h]”hŒ2. Type”…””}”(hjs  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hjp  hžhhŸh³h K§ubhÛ)”}”(hŒÒYou can trace the TLP headers of certain types by specifying the `type`
parameter, which is required to start the trace. The parameter value is
8 bit. Current supported types and related values are shown below:”h]”(hŒAYou can trace the TLP headers of certain types by specifying the ”…””}”(hj  hžhhŸNh Nubj¸  )”}”(hŒ`type`”h]”hŒtype”…””}”(hj‰  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j·  hj  ubhŒ‹
parameter, which is required to start the trace. The parameter value is
8 bit. Current supported types and related values are shown below:”…””}”(hj  hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h K©hjp  hžhubj•  )”}”(hhh]”(jš  )”}”(hŒ 8'b00000001: posted requests (P)”h]”hÛ)”}”(hj¦  h]”hŒ"8â€™b00000001: posted requests (P)”…””}”(hj¨  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h K­hj¤  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j™  hj¡  hžhhŸh³h Nubjš  )”}”(hŒ%8'b00000010: non-posted requests (NP)”h]”hÛ)”}”(hj½  h]”hŒ'8â€™b00000010: non-posted requests (NP)”…””}”(hj¿  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h K®hj»  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j™  hj¡  hžhhŸh³h Nubjš  )”}”(hŒ8'b00000100: completions (CPL)
”h]”hÛ)”}”(hŒ8'b00000100: completions (CPL)”h]”hŒ 8â€™b00000100: completions (CPL)”…””}”(hjÖ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h K¯hjÒ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j™  hj¡  hžhhŸh³h Nubeh}”(h]”h ]”h"]”h$]”h&]”jç  jè  uh1j”  hŸh³h K­hjp  hžhubhÛ)”}”(hŒ|You can specify multiple types when tracing inbound TLP headers, but can only
specify one when tracing outbound TLP headers.”h]”hŒ|You can specify multiple types when tracing inbound TLP headers, but can only
specify one when tracing outbound TLP headers.”…””}”(hjð  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h K±hjp  hžhubeh}”(h]”Œtype”ah ]”h"]”Œ2. type”ah$]”h&]”uh1h´hj  hžhhŸh³h K§ubhµ)”}”(hhh]”(hº)”}”(hŒ3. Direction”h]”hŒ3. Direction”…””}”(hj	  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj  hžhhŸh³h KµubhÛ)”}”(hXA  You can trace the TLP headers from certain direction, which is relative
to the Root Port or the PCIe core, by specifying the `direction` parameter.
This is optional and the default parameter is inbound. The parameter value
is 4 bit. When the desired format is 4DW, directions and related values
supported are shown below:”h]”(hŒ}You can trace the TLP headers from certain direction, which is relative
to the Root Port or the PCIe core, by specifying the ”…””}”(hj  hžhhŸNh Nubj¸  )”}”(hŒ`direction`”h]”hŒ	direction”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j·  hj  ubhŒ¹ parameter.
This is optional and the default parameter is inbound. The parameter value
is 4 bit. When the desired format is 4DW, directions and related values
supported are shown below:”…””}”(hj  hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h K·hj  hžhubj•  )”}”(hhh]”(jš  )”}”(hŒ"4'b0000: inbound TLPs (P, NP, CPL)”h]”hÛ)”}”(hj<  h]”hŒ$4â€™b0000: inbound TLPs (P, NP, CPL)”…””}”(hj>  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h K½hj:  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j™  hj7  hžhhŸh³h Nubjš  )”}”(hŒ#4'b0001: outbound TLPs (P, NP, CPL)”h]”hÛ)”}”(hjS  h]”hŒ%4â€™b0001: outbound TLPs (P, NP, CPL)”…””}”(hjU  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h K¾hjQ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j™  hj7  hžhhŸh³h Nubjš  )”}”(hŒC4'b0010: outbound TLPs (P, NP, CPL) and inbound TLPs (P, NP, CPL B)”h]”hÛ)”}”(hjj  h]”hŒE4â€™b0010: outbound TLPs (P, NP, CPL) and inbound TLPs (P, NP, CPL B)”…””}”(hjl  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h K¿hjh  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j™  hj7  hžhhŸh³h Nubjš  )”}”(hŒ=4'b0011: outbound TLPs (P, NP, CPL) and inbound TLPs (CPL A)
”h]”hÛ)”}”(hŒ<4'b0011: outbound TLPs (P, NP, CPL) and inbound TLPs (CPL A)”h]”hŒ>4â€™b0011: outbound TLPs (P, NP, CPL) and inbound TLPs (CPL A)”…””}”(hjƒ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h KÀhj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j™  hj7  hžhhŸh³h Nubeh}”(h]”h ]”h"]”h$]”h&]”jç  jè  uh1j”  hŸh³h K½hj  hžhubhÛ)”}”(hŒXWhen the desired format is 8DW, directions and related values supported are
shown below:”h]”hŒXWhen the desired format is 8DW, directions and related values supported are
shown below:”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h KÂhj  hžhubj•  )”}”(hhh]”(jš  )”}”(hŒ4'b0000: reserved”h]”hÛ)”}”(hj°  h]”hŒ4â€™b0000: reserved”…””}”(hj²  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h KÅhj®  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j™  hj«  hžhhŸh³h Nubjš  )”}”(hŒ#4'b0001: outbound TLPs (P, NP, CPL)”h]”hÛ)”}”(hjÇ  h]”hŒ%4â€™b0001: outbound TLPs (P, NP, CPL)”…””}”(hjÉ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h KÆhjÅ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j™  hj«  hžhhŸh³h Nubjš  )”}”(hŒ$4'b0010: inbound TLPs (P, NP, CPL B)”h]”hÛ)”}”(hjÞ  h]”hŒ&4â€™b0010: inbound TLPs (P, NP, CPL B)”…””}”(hjà  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h KÇhjÜ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j™  hj«  hžhhŸh³h Nubjš  )”}”(hŒ4'b0011: inbound TLPs (CPL A)
”h]”hÛ)”}”(hŒ4'b0011: inbound TLPs (CPL A)”h]”hŒ4â€™b0011: inbound TLPs (CPL A)”…””}”(hj÷  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h KÈhjó  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j™  hj«  hžhhŸh³h Nubeh}”(h]”h ]”h"]”h$]”h&]”jç  jè  uh1j”  hŸh³h KÅhj  hžhubhÛ)”}”(hŒ2Inbound completions are classified into two types:”h]”hŒ2Inbound completions are classified into two types:”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h KÊhj  hžhubj•  )”}”(hhh]”(jš  )”}”(hŒXcompletion A (CPL A): completion of CHI/DMA/Native non-posted requests, except for CPL B”h]”hÛ)”}”(hj$  h]”hŒXcompletion A (CPL A): completion of CHI/DMA/Native non-posted requests, except for CPL B”…””}”(hj&  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h KÌhj"  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j™  hj  hžhhŸh³h Nubjš  )”}”(hŒQcompletion B (CPL B): completion of DMA remote2local and P2P non-posted requests
”h]”hÛ)”}”(hŒPcompletion B (CPL B): completion of DMA remote2local and P2P non-posted requests”h]”hŒPcompletion B (CPL B): completion of DMA remote2local and P2P non-posted requests”…””}”(hj=  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h KÍhj9  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j™  hj  hžhhŸh³h Nubeh}”(h]”h ]”h"]”h$]”h&]”jç  jè  uh1j”  hŸh³h KÌhj  hžhubeh}”(h]”Œ	direction”ah ]”h"]”Œ3. direction”ah$]”h&]”uh1h´hj  hžhhŸh³h Kµubhµ)”}”(hhh]”(hº)”}”(hŒ	4. Format”h]”hŒ	4. Format”…””}”(hjb  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj_  hžhhŸh³h KÐubhÛ)”}”(hŒÐYou can change the format of the traced TLP headers by specifying the
`format` parameter. The default format is 4DW. The parameter value is 4 bit.
Current supported formats and related values are shown below:”h]”(hŒFYou can change the format of the traced TLP headers by specifying the
”…””}”(hjp  hžhhŸNh Nubj¸  )”}”(hŒ`format`”h]”hŒformat”…””}”(hjx  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j·  hjp  ubhŒ‚ parameter. The default format is 4DW. The parameter value is 4 bit.
Current supported formats and related values are shown below:”…””}”(hjp  hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h KÒhj_  hžhubj•  )”}”(hhh]”(jš  )”}”(hŒ"4'b0000: 4DW length per TLP header”h]”hÛ)”}”(hj•  h]”hŒ$4â€™b0000: 4DW length per TLP header”…””}”(hj—  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h KÖhj“  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j™  hj  hžhhŸh³h Nubjš  )”}”(hŒ#4'b0001: 8DW length per TLP header
”h]”hÛ)”}”(hŒ"4'b0001: 8DW length per TLP header”h]”hŒ$4â€™b0001: 8DW length per TLP header”…””}”(hj®  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h K×hjª  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j™  hj  hžhhŸh³h Nubeh}”(h]”h ]”h"]”h$]”h&]”jç  jè  uh1j”  hŸh³h KÖhj_  hžhubhÛ)”}”(hŒAThe traced TLP header format is different from the PCIe standard.”h]”hŒAThe traced TLP header format is different from the PCIe standard.”…””}”(hjÈ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h KÙhj_  hžhubhÛ)”}”(hX  When using the 8DW data format, the entire TLP header is logged
(Header DW0-3 shown below). For example, the TLP header for Memory
Reads with 64-bit addresses is shown in PCIe r5.0, Figure 2-17;
the header for Configuration Requests is shown in Figure 2.20, etc.”h]”hX  When using the 8DW data format, the entire TLP header is logged
(Header DW0-3 shown below). For example, the TLP header for Memory
Reads with 64-bit addresses is shown in PCIe r5.0, Figure 2-17;
the header for Configuration Requests is shown in Figure 2.20, etc.”…””}”(hjÖ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h KÛhj_  hžhubhÛ)”}”(hŒ¨In addition, 8DW trace buffer entries contain a timestamp and
possibly a prefix for a PASID TLP prefix (see Figure 6-20, PCIe r5.0).
Otherwise this field will be all 0.”h]”hŒ¨In addition, 8DW trace buffer entries contain a timestamp and
possibly a prefix for a PASID TLP prefix (see Figure 6-20, PCIe r5.0).
Otherwise this field will be all 0.”…””}”(hjä  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h Kàhj_  hžhubhÛ)”}”(hŒqThe bit[31:11] of DW0 is always 0x1fffff, which can be
used to distinguish the data format. 8DW format is like
::”h]”hŒnThe bit[31:11] of DW0 is always 0x1fffff, which can be
used to distinguish the data format. 8DW format is like”…””}”(hjò  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h Kähj_  hžhubhù)”}”(hX  bits [                 31:11                 ][       10:0       ]
     |---------------------------------------|-------------------|
 DW0 [                0x1fffff               ][ Reserved (0x7ff) ]
 DW1 [                       Prefix                              ]
 DW2 [                     Header DW0                            ]
 DW3 [                     Header DW1                            ]
 DW4 [                     Header DW2                            ]
 DW5 [                     Header DW3                            ]
 DW6 [                   Reserved (0x0)                          ]
 DW7 [                        Time                               ]”h]”hX  bits [                 31:11                 ][       10:0       ]
     |---------------------------------------|-------------------|
 DW0 [                0x1fffff               ][ Reserved (0x7ff) ]
 DW1 [                       Prefix                              ]
 DW2 [                     Header DW0                            ]
 DW3 [                     Header DW1                            ]
 DW4 [                     Header DW2                            ]
 DW5 [                     Header DW3                            ]
 DW6 [                   Reserved (0x0)                          ]
 DW7 [                        Time                               ]”…””}”hj   sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1høhŸh³h Kèhj_  hžhubhÛ)”}”(hŒÕWhen using the 4DW data format, DW0 of the trace buffer entry
contains selected fields of DW0 of the TLP, together with a
timestamp.  DW1-DW3 of the trace buffer entry contain DW1-DW3
directly from the TLP header.”h]”hŒÕWhen using the 4DW data format, DW0 of the trace buffer entry
contains selected fields of DW0 of the TLP, together with a
timestamp.  DW1-DW3 of the trace buffer entry contain DW1-DW3
directly from the TLP header.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h Kóhj_  hžhubhÛ)”}”(hŒ4DW format is like
::”h]”hŒ4DW format is like”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h Køhj_  hžhubhù)”}”(hX‘  bits [31:30] [ 29:25 ][24][23][22][21][    20:11   ][    10:0    ]
     |-----|---------|---|---|---|---|-------------|-------------|
 DW0 [ Fmt ][  Type  ][T9][T8][TH][SO][   Length   ][    Time    ]
 DW1 [                     Header DW1                            ]
 DW2 [                     Header DW2                            ]
 DW3 [                     Header DW3                            ]”h]”hX‘  bits [31:30] [ 29:25 ][24][23][22][21][    20:11   ][    10:0    ]
     |-----|---------|---|---|---|---|-------------|-------------|
 DW0 [ Fmt ][  Type  ][T9][T8][TH][SO][   Length   ][    Time    ]
 DW1 [                     Header DW1                            ]
 DW2 [                     Header DW2                            ]
 DW3 [                     Header DW3                            ]”…””}”hj*  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1høhŸh³h Kûhj_  hžhubeh}”(h]”Œformat”ah ]”h"]”Œ	4. format”ah$]”h&]”uh1h´hj  hžhhŸh³h KÐubhµ)”}”(hhh]”(hº)”}”(hŒ5. Memory Management”h]”hŒ5. Memory Management”…””}”(hjC  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj@  hžhhŸh³h MubhÛ)”}”(hX  The traced TLP headers will be written to the memory allocated
by the driver. The hardware accepts 4 DMA address with same size,
and writes the buffer sequentially like below. If DMA addr 3 is
finished and the trace is still on, it will return to addr 0.
::”h]”hŒþThe traced TLP headers will be written to the memory allocated
by the driver. The hardware accepts 4 DMA address with same size,
and writes the buffer sequentially like below. If DMA addr 3 is
finished and the trace is still on, it will return to addr 0.”…””}”(hjQ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h Mhj@  hžhubhù)”}”(hŒw+->[DMA addr 0]->[DMA addr 1]->[DMA addr 2]->[DMA addr 3]-+
+---------------------------------------------------------+”h]”hŒw+->[DMA addr 0]->[DMA addr 1]->[DMA addr 2]->[DMA addr 3]-+
+---------------------------------------------------------+”…””}”hj_  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1høhŸh³h Mhj@  hžhubhÛ)”}”(hX  Driver will allocate each DMA buffer of 4MiB. The finished buffer
will be copied to the perf AUX buffer allocated by the perf core.
Once the AUX buffer is full while the trace is still on, driver
will commit the AUX buffer first and then apply for a new one with
the same size. The size of AUX buffer is default to 16MiB. User can
adjust the size by specifying the `-m` parameter of the perf command.”h]”(hXm  Driver will allocate each DMA buffer of 4MiB. The finished buffer
will be copied to the perf AUX buffer allocated by the perf core.
Once the AUX buffer is full while the trace is still on, driver
will commit the AUX buffer first and then apply for a new one with
the same size. The size of AUX buffer is default to 16MiB. User can
adjust the size by specifying the ”…””}”(hjm  hžhhŸNh Nubj¸  )”}”(hŒ`-m`”h]”hŒ-m”…””}”(hju  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j·  hjm  ubhŒ parameter of the perf command.”…””}”(hjm  hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h Mhj@  hžhubeh}”(h]”Œmemory-management”ah ]”h"]”Œ5. memory management”ah$]”h&]”uh1h´hj  hžhhŸh³h Mubhµ)”}”(hhh]”(hº)”}”(hŒ6. Decoding”h]”hŒ6. Decoding”…””}”(hj˜  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj•  hžhhŸh³h MubhÛ)”}”(hŒÛYou can decode the traced data with `perf report -D` command (currently
only support to dump the raw trace data). The traced data will be decoded
according to the format described previously (take 8DW as an example):
::”h]”(hŒ$You can decode the traced data with ”…””}”(hj¦  hžhhŸNh Nubj¸  )”}”(hŒ`perf report -D`”h]”hŒperf report -D”…””}”(hj®  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j·  hj¦  ubhŒ¤ command (currently
only support to dump the raw trace data). The traced data will be decoded
according to the format described previously (take 8DW as an example):”…””}”(hj¦  hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÚhŸh³h Mhj•  hžhubhù)”}”(hXÁ  [...perf headers and other information]
. ... HISI PTT data: size 4194304 bytes
.  00000000: 00 00 00 00                                 Prefix
.  00000004: 01 00 00 60                                 Header DW0
.  00000008: 0f 1e 00 01                                 Header DW1
.  0000000c: 04 00 00 00                                 Header DW2
.  00000010: 40 00 81 02                                 Header DW3
.  00000014: 33 c0 04 00                                 Time
.  00000020: 00 00 00 00                                 Prefix
.  00000024: 01 00 00 60                                 Header DW0
.  00000028: 0f 1e 00 01                                 Header DW1
.  0000002c: 04 00 00 00                                 Header DW2
.  00000030: 40 00 81 02                                 Header DW3
.  00000034: 02 00 00 00                                 Time
.  00000040: 00 00 00 00                                 Prefix
.  00000044: 01 00 00 60                                 Header DW0
.  00000048: 0f 1e 00 01                                 Header DW1
.  0000004c: 04 00 00 00                                 Header DW2
.  00000050: 40 00 81 02                                 Header DW3
[...]”h]”hXÁ  [...perf headers and other information]
. ... HISI PTT data: size 4194304 bytes
.  00000000: 00 00 00 00                                 Prefix
.  00000004: 01 00 00 60                                 Header DW0
.  00000008: 0f 1e 00 01                                 Header DW1
.  0000000c: 04 00 00 00                                 Header DW2
.  00000010: 40 00 81 02                                 Header DW3
.  00000014: 33 c0 04 00                                 Time
.  00000020: 00 00 00 00                                 Prefix
.  00000024: 01 00 00 60                                 Header DW0
.  00000028: 0f 1e 00 01                                 Header DW1
.  0000002c: 04 00 00 00                                 Header DW2
.  00000030: 40 00 81 02                                 Header DW3
.  00000034: 02 00 00 00                                 Time
.  00000040: 00 00 00 00                                 Prefix
.  00000044: 01 00 00 60                                 Header DW0
.  00000048: 0f 1e 00 01                                 Header DW1
.  0000004c: 04 00 00 00                                 Header DW2
.  00000050: 40 00 81 02                                 Header DW3
[...]”…””}”hjÆ  sbah}”(h]”h ]”h"]”h$]”h&]”h±h²uh1høhŸh³h Mhj•  hžhubeh}”(h]”Œdecoding”ah ]”h"]”Œ6. decoding”ah$]”h&]”uh1h´hj  hžhhŸh³h Mubeh}”(h]”Œtrace”ah ]”h"]”Œtrace”ah$]”h&]”uh1h´hh¶hžhhŸh³h Koubeh}”(h]”Œ$hisilicon-pcie-tune-and-trace-device”ah ]”h"]”Œ$hisilicon pcie tune and trace device”ah$]”h&]”uh1h´hhhžhhŸh³h Kubeh}”(h]”h ]”h"]”h$]”h&]”Œsource”h³uh1hŒcurrent_source”NŒcurrent_line”NŒsettings”Œdocutils.frontend”ŒValues”“”)”}”(h¹NŒ	generator”NŒ	datestamp”NŒsource_link”NŒ
source_url”NŒtoc_backlinks”Œentry”Œfootnote_backlinks”KŒsectnum_xform”KŒstrip_comments”NŒstrip_elements_with_classes”NŒstrip_classes”NŒreport_level”KŒ
halt_level”KŒexit_status_level”KŒdebug”NŒwarning_stream”NŒ	traceback”ˆŒinput_encoding”Œ	utf-8-sig”Œinput_encoding_error_handler”Œstrict”Œoutput_encoding”Œutf-8”Œoutput_encoding_error_handler”j  Œerror_encoding”Œutf-8”Œerror_encoding_error_handler”Œbackslashreplace”Œlanguage_code”Œen”Œrecord_dependencies”NŒconfig”NŒ	id_prefix”hŒauto_id_prefix”Œid”Œdump_settings”NŒdump_internals”NŒdump_transforms”NŒdump_pseudo_xml”NŒexpose_internals”NŒstrict_visitor”NŒ_disable_config”NŒ_source”h³Œ_destination”NŒ_config_files”]”Œ7/var/lib/git/docbuild/linux/Documentation/docutils.conf”aŒfile_insertion_enabled”ˆŒraw_enabled”KŒline_length_limit”M'Œpep_references”NŒpep_base_url”Œhttps://peps.python.org/”Œpep_file_url_template”Œpep-%04d”Œrfc_references”NŒrfc_base_url”Œ&https://datatracker.ietf.org/doc/html/”Œ	tab_width”KŒtrim_footnote_reference_space”‰Œsyntax_highlight”Œlong”Œsmart_quotes”ˆŒsmartquotes_locales”]”Œcharacter_level_inline_markup”‰Œdoctitle_xform”‰Œdocinfo_xform”KŒsectsubtitle_xform”‰Œimage_loading”Œlink”Œembed_stylesheet”‰Œcloak_email_addresses”ˆŒsection_self_link”‰Œenv”NubŒreporter”NŒindirect_targets”]”Œsubstitution_defs”}”Œsubstitution_names”}”Œrefnames”}”Œrefids”}”Œnameids”}”(jé  jæ  j)  j&  j  jŠ  j
  j  j…  j‚  já  jÞ  jm  jj  j  j   j\  jY  j=  j:  j’  j  jÙ  jÖ  uŒ	nametypes”}”(jé  ‰j)  ‰j  ‰j
  ‰j…  ‰já  ‰jm  ‰j  ‰j\  ‰j=  ‰j’  ‰jÙ  ‰uh}”(jæ  h¶j&  hÉjŠ  j,  j  ju  j‚  j  jÞ  j  jj  jÿ  j   jp  jY  j  j:  j_  j  j@  jÖ  j•  uŒfootnote_refs”}”Œcitation_refs”}”Œautofootnotes”]”Œautofootnote_refs”]”Œsymbol_footnotes”]”Œsymbol_footnote_refs”]”Œ	footnotes”]”Œ	citations”]”Œautofootnote_start”KŒsymbol_footnote_start”K Œ
id_counter”Œcollections”ŒCounter”“”}”…”R”Œparse_messages”]”hŒsystem_message”“”)”}”(hhh]”hÛ)”}”(hŒfPossible title underline, too short for the title.
Treating it as ordinary text because it's so short.”h]”hŒhPossible title underline, too short for the title.
Treating it as ordinary text because itâ€™s so short.”…””}”(hjv  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÚhjs  ubah}”(h]”h ]”h"]”h$]”h&]”Œlevel”KŒtype”ŒINFO”Œline”KùŒsource”h³uh1jq  hj_  hžhhŸh³h KùubaŒtransform_messages”]”Œtransformer”NŒinclude_log”]”Œ
decoration”Nhžhub.