€•Ô­      Œsphinx.addnodes”Œdocument”“”)”}”(Œ	rawsource”Œ ”Œchildren”]”(Œtranslations”ŒLanguagesNode”“”)”}”(hhh]”(h Œpending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ
attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ	refdomain”Œstd”Œreftype”Œdoc”Œ	reftarget”Œ)/translations/zh_CN/trace/coresight/panic”Œmodname”NŒ	classname”NŒrefexplicit”ˆuŒtagname”hhhubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ)/translations/zh_TW/trace/coresight/panic”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ)/translations/it_IT/trace/coresight/panic”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ)/translations/ja_JP/trace/coresight/panic”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ)/translations/ko_KR/trace/coresight/panic”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒSpanish”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ)/translations/sp_SP/trace/coresight/panic”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h
hhŒ	_document”hŒsource”NŒline”NubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒ3Using Coresight for Kernel panic and Watchdog reset”h]”hŒ3Using Coresight for Kernel panic and Watchdog reset”…””}”(hh¨hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hh£hžhhŸŒC/var/lib/git/docbuild/linux/Documentation/trace/coresight/panic.rst”h Kubh¢)”}”(hhh]”(h§)”}”(hŒIntroduction”h]”hŒIntroduction”…””}”(hhºhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hh·hžhhŸh¶h KubhŒ	paragraph”“”)”}”(hŒsThis documentation is about using Linux coresight trace support to
debug kernel panic and watchdog reset scenarios.”h]”hŒsThis documentation is about using Linux coresight trace support to
debug kernel panic and watchdog reset scenarios.”…””}”(hhÊhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Khh·hžhubeh}”(h]”Œintroduction”ah ]”h"]”Œintroduction”ah$]”h&]”uh1h¡hh£hžhhŸh¶h Kubh¢)”}”(hhh]”(h§)”}”(hŒ#Coresight trace during Kernel panic”h]”hŒ#Coresight trace during Kernel panic”…””}”(hhãhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hhàhžhhŸh¶h KubhÉ)”}”(hŒjFrom the coresight driver point of view, addressing the kernel panic
situation has four main requirements.”h]”hŒjFrom the coresight driver point of view, addressing the kernel panic
situation has four main requirements.”…””}”(hhñhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h KhhàhžhubhŒenumerated_list”“”)”}”(hhh]”(hŒ	list_item”“”)”}”(hŒ¨Support for allocation of trace buffer pages from reserved memory area.
Platform can advertise this using a new device tree property added to
relevant coresight nodes.
”h]”hÉ)”}”(hŒ§Support for allocation of trace buffer pages from reserved memory area.
Platform can advertise this using a new device tree property added to
relevant coresight nodes.”h]”hŒ§Support for allocation of trace buffer pages from reserved memory area.
Platform can advertise this using a new device tree property added to
relevant coresight nodes.”…””}”(hj
  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Khj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj  hžhhŸh¶h Nubj  )”}”(hŒ;Support for stopping coresight blocks at the time of panic
”h]”hÉ)”}”(hŒ:Support for stopping coresight blocks at the time of panic”h]”hŒ:Support for stopping coresight blocks at the time of panic”…””}”(hj"  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Khj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj  hžhhŸh¶h Nubj  )”}”(hŒ1Saving required metadata in the specified format
”h]”hÉ)”}”(hŒ0Saving required metadata in the specified format”h]”hŒ0Saving required metadata in the specified format”…””}”(hj:  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Khj6  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj  hžhhŸh¶h Nubj  )”}”(hŒ=Support for reading trace data captured at the time of panic
”h]”hÉ)”}”(hŒ<Support for reading trace data captured at the time of panic”h]”hŒ<Support for reading trace data captured at the time of panic”…””}”(hjR  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h KhjN  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj  hžhhŸh¶h Nubeh}”(h]”h ]”h"]”h$]”h&]”Œenumtype”Œ
loweralpha”Œprefix”hŒsuffix”Œ.”uh1hÿhhàhžhhŸh¶h Kubh¢)”}”(hhh]”(h§)”}”(hŒ2Allocation of trace buffer pages from reserved RAM”h]”hŒ2Allocation of trace buffer pages from reserved RAM”…””}”(hjt  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjq  hžhhŸh¶h KubhÉ)”}”(hŒšA new optional device tree property "memory-region" is added to the
Coresight TMC device nodes, that would give the base address and size of trace
buffer.”h]”hŒžA new optional device tree property â€œmemory-regionâ€ is added to the
Coresight TMC device nodes, that would give the base address and size of trace
buffer.”…””}”(hj‚  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Khjq  hžhubhÉ)”}”(hŒôStatic allocation of trace buffers would ensure that both IOMMU enabled
and disabled cases are handled. Also, platforms that support persistent
RAM will allow users to read trace data in the subsequent boot without
booting the crashdump kernel.”h]”hŒôStatic allocation of trace buffers would ensure that both IOMMU enabled
and disabled cases are handled. Also, platforms that support persistent
RAM will allow users to read trace data in the subsequent boot without
booting the crashdump kernel.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Khjq  hžhubhÉ)”}”(hŒîNote:
For ETR sink devices, this reserved region will be used for both trace
capture and trace data retrieval.
For ETF sink devices, internal SRAM would be used for trace capture,
and they would be synced to reserved region for retrieval.”h]”hŒîNote:
For ETR sink devices, this reserved region will be used for both trace
capture and trace data retrieval.
For ETF sink devices, internal SRAM would be used for trace capture,
and they would be synced to reserved region for retrieval.”…””}”(hjž  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h K$hjq  hžhubeh}”(h]”Œ2allocation-of-trace-buffer-pages-from-reserved-ram”ah ]”h"]”Œ2allocation of trace buffer pages from reserved ram”ah$]”h&]”uh1h¡hhàhžhhŸh¶h Kubh¢)”}”(hhh]”(h§)”}”(hŒ/Disabling coresight blocks at the time of panic”h]”hŒ/Disabling coresight blocks at the time of panic”…””}”(hj·  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hj´  hžhhŸh¶h K,ubhÉ)”}”(hŒœIn order to avoid the situation of losing relevant trace data after a
kernel panic, it would be desirable to stop the coresight blocks at the
time of panic.”h]”hŒœIn order to avoid the situation of losing relevant trace data after a
kernel panic, it would be desirable to stop the coresight blocks at the
time of panic.”…””}”(hjÅ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h K-hj´  hžhubhÉ)”}”(hŒSThis can be achieved by configuring the comparator, CTI and sink
devices as below::”h]”hŒRThis can be achieved by configuring the comparator, CTI and sink
devices as below:”…””}”(hjÓ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h K1hj´  hžhubhŒliteral_block”“”)”}”(hŒ[       Trigger on panic
Comparator --->External out --->CTI -->External In---->ETR/ETF stop”h]”hŒ[       Trigger on panic
Comparator --->External out --->CTI -->External In---->ETR/ETF stop”…””}”hjã  sbah}”(h]”h ]”h"]”h$]”h&]”Œ	xml:space”Œpreserve”uh1já  hŸh¶h K4hj´  hžhubeh}”(h]”Œ/disabling-coresight-blocks-at-the-time-of-panic”ah ]”h"]”Œ/disabling coresight blocks at the time of panic”ah$]”h&]”uh1h¡hhàhžhhŸh¶h K,ubh¢)”}”(hhh]”(h§)”}”(hŒ+Saving metadata at the time of kernel panic”h]”hŒ+Saving metadata at the time of kernel panic”…””}”(hjþ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjû  hžhhŸh¶h K8ubhÉ)”}”(hŒ¯Coresight metadata involves all additional data that are required for a
successful trace decode in addition to the trace data. This involves
ETR/ETF/ETB register snapshot etc.”h]”hŒ¯Coresight metadata involves all additional data that are required for a
successful trace decode in addition to the trace data. This involves
ETR/ETF/ETB register snapshot etc.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h K9hjû  hžhubhÉ)”}”(hŒaA new optional device property "memory-region" is added to
the ETR/ETF/ETB device nodes for this.”h]”hŒeA new optional device property â€œmemory-regionâ€ is added to
the ETR/ETF/ETB device nodes for this.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h K=hjû  hžhubeh}”(h]”Œ+saving-metadata-at-the-time-of-kernel-panic”ah ]”h"]”Œ+saving metadata at the time of kernel panic”ah$]”h&]”uh1h¡hhàhžhhŸh¶h K8ubh¢)”}”(hhh]”(h§)”}”(hŒ0Reading trace data captured at the time of panic”h]”hŒ0Reading trace data captured at the time of panic”…””}”(hj3  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hj0  hžhhŸh¶h KAubhÉ)”}”(hŒßTrace data captured at the time of panic, can be read from rebooted kernel
or from crashdump kernel using a special device file /dev/crash_tmc_xxx.
This device file is created only when there is a valid crashdata available.”h]”hŒßTrace data captured at the time of panic, can be read from rebooted kernel
or from crashdump kernel using a special device file /dev/crash_tmc_xxx.
This device file is created only when there is a valid crashdata available.”…””}”(hjA  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h KBhj0  hžhubeh}”(h]”Œ0reading-trace-data-captured-at-the-time-of-panic”ah ]”h"]”Œ0reading trace data captured at the time of panic”ah$]”h&]”uh1h¡hhàhžhhŸh¶h KAubh¢)”}”(hhh]”(h§)”}”(hŒ?General flow of trace capture and decode incase of kernel panic”h]”hŒ?General flow of trace capture and decode incase of kernel panic”…””}”(hjZ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjW  hžhhŸh¶h KGubj   )”}”(hhh]”(j  )”}”(hŒ´Enable source and sink on all the cores using the sysfs interface.
ETR sinks should have trace buffers allocated from reserved memory,
by selecting "resrv" buffer mode from sysfs.
”h]”hÉ)”}”(hŒ³Enable source and sink on all the cores using the sysfs interface.
ETR sinks should have trace buffers allocated from reserved memory,
by selecting "resrv" buffer mode from sysfs.”h]”hŒ·Enable source and sink on all the cores using the sysfs interface.
ETR sinks should have trace buffers allocated from reserved memory,
by selecting â€œresrvâ€ buffer mode from sysfs.”…””}”(hjo  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h KHhjk  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hjh  hžhhŸh¶h Nubj  )”}”(hŒRun relevant tests.
”h]”hÉ)”}”(hŒRun relevant tests.”h]”hŒRun relevant tests.”…””}”(hj‡  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h KLhjƒ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hjh  hžhhŸh¶h Nubj  )”}”(hŒ¨On a kernel panic, all coresight blocks are disabled, necessary
metadata is synced by kernel panic handler.

System would eventually reboot or boot a crashdump kernel.
”h]”(hÉ)”}”(hŒkOn a kernel panic, all coresight blocks are disabled, necessary
metadata is synced by kernel panic handler.”h]”hŒkOn a kernel panic, all coresight blocks are disabled, necessary
metadata is synced by kernel panic handler.”…””}”(hjŸ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h KNhj›  ubhÉ)”}”(hŒ:System would eventually reboot or boot a crashdump kernel.”h]”hŒ:System would eventually reboot or boot a crashdump kernel.”…””}”(hj­  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h KQhj›  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j  hjh  hžhhŸh¶h Nubj  )”}”(hŒÄFor  platforms that supports crashdump kernel, raw trace data can be
dumped using the coresight sysfs interface from the crashdump kernel
itself. Persistent RAM is not a requirement in this case.
”h]”hÉ)”}”(hŒÃFor  platforms that supports crashdump kernel, raw trace data can be
dumped using the coresight sysfs interface from the crashdump kernel
itself. Persistent RAM is not a requirement in this case.”h]”hŒÃFor  platforms that supports crashdump kernel, raw trace data can be
dumped using the coresight sysfs interface from the crashdump kernel
itself. Persistent RAM is not a requirement in this case.”…””}”(hjÅ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h KShjÁ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hjh  hžhhŸh¶h Nubj  )”}”(hŒûFor platforms that supports persistent RAM, trace data can be dumped
using the coresight sysfs interface in the subsequent Linux boot.
Crashdump kernel is not a requirement in this case. Persistent RAM
ensures that trace data is intact across reboot.
”h]”hÉ)”}”(hŒúFor platforms that supports persistent RAM, trace data can be dumped
using the coresight sysfs interface in the subsequent Linux boot.
Crashdump kernel is not a requirement in this case. Persistent RAM
ensures that trace data is intact across reboot.”h]”hŒúFor platforms that supports persistent RAM, trace data can be dumped
using the coresight sysfs interface in the subsequent Linux boot.
Crashdump kernel is not a requirement in this case. Persistent RAM
ensures that trace data is intact across reboot.”…””}”(hjÝ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h KWhjÙ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hjh  hžhhŸh¶h Nubeh}”(h]”h ]”h"]”h$]”h&]”jl  Œarabic”jn  hjo  jp  uh1hÿhjW  hžhhŸh¶h KHubeh}”(h]”Œ?general-flow-of-trace-capture-and-decode-incase-of-kernel-panic”ah ]”h"]”Œ?general flow of trace capture and decode incase of kernel panic”ah$]”h&]”uh1h¡hhàhžhhŸh¶h KGubeh}”(h]”Œ#coresight-trace-during-kernel-panic”ah ]”h"]”Œ#coresight trace during kernel panic”ah$]”h&]”uh1h¡hh£hžhhŸh¶h Kubh¢)”}”(hhh]”(h§)”}”(hŒ%Coresight trace during Watchdog reset”h]”hŒ%Coresight trace during Watchdog reset”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hj  hžhhŸh¶h K]ubhÉ)”}”(hŒZThe main difference between addressing the watchdog reset and kernel panic
case are below,”h]”hŒZThe main difference between addressing the watchdog reset and kernel panic
case are below,”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h K^hj  hžhubj   )”}”(hhh]”(j  )”}”(hŒŠSaving coresight metadata need to be taken care by the
SCP(system control processor) firmware in the specified format,
instead of kernel.
”h]”hÉ)”}”(hŒ‰Saving coresight metadata need to be taken care by the
SCP(system control processor) firmware in the specified format,
instead of kernel.”h]”hŒ‰Saving coresight metadata need to be taken care by the
SCP(system control processor) firmware in the specified format,
instead of kernel.”…””}”(hj.  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Kahj*  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj'  hžhhŸh¶h Nubj  )”}”(hŒ»Reserved memory region given by firmware for trace buffer and metadata
has to be in persistent RAM.
Note: This is a requirement for watchdog reset case but optional
in kernel panic case.
”h]”hÉ)”}”(hŒºReserved memory region given by firmware for trace buffer and metadata
has to be in persistent RAM.
Note: This is a requirement for watchdog reset case but optional
in kernel panic case.”h]”hŒºReserved memory region given by firmware for trace buffer and metadata
has to be in persistent RAM.
Note: This is a requirement for watchdog reset case but optional
in kernel panic case.”…””}”(hjF  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h KehjB  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj'  hžhhŸh¶h Nubeh}”(h]”h ]”h"]”h$]”h&]”jl  jm  jn  hjo  jp  uh1hÿhj  hžhhŸh¶h KaubhÉ)”}”(hŒWWatchdog reset can be supported only on platforms that meet the above
two requirements.”h]”hŒWWatchdog reset can be supported only on platforms that meet the above
two requirements.”…””}”(hj`  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Kjhj  hžhubeh}”(h]”Œ%coresight-trace-during-watchdog-reset”ah ]”h"]”Œ%coresight trace during watchdog reset”ah$]”h&]”uh1h¡hh£hžhhŸh¶h K]ubh¢)”}”(hhh]”(h§)”}”(hŒ=Sample commands for testing a Kernel panic case with ETR sink”h]”hŒ=Sample commands for testing a Kernel panic case with ETR sink”…””}”(hjy  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjv  hžhhŸh¶h Knubj   )”}”(hhh]”(j  )”}”(hŒ¬Boot Linux kernel with "crash_kexec_post_notifiers" added to the kernel
bootargs. This is mandatory if the user would like to read the tracedata
from the crashdump kernel.
”h]”hÉ)”}”(hŒ«Boot Linux kernel with "crash_kexec_post_notifiers" added to the kernel
bootargs. This is mandatory if the user would like to read the tracedata
from the crashdump kernel.”h]”hŒ¯Boot Linux kernel with â€œcrash_kexec_post_notifiersâ€ added to the kernel
bootargs. This is mandatory if the user would like to read the tracedata
from the crashdump kernel.”…””}”(hjŽ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h KphjŠ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj‡  hžhhŸh¶h Nubj  )”}”(hŒrEnable the preloaded ETM configuration::

 #echo 1 > /sys/kernel/config/cs-syscfg/configurations/panicstop/enable
”h]”(hÉ)”}”(hŒ(Enable the preloaded ETM configuration::”h]”hŒ'Enable the preloaded ETM configuration:”…””}”(hj¦  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Kthj¢  ubjâ  )”}”(hŒF#echo 1 > /sys/kernel/config/cs-syscfg/configurations/panicstop/enable”h]”hŒF#echo 1 > /sys/kernel/config/cs-syscfg/configurations/panicstop/enable”…””}”hj´  sbah}”(h]”h ]”h"]”h$]”h&]”jñ  jò  uh1já  hŸh¶h Kvhj¢  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j  hj‡  hžhhŸh¶h Nubj  )”}”(hXo  Configure CTI using sysfs interface::

 #./cti_setup.sh

 #cat cti_setup.sh


 cd /sys/bus/coresight/devices/

 ap_cti_config () {
   #ETM trig out[0] trigger to Channel 0
   echo 0 4 > channels/trigin_attach
 }

 etf_cti_config () {
   #ETF Flush in trigger from Channel 0
   echo 0 1 > channels/trigout_attach
   echo 1 > channels/trig_filter_enable
 }

 etr_cti_config () {
   #ETR Flush in from Channel 0
   echo 0 1 > channels/trigout_attach
   echo 1 > channels/trig_filter_enable
 }

 ctidevs=`find . -name "cti*"`

 for i in $ctidevs
 do
         cd $i

         connection=`find . -name "ete*"`
         if [ ! -z "$connection" ]
         then
                 echo "AP CTI config for $i"
                 ap_cti_config
         fi

         connection=`find . -name "tmc_etf*"`
         if [ ! -z "$connection" ]
         then
                 echo "ETF CTI config for $i"
                 etf_cti_config
         fi

         connection=`find . -name "tmc_etr*"`
         if [ ! -z "$connection" ]
         then
                 echo "ETR CTI config for $i"
                 etr_cti_config
         fi

         cd ..
 done
”h]”(hÉ)”}”(hŒ%Configure CTI using sysfs interface::”h]”hŒ$Configure CTI using sysfs interface:”…””}”(hjÌ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h KxhjÈ  ubjâ  )”}”(hX  #./cti_setup.sh

#cat cti_setup.sh


cd /sys/bus/coresight/devices/

ap_cti_config () {
  #ETM trig out[0] trigger to Channel 0
  echo 0 4 > channels/trigin_attach
}

etf_cti_config () {
  #ETF Flush in trigger from Channel 0
  echo 0 1 > channels/trigout_attach
  echo 1 > channels/trig_filter_enable
}

etr_cti_config () {
  #ETR Flush in from Channel 0
  echo 0 1 > channels/trigout_attach
  echo 1 > channels/trig_filter_enable
}

ctidevs=`find . -name "cti*"`

for i in $ctidevs
do
        cd $i

        connection=`find . -name "ete*"`
        if [ ! -z "$connection" ]
        then
                echo "AP CTI config for $i"
                ap_cti_config
        fi

        connection=`find . -name "tmc_etf*"`
        if [ ! -z "$connection" ]
        then
                echo "ETF CTI config for $i"
                etf_cti_config
        fi

        connection=`find . -name "tmc_etr*"`
        if [ ! -z "$connection" ]
        then
                echo "ETR CTI config for $i"
                etr_cti_config
        fi

        cd ..
done”h]”hX  #./cti_setup.sh

#cat cti_setup.sh


cd /sys/bus/coresight/devices/

ap_cti_config () {
  #ETM trig out[0] trigger to Channel 0
  echo 0 4 > channels/trigin_attach
}

etf_cti_config () {
  #ETF Flush in trigger from Channel 0
  echo 0 1 > channels/trigout_attach
  echo 1 > channels/trig_filter_enable
}

etr_cti_config () {
  #ETR Flush in from Channel 0
  echo 0 1 > channels/trigout_attach
  echo 1 > channels/trig_filter_enable
}

ctidevs=`find . -name "cti*"`

for i in $ctidevs
do
        cd $i

        connection=`find . -name "ete*"`
        if [ ! -z "$connection" ]
        then
                echo "AP CTI config for $i"
                ap_cti_config
        fi

        connection=`find . -name "tmc_etf*"`
        if [ ! -z "$connection" ]
        then
                echo "ETF CTI config for $i"
                etf_cti_config
        fi

        connection=`find . -name "tmc_etr*"`
        if [ ! -z "$connection" ]
        then
                echo "ETR CTI config for $i"
                etr_cti_config
        fi

        cd ..
done”…””}”hjÚ  sbah}”(h]”h ]”h"]”h$]”h&]”jñ  jò  uh1já  hŸh¶h KzhjÈ  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j  hj‡  hžhhŸh¶h Nubeh}”(h]”h ]”h"]”h$]”h&]”jl  j÷  jn  hjo  jp  uh1hÿhjv  hžhhŸh¶h KpubhÉ)”}”(hŒ^Note: CTI connections are SOC specific and hence the above script is
added just for reference.”h]”hŒ^Note: CTI connections are SOC specific and hence the above script is
added just for reference.”…””}”(hjô  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h K°hjv  hžhubj   )”}”(hhh]”(j  )”}”(hŒvChoose reserved buffer mode for ETR buffer::

 #echo "resrv" > /sys/bus/coresight/devices/tmc_etr0/buf_mode_preferred
”h]”(hÉ)”}”(hŒ,Choose reserved buffer mode for ETR buffer::”h]”hŒ+Choose reserved buffer mode for ETR buffer:”…””}”(hj	  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h K³hj  ubjâ  )”}”(hŒF#echo "resrv" > /sys/bus/coresight/devices/tmc_etr0/buf_mode_preferred”h]”hŒF#echo "resrv" > /sys/bus/coresight/devices/tmc_etr0/buf_mode_preferred”…””}”hj  sbah}”(h]”h ]”h"]”h$]”h&]”jñ  jò  uh1já  hŸh¶h Kµhj  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j  hj  hžhhŸh¶h Nubj  )”}”(hŒkEnable stop on flush trigger configuration::

 #echo 1 > /sys/bus/coresight/devices/tmc_etr0/stop_on_flush
”h]”(hÉ)”}”(hŒ,Enable stop on flush trigger configuration::”h]”hŒ+Enable stop on flush trigger configuration:”…””}”(hj/  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h K·hj+  ubjâ  )”}”(hŒ;#echo 1 > /sys/bus/coresight/devices/tmc_etr0/stop_on_flush”h]”hŒ;#echo 1 > /sys/bus/coresight/devices/tmc_etr0/stop_on_flush”…””}”hj=  sbah}”(h]”h ]”h"]”h$]”h&]”jñ  jò  uh1já  hŸh¶h K¹hj+  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j  hj  hžhhŸh¶h Nubj  )”}”(hŒ?Start Coresight tracing on cores 1 and 2 using sysfs interface
”h]”hÉ)”}”(hŒ>Start Coresight tracing on cores 1 and 2 using sysfs interface”h]”hŒ>Start Coresight tracing on cores 1 and 2 using sysfs interface”…””}”(hjU  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h K»hjQ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj  hžhhŸh¶h Nubj  )”}”(hŒSRun some application on core 1::

 #taskset -c 1 dd if=/dev/urandom of=/dev/null &
”h]”(hÉ)”}”(hŒ Run some application on core 1::”h]”hŒRun some application on core 1:”…””}”(hjm  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h K½hji  ubjâ  )”}”(hŒ/#taskset -c 1 dd if=/dev/urandom of=/dev/null &”h]”hŒ/#taskset -c 1 dd if=/dev/urandom of=/dev/null &”…””}”hj{  sbah}”(h]”h ]”h"]”h$]”h&]”jñ  jò  uh1já  hŸh¶h K¿hji  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j  hj  hžhhŸh¶h Nubj  )”}”(hŒoInvoke kernel panic on core 2::

 #echo 1 > /proc/sys/kernel/panic
 #taskset -c 2 echo c > /proc/sysrq-trigger
”h]”(hÉ)”}”(hŒInvoke kernel panic on core 2::”h]”hŒInvoke kernel panic on core 2:”…””}”(hj“  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h KÁhj  ubjâ  )”}”(hŒK#echo 1 > /proc/sys/kernel/panic
#taskset -c 2 echo c > /proc/sysrq-trigger”h]”hŒK#echo 1 > /proc/sys/kernel/panic
#taskset -c 2 echo c > /proc/sysrq-trigger”…””}”hj¡  sbah}”(h]”h ]”h"]”h$]”h&]”jñ  jò  uh1já  hŸh¶h KÃhj  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j  hj  hžhhŸh¶h Nubj  )”}”(hŒnFrom rebooted kernel or crashdump kernel, read crashdata::

 #dd if=/dev/crash_tmc_etr0 of=/trace/cstrace.bin
”h]”(hÉ)”}”(hŒ:From rebooted kernel or crashdump kernel, read crashdata::”h]”hŒ9From rebooted kernel or crashdump kernel, read crashdata:”…””}”(hj¹  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h KÆhjµ  ubjâ  )”}”(hŒ0#dd if=/dev/crash_tmc_etr0 of=/trace/cstrace.bin”h]”hŒ0#dd if=/dev/crash_tmc_etr0 of=/trace/cstrace.bin”…””}”hjÇ  sbah}”(h]”h ]”h"]”h$]”h&]”jñ  jò  uh1já  hŸh¶h KÈhjµ  ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j  hj  hžhhŸh¶h Nubj  )”}”(hŒERun opencsd decoder tools/scripts to generate the instruction trace.
”h]”hÉ)”}”(hŒDRun opencsd decoder tools/scripts to generate the instruction trace.”h]”hŒDRun opencsd decoder tools/scripts to generate the instruction trace.”…””}”(hjß  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h KÊhjÛ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj  hžhhŸh¶h Nubeh}”(h]”h ]”h"]”h$]”h&]”jl  j÷  jn  hjo  jp  Œstart”Kuh1hÿhjv  hžhhŸh¶h K³ubh¢)”}”(hhh]”(h§)”}”(hŒSample instruction trace dump”h]”hŒSample instruction trace dump”…””}”(hjý  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjú  hžhhŸh¶h KÍubhÉ)”}”(hŒCore1 dump::”h]”hŒCore1 dump:”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h KÏhjú  hžhubjâ  )”}”(hX
  A                                  etm4_enable_hw: ffff800008ae1dd4
CONTEXT EL2                        etm4_enable_hw: ffff800008ae1dd4
I                                  etm4_enable_hw: ffff800008ae1dd4:
d503201f   nop
I                                  etm4_enable_hw: ffff800008ae1dd8:
d503201f   nop
I                                  etm4_enable_hw: ffff800008ae1ddc:
d503201f   nop
I                                  etm4_enable_hw: ffff800008ae1de0:
d503201f   nop
I                                  etm4_enable_hw: ffff800008ae1de4:
d503201f   nop
I                                  etm4_enable_hw: ffff800008ae1de8:
d503233f   paciasp
I                                  etm4_enable_hw: ffff800008ae1dec:
a9be7bfd   stp     x29, x30, [sp, #-32]!
I                                  etm4_enable_hw: ffff800008ae1df0:
910003fd   mov     x29, sp
I                                  etm4_enable_hw: ffff800008ae1df4:
a90153f3   stp     x19, x20, [sp, #16]
I                                  etm4_enable_hw: ffff800008ae1df8:
2a0003f4   mov     w20, w0
I                                  etm4_enable_hw: ffff800008ae1dfc:
900085b3   adrp    x19, ffff800009b95000 <reserved_mem+0xc48>
I                                  etm4_enable_hw: ffff800008ae1e00:
910f4273   add     x19, x19, #0x3d0
I                                  etm4_enable_hw: ffff800008ae1e04:
f8747a60   ldr     x0, [x19, x20, lsl #3]
E                                  etm4_enable_hw: ffff800008ae1e08:
b4000140   cbz     x0, ffff800008ae1e30 <etm4_starting_cpu+0x50>
I    149.039572921                 etm4_enable_hw: ffff800008ae1e30:
a94153f3   ldp     x19, x20, [sp, #16]
I    149.039572921                 etm4_enable_hw: ffff800008ae1e34:
52800000   mov     w0, #0x0                        // #0
I    149.039572921                 etm4_enable_hw: ffff800008ae1e38:
a8c27bfd   ldp     x29, x30, [sp], #32

..snip

    149.052324811           chacha_block_generic: ffff800008642d80:
9100a3e0   add     x0,
I    149.052324811           chacha_block_generic: ffff800008642d84:
b86178a2   ldr     w2, [x5, x1, lsl #2]
I    149.052324811           chacha_block_generic: ffff800008642d88:
8b010803   add     x3, x0, x1, lsl #2
I    149.052324811           chacha_block_generic: ffff800008642d8c:
b85fc063   ldur    w3, [x3, #-4]
I    149.052324811           chacha_block_generic: ffff800008642d90:
0b030042   add     w2, w2, w3
I    149.052324811           chacha_block_generic: ffff800008642d94:
b8217882   str     w2, [x4, x1, lsl #2]
I    149.052324811           chacha_block_generic: ffff800008642d98:
91000421   add     x1, x1, #0x1
I    149.052324811           chacha_block_generic: ffff800008642d9c:
f100443f   cmp     x1, #0x11”h]”hX
  A                                  etm4_enable_hw: ffff800008ae1dd4
CONTEXT EL2                        etm4_enable_hw: ffff800008ae1dd4
I                                  etm4_enable_hw: ffff800008ae1dd4:
d503201f   nop
I                                  etm4_enable_hw: ffff800008ae1dd8:
d503201f   nop
I                                  etm4_enable_hw: ffff800008ae1ddc:
d503201f   nop
I                                  etm4_enable_hw: ffff800008ae1de0:
d503201f   nop
I                                  etm4_enable_hw: ffff800008ae1de4:
d503201f   nop
I                                  etm4_enable_hw: ffff800008ae1de8:
d503233f   paciasp
I                                  etm4_enable_hw: ffff800008ae1dec:
a9be7bfd   stp     x29, x30, [sp, #-32]!
I                                  etm4_enable_hw: ffff800008ae1df0:
910003fd   mov     x29, sp
I                                  etm4_enable_hw: ffff800008ae1df4:
a90153f3   stp     x19, x20, [sp, #16]
I                                  etm4_enable_hw: ffff800008ae1df8:
2a0003f4   mov     w20, w0
I                                  etm4_enable_hw: ffff800008ae1dfc:
900085b3   adrp    x19, ffff800009b95000 <reserved_mem+0xc48>
I                                  etm4_enable_hw: ffff800008ae1e00:
910f4273   add     x19, x19, #0x3d0
I                                  etm4_enable_hw: ffff800008ae1e04:
f8747a60   ldr     x0, [x19, x20, lsl #3]
E                                  etm4_enable_hw: ffff800008ae1e08:
b4000140   cbz     x0, ffff800008ae1e30 <etm4_starting_cpu+0x50>
I    149.039572921                 etm4_enable_hw: ffff800008ae1e30:
a94153f3   ldp     x19, x20, [sp, #16]
I    149.039572921                 etm4_enable_hw: ffff800008ae1e34:
52800000   mov     w0, #0x0                        // #0
I    149.039572921                 etm4_enable_hw: ffff800008ae1e38:
a8c27bfd   ldp     x29, x30, [sp], #32

..snip

    149.052324811           chacha_block_generic: ffff800008642d80:
9100a3e0   add     x0,
I    149.052324811           chacha_block_generic: ffff800008642d84:
b86178a2   ldr     w2, [x5, x1, lsl #2]
I    149.052324811           chacha_block_generic: ffff800008642d88:
8b010803   add     x3, x0, x1, lsl #2
I    149.052324811           chacha_block_generic: ffff800008642d8c:
b85fc063   ldur    w3, [x3, #-4]
I    149.052324811           chacha_block_generic: ffff800008642d90:
0b030042   add     w2, w2, w3
I    149.052324811           chacha_block_generic: ffff800008642d94:
b8217882   str     w2, [x4, x1, lsl #2]
I    149.052324811           chacha_block_generic: ffff800008642d98:
91000421   add     x1, x1, #0x1
I    149.052324811           chacha_block_generic: ffff800008642d9c:
f100443f   cmp     x1, #0x11”…””}”hj  sbah}”(h]”h ]”h"]”h$]”h&]”jñ  jò  uh1já  hŸh¶h KÑhjú  hžhubhÉ)”}”(hŒCore 2 dump::”h]”hŒCore 2 dump:”…””}”(hj'  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h M
hjú  hžhubjâ  )”}”(hXd  A                                  etm4_enable_hw: ffff800008ae1dd4
CONTEXT EL2                        etm4_enable_hw: ffff800008ae1dd4
I                                  etm4_enable_hw: ffff800008ae1dd4:
d503201f   nop
I                                  etm4_enable_hw: ffff800008ae1dd8:
d503201f   nop
I                                  etm4_enable_hw: ffff800008ae1ddc:
d503201f   nop
I                                  etm4_enable_hw: ffff800008ae1de0:
d503201f   nop
I                                  etm4_enable_hw: ffff800008ae1de4:
d503201f   nop
I                                  etm4_enable_hw: ffff800008ae1de8:
d503233f   paciasp
I                                  etm4_enable_hw: ffff800008ae1dec:
a9be7bfd   stp     x29, x30, [sp, #-32]!
I                                  etm4_enable_hw: ffff800008ae1df0:
910003fd   mov     x29, sp
I                                  etm4_enable_hw: ffff800008ae1df4:
a90153f3   stp     x19, x20, [sp, #16]
I                                  etm4_enable_hw: ffff800008ae1df8:
2a0003f4   mov     w20, w0
I                                  etm4_enable_hw: ffff800008ae1dfc:
900085b3   adrp    x19, ffff800009b95000 <reserved_mem+0xc48>
I                                  etm4_enable_hw: ffff800008ae1e00:
910f4273   add     x19, x19, #0x3d0
I                                  etm4_enable_hw: ffff800008ae1e04:
f8747a60   ldr     x0, [x19, x20, lsl #3]
E                                  etm4_enable_hw: ffff800008ae1e08:
b4000140   cbz     x0, ffff800008ae1e30 <etm4_starting_cpu+0x50>
I    149.046243445                 etm4_enable_hw: ffff800008ae1e30:
a94153f3   ldp     x19, x20, [sp, #16]
I    149.046243445                 etm4_enable_hw: ffff800008ae1e34:
52800000   mov     w0, #0x0                        // #0
I    149.046243445                 etm4_enable_hw: ffff800008ae1e38:
a8c27bfd   ldp     x29, x30, [sp], #32
I    149.046243445                 etm4_enable_hw: ffff800008ae1e3c:
d50323bf   autiasp
E    149.046243445                 etm4_enable_hw: ffff800008ae1e40:
d65f03c0   ret
A                                ete_sysreg_write: ffff800008adfa18

..snip

I     149.05422547                          panic: ffff800008096300:
a90363f7   stp     x23, x24, [sp, #48]
I     149.05422547                          panic: ffff800008096304:
6b00003f   cmp     w1, w0
I     149.05422547                          panic: ffff800008096308:
3a411804   ccmn    w0, #0x1, #0x4, ne  // ne = any
N     149.05422547                          panic: ffff80000809630c:
540001e0   b.eq    ffff800008096348 <panic+0xe0>  // b.none
I     149.05422547                          panic: ffff800008096310:
f90023f9   str     x25, [sp, #64]
E     149.05422547                          panic: ffff800008096314:
97fe44ef   bl      ffff8000080276d0 <panic_smp_self_stop>
A                                           panic: ffff80000809634c
I     149.05422547                          panic: ffff80000809634c:
910102d5   add     x21, x22, #0x40
I     149.05422547                          panic: ffff800008096350:
52800020   mov     w0, #0x1                        // #1
E     149.05422547                          panic: ffff800008096354:
94166b8b   bl      ffff800008631180 <bust_spinlocks>
N    149.054225518                 bust_spinlocks: ffff800008631180:
340000c0   cbz     w0, ffff800008631198 <bust_spinlocks+0x18>
I    149.054225518                 bust_spinlocks: ffff800008631184:
f000a321   adrp    x1, ffff800009a98000 <pbufs.0+0xbb8>
I    149.054225518                 bust_spinlocks: ffff800008631188:
b9405c20   ldr     w0, [x1, #92]
I    149.054225518                 bust_spinlocks: ffff80000863118c:
11000400   add     w0, w0, #0x1
I    149.054225518                 bust_spinlocks: ffff800008631190:
b9005c20   str     w0, [x1, #92]
E    149.054225518                 bust_spinlocks: ffff800008631194:
d65f03c0   ret
A                                           panic: ffff800008096358”h]”hXd  A                                  etm4_enable_hw: ffff800008ae1dd4
CONTEXT EL2                        etm4_enable_hw: ffff800008ae1dd4
I                                  etm4_enable_hw: ffff800008ae1dd4:
d503201f   nop
I                                  etm4_enable_hw: ffff800008ae1dd8:
d503201f   nop
I                                  etm4_enable_hw: ffff800008ae1ddc:
d503201f   nop
I                                  etm4_enable_hw: ffff800008ae1de0:
d503201f   nop
I                                  etm4_enable_hw: ffff800008ae1de4:
d503201f   nop
I                                  etm4_enable_hw: ffff800008ae1de8:
d503233f   paciasp
I                                  etm4_enable_hw: ffff800008ae1dec:
a9be7bfd   stp     x29, x30, [sp, #-32]!
I                                  etm4_enable_hw: ffff800008ae1df0:
910003fd   mov     x29, sp
I                                  etm4_enable_hw: ffff800008ae1df4:
a90153f3   stp     x19, x20, [sp, #16]
I                                  etm4_enable_hw: ffff800008ae1df8:
2a0003f4   mov     w20, w0
I                                  etm4_enable_hw: ffff800008ae1dfc:
900085b3   adrp    x19, ffff800009b95000 <reserved_mem+0xc48>
I                                  etm4_enable_hw: ffff800008ae1e00:
910f4273   add     x19, x19, #0x3d0
I                                  etm4_enable_hw: ffff800008ae1e04:
f8747a60   ldr     x0, [x19, x20, lsl #3]
E                                  etm4_enable_hw: ffff800008ae1e08:
b4000140   cbz     x0, ffff800008ae1e30 <etm4_starting_cpu+0x50>
I    149.046243445                 etm4_enable_hw: ffff800008ae1e30:
a94153f3   ldp     x19, x20, [sp, #16]
I    149.046243445                 etm4_enable_hw: ffff800008ae1e34:
52800000   mov     w0, #0x0                        // #0
I    149.046243445                 etm4_enable_hw: ffff800008ae1e38:
a8c27bfd   ldp     x29, x30, [sp], #32
I    149.046243445                 etm4_enable_hw: ffff800008ae1e3c:
d50323bf   autiasp
E    149.046243445                 etm4_enable_hw: ffff800008ae1e40:
d65f03c0   ret
A                                ete_sysreg_write: ffff800008adfa18

..snip

I     149.05422547                          panic: ffff800008096300:
a90363f7   stp     x23, x24, [sp, #48]
I     149.05422547                          panic: ffff800008096304:
6b00003f   cmp     w1, w0
I     149.05422547                          panic: ffff800008096308:
3a411804   ccmn    w0, #0x1, #0x4, ne  // ne = any
N     149.05422547                          panic: ffff80000809630c:
540001e0   b.eq    ffff800008096348 <panic+0xe0>  // b.none
I     149.05422547                          panic: ffff800008096310:
f90023f9   str     x25, [sp, #64]
E     149.05422547                          panic: ffff800008096314:
97fe44ef   bl      ffff8000080276d0 <panic_smp_self_stop>
A                                           panic: ffff80000809634c
I     149.05422547                          panic: ffff80000809634c:
910102d5   add     x21, x22, #0x40
I     149.05422547                          panic: ffff800008096350:
52800020   mov     w0, #0x1                        // #1
E     149.05422547                          panic: ffff800008096354:
94166b8b   bl      ffff800008631180 <bust_spinlocks>
N    149.054225518                 bust_spinlocks: ffff800008631180:
340000c0   cbz     w0, ffff800008631198 <bust_spinlocks+0x18>
I    149.054225518                 bust_spinlocks: ffff800008631184:
f000a321   adrp    x1, ffff800009a98000 <pbufs.0+0xbb8>
I    149.054225518                 bust_spinlocks: ffff800008631188:
b9405c20   ldr     w0, [x1, #92]
I    149.054225518                 bust_spinlocks: ffff80000863118c:
11000400   add     w0, w0, #0x1
I    149.054225518                 bust_spinlocks: ffff800008631190:
b9005c20   str     w0, [x1, #92]
E    149.054225518                 bust_spinlocks: ffff800008631194:
d65f03c0   ret
A                                           panic: ffff800008096358”…””}”hj5  sbah}”(h]”h ]”h"]”h$]”h&]”jñ  jò  uh1já  hŸh¶h Mhjú  hžhubeh}”(h]”Œsample-instruction-trace-dump”ah ]”h"]”Œsample instruction trace dump”ah$]”h&]”uh1h¡hjv  hžhhŸh¶h KÍubeh}”(h]”Œ=sample-commands-for-testing-a-kernel-panic-case-with-etr-sink”ah ]”h"]”Œ=sample commands for testing a kernel panic case with etr sink”ah$]”h&]”uh1h¡hh£hžhhŸh¶h Knubh¢)”}”(hhh]”(h§)”}”(hŒPerf based testing”h]”hŒPerf based testing”…””}”(hjV  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjS  hžhhŸh¶h MZubh¢)”}”(hhh]”(h§)”}”(hŒStarting perf session”h]”hŒStarting perf session”…””}”(hjg  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjd  hžhhŸh¶h M]ubhÉ)”}”(hŒETF::”h]”hŒETF:”…””}”(hju  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h M^hjd  hžhubjâ  )”}”(hŒ_perf record -e cs_etm/panicstop,@tmc_etf1/ -C 1
perf record -e cs_etm/panicstop,@tmc_etf2/ -C 2”h]”hŒ_perf record -e cs_etm/panicstop,@tmc_etf1/ -C 1
perf record -e cs_etm/panicstop,@tmc_etf2/ -C 2”…””}”hjƒ  sbah}”(h]”h ]”h"]”h$]”h&]”jñ  jò  uh1já  hŸh¶h M`hjd  hžhubhÉ)”}”(hŒETR::”h]”hŒETR:”…””}”(hj‘  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Mchjd  hžhubjâ  )”}”(hŒ1perf record -e cs_etm/panicstop,@tmc_etr0/ -C 1,2”h]”hŒ1perf record -e cs_etm/panicstop,@tmc_etr0/ -C 1,2”…””}”hjŸ  sbah}”(h]”h ]”h"]”h$]”h&]”jñ  jò  uh1já  hŸh¶h Mehjd  hžhubeh}”(h]”Œstarting-perf-session”ah ]”h"]”Œstarting perf session”ah$]”h&]”uh1h¡hjS  hžhhŸh¶h M]ubh¢)”}”(hhh]”(h§)”}”(hŒReading trace data after panic”h]”hŒReading trace data after panic”…””}”(hj¸  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjµ  hžhhŸh¶h MhubhÉ)”}”(hŒ{Same sysfs based method explained above can be used to retrieve and
decode the trace data after the reboot on kernel panic.”h]”hŒ{Same sysfs based method explained above can be used to retrieve and
decode the trace data after the reboot on kernel panic.”…””}”(hjÆ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Mihjµ  hžhubeh}”(h]”Œreading-trace-data-after-panic”ah ]”h"]”Œreading trace data after panic”ah$]”h&]”uh1h¡hjS  hžhhŸh¶h Mhubeh}”(h]”Œperf-based-testing”ah ]”h"]”Œperf based testing”ah$]”h&]”uh1h¡hh£hžhhŸh¶h MZubeh}”(h]”Œ3using-coresight-for-kernel-panic-and-watchdog-reset”ah ]”h"]”Œ3using coresight for kernel panic and watchdog reset”ah$]”h&]”uh1h¡hhhžhhŸh¶h Kubeh}”(h]”h ]”h"]”h$]”h&]”Œsource”h¶uh1hŒcurrent_source”NŒcurrent_line”NŒsettings”Œdocutils.frontend”ŒValues”“”)”}”(h¦NŒ	generator”NŒ	datestamp”NŒsource_link”NŒ
source_url”NŒtoc_backlinks”Œentry”Œfootnote_backlinks”KŒsectnum_xform”KŒstrip_comments”NŒstrip_elements_with_classes”NŒstrip_classes”NŒreport_level”KŒ
halt_level”KŒexit_status_level”KŒdebug”NŒwarning_stream”NŒ	traceback”ˆŒinput_encoding”Œ	utf-8-sig”Œinput_encoding_error_handler”Œstrict”Œoutput_encoding”Œutf-8”Œoutput_encoding_error_handler”j  Œerror_encoding”Œutf-8”Œerror_encoding_error_handler”Œbackslashreplace”Œlanguage_code”Œen”Œrecord_dependencies”NŒconfig”NŒ	id_prefix”hŒauto_id_prefix”Œid”Œdump_settings”NŒdump_internals”NŒdump_transforms”NŒdump_pseudo_xml”NŒexpose_internals”NŒstrict_visitor”NŒ_disable_config”NŒ_source”h¶Œ_destination”NŒ_config_files”]”Œ7/var/lib/git/docbuild/linux/Documentation/docutils.conf”aŒfile_insertion_enabled”ˆŒraw_enabled”KŒline_length_limit”M'Œpep_references”NŒpep_base_url”Œhttps://peps.python.org/”Œpep_file_url_template”Œpep-%04d”Œrfc_references”NŒrfc_base_url”Œ&https://datatracker.ietf.org/doc/html/”Œ	tab_width”KŒtrim_footnote_reference_space”‰Œsyntax_highlight”Œlong”Œsmart_quotes”ˆŒsmartquotes_locales”]”Œcharacter_level_inline_markup”‰Œdoctitle_xform”‰Œdocinfo_xform”KŒsectsubtitle_xform”‰Œimage_loading”Œlink”Œembed_stylesheet”‰Œcloak_email_addresses”ˆŒsection_self_link”‰Œenv”NubŒreporter”NŒindirect_targets”]”Œsubstitution_defs”}”Œsubstitution_names”}”Œrefnames”}”Œrefids”}”Œnameids”}”(jé  jæ  hÝhÚj  j  j±  j®  jø  jõ  j-  j*  jT  jQ  jý  jú  js  jp  jP  jM  jH  jE  já  jÞ  j²  j¯  jÙ  jÖ  uŒ	nametypes”}”(jé  ‰hÝ‰j  ‰j±  ‰jø  ‰j-  ‰jT  ‰jý  ‰js  ‰jP  ‰jH  ‰já  ‰j²  ‰jÙ  ‰uh}”(jæ  h£hÚh·j  hàj®  jq  jõ  j´  j*  jû  jQ  j0  jú  jW  jp  j  jM  jv  jE  jú  jÞ  jS  j¯  jd  jÖ  jµ  uŒfootnote_refs”}”Œcitation_refs”}”Œautofootnotes”]”Œautofootnote_refs”]”Œsymbol_footnotes”]”Œsymbol_footnote_refs”]”Œ	footnotes”]”Œ	citations”]”Œautofootnote_start”KŒsymbol_footnote_start”K Œ
id_counter”Œcollections”ŒCounter”“”}”…”R”Œparse_messages”]”hŒsystem_message”“”)”}”(hhh]”hÉ)”}”(hŒ:Enumerated list start value not ordinal-1: "4" (ordinal 4)”h]”hŒ>Enumerated list start value not ordinal-1: â€œ4â€ (ordinal 4)”…””}”(hjv  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhjs  ubah}”(h]”h ]”h"]”h$]”h&]”Œlevel”KŒtype”ŒINFO”Œsource”h¶Œline”Kuh1jq  hjv  hžhhŸh¶h K³ubaŒtransform_messages”]”Œtransformer”NŒinclude_log”]”Œ
decoration”Nhžhub.