sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget /translations/zh_CN/scsi/aic79xxmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget /translations/zh_TW/scsi/aic79xxmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget /translations/it_IT/scsi/aic79xxmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget /translations/ja_JP/scsi/aic79xxmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget /translations/ko_KR/scsi/aic79xxmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget /translations/sp_SP/scsi/aic79xxmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhcomment)}(h SPDX-License-Identifier: GPL-2.0h]h SPDX-License-Identifier: GPL-2.0}hhsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1hhhhhh:/var/lib/git/docbuild/linux/Documentation/scsi/aic79xx.rsthKubh)}(h4This data file has been placed in the public domain.h]h4This data file has been placed in the public domain.}hhsbah}(h]h ]h"]h$]h&]hhuh1hhhhhho/srv/docbuild/lib/venvs/build-kernel-docs/lib64/python3.9/site-packages/docutils/parsers/rst/include/isonum.txthKubh)}(hDerived from the Unicode character mappings available from . Processed by unicode2rstsubs.py, part of Docutils: .h]hDerived from the Unicode character mappings available from . Processed by unicode2rstsubs.py, part of Docutils: .}hhsbah}(h]h ]h"]h$]h&]hhuh1hhhhhhhhKubhsubstitution_definition)}(h*.. |amp| unicode:: U+00026 .. AMPERSANDh]h&}hhsbah}(h]h ]h"]ampah$]h&]uh1hhhhKhhhhubh)}(h+.. |apos| unicode:: U+00027 .. APOSTROPHEh]h'}hhsbah}(h]h ]h"]aposah$]h&]uh1hhhhKhhhhubh)}(h).. |ast| unicode:: U+0002A .. ASTERISKh]h*}hhsbah}(h]h ]h"]astah$]h&]uh1hhhhK hhhhubh)}(h+.. |brvbar| unicode:: U+000A6 .. BROKEN BARh]h¦}hjsbah}(h]h ]h"]brvbarah$]h&]uh1hhhhK hhhhubh)}(h0.. |bsol| unicode:: U+0005C .. REVERSE SOLIDUSh]h\}hjsbah}(h]h ]h"]bsolah$]h&]uh1hhhhK hhhhubh)}(h*.. |cent| unicode:: U+000A2 .. CENT SIGNh]h¢}hjsbah}(h]h ]h"]centah$]h&]uh1hhhhK hhhhubh)}(h&.. |colon| unicode:: U+0003A .. COLONh]h:}hj-sbah}(h]h ]h"]colonah$]h&]uh1hhhhK hhhhubh)}(h&.. |comma| unicode:: U+0002C .. COMMAh]h,}hj<sbah}(h]h ]h"]commaah$]h&]uh1hhhhKhhhhubh)}(h... |commat| unicode:: U+00040 .. COMMERCIAL ATh]h@}hjKsbah}(h]h ]h"]commatah$]h&]uh1hhhhKhhhhubh)}(h/.. |copy| unicode:: U+000A9 .. COPYRIGHT SIGNh]h©}hjZsbah}(h]h ]h"]copyah$]h&]uh1hhhhKhhhhubh)}(h... |curren| unicode:: U+000A4 .. CURRENCY SIGNh]h¤}hjisbah}(h]h ]h"]currenah$]h&]uh1hhhhKhhhhubh)}(h0.. |darr| unicode:: U+02193 .. DOWNWARDS ARROWh]h↓}hjxsbah}(h]h ]h"]darrah$]h&]uh1hhhhKhhhhubh)}(h,.. |deg| unicode:: U+000B0 .. DEGREE SIGNh]h°}hjsbah}(h]h ]h"]degah$]h&]uh1hhhhKhhhhubh)}(h... |divide| unicode:: U+000F7 .. DIVISION SIGNh]h÷}hjsbah}(h]h ]h"]divideah$]h&]uh1hhhhKhhhhubh)}(h,.. |dollar| unicode:: U+00024 .. DOLLAR SIGNh]h$}hjsbah}(h]h ]h"]dollarah$]h&]uh1hhhhKhhhhubh)}(h,.. |equals| unicode:: U+0003D .. EQUALS SIGNh]h=}hjsbah}(h]h ]h"]equalsah$]h&]uh1hhhhKhhhhubh)}(h1.. |excl| unicode:: U+00021 .. EXCLAMATION MARKh]h!}hjsbah}(h]h ]h"]exclah$]h&]uh1hhhhKhhhhubh)}(h9.. |frac12| unicode:: U+000BD .. VULGAR FRACTION ONE HALFh]h½}hjsbah}(h]h ]h"]frac12ah$]h&]uh1hhhhKhhhhubh)}(h<.. |frac14| unicode:: U+000BC .. VULGAR FRACTION ONE QUARTERh]h¼}hjsbah}(h]h ]h"]frac14ah$]h&]uh1hhhhKhhhhubh)}(h;.. |frac18| unicode:: U+0215B .. VULGAR FRACTION ONE EIGHTHh]h⅛}hjsbah}(h]h ]h"]frac18ah$]h&]uh1hhhhKhhhhubh)}(h?.. |frac34| unicode:: U+000BE .. VULGAR FRACTION THREE QUARTERSh]h¾}hjsbah}(h]h ]h"]frac34ah$]h&]uh1hhhhKhhhhubh)}(h>.. |frac38| unicode:: U+0215C .. VULGAR FRACTION THREE EIGHTHSh]h⅜}hjsbah}(h]h ]h"]frac38ah$]h&]uh1hhhhKhhhhubh)}(h=.. |frac58| unicode:: U+0215D .. VULGAR FRACTION FIVE EIGHTHSh]h⅝}hjsbah}(h]h ]h"]frac58ah$]h&]uh1hhhhKhhhhubh)}(h>.. |frac78| unicode:: U+0215E .. VULGAR FRACTION SEVEN EIGHTHSh]h⅞}hj,sbah}(h]h ]h"]frac78ah$]h&]uh1hhhhKhhhhubh)}(h2.. |gt| unicode:: U+0003E .. GREATER-THAN SIGNh]h>}hj;sbah}(h]h ]h"]gtah$]h&]uh1hhhhKhhhhubh)}(h9.. |half| unicode:: U+000BD .. VULGAR FRACTION ONE HALFh]h½}hjJsbah}(h]h ]h"]halfah$]h&]uh1hhhhK hhhhubh)}(h/.. |horbar| unicode:: U+02015 .. HORIZONTAL BARh]h―}hjYsbah}(h]h ]h"]horbarah$]h&]uh1hhhhK!hhhhubh)}(h'.. |hyphen| unicode:: U+02010 .. HYPHENh]h‐}hjhsbah}(h]h ]h"]hyphenah$]h&]uh1hhhhK"hhhhubh)}(h:.. |iexcl| unicode:: U+000A1 .. INVERTED EXCLAMATION MARKh]h¡}hjwsbah}(h]h ]h"]iexclah$]h&]uh1hhhhK#hhhhubh)}(h7.. |iquest| unicode:: U+000BF .. INVERTED QUESTION MARKh]h¿}hjsbah}(h]h ]h"]iquestah$]h&]uh1hhhhK$hhhhubh)}(hJ.. |laquo| unicode:: U+000AB .. LEFT-POINTING DOUBLE ANGLE QUOTATION MARKh]h«}hjsbah}(h]h ]h"]laquoah$]h&]uh1hhhhK%hhhhubh)}(h0.. |larr| unicode:: U+02190 .. LEFTWARDS ARROWh]h←}hjsbah}(h]h ]h"]larrah$]h&]uh1hhhhK&hhhhubh)}(h3.. |lcub| unicode:: U+0007B .. LEFT CURLY BRACKETh]h{}hjsbah}(h]h ]h"]lcubah$]h&]uh1hhhhK'hhhhubh)}(h;.. |ldquo| unicode:: U+0201C .. LEFT DOUBLE QUOTATION MARKh]h“}hjsbah}(h]h ]h"]ldquoah$]h&]uh1hhhhK(hhhhubh)}(h).. |lowbar| unicode:: U+0005F .. LOW LINEh]h_}hjsbah}(h]h ]h"]lowbarah$]h&]uh1hhhhK)hhhhubh)}(h1.. |lpar| unicode:: U+00028 .. LEFT PARENTHESISh]h(}hjsbah}(h]h ]h"]lparah$]h&]uh1hhhhK*hhhhubh)}(h4.. |lsqb| unicode:: U+0005B .. LEFT SQUARE BRACKETh]h[}hjsbah}(h]h ]h"]lsqbah$]h&]uh1hhhhK+hhhhubh)}(h;.. |lsquo| unicode:: U+02018 .. LEFT SINGLE QUOTATION MARKh]h‘}hjsbah}(h]h ]h"]lsquoah$]h&]uh1hhhhK,hhhhubh)}(h/.. |lt| unicode:: U+0003C .. LESS-THAN SIGNh]h<}hj sbah}(h]h ]h"]ltah$]h&]uh1hhhhK-hhhhubh)}(h+.. |micro| unicode:: U+000B5 .. MICRO SIGNh]hµ}hjsbah}(h]h ]h"]microah$]h&]uh1hhhhK.hhhhubh)}(h+.. |middot| unicode:: U+000B7 .. MIDDLE DOTh]h·}hj+sbah}(h]h ]h"]middotah$]h&]uh1hhhhK/hhhhubh)}(h/.. |nbsp| unicode:: U+000A0 .. NO-BREAK SPACEh]h }hj:sbah}(h]h ]h"]nbspah$]h&]uh1hhhhK0hhhhubh)}(h).. |not| unicode:: U+000AC .. NOT SIGNh]h¬}hjIsbah}(h]h ]h"]notah$]h&]uh1hhhhK1hhhhubh)}(h,.. |num| unicode:: U+00023 .. NUMBER SIGNh]h#}hjXsbah}(h]h ]h"]numah$]h&]uh1hhhhK2hhhhubh)}(h).. |ohm| unicode:: U+02126 .. OHM SIGNh]hΩ}hjgsbah}(h]h ]h"]ohmah$]h&]uh1hhhhK3hhhhubh)}(h;.. |ordf| unicode:: U+000AA .. FEMININE ORDINAL INDICATORh]hª}hjvsbah}(h]h ]h"]ordfah$]h&]uh1hhhhK4hhhhubh)}(h<.. |ordm| unicode:: U+000BA .. MASCULINE ORDINAL INDICATORh]hº}hjsbah}(h]h ]h"]ordmah$]h&]uh1hhhhK5hhhhubh)}(h-.. |para| unicode:: U+000B6 .. PILCROW SIGNh]h¶}hjsbah}(h]h ]h"]paraah$]h&]uh1hhhhK6hhhhubh)}(h-.. |percnt| unicode:: U+00025 .. PERCENT SIGNh]h%}hjsbah}(h]h ]h"]percntah$]h&]uh1hhhhK7hhhhubh)}(h*.. |period| unicode:: U+0002E .. FULL STOPh]h.}hjsbah}(h]h ]h"]periodah$]h&]uh1hhhhK8hhhhubh)}(h*.. |plus| unicode:: U+0002B .. PLUS SIGNh]h+}hjsbah}(h]h ]h"]plusah$]h&]uh1hhhhK9hhhhubh)}(h0.. |plusmn| unicode:: U+000B1 .. PLUS-MINUS SIGNh]h±}hjsbah}(h]h ]h"]plusmnah$]h&]uh1hhhhK:hhhhubh)}(h+.. |pound| unicode:: U+000A3 .. POUND SIGNh]h£}hjsbah}(h]h ]h"]poundah$]h&]uh1hhhhK;hhhhubh)}(h... |quest| unicode:: U+0003F .. QUESTION MARKh]h?}hjsbah}(h]h ]h"]questah$]h&]uh1hhhhKhhhhubh)}(h1.. |rarr| unicode:: U+02192 .. RIGHTWARDS ARROWh]h→}hjsbah}(h]h ]h"]rarrah$]h&]uh1hhhhK?hhhhubh)}(h4.. |rcub| unicode:: U+0007D .. RIGHT CURLY BRACKETh]h}}hj*sbah}(h]h ]h"]rcubah$]h&]uh1hhhhK@hhhhubh)}(h<.. |rdquo| unicode:: U+0201D .. RIGHT DOUBLE QUOTATION MARKh]h”}hj9sbah}(h]h ]h"]rdquoah$]h&]uh1hhhhKAhhhhubh)}(h0.. |reg| unicode:: U+000AE .. REGISTERED SIGNh]h®}hjHsbah}(h]h ]h"]regah$]h&]uh1hhhhKBhhhhubh)}(h2.. |rpar| unicode:: U+00029 .. RIGHT PARENTHESISh]h)}hjWsbah}(h]h ]h"]rparah$]h&]uh1hhhhKChhhhubh)}(h5.. |rsqb| unicode:: U+0005D .. RIGHT SQUARE BRACKETh]h]}hjfsbah}(h]h ]h"]rsqbah$]h&]uh1hhhhKDhhhhubh)}(h<.. |rsquo| unicode:: U+02019 .. RIGHT SINGLE QUOTATION MARKh]h’}hjusbah}(h]h ]h"]rsquoah$]h&]uh1hhhhKEhhhhubh)}(h-.. |sect| unicode:: U+000A7 .. SECTION SIGNh]h§}hjsbah}(h]h ]h"]sectah$]h&]uh1hhhhKFhhhhubh)}(h*.. |semi| unicode:: U+0003B .. SEMICOLONh]h;}hjsbah}(h]h ]h"]semiah$]h&]uh1hhhhKGhhhhubh)}(h,.. |shy| unicode:: U+000AD .. SOFT HYPHENh]h­}hjsbah}(h]h ]h"]shyah$]h&]uh1hhhhKHhhhhubh)}(h(.. |sol| unicode:: U+0002F .. SOLIDUSh]h/}hjsbah}(h]h ]h"]solah$]h&]uh1hhhhKIhhhhubh)}(h,.. |sung| unicode:: U+0266A .. EIGHTH NOTEh]h♪}hjsbah}(h]h ]h"]sungah$]h&]uh1hhhhKJhhhhubh)}(h0.. |sup1| unicode:: U+000B9 .. SUPERSCRIPT ONEh]h¹}hjsbah}(h]h ]h"]sup1ah$]h&]uh1hhhhKKhhhhubh)}(h0.. |sup2| unicode:: U+000B2 .. SUPERSCRIPT TWOh]h²}hjsbah}(h]h ]h"]sup2ah$]h&]uh1hhhhKLhhhhubh)}(h2.. |sup3| unicode:: U+000B3 .. SUPERSCRIPT THREEh]h³}hjsbah}(h]h ]h"]sup3ah$]h&]uh1hhhhKMhhhhubh)}(h4.. |times| unicode:: U+000D7 .. MULTIPLICATION SIGNh]h×}hjsbah}(h]h ]h"]timesah$]h&]uh1hhhhKNhhhhubh)}(h0.. |trade| unicode:: U+02122 .. TRADE MARK SIGNh]h™}hj sbah}(h]h ]h"]tradeah$]h&]uh1hhhhKOhhhhubh)}(h... |uarr| unicode:: U+02191 .. UPWARDS ARROWh]h↑}hjsbah}(h]h ]h"]uarrah$]h&]uh1hhhhKPhhhhubh)}(h... |verbar| unicode:: U+0007C .. VERTICAL LINEh]h|}hj)sbah}(h]h ]h"]verbarah$]h&]uh1hhhhKQhhhhubh)}(h*.. |yen| unicode:: U+000A5 .. YEN SIGN h]h¥}hj8sbah}(h]h ]h"]yenah$]h&]uh1hhhhKRhhhhubhsection)}(hhh](htitle)}(h#Adaptec Ultra320 Family Manager Seth]h#Adaptec Ultra320 Family Manager Set}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1jLhjIhhhhhKubh paragraph)}(h%README for The Linux Operating Systemh]h%README for The Linux Operating System}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjIhhubh)}(hThe following information is available in this file: 1. Supported Hardware 2. Version History 3. Command Line Options 4. Additional Notes 5. Contacting Adaptech]hThe following information is available in this file: 1. Supported Hardware 2. Version History 3. Command Line Options 4. Additional Notes 5. Contacting Adaptec}hjlsbah}(h]h ]h"]h$]h&]hhuh1hhjIhhhhhKubjH)}(hhh](jM)}(h1. Supported Hardwareh]h1. Supported Hardware}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1jLhjzhhhhhKubh block_quote)}(hX= The following Adaptec SCSI Host Adapters are supported by this driver set. ============= ========================================= Ultra320 ASIC Description ============= ========================================= AIC-7901A Single Channel 64-bit PCI-X 133MHz to Ultra320 SCSI ASIC AIC-7901B Single Channel 64-bit PCI-X 133MHz to Ultra320 SCSI ASIC with Retained Training AIC-7902A4 Dual Channel 64-bit PCI-X 133MHz to Ultra320 SCSI ASIC AIC-7902B Dual Channel 64-bit PCI-X 133MHz to Ultra320 SCSI ASIC with Retained Training ============= ========================================= ========================== ===================================== ============ Ultra320 Adapters Description ASIC ========================== ===================================== ============ Adaptec SCSI Card 39320 Dual Channel 64-bit PCI-X 133MHz to 7902A4/7902B Ultra320 SCSI Card (one external 68-pin, two internal 68-pin) Adaptec SCSI Card 39320A Dual Channel 64-bit PCI-X 133MHz to 7902B Ultra320 SCSI Card (one external 68-pin, two internal 68-pin) Adaptec SCSI Card 39320D Dual Channel 64-bit PCI-X 133MHz to 7902A4 Ultra320 SCSI Card (two external VHDC and one internal 68-pin) Adaptec SCSI Card 39320D Dual Channel 64-bit PCI-X 133MHz to 7902A4 Ultra320 SCSI Card (two external VHDC and one internal 68-pin) based on the AIC-7902B ASIC Adaptec SCSI Card 29320 Single Channel 64-bit PCI-X 133MHz to 7901A Ultra320 SCSI Card (one external 68-pin, two internal 68-pin, one internal 50-pin) Adaptec SCSI Card 29320A Single Channel 64-bit PCI-X 133MHz to 7901B Ultra320 SCSI Card (one external 68-pin, two internal 68-pin, one internal 50-pin) Adaptec SCSI Card 29320LP Single Channel 64-bit Low Profile 7901A PCI-X 133MHz to Ultra320 SCSI Card (One external VHDC, one internal 68-pin) Adaptec SCSI Card 29320ALP Single Channel 64-bit Low Profile 7901B PCI-X 133MHz to Ultra320 SCSI Card (One external VHDC, one internal 68-pin) ========================== ===================================== ============ h](j])}(hJThe following Adaptec SCSI Host Adapters are supported by this driver set.h]hJThe following Adaptec SCSI Host Adapters are supported by this driver set.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubhtable)}(hhh]htgroup)}(hhh](hcolspec)}(hhh]h}(h]h ]h"]h$]h&]colwidthK uh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthK)uh1jhjubhthead)}(hhh]hrow)}(hhh](hentry)}(hhh]j])}(h Ultra320 ASICh]h Ultra320 ASIC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]j])}(h Descriptionh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhjubhtbody)}(hhh](j)}(hhh](j)}(hhh]j])}(h AIC-7901Ah]h AIC-7901A}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]j])}(h8Single Channel 64-bit PCI-X 133MHz to Ultra320 SCSI ASICh]h8Single Channel 64-bit PCI-X 133MHz to Ultra320 SCSI ASIC}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhj$ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]j])}(h AIC-7901Bh]h AIC-7901B}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjDubah}(h]h ]h"]h$]h&]uh1jhjAubj)}(hhh]j])}(hOSingle Channel 64-bit PCI-X 133MHz to Ultra320 SCSI ASIC with Retained Trainingh]hOSingle Channel 64-bit PCI-X 133MHz to Ultra320 SCSI ASIC with Retained Training}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhj[ubah}(h]h ]h"]h$]h&]uh1jhjAubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]j])}(h AIC-7902A4h]h AIC-7902A4}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK hj{ubah}(h]h ]h"]h$]h&]uh1jhjxubj)}(hhh]j])}(h6Dual Channel 64-bit PCI-X 133MHz to Ultra320 SCSI ASICh]h6Dual Channel 64-bit PCI-X 133MHz to Ultra320 SCSI ASIC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK hjubah}(h]h ]h"]h$]h&]uh1jhjxubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]j])}(h AIC-7902Bh]h AIC-7902B}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK"hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]j])}(hMDual Channel 64-bit PCI-X 133MHz to Ultra320 SCSI ASIC with Retained Trainingh]hMDual Channel 64-bit PCI-X 133MHz to Ultra320 SCSI ASIC with Retained Training}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK"hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]colsKuh1jhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]j)}(hhh](j)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthK%uh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthK uh1jhjubj)}(hhh]j)}(hhh](j)}(hhh]j])}(hUltra320 Adaptersh]hUltra320 Adapters}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK'hj#ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]j])}(h Descriptionh]h Description}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK'hj:ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]j])}(hASICh]hASIC}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK'hjQubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh](j)}(hhh]j])}(hAdaptec SCSI Card 39320h]hAdaptec SCSI Card 39320}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK)hjzubah}(h]h ]h"]h$]h&]uh1jhjwubj)}(hhh]j])}(haDual Channel 64-bit PCI-X 133MHz to Ultra320 SCSI Card (one external 68-pin, two internal 68-pin)h]haDual Channel 64-bit PCI-X 133MHz to Ultra320 SCSI Card (one external 68-pin, two internal 68-pin)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK)hjubah}(h]h ]h"]h$]h&]uh1jhjwubj)}(hhh]j])}(h 7902A4/7902Bh]h 7902A4/7902B}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK)hjubah}(h]h ]h"]h$]h&]uh1jhjwubeh}(h]h ]h"]h$]h&]uh1jhjtubj)}(hhh](j)}(hhh]j])}(hAdaptec SCSI Card 39320Ah]hAdaptec SCSI Card 39320A}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK,hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]j])}(haDual Channel 64-bit PCI-X 133MHz to Ultra320 SCSI Card (one external 68-pin, two internal 68-pin)h]haDual Channel 64-bit PCI-X 133MHz to Ultra320 SCSI Card (one external 68-pin, two internal 68-pin)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK,hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]j])}(h7902Bh]h7902B}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK,hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjtubj)}(hhh](j)}(hhh]j])}(hAdaptec SCSI Card 39320Dh]hAdaptec SCSI Card 39320D}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK/hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]j])}(hbDual Channel 64-bit PCI-X 133MHz to Ultra320 SCSI Card (two external VHDC and one internal 68-pin)h]hbDual Channel 64-bit PCI-X 133MHz to Ultra320 SCSI Card (two external VHDC and one internal 68-pin)}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK/hj-ubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]j])}(h7902A4h]h7902A4}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK/hjDubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjtubj)}(hhh](j)}(hhh]j])}(hAdaptec SCSI Card 39320Dh]hAdaptec SCSI Card 39320D}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK2hjdubah}(h]h ]h"]h$]h&]uh1jhjaubj)}(hhh]j])}(h~Dual Channel 64-bit PCI-X 133MHz to Ultra320 SCSI Card (two external VHDC and one internal 68-pin) based on the AIC-7902B ASICh]h~Dual Channel 64-bit PCI-X 133MHz to Ultra320 SCSI Card (two external VHDC and one internal 68-pin) based on the AIC-7902B ASIC}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK2hj{ubah}(h]h ]h"]h$]h&]uh1jhjaubj)}(hhh]j])}(h7902A4h]h7902A4}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK2hjubah}(h]h ]h"]h$]h&]uh1jhjaubeh}(h]h ]h"]h$]h&]uh1jhjtubj)}(hhh](j)}(hhh]j])}(hAdaptec SCSI Card 29320h]hAdaptec SCSI Card 29320}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK6hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]j])}(hxSingle Channel 64-bit PCI-X 133MHz to Ultra320 SCSI Card (one external 68-pin, two internal 68-pin, one internal 50-pin)h]hxSingle Channel 64-bit PCI-X 133MHz to Ultra320 SCSI Card (one external 68-pin, two internal 68-pin, one internal 50-pin)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK6hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]j])}(h7901Ah]h7901A}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK6hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjtubj)}(hhh](j)}(hhh]j])}(hAdaptec SCSI Card 29320Ah]hAdaptec SCSI Card 29320A}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK:hj ubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]j])}(hxSingle Channel 64-bit PCI-X 133MHz to Ultra320 SCSI Card (one external 68-pin, two internal 68-pin, one internal 50-pin)h]hxSingle Channel 64-bit PCI-X 133MHz to Ultra320 SCSI Card (one external 68-pin, two internal 68-pin, one internal 50-pin)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK:hj ubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]j])}(h7901Bh]h7901B}(hj1 hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK:hj. ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjtubj)}(hhh](j)}(hhh]j])}(hAdaptec SCSI Card 29320LPh]hAdaptec SCSI Card 29320LP}(hjQ hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK>hjN ubah}(h]h ]h"]h$]h&]uh1jhjK ubj)}(hhh]j])}(hmSingle Channel 64-bit Low Profile PCI-X 133MHz to Ultra320 SCSI Card (One external VHDC, one internal 68-pin)h]hmSingle Channel 64-bit Low Profile PCI-X 133MHz to Ultra320 SCSI Card (One external VHDC, one internal 68-pin)}(hjh hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK>hje ubah}(h]h ]h"]h$]h&]uh1jhjK ubj)}(hhh]j])}(h7901Ah]h7901A}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK>hj| ubah}(h]h ]h"]h$]h&]uh1jhjK ubeh}(h]h ]h"]h$]h&]uh1jhjtubj)}(hhh](j)}(hhh]j])}(hAdaptec SCSI Card 29320ALPh]hAdaptec SCSI Card 29320ALP}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKBhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]j])}(hmSingle Channel 64-bit Low Profile PCI-X 133MHz to Ultra320 SCSI Card (One external VHDC, one internal 68-pin)h]hmSingle Channel 64-bit Low Profile PCI-X 133MHz to Ultra320 SCSI Card (One external VHDC, one internal 68-pin)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKBhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]j])}(h7901Bh]h7901B}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKBhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjtubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]colsKuh1jhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjzhhubeh}(h]supported-hardwareah ]h"]1. supported hardwareah$]h&]uh1jGhjIhhhhhKubjH)}(hhh](jM)}(h2. Version Historyh]h2. Version History}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jLhj hhhhhKIubj)}(hX* 3.0 (December 1st, 2005) - Updated driver to use SCSI transport class infrastructure - Upported sequencer and core fixes from adaptec released version 2.0.15 of the driver. * 1.3.11 (July 11, 2003) - Fix several deadlock issues. - Add 29320ALP and 39320B Id's. * 1.3.10 (June 3rd, 2003) - Align the SCB_TAG field on a 16byte boundary. This avoids SCB corruption on some PCI-33 busses. - Correct non-zero luns on Rev B. hardware. - Update for change in 2.5.X SCSI proc FS interface. - When negotiation async via an 8bit WDTR message, send an SDTR with an offset of 0 to be sure the target knows we are async. This works around a firmware defect in the Quantum Atlas 10K. - Implement controller suspend and resume. - Clear PCI error state during driver attach so that we don't disable memory mapped I/O due to a stray write by some other driver probe that occurred before we claimed the controller. * 1.3.9 (May 22nd, 2003) - Fix compiler errors. - Remove S/G splitting for segments that cross a 4GB boundary. This is guaranteed not to happen in Linux. - Add support for scsi_report_device_reset() found in 2.5.X kernels. - Add 7901B support. - Simplify handling of the packetized lun Rev A workaround. - Correct and simplify handling of the ignore wide residue message. The previous code would fail to report a residual if the transaction data length was even and we received an IWR message. * 1.3.8 (April 29th, 2003) - Fix types accessed via the command line interface code. - Perform a few firmware optimizations. - Fix "Unexpected PKT busfree" errors. - Use a sequencer interrupt to notify the host of commands with bad status. We defer the notification until there are no outstanding selections to ensure that the host is interrupted for as short a time as possible. - Remove pre-2.2.X support. - Add support for new 2.5.X interrupt API. - Correct big-endian architecture support. * 1.3.7 (April 16th, 2003) - Use del_timer_sync() to ensure that no timeouts are pending during controller shutdown. - For pre-2.5.X kernels, carefully adjust our segment list size to avoid SCSI malloc pool fragmentation. - Cleanup channel display in our /proc output. - Workaround duplicate device entries in the mid-layer device list during add-single-device. * 1.3.6 (March 28th, 2003) - Correct a double free in the Domain Validation code. - Correct a reference to free'ed memory during controller shutdown. - Reset the bus on an SE->LVD change. This is required to reset our transceivers. * 1.3.5 (March 24th, 2003) - Fix a few register window mode bugs. - Include read streaming in the PPR flags we display in diagnostics as well as /proc. - Add PCI hot plug support for 2.5.X kernels. - Correct default precompensation value for RevA hardware. - Fix Domain Validation thread shutdown. - Add a firmware workaround to make the LED blink brighter during packetized operations on the H2A4. - Correct /proc display of user read streaming settings. - Simplify driver locking by releasing the io_request_lock upon driver entry from the mid-layer. - Cleanup command line parsing and move much of this code to aiclib. * 1.3.4 (February 28th, 2003) - Correct a race condition in our error recovery handler. - Allow Test Unit Ready commands to take a full 5 seconds during Domain Validation. * 1.3.2 (February 19th, 2003) - Correct a Rev B. regression due to the GEM318 compatibility fix included in 1.3.1. * 1.3.1 (February 11th, 2003) - Add support for the 39320A. - Improve recovery for certain PCI-X errors. - Fix handling of LQ/DATA/LQ/DATA for the same write transaction that can occur without interveining training. - Correct compatibility issues with the GEM318 enclosure services device. - Correct data corruption issue that occurred under high tag depth write loads. - Adapt to a change in the 2.5.X daemonize() API. - Correct a "Missing case in ahd_handle_scsiint" panic. * 1.3.0 (January 21st, 2003) - Full regression testing for all U320 products completed. - Added abort and target/lun reset error recovery handler and interrupt coalescing. * 1.2.0 (November 14th, 2002) - Added support for Domain Validation - Add support for the Hewlett-Packard version of the 39320D and AIC-7902 adapters. Support for previous adapters has not been fully tested and should only be used at the customer's own risk. * 1.1.1 (September 24th, 2002) - Added support for the Linux 2.5.X kernel series * 1.1.0 (September 17th, 2002) - Added support for four additional SCSI products: ASC-39320, ASC-29320, ASC-29320LP, AIC-7901. * 1.0.0 (May 30th, 2002) - Initial driver release. * 2.1. Software/Hardware Features - Support for the SPI-4 "Ultra320" standard: - 320MB/s transfer rates - Packetized SCSI Protocol at 160MB/s and 320MB/s - Quick Arbitration Selection (QAS) - Retained Training Information (Rev B. ASIC only) - Interrupt Coalescing - Initiator Mode (target mode not currently supported) - Support for the PCI-X standard up to 133MHz - Support for the PCI v2.2 standard - Domain Validation * 2.2. Operating System Support: - Redhat Linux 7.2, 7.3, 8.0, Advanced Server 2.1 - SuSE Linux 7.3, 8.0, 8.1, Enterprise Server 7 - only Intel and AMD x86 supported at this time - >4GB memory configurations supported. Refer to the User's Guide for more details on this. h]h bullet_list)}(hhh](h list_item)}(h3.0 (December 1st, 2005) - Updated driver to use SCSI transport class infrastructure - Upported sequencer and core fixes from adaptec released version 2.0.15 of the driver. h]hdefinition_list)}(hhh]hdefinition_list_item)}(h3.0 (December 1st, 2005) - Updated driver to use SCSI transport class infrastructure - Upported sequencer and core fixes from adaptec released version 2.0.15 of the driver. h](hterm)}(h3.0 (December 1st, 2005)h]h3.0 (December 1st, 2005)}(hj5 hhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhKOhj/ ubh definition)}(hhh]j )}(hhh](j# )}(h9Updated driver to use SCSI transport class infrastructureh]j])}(hjM h]h9Updated driver to use SCSI transport class infrastructure}(hjO hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKMhjK ubah}(h]h ]h"]h$]h&]uh1j" hjH ubj# )}(hVUpported sequencer and core fixes from adaptec released version 2.0.15 of the driver. h]j])}(hUUpported sequencer and core fixes from adaptec released version 2.0.15 of the driver.h]hUUpported sequencer and core fixes from adaptec released version 2.0.15 of the driver.}(hjf hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKNhjb ubah}(h]h ]h"]h$]h&]uh1j" hjH ubeh}(h]h ]h"]h$]h&]bullet-uh1j hhhKMhjE ubah}(h]h ]h"]h$]h&]uh1jC hj/ ubeh}(h]h ]h"]h$]h&]uh1j- hhhKOhj* ubah}(h]h ]h"]h$]h&]uh1j( hj$ ubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(h`1.3.11 (July 11, 2003) - Fix several deadlock issues. - Add 29320ALP and 39320B Id's. h]j) )}(hhh]j. )}(hV1.3.11 (July 11, 2003) - Fix several deadlock issues. - Add 29320ALP and 39320B Id's. h](j4 )}(h1.3.11 (July 11, 2003)h]h1.3.11 (July 11, 2003)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhKShj ubjD )}(hhh]j )}(hhh](j# )}(hFix several deadlock issues.h]j])}(hj h]hFix several deadlock issues.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKRhj ubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(hAdd 29320ALP and 39320B Id's. h]j])}(hAdd 29320ALP and 39320B Id's.h]hAdd 29320ALP and 39320B Id’s.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKShj ubah}(h]h ]h"]h$]h&]uh1j" hj ubeh}(h]h ]h"]h$]h&]j j uh1j hhhKRhj ubah}(h]h ]h"]h$]h&]uh1jC hj ubeh}(h]h ]h"]h$]h&]uh1j- hhhKShj ubah}(h]h ]h"]h$]h&]uh1j( hj ubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(hX1.3.10 (June 3rd, 2003) - Align the SCB_TAG field on a 16byte boundary. This avoids SCB corruption on some PCI-33 busses. - Correct non-zero luns on Rev B. hardware. - Update for change in 2.5.X SCSI proc FS interface. - When negotiation async via an 8bit WDTR message, send an SDTR with an offset of 0 to be sure the target knows we are async. This works around a firmware defect in the Quantum Atlas 10K. - Implement controller suspend and resume. - Clear PCI error state during driver attach so that we don't disable memory mapped I/O due to a stray write by some other driver probe that occurred before we claimed the controller. h]j) )}(hhh]j. )}(hX1.3.10 (June 3rd, 2003) - Align the SCB_TAG field on a 16byte boundary. This avoids SCB corruption on some PCI-33 busses. - Correct non-zero luns on Rev B. hardware. - Update for change in 2.5.X SCSI proc FS interface. - When negotiation async via an 8bit WDTR message, send an SDTR with an offset of 0 to be sure the target knows we are async. This works around a firmware defect in the Quantum Atlas 10K. - Implement controller suspend and resume. - Clear PCI error state during driver attach so that we don't disable memory mapped I/O due to a stray write by some other driver probe that occurred before we claimed the controller. h](j4 )}(h1.3.10 (June 3rd, 2003)h]h1.3.10 (June 3rd, 2003)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhKbhj ubjD )}(hhh]j )}(hhh](j# )}(h`Align the SCB_TAG field on a 16byte boundary. This avoids SCB corruption on some PCI-33 busses.h]j])}(h`Align the SCB_TAG field on a 16byte boundary. This avoids SCB corruption on some PCI-33 busses.h]h`Align the SCB_TAG field on a 16byte boundary. This avoids SCB corruption on some PCI-33 busses.}(hj) hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKVhj% ubah}(h]h ]h"]h$]h&]uh1j" hj" ubj# )}(h)Correct non-zero luns on Rev B. hardware.h]j])}(hj? h]h)Correct non-zero luns on Rev B. hardware.}(hjA hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKXhj= ubah}(h]h ]h"]h$]h&]uh1j" hj" ubj# )}(h2Update for change in 2.5.X SCSI proc FS interface.h]j])}(hjV h]h2Update for change in 2.5.X SCSI proc FS interface.}(hjX hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKYhjT ubah}(h]h ]h"]h$]h&]uh1j" hj" ubj# )}(hWhen negotiation async via an 8bit WDTR message, send an SDTR with an offset of 0 to be sure the target knows we are async. This works around a firmware defect in the Quantum Atlas 10K.h]j])}(hWhen negotiation async via an 8bit WDTR message, send an SDTR with an offset of 0 to be sure the target knows we are async. This works around a firmware defect in the Quantum Atlas 10K.h]hWhen negotiation async via an 8bit WDTR message, send an SDTR with an offset of 0 to be sure the target knows we are async. This works around a firmware defect in the Quantum Atlas 10K.}(hjo hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKZhjk ubah}(h]h ]h"]h$]h&]uh1j" hj" ubj# )}(h(Implement controller suspend and resume.h]j])}(hj h]h(Implement controller suspend and resume.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK^hj ubah}(h]h ]h"]h$]h&]uh1j" hj" ubj# )}(hClear PCI error state during driver attach so that we don't disable memory mapped I/O due to a stray write by some other driver probe that occurred before we claimed the controller. h]j])}(hClear PCI error state during driver attach so that we don't disable memory mapped I/O due to a stray write by some other driver probe that occurred before we claimed the controller.h]hClear PCI error state during driver attach so that we don’t disable memory mapped I/O due to a stray write by some other driver probe that occurred before we claimed the controller.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK_hj ubah}(h]h ]h"]h$]h&]uh1j" hj" ubeh}(h]h ]h"]h$]h&]j j uh1j hhhKVhj ubah}(h]h ]h"]h$]h&]uh1jC hj ubeh}(h]h ]h"]h$]h&]uh1j- hhhKbhj ubah}(h]h ]h"]h$]h&]uh1j( hj ubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(hX.1.3.9 (May 22nd, 2003) - Fix compiler errors. - Remove S/G splitting for segments that cross a 4GB boundary. This is guaranteed not to happen in Linux. - Add support for scsi_report_device_reset() found in 2.5.X kernels. - Add 7901B support. - Simplify handling of the packetized lun Rev A workaround. - Correct and simplify handling of the ignore wide residue message. The previous code would fail to report a residual if the transaction data length was even and we received an IWR message. h]j) )}(hhh]j. )}(hX1.3.9 (May 22nd, 2003) - Fix compiler errors. - Remove S/G splitting for segments that cross a 4GB boundary. This is guaranteed not to happen in Linux. - Add support for scsi_report_device_reset() found in 2.5.X kernels. - Add 7901B support. - Simplify handling of the packetized lun Rev A workaround. - Correct and simplify handling of the ignore wide residue message. The previous code would fail to report a residual if the transaction data length was even and we received an IWR message. h](j4 )}(h1.3.9 (May 22nd, 2003)h]h1.3.9 (May 22nd, 2003)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhKohj ubjD )}(hhh]j )}(hhh](j# )}(hFix compiler errors.h]j])}(hj h]hFix compiler errors.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKehj ubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(hgRemove S/G splitting for segments that cross a 4GB boundary. This is guaranteed not to happen in Linux.h]j])}(hgRemove S/G splitting for segments that cross a 4GB boundary. This is guaranteed not to happen in Linux.h]hgRemove S/G splitting for segments that cross a 4GB boundary. This is guaranteed not to happen in Linux.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKfhj ubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(hBAdd support for scsi_report_device_reset() found in 2.5.X kernels.h]j])}(hBAdd support for scsi_report_device_reset() found in 2.5.X kernels.h]hBAdd support for scsi_report_device_reset() found in 2.5.X kernels.}(hj" hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhhj ubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(hAdd 7901B support.h]j])}(hj8 h]hAdd 7901B support.}(hj: hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKjhj6 ubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(h9Simplify handling of the packetized lun Rev A workaround.h]j])}(hjO h]h9Simplify handling of the packetized lun Rev A workaround.}(hjQ hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKkhjM ubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(hCorrect and simplify handling of the ignore wide residue message. The previous code would fail to report a residual if the transaction data length was even and we received an IWR message. h]j])}(hCorrect and simplify handling of the ignore wide residue message. The previous code would fail to report a residual if the transaction data length was even and we received an IWR message.h]hCorrect and simplify handling of the ignore wide residue message. The previous code would fail to report a residual if the transaction data length was even and we received an IWR message.}(hjh hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKlhjd ubah}(h]h ]h"]h$]h&]uh1j" hj ubeh}(h]h ]h"]h$]h&]j j uh1j hhhKehj ubah}(h]h ]h"]h$]h&]uh1jC hj ubeh}(h]h ]h"]h$]h&]uh1j- hhhKohj ubah}(h]h ]h"]h$]h&]uh1j( hj ubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(hX,1.3.8 (April 29th, 2003) - Fix types accessed via the command line interface code. - Perform a few firmware optimizations. - Fix "Unexpected PKT busfree" errors. - Use a sequencer interrupt to notify the host of commands with bad status. We defer the notification until there are no outstanding selections to ensure that the host is interrupted for as short a time as possible. - Remove pre-2.2.X support. - Add support for new 2.5.X interrupt API. - Correct big-endian architecture support. h]j) )}(hhh]j. )}(hX1.3.8 (April 29th, 2003) - Fix types accessed via the command line interface code. - Perform a few firmware optimizations. - Fix "Unexpected PKT busfree" errors. - Use a sequencer interrupt to notify the host of commands with bad status. We defer the notification until there are no outstanding selections to ensure that the host is interrupted for as short a time as possible. - Remove pre-2.2.X support. - Add support for new 2.5.X interrupt API. - Correct big-endian architecture support. h](j4 )}(h1.3.8 (April 29th, 2003)h]h1.3.8 (April 29th, 2003)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhK|hj ubjD )}(hhh]j )}(hhh](j# )}(h7Fix types accessed via the command line interface code.h]j])}(hj h]h7Fix types accessed via the command line interface code.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKrhj ubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(h%Perform a few firmware optimizations.h]j])}(hj h]h%Perform a few firmware optimizations.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKshj ubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(h$Fix "Unexpected PKT busfree" errors.h]j])}(hj h]h(Fix “Unexpected PKT busfree” errors.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKthj ubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(hUse a sequencer interrupt to notify the host of commands with bad status. We defer the notification until there are no outstanding selections to ensure that the host is interrupted for as short a time as possible.h]j])}(hUse a sequencer interrupt to notify the host of commands with bad status. We defer the notification until there are no outstanding selections to ensure that the host is interrupted for as short a time as possible.h]hUse a sequencer interrupt to notify the host of commands with bad status. We defer the notification until there are no outstanding selections to ensure that the host is interrupted for as short a time as possible.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKuhj ubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(hRemove pre-2.2.X support.h]j])}(hj h]hRemove pre-2.2.X support.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKzhj ubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(h(Add support for new 2.5.X interrupt API.h]j])}(hj/ h]h(Add support for new 2.5.X interrupt API.}(hj1 hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK{hj- ubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(h)Correct big-endian architecture support. h]j])}(h(Correct big-endian architecture support.h]h(Correct big-endian architecture support.}(hjH hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhK|hjD ubah}(h]h ]h"]h$]h&]uh1j" hj ubeh}(h]h ]h"]h$]h&]j j uh1j hhhKrhj ubah}(h]h ]h"]h$]h&]uh1jC hj ubeh}(h]h ]h"]h$]h&]uh1j- hhhK|hj ubah}(h]h ]h"]h$]h&]uh1j( hj ubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(hX1.3.7 (April 16th, 2003) - Use del_timer_sync() to ensure that no timeouts are pending during controller shutdown. - For pre-2.5.X kernels, carefully adjust our segment list size to avoid SCSI malloc pool fragmentation. - Cleanup channel display in our /proc output. - Workaround duplicate device entries in the mid-layer device list during add-single-device. h]j) )}(hhh]j. )}(hXn1.3.7 (April 16th, 2003) - Use del_timer_sync() to ensure that no timeouts are pending during controller shutdown. - For pre-2.5.X kernels, carefully adjust our segment list size to avoid SCSI malloc pool fragmentation. - Cleanup channel display in our /proc output. - Workaround duplicate device entries in the mid-layer device list during add-single-device. h](j4 )}(h1.3.7 (April 16th, 2003)h]h1.3.7 (April 16th, 2003)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhKhj ubjD )}(hhh]j )}(hhh](j# )}(hWUse del_timer_sync() to ensure that no timeouts are pending during controller shutdown.h]j])}(hWUse del_timer_sync() to ensure that no timeouts are pending during controller shutdown.h]hWUse del_timer_sync() to ensure that no timeouts are pending during controller shutdown.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhj ubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(hfFor pre-2.5.X kernels, carefully adjust our segment list size to avoid SCSI malloc pool fragmentation.h]j])}(hfFor pre-2.5.X kernels, carefully adjust our segment list size to avoid SCSI malloc pool fragmentation.h]hfFor pre-2.5.X kernels, carefully adjust our segment list size to avoid SCSI malloc pool fragmentation.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhj ubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(h,Cleanup channel display in our /proc output.h]j])}(hj h]h,Cleanup channel display in our /proc output.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhj ubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(h[Workaround duplicate device entries in the mid-layer device list during add-single-device. h]j])}(hZWorkaround duplicate device entries in the mid-layer device list during add-single-device.h]hZWorkaround duplicate device entries in the mid-layer device list during add-single-device.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhj ubah}(h]h ]h"]h$]h&]uh1j" hj ubeh}(h]h ]h"]h$]h&]j j uh1j hhhKhj ubah}(h]h ]h"]h$]h&]uh1jC hj ubeh}(h]h ]h"]h$]h&]uh1j- hhhKhj~ ubah}(h]h ]h"]h$]h&]uh1j( hjz ubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(hX1.3.6 (March 28th, 2003) - Correct a double free in the Domain Validation code. - Correct a reference to free'ed memory during controller shutdown. - Reset the bus on an SE->LVD change. This is required to reset our transceivers. h]j) )}(hhh]j. )}(h1.3.6 (March 28th, 2003) - Correct a double free in the Domain Validation code. - Correct a reference to free'ed memory during controller shutdown. - Reset the bus on an SE->LVD change. This is required to reset our transceivers. h](j4 )}(h1.3.6 (March 28th, 2003)h]h1.3.6 (March 28th, 2003)}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhKhjubjD )}(hhh]j )}(hhh](j# )}(h4Correct a double free in the Domain Validation code.h]j])}(hj7h]h4Correct a double free in the Domain Validation code.}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhj5ubah}(h]h ]h"]h$]h&]uh1j" hj2ubj# )}(hACorrect a reference to free'ed memory during controller shutdown.h]j])}(hACorrect a reference to free'ed memory during controller shutdown.h]hCCorrect a reference to free’ed memory during controller shutdown.}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjLubah}(h]h ]h"]h$]h&]uh1j" hj2ubj# )}(hQReset the bus on an SE->LVD change. This is required to reset our transceivers. h]j])}(hPReset the bus on an SE->LVD change. This is required to reset our transceivers.h]hPReset the bus on an SE->LVD change. This is required to reset our transceivers.}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjdubah}(h]h ]h"]h$]h&]uh1j" hj2ubeh}(h]h ]h"]h$]h&]j j uh1j hhhKhj/ubah}(h]h ]h"]h$]h&]uh1jC hjubeh}(h]h ]h"]h$]h&]uh1j- hhhKhjubah}(h]h ]h"]h$]h&]uh1j( hjubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(hX1.3.5 (March 24th, 2003) - Fix a few register window mode bugs. - Include read streaming in the PPR flags we display in diagnostics as well as /proc. - Add PCI hot plug support for 2.5.X kernels. - Correct default precompensation value for RevA hardware. - Fix Domain Validation thread shutdown. - Add a firmware workaround to make the LED blink brighter during packetized operations on the H2A4. - Correct /proc display of user read streaming settings. - Simplify driver locking by releasing the io_request_lock upon driver entry from the mid-layer. - Cleanup command line parsing and move much of this code to aiclib. h]j) )}(hhh]j. )}(hXt1.3.5 (March 24th, 2003) - Fix a few register window mode bugs. - Include read streaming in the PPR flags we display in diagnostics as well as /proc. - Add PCI hot plug support for 2.5.X kernels. - Correct default precompensation value for RevA hardware. - Fix Domain Validation thread shutdown. - Add a firmware workaround to make the LED blink brighter during packetized operations on the H2A4. - Correct /proc display of user read streaming settings. - Simplify driver locking by releasing the io_request_lock upon driver entry from the mid-layer. - Cleanup command line parsing and move much of this code to aiclib. h](j4 )}(h1.3.5 (March 24th, 2003)h]h1.3.5 (March 24th, 2003)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhKhjubjD )}(hhh]j )}(hhh](j# )}(h$Fix a few register window mode bugs.h]j])}(hjh]h$Fix a few register window mode bugs.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1j" hjubj# )}(hSInclude read streaming in the PPR flags we display in diagnostics as well as /proc.h]j])}(hSInclude read streaming in the PPR flags we display in diagnostics as well as /proc.h]hSInclude read streaming in the PPR flags we display in diagnostics as well as /proc.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1j" hjubj# )}(h+Add PCI hot plug support for 2.5.X kernels.h]j])}(hjh]h+Add PCI hot plug support for 2.5.X kernels.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1j" hjubj# )}(h8Correct default precompensation value for RevA hardware.h]j])}(hjh]h8Correct default precompensation value for RevA hardware.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1j" hjubj# )}(h&Fix Domain Validation thread shutdown.h]j])}(hjh]h&Fix Domain Validation thread shutdown.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1j" hjubj# )}(hbAdd a firmware workaround to make the LED blink brighter during packetized operations on the H2A4.h]j])}(hbAdd a firmware workaround to make the LED blink brighter during packetized operations on the H2A4.h]hbAdd a firmware workaround to make the LED blink brighter during packetized operations on the H2A4.}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhj-ubah}(h]h ]h"]h$]h&]uh1j" hjubj# )}(h6Correct /proc display of user read streaming settings.h]j])}(hjGh]h6Correct /proc display of user read streaming settings.}(hjIhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjEubah}(h]h ]h"]h$]h&]uh1j" hjubj# )}(h^Simplify driver locking by releasing the io_request_lock upon driver entry from the mid-layer.h]j])}(h^Simplify driver locking by releasing the io_request_lock upon driver entry from the mid-layer.h]h^Simplify driver locking by releasing the io_request_lock upon driver entry from the mid-layer.}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhj\ubah}(h]h ]h"]h$]h&]uh1j" hjubj# )}(hCCleanup command line parsing and move much of this code to aiclib. h]j])}(hBCleanup command line parsing and move much of this code to aiclib.h]hBCleanup command line parsing and move much of this code to aiclib.}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjtubah}(h]h ]h"]h$]h&]uh1j" hjubeh}(h]h ]h"]h$]h&]j j uh1j hhhKhjubah}(h]h ]h"]h$]h&]uh1jC hjubeh}(h]h ]h"]h$]h&]uh1j- hhhKhjubah}(h]h ]h"]h$]h&]uh1j( hjubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(h1.3.4 (February 28th, 2003) - Correct a race condition in our error recovery handler. - Allow Test Unit Ready commands to take a full 5 seconds during Domain Validation. h]j) )}(hhh]j. )}(h1.3.4 (February 28th, 2003) - Correct a race condition in our error recovery handler. - Allow Test Unit Ready commands to take a full 5 seconds during Domain Validation. h](j4 )}(h1.3.4 (February 28th, 2003)h]h1.3.4 (February 28th, 2003)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhKhjubjD )}(hhh]j )}(hhh](j# )}(h7Correct a race condition in our error recovery handler.h]j])}(hjh]h7Correct a race condition in our error recovery handler.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1j" hjubj# )}(hRAllow Test Unit Ready commands to take a full 5 seconds during Domain Validation. h]j])}(hQAllow Test Unit Ready commands to take a full 5 seconds during Domain Validation.h]hQAllow Test Unit Ready commands to take a full 5 seconds during Domain Validation.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1j" hjubeh}(h]h ]h"]h$]h&]j j uh1j hhhKhjubah}(h]h ]h"]h$]h&]uh1jC hjubeh}(h]h ]h"]h$]h&]uh1j- hhhKhjubah}(h]h ]h"]h$]h&]uh1j( hjubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(h}1.3.2 (February 19th, 2003) - Correct a Rev B. regression due to the GEM318 compatibility fix included in 1.3.1. h]j) )}(hhh]j. )}(hs1.3.2 (February 19th, 2003) - Correct a Rev B. regression due to the GEM318 compatibility fix included in 1.3.1. h](j4 )}(h1.3.2 (February 19th, 2003)h]h1.3.2 (February 19th, 2003)}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhKhjubjD )}(hhh]j )}(hhh]j# )}(hSCorrect a Rev B. regression due to the GEM318 compatibility fix included in 1.3.1. h]j])}(hRCorrect a Rev B. regression due to the GEM318 compatibility fix included in 1.3.1.h]hRCorrect a Rev B. regression due to the GEM318 compatibility fix included in 1.3.1.}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhj5ubah}(h]h ]h"]h$]h&]uh1j" hj2ubah}(h]h ]h"]h$]h&]j j uh1j hhhKhj/ubah}(h]h ]h"]h$]h&]uh1jC hjubeh}(h]h ]h"]h$]h&]uh1j- hhhKhjubah}(h]h ]h"]h$]h&]uh1j( hjubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(hX1.3.1 (February 11th, 2003) - Add support for the 39320A. - Improve recovery for certain PCI-X errors. - Fix handling of LQ/DATA/LQ/DATA for the same write transaction that can occur without interveining training. - Correct compatibility issues with the GEM318 enclosure services device. - Correct data corruption issue that occurred under high tag depth write loads. - Adapt to a change in the 2.5.X daemonize() API. - Correct a "Missing case in ahd_handle_scsiint" panic. h]j) )}(hhh]j. )}(hX1.3.1 (February 11th, 2003) - Add support for the 39320A. - Improve recovery for certain PCI-X errors. - Fix handling of LQ/DATA/LQ/DATA for the same write transaction that can occur without interveining training. - Correct compatibility issues with the GEM318 enclosure services device. - Correct data corruption issue that occurred under high tag depth write loads. - Adapt to a change in the 2.5.X daemonize() API. - Correct a "Missing case in ahd_handle_scsiint" panic. h](j4 )}(h1.3.1 (February 11th, 2003)h]h1.3.1 (February 11th, 2003)}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhKhjrubjD )}(hhh]j )}(hhh](j# )}(hAdd support for the 39320A.h]j])}(hjh]hAdd support for the 39320A.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1j" hjubj# )}(h*Improve recovery for certain PCI-X errors.h]j])}(hjh]h*Improve recovery for certain PCI-X errors.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1j" hjubj# )}(hlFix handling of LQ/DATA/LQ/DATA for the same write transaction that can occur without interveining training.h]j])}(hlFix handling of LQ/DATA/LQ/DATA for the same write transaction that can occur without interveining training.h]hlFix handling of LQ/DATA/LQ/DATA for the same write transaction that can occur without interveining training.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1j" hjubj# )}(hGCorrect compatibility issues with the GEM318 enclosure services device.h]j])}(hGCorrect compatibility issues with the GEM318 enclosure services device.h]hGCorrect compatibility issues with the GEM318 enclosure services device.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1j" hjubj# )}(hMCorrect data corruption issue that occurred under high tag depth write loads.h]j])}(hMCorrect data corruption issue that occurred under high tag depth write loads.h]hMCorrect data corruption issue that occurred under high tag depth write loads.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1j" hjubj# )}(h/Adapt to a change in the 2.5.X daemonize() API.h]j])}(hjh]h/Adapt to a change in the 2.5.X daemonize() API.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1j" hjubj# )}(h6Correct a "Missing case in ahd_handle_scsiint" panic. h]j])}(h5Correct a "Missing case in ahd_handle_scsiint" panic.h]h9Correct a “Missing case in ahd_handle_scsiint” panic.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1j" hjubeh}(h]h ]h"]h$]h&]j j uh1j hhhKhjubah}(h]h ]h"]h$]h&]uh1jC hjrubeh}(h]h ]h"]h$]h&]uh1j- hhhKhjoubah}(h]h ]h"]h$]h&]uh1j( hjkubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(h1.3.0 (January 21st, 2003) - Full regression testing for all U320 products completed. - Added abort and target/lun reset error recovery handler and interrupt coalescing. h]j) )}(hhh]j. )}(h1.3.0 (January 21st, 2003) - Full regression testing for all U320 products completed. - Added abort and target/lun reset error recovery handler and interrupt coalescing. h](j4 )}(h1.3.0 (January 21st, 2003)h]h1.3.0 (January 21st, 2003)}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhKhjTubjD )}(hhh]j )}(hhh](j# )}(h8Full regression testing for all U320 products completed.h]j])}(hjnh]h8Full regression testing for all U320 products completed.}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjlubah}(h]h ]h"]h$]h&]uh1j" hjiubj# )}(hRAdded abort and target/lun reset error recovery handler and interrupt coalescing. h]j])}(hQAdded abort and target/lun reset error recovery handler and interrupt coalescing.h]hQAdded abort and target/lun reset error recovery handler and interrupt coalescing.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1j" hjiubeh}(h]h ]h"]h$]h&]j j uh1j hhhKhjfubah}(h]h ]h"]h$]h&]uh1jC hjTubeh}(h]h ]h"]h$]h&]uh1j- hhhKhjQubah}(h]h ]h"]h$]h&]uh1j( hjMubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(hX1.2.0 (November 14th, 2002) - Added support for Domain Validation - Add support for the Hewlett-Packard version of the 39320D and AIC-7902 adapters. Support for previous adapters has not been fully tested and should only be used at the customer's own risk. h]j) )}(hhh]j. )}(hX1.2.0 (November 14th, 2002) - Added support for Domain Validation - Add support for the Hewlett-Packard version of the 39320D and AIC-7902 adapters. Support for previous adapters has not been fully tested and should only be used at the customer's own risk. h](j4 )}(h1.2.0 (November 14th, 2002)h]h1.2.0 (November 14th, 2002)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhKhjubjD )}(hhh](j )}(hhh](j# )}(h#Added support for Domain Validationh]j])}(hjh]h#Added support for Domain Validation}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1j" hjubj# )}(hQAdd support for the Hewlett-Packard version of the 39320D and AIC-7902 adapters. h]j])}(hPAdd support for the Hewlett-Packard version of the 39320D and AIC-7902 adapters.h]hPAdd support for the Hewlett-Packard version of the 39320D and AIC-7902 adapters.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1j" hjubeh}(h]h ]h"]h$]h&]j j uh1j hhhKhjubj])}(hkSupport for previous adapters has not been fully tested and should only be used at the customer's own risk.h]hmSupport for previous adapters has not been fully tested and should only be used at the customer’s own risk.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubeh}(h]h ]h"]h$]h&]uh1jC hjubeh}(h]h ]h"]h$]h&]uh1j- hhhKhjubah}(h]h ]h"]h$]h&]uh1j( hjubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(hT1.1.1 (September 24th, 2002) - Added support for the Linux 2.5.X kernel series h]j) )}(hhh]j. )}(hO1.1.1 (September 24th, 2002) - Added support for the Linux 2.5.X kernel series h](j4 )}(h1.1.1 (September 24th, 2002)h]h1.1.1 (September 24th, 2002)}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhKhj:ubjD )}(hhh]j )}(hhh]j# )}(h0Added support for the Linux 2.5.X kernel series h]j])}(h/Added support for the Linux 2.5.X kernel seriesh]h/Added support for the Linux 2.5.X kernel series}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjRubah}(h]h ]h"]h$]h&]uh1j" hjOubah}(h]h ]h"]h$]h&]j j uh1j hhhKhjLubah}(h]h ]h"]h$]h&]uh1jC hj:ubeh}(h]h ]h"]h$]h&]uh1j- hhhKhj7ubah}(h]h ]h"]h$]h&]uh1j( hj3ubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(h1.1.0 (September 17th, 2002) - Added support for four additional SCSI products: ASC-39320, ASC-29320, ASC-29320LP, AIC-7901. h]j) )}(hhh]j. )}(h1.1.0 (September 17th, 2002) - Added support for four additional SCSI products: ASC-39320, ASC-29320, ASC-29320LP, AIC-7901. h](j4 )}(h1.1.0 (September 17th, 2002)h]h1.1.0 (September 17th, 2002)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhKhjubjD )}(hhh]j )}(hhh]j# )}(h^Added support for four additional SCSI products: ASC-39320, ASC-29320, ASC-29320LP, AIC-7901. h]j])}(h]Added support for four additional SCSI products: ASC-39320, ASC-29320, ASC-29320LP, AIC-7901.h]h]Added support for four additional SCSI products: ASC-39320, ASC-29320, ASC-29320LP, AIC-7901.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1j" hjubah}(h]h ]h"]h$]h&]j j uh1j hhhKhjubah}(h]h ]h"]h$]h&]uh1jC hjubeh}(h]h ]h"]h$]h&]uh1j- hhhKhjubah}(h]h ]h"]h$]h&]uh1j( hjubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(h61.0.0 (May 30th, 2002) - Initial driver release. h]j) )}(hhh]j. )}(h11.0.0 (May 30th, 2002) - Initial driver release. h](j4 )}(h1.0.0 (May 30th, 2002)h]h1.0.0 (May 30th, 2002)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhKhjubjD )}(hhh]j )}(hhh]j# )}(hInitial driver release. h]j])}(hInitial driver release.h]hInitial driver release.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1j" hjubah}(h]h ]h"]h$]h&]j j uh1j hhhKhjubah}(h]h ]h"]h$]h&]uh1jC hjubeh}(h]h ]h"]h$]h&]uh1j- hhhKhjubah}(h]h ]h"]h$]h&]uh1j( hjubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(hX2.1. Software/Hardware Features - Support for the SPI-4 "Ultra320" standard: - 320MB/s transfer rates - Packetized SCSI Protocol at 160MB/s and 320MB/s - Quick Arbitration Selection (QAS) - Retained Training Information (Rev B. ASIC only) - Interrupt Coalescing - Initiator Mode (target mode not currently supported) - Support for the PCI-X standard up to 133MHz - Support for the PCI v2.2 standard - Domain Validation h]j) )}(hhh]j. )}(hX2.1. Software/Hardware Features - Support for the SPI-4 "Ultra320" standard: - 320MB/s transfer rates - Packetized SCSI Protocol at 160MB/s and 320MB/s - Quick Arbitration Selection (QAS) - Retained Training Information (Rev B. ASIC only) - Interrupt Coalescing - Initiator Mode (target mode not currently supported) - Support for the PCI-X standard up to 133MHz - Support for the PCI v2.2 standard - Domain Validation h](j4 )}(h2.1. Software/Hardware Featuresh]h2.1. Software/Hardware Features}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhKhj9ubjD )}(hhh]j )}(hhh](j# )}(hSupport for the SPI-4 "Ultra320" standard: - 320MB/s transfer rates - Packetized SCSI Protocol at 160MB/s and 320MB/s - Quick Arbitration Selection (QAS) - Retained Training Information (Rev B. ASIC only)h]j])}(hSupport for the SPI-4 "Ultra320" standard: - 320MB/s transfer rates - Packetized SCSI Protocol at 160MB/s and 320MB/s - Quick Arbitration Selection (QAS) - Retained Training Information (Rev B. ASIC only)h]hSupport for the SPI-4 “Ultra320” standard: - 320MB/s transfer rates - Packetized SCSI Protocol at 160MB/s and 320MB/s - Quick Arbitration Selection (QAS) - Retained Training Information (Rev B. ASIC only)}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjQubah}(h]h ]h"]h$]h&]uh1j" hjNubj# )}(hInterrupt Coalescingh]j])}(hjkh]hInterrupt Coalescing}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjiubah}(h]h ]h"]h$]h&]uh1j" hjNubj# )}(h4Initiator Mode (target mode not currently supported)h]j])}(h4Initiator Mode (target mode not currently supported)h]h4Initiator Mode (target mode not currently supported)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1j" hjNubj# )}(h+Support for the PCI-X standard up to 133MHzh]j])}(hjh]h+Support for the PCI-X standard up to 133MHz}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1j" hjNubj# )}(h!Support for the PCI v2.2 standardh]j])}(hjh]h!Support for the PCI v2.2 standard}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1j" hjNubj# )}(hDomain Validation h]j])}(hDomain Validationh]hDomain Validation}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1j" hjNubeh}(h]h ]h"]h$]h&]j j uh1j hhhKhjKubah}(h]h ]h"]h$]h&]uh1jC hj9ubeh}(h]h ]h"]h$]h&]uh1j- hhhKhj6ubah}(h]h ]h"]h$]h&]uh1j( hj2ubah}(h]h ]h"]h$]h&]uh1j" hj ubj# )}(hX$2.2. Operating System Support: - Redhat Linux 7.2, 7.3, 8.0, Advanced Server 2.1 - SuSE Linux 7.3, 8.0, 8.1, Enterprise Server 7 - only Intel and AMD x86 supported at this time - >4GB memory configurations supported. Refer to the User's Guide for more details on this. h]j) )}(hhh]j. )}(hX2.2. Operating System Support: - Redhat Linux 7.2, 7.3, 8.0, Advanced Server 2.1 - SuSE Linux 7.3, 8.0, 8.1, Enterprise Server 7 - only Intel and AMD x86 supported at this time - >4GB memory configurations supported. Refer to the User's Guide for more details on this. h](j4 )}(h2.2. Operating System Support:h]h2.2. Operating System Support:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhKhjubjD )}(hhh](j)}(h- Redhat Linux 7.2, 7.3, 8.0, Advanced Server 2.1 - SuSE Linux 7.3, 8.0, 8.1, Enterprise Server 7 - only Intel and AMD x86 supported at this time - >4GB memory configurations supported. h]j )}(hhh](j# )}(h/Redhat Linux 7.2, 7.3, 8.0, Advanced Server 2.1h]j])}(hj!h]h/Redhat Linux 7.2, 7.3, 8.0, Advanced Server 2.1}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1j" hjubj# )}(h-SuSE Linux 7.3, 8.0, 8.1, Enterprise Server 7h]j])}(hj8h]h-SuSE Linux 7.3, 8.0, 8.1, Enterprise Server 7}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhj6ubah}(h]h ]h"]h$]h&]uh1j" hjubj# )}(h-only Intel and AMD x86 supported at this timeh]j])}(hjOh]h-only Intel and AMD x86 supported at this time}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjMubah}(h]h ]h"]h$]h&]uh1j" hjubj# )}(h&>4GB memory configurations supported. h]j])}(h%>4GB memory configurations supported.h]h%>4GB memory configurations supported.}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjdubah}(h]h ]h"]h$]h&]uh1j" hjubeh}(h]h ]h"]h$]h&]j j uh1j hhhKhjubah}(h]h ]h"]h$]h&]uh1jhhhKhjubj])}(h3Refer to the User's Guide for more details on this.h]h5Refer to the User’s Guide for more details on this.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubeh}(h]h ]h"]h$]h&]uh1jC hjubeh}(h]h ]h"]h$]h&]uh1j- hhhKhjubah}(h]h ]h"]h$]h&]uh1j( hjubah}(h]h ]h"]h$]h&]uh1j" hj ubeh}(h]h ]h"]h$]h&]j *uh1j hhhKLhj ubah}(h]h ]h"]h$]h&]uh1jhhhKLhj hhubeh}(h]version-historyah ]h"]2. version historyah$]h&]uh1jGhjIhhhhhKIubjH)}(hhh](jM)}(h3. Command Line Optionsh]h3. Command Line Options}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jLhjhhhhhKubj)}(hXd .. Warning:: ALTERING OR ADDING THESE DRIVER PARAMETERS INCORRECTLY CAN RENDER YOUR SYSTEM INOPERABLE. USE THEM WITH CAUTION. Put a .conf file in the /etc/modprobe.d/ directory and add/edit a line containing ``options aic79xx aic79xx=[command[,command...]]`` where ``command`` is one or more of the following: h](j)}(h.. Warning:: ALTERING OR ADDING THESE DRIVER PARAMETERS INCORRECTLY CAN RENDER YOUR SYSTEM INOPERABLE. USE THEM WITH CAUTION. h]hwarning)}(hpALTERING OR ADDING THESE DRIVER PARAMETERS INCORRECTLY CAN RENDER YOUR SYSTEM INOPERABLE. USE THEM WITH CAUTION.h]j])}(hpALTERING OR ADDING THESE DRIVER PARAMETERS INCORRECTLY CAN RENDER YOUR SYSTEM INOPERABLE. USE THEM WITH CAUTION.h]hpALTERING OR ADDING THESE DRIVER PARAMETERS INCORRECTLY CAN RENDER YOUR SYSTEM INOPERABLE. USE THEM WITH CAUTION.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhhhKhjubj])}(hPut a .conf file in the /etc/modprobe.d/ directory and add/edit a line containing ``options aic79xx aic79xx=[command[,command...]]`` where ``command`` is one or more of the following:h](hRPut a .conf file in the /etc/modprobe.d/ directory and add/edit a line containing }(hjhhhNhNubhliteral)}(h2``options aic79xx aic79xx=[command[,command...]]``h]h.options aic79xx aic79xx=[command[,command...]]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh where }(hjhhhNhNubj)}(h ``command``h]hcommand}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh! is one or more of the following:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1j\hhhKhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj) )}(hhh](j. )}(hverbose :Definition: enable additional informative messages during driver operation. :Possible Values: This option is a flag :Default Value: disabled h](j4 )}(hverboseh]hverbose}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhKhj9ubjD )}(hhh]h field_list)}(hhh](hfield)}(hhh](h field_name)}(h Definitionh]h Definition}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1jXhjUhhhKubh field_body)}(h?enable additional informative messages during driver operation.h]j])}(hjlh]h?enable additional informative messages during driver operation.}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjjubah}(h]h ]h"]h$]h&]uh1jhhjUubeh}(h]h ]h"]h$]h&]uh1jShhhKhjPubjT)}(hhh](jY)}(hPossible Valuesh]hPossible Values}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jXhjhhhKubji)}(hThis option is a flagh]j])}(hjh]hThis option is a flag}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1jhhjubeh}(h]h ]h"]h$]h&]uh1jShhhKhjPubjT)}(hhh](jY)}(h Default Valueh]h Default Value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jXhjhhhKubji)}(h disabled h]j])}(hdisabledh]hdisabled}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1jhhjubeh}(h]h ]h"]h$]h&]uh1jShhhKhjPubeh}(h]h ]h"]h$]h&]uh1jNhjKubah}(h]h ]h"]h$]h&]uh1jC hj9ubeh}(h]h ]h"]h$]h&]uh1j- hhhKhj6ubj. )}(hX?debug:[value] :Definition: Enables various levels of debugging information The bit definitions for the debugging mask can be found in drivers/scsi/aic7xxx/aic79xx.h under the "Debug" heading. :Possible Values: 0x0000 = no debugging, 0xffff = full debugging :Default Value: 0x0000 h](j4 )}(h debug:[value]h]h debug:[value]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhKhjubjD )}(hhh]jO)}(hhh](jT)}(hhh](jY)}(h Definitionh]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jXhjhhhKubji)}(hEnables various levels of debugging information The bit definitions for the debugging mask can be found in drivers/scsi/aic7xxx/aic79xx.h under the "Debug" heading.h]j])}(hEnables various levels of debugging information The bit definitions for the debugging mask can be found in drivers/scsi/aic7xxx/aic79xx.h under the "Debug" heading.h]hEnables various levels of debugging information The bit definitions for the debugging mask can be found in drivers/scsi/aic7xxx/aic79xx.h under the “Debug” heading.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1jhhjubeh}(h]h ]h"]h$]h&]uh1jShhhKhj ubjT)}(hhh](jY)}(hPossible Valuesh]hPossible Values}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1jXhj=hhhKubji)}(h.0x0000 = no debugging, 0xffff = full debuggingh]j])}(hjPh]h.0x0000 = no debugging, 0xffff = full debugging}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjNubah}(h]h ]h"]h$]h&]uh1jhhj=ubeh}(h]h ]h"]h$]h&]uh1jShhhKhj ubjT)}(hhh](jY)}(h Default Valueh]h Default Value}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1jXhjkhhhKubji)}(h0x0000 h]j])}(h0x0000h]h0x0000}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhj|ubah}(h]h ]h"]h$]h&]uh1jhhjkubeh}(h]h ]h"]h$]h&]uh1jShhhKhj ubeh}(h]h ]h"]h$]h&]uh1jNhjubah}(h]h ]h"]h$]h&]uh1jC hjubeh}(h]h ]h"]h$]h&]uh1j- hhhKhj6hhubj. )}(hno_reset :Definition: Do not reset the bus during the initial probe phase :Possible Values: This option is a flag :Default Value: disabled h](j4 )}(hno_reseth]hno_reset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhKhjubjD )}(hhh]jO)}(hhh](jT)}(hhh](jY)}(h Definitionh]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jXhjhhhKubji)}(h3Do not reset the bus during the initial probe phaseh]j])}(h3Do not reset the bus during the initial probe phaseh]h3Do not reset the bus during the initial probe phase}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1jhhjubeh}(h]h ]h"]h$]h&]uh1jShhhKhjubjT)}(hhh](jY)}(hPossible Valuesh]hPossible Values}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jXhjhhhKubji)}(hThis option is a flagh]j])}(hjh]hThis option is a flag}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhjubah}(h]h ]h"]h$]h&]uh1jhhjubeh}(h]h ]h"]h$]h&]uh1jShhhKhjubjT)}(hhh](jY)}(h Default Valueh]h Default Value}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1jXhj!hhhKubji)}(h disabled h]j])}(hdisabledh]hdisabled}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhKhj2ubah}(h]h ]h"]h$]h&]uh1jhhj!ubeh}(h]h ]h"]h$]h&]uh1jShhhKhjubeh}(h]h ]h"]h$]h&]uh1jNhjubah}(h]h ]h"]h$]h&]uh1jC hjubeh}(h]h ]h"]h$]h&]uh1j- hhhKhj6hhubj. )}(hextended :Definition: Force extended translation on the controller :Possible Values: This option is a flag :Default Value: disabled h](j4 )}(hextendedh]hextended}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhMhjbubjD )}(hhh]jO)}(hhh](jT)}(hhh](jY)}(h Definitionh]h Definition}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1jXhjzhhhKubji)}(h,Force extended translation on the controllerh]j])}(hjh]h,Force extended translation on the controller}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhjubah}(h]h ]h"]h$]h&]uh1jhhjzubeh}(h]h ]h"]h$]h&]uh1jShhhMhjwubjT)}(hhh](jY)}(hPossible Valuesh]hPossible Values}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jXhjhhhKubji)}(hThis option is a flagh]j])}(hjh]hThis option is a flag}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhjubah}(h]h ]h"]h$]h&]uh1jhhjubeh}(h]h ]h"]h$]h&]uh1jShhhMhjwubjT)}(hhh](jY)}(h Default Valueh]h Default Value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jXhjhhhKubji)}(h disabled h]j])}(hdisabledh]hdisabled}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhjubah}(h]h ]h"]h$]h&]uh1jhhjubeh}(h]h ]h"]h$]h&]uh1jShhhMhjwubeh}(h]h ]h"]h$]h&]uh1jNhjtubah}(h]h ]h"]h$]h&]uh1jC hjbubeh}(h]h ]h"]h$]h&]uh1j- hhhMhj6hhubj. )}(hperiodic_otag :Definition: Send an ordered tag periodically to prevent tag starvation. Needed for some older devices :Possible Values: This option is a flag :Default Value: disabled h](j4 )}(h periodic_otagh]h periodic_otag}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhM hjubjD )}(hhh]jO)}(hhh](jT)}(hhh](jY)}(h Definitionh]h Definition}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1jXhj/hhhKubji)}(hZSend an ordered tag periodically to prevent tag starvation. Needed for some older devicesh]j])}(hZSend an ordered tag periodically to prevent tag starvation. Needed for some older devicesh]hZSend an ordered tag periodically to prevent tag starvation. Needed for some older devices}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhj@ubah}(h]h ]h"]h$]h&]uh1jhhj/ubeh}(h]h ]h"]h$]h&]uh1jShhhMhj,ubjT)}(hhh](jY)}(hPossible Valuesh]hPossible Values}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1jXhj^hhhKubji)}(hThis option is a flagh]j])}(hjqh]hThis option is a flag}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhjoubah}(h]h ]h"]h$]h&]uh1jhhj^ubeh}(h]h ]h"]h$]h&]uh1jShhhMhj,ubjT)}(hhh](jY)}(h Default Valueh]h Default Value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jXhjhhhKubji)}(h disabled h]j])}(hdisabledh]hdisabled}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhM hjubah}(h]h ]h"]h$]h&]uh1jhhjubeh}(h]h ]h"]h$]h&]uh1jShhhM hj,ubeh}(h]h ]h"]h$]h&]uh1jNhj)ubah}(h]h ]h"]h$]h&]uh1jC hjubeh}(h]h ]h"]h$]h&]uh1j- hhhM hj6hhubj. )}(hreverse_scan :Definition: Probe the scsi bus in reverse order, starting with target 15 :Possible Values: This option is a flag :Default Value: disabled h](j4 )}(h reverse_scanh]h reverse_scan}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhMhjubjD )}(hhh]jO)}(hhh](jT)}(hhh](jY)}(h Definitionh]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jXhjhhhKubji)}(h 0 Enable DV ==== =============================== :Default Value: DV Serial EEPROM configuration setting. Example: :: dv:{-1,0,,1,1,0} - On Controller 0 leave DV at its default setting. - On Controller 1 disable DV. - Skip configuration on Controller 2. - On Controllers 3 and 4 enable DV. - On Controller 5 disable DV. h](j4 )}(hdv: {value[,value...]}h]hdv: {value[,value...]}}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhMhjubjD )}(hhh](jO)}(hhh](jT)}(hhh](jY)}(h Definitionh]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jXhjhhhKubji)}(hXSet Domain Validation Policy on a per-controller basis. Controllers may be omitted indicating that they should retain the default read streaming setting. :Possible Values: ==== =============================== < 0 Use setting from serial EEPROM. 0 Disable DV > 0 Enable DV ==== =============================== h](j) )}(hhh]j. )}(hSet Domain Validation Policy on a per-controller basis. Controllers may be omitted indicating that they should retain the default read streaming setting. h](j4 )}(h7Set Domain Validation Policy on a per-controller basis.h]h7Set Domain Validation Policy on a per-controller basis.}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhMjhj&ubjD )}(hhh]j])}(haControllers may be omitted indicating that they should retain the default read streaming setting.h]haControllers may be omitted indicating that they should retain the default read streaming setting.}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMihj8ubah}(h]h ]h"]h$]h&]uh1jC hj&ubeh}(h]h ]h"]h$]h&]uh1j- hhhMjhj#ubah}(h]h ]h"]h$]h&]uh1j( hjubjO)}(hhh]jT)}(hhh](jY)}(hPossible Valuesh]hPossible Values}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1jXhj^hhhKubji)}(h==== =============================== < 0 Use setting from serial EEPROM. 0 Disable DV > 0 Enable DV ==== =============================== h]j)}(hhh]j)}(hhh](j)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjvubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjvubj)}(hhh](j)}(hhh](j)}(hhh]j])}(h< 0h]h< 0}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMohjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]j])}(hUse setting from serial EEPROM.h]hUse setting from serial EEPROM.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMohjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]j])}(h0h]h0}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMphjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]j])}(h Disable DVh]h Disable DV}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMphjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]j])}(h> 0h]h> 0}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMqhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]j])}(h Enable DVh]h Enable DV}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMqhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjvubeh}(h]h ]h"]h$]h&]colsKuh1jhjsubah}(h]h ]h"]h$]h&]uh1jhjoubah}(h]h ]h"]h$]h&]uh1jhhj^ubeh}(h]h ]h"]h$]h&]uh1jShhhMlhj[ubah}(h]h ]h"]h$]h&]uh1jNhjubeh}(h]h ]h"]h$]h&]uh1jhhjubeh}(h]h ]h"]h$]h&]uh1jShhhMhhj ubjT)}(hhh](jY)}(h Default Valueh]h Default Value}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1jXhjfhhhKubji)}(h(DV Serial EEPROM configuration setting. h]j])}(h'DV Serial EEPROM configuration setting.h]h'DV Serial EEPROM configuration setting.}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMthjwubah}(h]h ]h"]h$]h&]uh1jhhjfubeh}(h]h ]h"]h$]h&]uh1jShhhMthj ubeh}(h]h ]h"]h$]h&]uh1jNhjubj])}(hExample:h]hExample:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMvhjubj)}(h:: dv:{-1,0,,1,1,0} - On Controller 0 leave DV at its default setting. - On Controller 1 disable DV. - Skip configuration on Controller 2. - On Controllers 3 and 4 enable DV. - On Controller 5 disable DV. h](j)}(hdv:{-1,0,,1,1,0}h]hdv:{-1,0,,1,1,0}}hjsbah}(h]h ]h"]h$]h&]hhuh1jhhhMzhjubj )}(hhh](j# )}(h0On Controller 0 leave DV at its default setting.h]j])}(hjh]h0On Controller 0 leave DV at its default setting.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhM|hjubah}(h]h ]h"]h$]h&]uh1j" hjubj# )}(hOn Controller 1 disable DV.h]j])}(hjh]hOn Controller 1 disable DV.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhM}hjubah}(h]h ]h"]h$]h&]uh1j" hjubj# )}(h#Skip configuration on Controller 2.h]j])}(hjh]h#Skip configuration on Controller 2.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhM~hjubah}(h]h ]h"]h$]h&]uh1j" hjubj# )}(h!On Controllers 3 and 4 enable DV.h]j])}(hj h]h!On Controllers 3 and 4 enable DV.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhj ubah}(h]h ]h"]h$]h&]uh1j" hjubj# )}(hOn Controller 5 disable DV. h]j])}(hOn Controller 5 disable DV.h]hOn Controller 5 disable DV.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhj ubah}(h]h ]h"]h$]h&]uh1j" hjubeh}(h]h ]h"]h$]h&]j j uh1j hhhM|hjubeh}(h]h ]h"]h$]h&]uh1jhhhMxhjubeh}(h]h ]h"]h$]h&]uh1jC hjubeh}(h]h ]h"]h$]h&]uh1j- hhhMhj6hhubj. )}(hseltime:[value] :Definition: Specifies the selection timeout value :Possible Values: 0 = 256ms, 1 = 128ms, 2 = 64ms, 3 = 32ms :Default Value: 0 h](j4 )}(hseltime:[value]h]hseltime:[value]}(hjN hhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhMhjJ ubjD )}(hhh]jO)}(hhh](jT)}(hhh](jY)}(h Definitionh]h Definition}(hje hhhNhNubah}(h]h ]h"]h$]h&]uh1jXhjb hhhKubji)}(h%Specifies the selection timeout valueh]j])}(hju h]h%Specifies the selection timeout value}(hjw hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhjs ubah}(h]h ]h"]h$]h&]uh1jhhjb ubeh}(h]h ]h"]h$]h&]uh1jShhhMhj_ ubjT)}(hhh](jY)}(hPossible Valuesh]hPossible Values}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jXhj hhhKubji)}(h(0 = 256ms, 1 = 128ms, 2 = 64ms, 3 = 32msh]j])}(hj h]h(0 = 256ms, 1 = 128ms, 2 = 64ms, 3 = 32ms}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhj ubah}(h]h ]h"]h$]h&]uh1jhhj ubeh}(h]h ]h"]h$]h&]uh1jShhhMhj_ ubjT)}(hhh](jY)}(h Default Valueh]h Default Value}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jXhj hhhKubji)}(h0 h]j])}(hjh]h0}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhj ubah}(h]h ]h"]h$]h&]uh1jhhj ubeh}(h]h ]h"]h$]h&]uh1jShhhMhj_ ubeh}(h]h ]h"]h$]h&]uh1jNhj\ ubah}(h]h ]h"]h$]h&]uh1jC hjJ ubeh}(h]h ]h"]h$]h&]uh1j- hhhMhj6hhubeh}(h]h ]h"]h$]h&]uh1j( hjhhhNhNubh)}(htWarning: The following three options should only be changed at the direction of a technical support representative.h]htWarning: The following three options should only be changed at the direction of a technical support representative.}hj!sbah}(h]h ]h"]h$]h&]hhuh1hhjhhhhhMubj) )}(hhh](j. )}(hXprecomp: {value[,value...]} :Definition: Set IO Cell precompensation value on a per-controller basis. Controllers may be omitted indicating that they should retain the default precompensation setting. :Possible Values: 0 - 7 :Default Value: Varies based on chip revision Examples: :: precomp:{0x1} On Controller 0 set precompensation to 1. :: precomp:{1,,7} - On Controller 0 set precompensation to 1. - On Controller 2 set precompensation to 8. h](j4 )}(hprecomp: {value[,value...]}h]hprecomp: {value[,value...]}}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhMhj!ubjD )}(hhh](jO)}(hhh](jT)}(hhh](jY)}(h Definitionh]h Definition}(hj0!hhhNhNubah}(h]h ]h"]h$]h&]uh1jXhj-!hhhKubji)}(hSet IO Cell precompensation value on a per-controller basis. Controllers may be omitted indicating that they should retain the default precompensation setting. h]j])}(hSet IO Cell precompensation value on a per-controller basis. Controllers may be omitted indicating that they should retain the default precompensation setting.h]hSet IO Cell precompensation value on a per-controller basis. Controllers may be omitted indicating that they should retain the default precompensation setting.}(hjB!hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhj>!ubah}(h]h ]h"]h$]h&]uh1jhhj-!ubeh}(h]h ]h"]h$]h&]uh1jShhhMhj*!ubjT)}(hhh](jY)}(hPossible Valuesh]hPossible Values}(hj_!hhhNhNubah}(h]h ]h"]h$]h&]uh1jXhj\!hhhKubji)}(h0 - 7h]j])}(hjo!h]h0 - 7}(hjq!hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhjm!ubah}(h]h ]h"]h$]h&]uh1jhhj\!ubeh}(h]h ]h"]h$]h&]uh1jShhhMhj*!ubjT)}(hhh](jY)}(h Default Valueh]h Default Value}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jXhj!hhhKubji)}(hVaries based on chip revision h]j])}(hVaries based on chip revisionh]hVaries based on chip revision}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhj!ubah}(h]h ]h"]h$]h&]uh1jhhj!ubeh}(h]h ]h"]h$]h&]uh1jShhhMhj*!ubeh}(h]h ]h"]h$]h&]uh1jNhj'!ubj])}(h Examples:h]h Examples:}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhj'!ubj)}(h:: precomp:{0x1} On Controller 0 set precompensation to 1. :: precomp:{1,,7} - On Controller 0 set precompensation to 1. - On Controller 2 set precompensation to 8. h](j)}(h precomp:{0x1}h]h precomp:{0x1}}hj!sbah}(h]h ]h"]h$]h&]hhuh1jhhhMhj!ubj])}(h)On Controller 0 set precompensation to 1.h]h)On Controller 0 set precompensation to 1.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhj!ubj)}(hprecomp:{1,,7}h]hprecomp:{1,,7}}hj!sbah}(h]h ]h"]h$]h&]hhuh1jhhhMhj!ubj )}(hhh](j# )}(h)On Controller 0 set precompensation to 1.h]j])}(hj"h]h)On Controller 0 set precompensation to 1.}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhj!ubah}(h]h ]h"]h$]h&]uh1j" hj!ubj# )}(h*On Controller 2 set precompensation to 8. h]j])}(h)On Controller 2 set precompensation to 8.h]h)On Controller 2 set precompensation to 8.}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhj"ubah}(h]h ]h"]h$]h&]uh1j" hj!ubeh}(h]h ]h"]h$]h&]j j uh1j hhhMhj!ubeh}(h]h ]h"]h$]h&]uh1jhhhMhj'!ubeh}(h]h ]h"]h$]h&]uh1jC hj!ubeh}(h]h ]h"]h$]h&]uh1j- hhhMhj!ubj. )}(hXslewrate: {value[,value...]} :Definition: Set IO Cell slew rate on a per-controller basis. Controllers may be omitted indicating that they should retain the default slew rate setting. :Possible Values: 0 - 15 :Default Value: Varies based on chip revision Examples: :: slewrate:{0x1} - On Controller 0 set slew rate to 1. :: slewrate :{1,,8} - On Controller 0 set slew rate to 1. - On Controller 2 set slew rate to 8. h](j4 )}(hslewrate: {value[,value...]}h]hslewrate: {value[,value...]}}(hjI"hhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhMhjE"ubjD )}(hhh](jO)}(hhh](jT)}(hhh](jY)}(h Definitionh]h Definition}(hj`"hhhNhNubah}(h]h ]h"]h$]h&]uh1jXhj]"hhhKubji)}(hSet IO Cell slew rate on a per-controller basis. Controllers may be omitted indicating that they should retain the default slew rate setting. h]j])}(hSet IO Cell slew rate on a per-controller basis. Controllers may be omitted indicating that they should retain the default slew rate setting.h]hSet IO Cell slew rate on a per-controller basis. Controllers may be omitted indicating that they should retain the default slew rate setting.}(hjr"hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhjn"ubah}(h]h ]h"]h$]h&]uh1jhhj]"ubeh}(h]h ]h"]h$]h&]uh1jShhhMhjZ"ubjT)}(hhh](jY)}(hPossible Valuesh]hPossible Values}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jXhj"hhhKubji)}(h0 - 15h]j])}(hj"h]h0 - 15}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhj"ubah}(h]h ]h"]h$]h&]uh1jhhj"ubeh}(h]h ]h"]h$]h&]uh1jShhhMhjZ"ubjT)}(hhh](jY)}(h Default Valueh]h Default Value}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jXhj"hhhKubji)}(hVaries based on chip revision h]j])}(hVaries based on chip revisionh]hVaries based on chip revision}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhj"ubah}(h]h ]h"]h$]h&]uh1jhhj"ubeh}(h]h ]h"]h$]h&]uh1jShhhMhjZ"ubeh}(h]h ]h"]h$]h&]uh1jNhjW"ubj])}(h Examples:h]h Examples:}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhjW"ubj)}(h:: slewrate:{0x1} - On Controller 0 set slew rate to 1. :: slewrate :{1,,8} - On Controller 0 set slew rate to 1. - On Controller 2 set slew rate to 8. h](j)}(hslewrate:{0x1}h]hslewrate:{0x1}}hj#sbah}(h]h ]h"]h$]h&]hhuh1jhhhMhj"ubj )}(hhh]j# )}(h$On Controller 0 set slew rate to 1. h]j])}(h#On Controller 0 set slew rate to 1.h]h#On Controller 0 set slew rate to 1.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhj#ubah}(h]h ]h"]h$]h&]uh1j" hj#ubah}(h]h ]h"]h$]h&]j j uh1j hhhMhj"ubj)}(hslewrate :{1,,8}h]hslewrate :{1,,8}}hj0#sbah}(h]h ]h"]h$]h&]hhuh1jhhhMhj"ubj )}(hhh](j# )}(h#On Controller 0 set slew rate to 1.h]j])}(hjC#h]h#On Controller 0 set slew rate to 1.}(hjE#hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhjA#ubah}(h]h ]h"]h$]h&]uh1j" hj>#ubj# )}(h$On Controller 2 set slew rate to 8. h]j])}(h#On Controller 2 set slew rate to 8.h]h#On Controller 2 set slew rate to 8.}(hj\#hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhjX#ubah}(h]h ]h"]h$]h&]uh1j" hj>#ubeh}(h]h ]h"]h$]h&]j j uh1j hhhMhj"ubeh}(h]h ]h"]h$]h&]uh1jhhhMhjW"ubeh}(h]h ]h"]h$]h&]uh1jC hjE"ubeh}(h]h ]h"]h$]h&]uh1j- hhhMhj!hhubj. )}(hXamplitude: {value[,value...]} :Definition: Set IO Cell signal amplitude on a per-controller basis. Controllers may be omitted indicating that they should retain the default read streaming setting. :Possible Values: 1 - 7 :Default Value: Varies based on chip revision Examples: :: amplitude:{0x1} On Controller 0 set amplitude to 1. :: amplitude :{1,,7} - On Controller 0 set amplitude to 1. - On Controller 2 set amplitude to 7. h](j4 )}(hamplitude: {value[,value...]}h]hamplitude: {value[,value...]}}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhMhj#ubjD )}(hhh](jO)}(hhh](jT)}(hhh](jY)}(h Definitionh]h Definition}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jXhj#hhhKubji)}(hSet IO Cell signal amplitude on a per-controller basis. Controllers may be omitted indicating that they should retain the default read streaming setting. h]j])}(hSet IO Cell signal amplitude on a per-controller basis. Controllers may be omitted indicating that they should retain the default read streaming setting.h]hSet IO Cell signal amplitude on a per-controller basis. Controllers may be omitted indicating that they should retain the default read streaming setting.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhj#ubah}(h]h ]h"]h$]h&]uh1jhhj#ubeh}(h]h ]h"]h$]h&]uh1jShhhMhj#ubjT)}(hhh](jY)}(hPossible Valuesh]hPossible Values}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jXhj#hhhKubji)}(h1 - 7h]j])}(hj#h]h1 - 7}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhj#ubah}(h]h ]h"]h$]h&]uh1jhhj#ubeh}(h]h ]h"]h$]h&]uh1jShhhMhj#ubjT)}(hhh](jY)}(h Default Valueh]h Default Value}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1jXhj#hhhKubji)}(hVaries based on chip revision h]j])}(hVaries based on chip revisionh]hVaries based on chip revision}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhj$ubah}(h]h ]h"]h$]h&]uh1jhhj#ubeh}(h]h ]h"]h$]h&]uh1jShhhMhj#ubeh}(h]h ]h"]h$]h&]uh1jNhj#ubj])}(h Examples:h]h Examples:}(hj2$hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhj#ubj)}(hamplitude:{0x1}h]hamplitude:{0x1}}hj@$sbah}(h]h ]h"]h$]h&]hhuh1jhhhMhj#ubj])}(h#On Controller 0 set amplitude to 1.h]h#On Controller 0 set amplitude to 1.}(hjN$hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhj#ubj)}(hamplitude :{1,,7}h]hamplitude :{1,,7}}hj\$sbah}(h]h ]h"]h$]h&]hhuh1jhhhMhj#ubj )}(hhh](j# )}(h#On Controller 0 set amplitude to 1.h]j])}(hjo$h]h#On Controller 0 set amplitude to 1.}(hjq$hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhjm$ubah}(h]h ]h"]h$]h&]uh1j" hjj$ubj# )}(h$On Controller 2 set amplitude to 7. h]j])}(h#On Controller 2 set amplitude to 7.h]h#On Controller 2 set amplitude to 7.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhj$ubah}(h]h ]h"]h$]h&]uh1j" hjj$ubeh}(h]h ]h"]h$]h&]j j uh1j hhhMhj#ubeh}(h]h ]h"]h$]h&]uh1jC hj#ubeh}(h]h ]h"]h$]h&]uh1j- hhhMhj!hhubeh}(h]h ]h"]h$]h&]uh1j( hjhhhhhNubj])}(h Example::h]hExample:}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhjhhubj)}(h2options aic79xx aic79xx=verbose,rd_strm:{{0x0041}}h]h2options aic79xx aic79xx=verbose,rd_strm:{{0x0041}}}hj$sbah}(h]h ]h"]h$]h&]hhuh1jhhhMhjhhubj])}(heenables verbose output in the driver and turns read streaming on for targets 0 and 6 of Controller 0.h]heenables verbose output in the driver and turns read streaming on for targets 0 and 6 of Controller 0.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhjhhubeh}(h]command-line-optionsah ]h"]3. command line optionsah$]h&]uh1jGhjIhhhhhKubjH)}(hhh](jM)}(h4. Additional Notesh]h4. Additional Notes}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1jLhj$hhhhhMubjH)}(hhh](jM)}(h#4.1. Known/Unresolved or FYI Issuesh]h#4.1. Known/Unresolved or FYI Issues}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1jLhj$~hhhhhMubj)}(h* Under SuSE Linux Enterprise 7, the driver may fail to operate correctly due to a problem with PCI interrupt routing in the Linux kernel. Please contact SuSE for an updated Linux kernel. h]j )}(hhh]j# )}(hUnder SuSE Linux Enterprise 7, the driver may fail to operate correctly due to a problem with PCI interrupt routing in the Linux kernel. Please contact SuSE for an updated Linux kernel. h]j])}(hUnder SuSE Linux Enterprise 7, the driver may fail to operate correctly due to a problem with PCI interrupt routing in the Linux kernel. Please contact SuSE for an updated Linux kernel.h]hUnder SuSE Linux Enterprise 7, the driver may fail to operate correctly due to a problem with PCI interrupt routing in the Linux kernel. Please contact SuSE for an updated Linux kernel.}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhj%ubah}(h]h ]h"]h$]h&]uh1j" hj %ubah}(h]h ]h"]h$]h&]j juh1j hhhMhj%ubah}(h]h ]h"]h$]h&]uh1jhhhMhj$hhubeh}(h]known-unresolved-or-fyi-issuesah ]h"]#4.1. known/unresolved or fyi issuesah$]h&]uh1jGhj$hhhhhMubjH)}(hhh](jM)}(h%4.2. Third-Party Compatibility Issuesh]h%4.2. Third-Party Compatibility Issues}(hj>%hhhNhNubah}(h]h ]h"]h$]h&]uh1jLhj;%hhhhhMubj)}(h* Adaptec only supports Ultra320 hard drives running the latest firmware available. Please check with your hard drive manufacturer to ensure you have the latest version. h]j )}(hhh]j# )}(hAdaptec only supports Ultra320 hard drives running the latest firmware available. Please check with your hard drive manufacturer to ensure you have the latest version. h]j])}(hAdaptec only supports Ultra320 hard drives running the latest firmware available. Please check with your hard drive manufacturer to ensure you have the latest version.h]hAdaptec only supports Ultra320 hard drives running the latest firmware available. Please check with your hard drive manufacturer to ensure you have the latest version.}(hjW%hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhjS%ubah}(h]h ]h"]h$]h&]uh1j" hjP%ubah}(h]h ]h"]h$]h&]j juh1j hhhMhjL%ubah}(h]h ]h"]h$]h&]uh1jhhhMhj;%hhubeh}(h] third-party-compatibility-issuesah ]h"]%4.2. third-party compatibility issuesah$]h&]uh1jGhj$hhhhhMubjH)}(hhh](jM)}(h/4.3. Operating System or Technology Limitationsh]h/4.3. Operating System or Technology Limitations}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jLhj%hhhhhMubj)}(hX(* PCI Hot Plug is untested and may cause the operating system to stop responding. * Luns that are not numbered contiguously starting with 0 might not be automatically probed during system startup. This is a limitation of the OS. Please contact your Linux vendor for instructions on manually probing non-contiguous luns. * Using the Driver Update Disk version of this package during OS installation under RedHat might result in two versions of this driver being installed into the system module directory. This might cause problems with the /sbin/mkinitrd program and/or other RPM packages that try to install system modules. The best way to correct this once the system is running is to install the latest RPM package version of this driver, available from http://www.adaptec.com. h]j )}(hhh](j# )}(hOPCI Hot Plug is untested and may cause the operating system to stop responding.h]j])}(hOPCI Hot Plug is untested and may cause the operating system to stop responding.h]hOPCI Hot Plug is untested and may cause the operating system to stop responding.}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhj%ubah}(h]h ]h"]h$]h&]uh1j" hj%ubj# )}(hLuns that are not numbered contiguously starting with 0 might not be automatically probed during system startup. This is a limitation of the OS. Please contact your Linux vendor for instructions on manually probing non-contiguous luns.h]j])}(hLuns that are not numbered contiguously starting with 0 might not be automatically probed during system startup. This is a limitation of the OS. Please contact your Linux vendor for instructions on manually probing non-contiguous luns.h]hLuns that are not numbered contiguously starting with 0 might not be automatically probed during system startup. This is a limitation of the OS. Please contact your Linux vendor for instructions on manually probing non-contiguous luns.}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhj%ubah}(h]h ]h"]h$]h&]uh1j" hj%ubj# )}(hXUsing the Driver Update Disk version of this package during OS installation under RedHat might result in two versions of this driver being installed into the system module directory. This might cause problems with the /sbin/mkinitrd program and/or other RPM packages that try to install system modules. The best way to correct this once the system is running is to install the latest RPM package version of this driver, available from http://www.adaptec.com. h]j])}(hXUsing the Driver Update Disk version of this package during OS installation under RedHat might result in two versions of this driver being installed into the system module directory. This might cause problems with the /sbin/mkinitrd program and/or other RPM packages that try to install system modules. The best way to correct this once the system is running is to install the latest RPM package version of this driver, available from http://www.adaptec.com.h](hXUsing the Driver Update Disk version of this package during OS installation under RedHat might result in two versions of this driver being installed into the system module directory. This might cause problems with the /sbin/mkinitrd program and/or other RPM packages that try to install system modules. The best way to correct this once the system is running is to install the latest RPM package version of this driver, available from }(hj%hhhNhNubh reference)}(hhttp://www.adaptec.comh]hhttp://www.adaptec.com}(hj%hhhNhNubah}(h]h ]h"]h$]h&]refurij%uh1j%hj%ubh.}(hj%hhhNhNubeh}(h]h ]h"]h$]h&]uh1j\hhhMhj%ubah}(h]h ]h"]h$]h&]uh1j" hj%ubeh}(h]h ]h"]h$]h&]j juh1j hhhMhj%ubah}(h]h ]h"]h$]h&]uh1jhhhMhj%hhubeh}(h]*operating-system-or-technology-limitationsah ]h"]/4.3. operating system or technology limitationsah$]h&]uh1jGhj$hhhhhMubeh}(h]additional-notesah ]h"]4. additional notesah$]h&]uh1jGhjIhhhhhMubjH)}(hhh](jM)}(h5. Adaptec Customer Supporth]h5. Adaptec Customer Support}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jLhj&hhhhhMubj)}(hXA Technical Support Identification (TSID) Number is required for Adaptec technical support. - The 12-digit TSID can be found on the white barcode-type label included inside the box with your product. The TSID helps us provide more efficient service by accurately identifying your product and support status. Support Options - Search the Adaptec Support Knowledgebase (ASK) at http://ask.adaptec.com for articles, troubleshooting tips, and frequently asked questions about your product. - For support via Email, submit your question to Adaptec's Technical Support Specialists at http://ask.adaptec.com/. North America - Visit our Web site at http://www.adaptec.com/. - For information about Adaptec's support options, call 408-957-2550, 24 hours a day, 7 days a week. - To speak with a Technical Support Specialist, * For hardware products, call 408-934-7274, Monday to Friday, 3:00 am to 5:00 pm, PDT. * For RAID and Fibre Channel products, call 321-207-2000, Monday to Friday, 3:00 am to 5:00 pm, PDT. To expedite your service, have your computer with you. - To order Adaptec products, including accessories and cables, call 408-957-7274. To order cables online go to http://www.adaptec.com/buy-cables/. Europe - Visit our Web site at http://www.adaptec.com/en-US/_common/world_index. - To speak with a Technical Support Specialist, call, or email, * German: +49 89 4366 5522, Monday-Friday, 9:00-17:00 CET, http://ask-de.adaptec.com/. * French: +49 89 4366 5533, Monday-Friday, 9:00-17:00 CET, http://ask-fr.adaptec.com/. * English: +49 89 4366 5544, Monday-Friday, 9:00-17:00 GMT, http://ask.adaptec.com/. - You can order Adaptec cables online at http://www.adaptec.com/buy-cables/. Japan - Visit our web site at http://www.adaptec.co.jp/. - To speak with a Technical Support Specialist, call +81 3 5308 6120, Monday-Friday, 9:00 a.m. to 12:00 p.m., 1:00 p.m. to 6:00 p.m. h](j])}(h[A Technical Support Identification (TSID) Number is required for Adaptec technical support.h]h[A Technical Support Identification (TSID) Number is required for Adaptec technical support.}(hj%&hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhj!&ubj)}(h- The 12-digit TSID can be found on the white barcode-type label included inside the box with your product. The TSID helps us provide more efficient service by accurately identifying your product and support status. h]j )}(hhh]j# )}(hThe 12-digit TSID can be found on the white barcode-type label included inside the box with your product. The TSID helps us provide more efficient service by accurately identifying your product and support status. h]j])}(hThe 12-digit TSID can be found on the white barcode-type label included inside the box with your product. The TSID helps us provide more efficient service by accurately identifying your product and support status.h]hThe 12-digit TSID can be found on the white barcode-type label included inside the box with your product. The TSID helps us provide more efficient service by accurately identifying your product and support status.}(hj>&hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhj:&ubah}(h]h ]h"]h$]h&]uh1j" hj7&ubah}(h]h ]h"]h$]h&]j j uh1j hhhMhj3&ubah}(h]h ]h"]h$]h&]uh1jhhhMhj!&ubj) )}(hhh](j. )}(hX-Support Options - Search the Adaptec Support Knowledgebase (ASK) at http://ask.adaptec.com for articles, troubleshooting tips, and frequently asked questions about your product. - For support via Email, submit your question to Adaptec's Technical Support Specialists at http://ask.adaptec.com/. h](j4 )}(hSupport Optionsh]hSupport Options}(hje&hhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhMhja&ubjD )}(hhh]j )}(hhh](j# )}(hSearch the Adaptec Support Knowledgebase (ASK) at http://ask.adaptec.com for articles, troubleshooting tips, and frequently asked questions about your product.h]j])}(hSearch the Adaptec Support Knowledgebase (ASK) at http://ask.adaptec.com for articles, troubleshooting tips, and frequently asked questions about your product.h](h2Search the Adaptec Support Knowledgebase (ASK) at }(hj}&hhhNhNubj%)}(hhttp://ask.adaptec.comh]hhttp://ask.adaptec.com}(hj&hhhNhNubah}(h]h ]h"]h$]h&]refurij&uh1j%hj}&ubhW for articles, troubleshooting tips, and frequently asked questions about your product.}(hj}&hhhNhNubeh}(h]h ]h"]h$]h&]uh1j\hhhM hjy&ubah}(h]h ]h"]h$]h&]uh1j" hjv&ubj# )}(hsFor support via Email, submit your question to Adaptec's Technical Support Specialists at http://ask.adaptec.com/. h]j])}(hrFor support via Email, submit your question to Adaptec's Technical Support Specialists at http://ask.adaptec.com/.h](h\For support via Email, submit your question to Adaptec’s Technical Support Specialists at }(hj&hhhNhNubj%)}(hhttp://ask.adaptec.com/h]hhttp://ask.adaptec.com/}(hj&hhhNhNubah}(h]h ]h"]h$]h&]refurij&uh1j%hj&ubh.}(hj&hhhNhNubeh}(h]h ]h"]h$]h&]uh1j\hhhMhj&ubah}(h]h ]h"]h$]h&]uh1j" hjv&ubeh}(h]h ]h"]h$]h&]j j uh1j hhhM hjs&ubah}(h]h ]h"]h$]h&]uh1jC hja&ubeh}(h]h ]h"]h$]h&]uh1j- hhhMhj^&ubj. )}(hXqNorth America - Visit our Web site at http://www.adaptec.com/. - For information about Adaptec's support options, call 408-957-2550, 24 hours a day, 7 days a week. - To speak with a Technical Support Specialist, * For hardware products, call 408-934-7274, Monday to Friday, 3:00 am to 5:00 pm, PDT. * For RAID and Fibre Channel products, call 321-207-2000, Monday to Friday, 3:00 am to 5:00 pm, PDT. To expedite your service, have your computer with you. - To order Adaptec products, including accessories and cables, call 408-957-7274. To order cables online go to http://www.adaptec.com/buy-cables/. h](j4 )}(h North Americah]h North America}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhMhj&ubjD )}(hhh]j )}(hhh](j# )}(h.Visit our Web site at http://www.adaptec.com/.h]j])}(hj&h](hVisit our Web site at }(hj&hhhNhNubj%)}(hhttp://www.adaptec.com/h]hhttp://www.adaptec.com/}(hj'hhhNhNubah}(h]h ]h"]h$]h&]refurij'uh1j%hj&ubh.}(hj&hhhNhNubeh}(h]h ]h"]h$]h&]uh1j\hhhMhj&ubah}(h]h ]h"]h$]h&]uh1j" hj&ubj# )}(hbFor information about Adaptec's support options, call 408-957-2550, 24 hours a day, 7 days a week.h]j])}(hbFor information about Adaptec's support options, call 408-957-2550, 24 hours a day, 7 days a week.h]hdFor information about Adaptec’s support options, call 408-957-2550, 24 hours a day, 7 days a week.}(hj''hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhj#'ubah}(h]h ]h"]h$]h&]uh1j" hj&ubj# )}(hX&To speak with a Technical Support Specialist, * For hardware products, call 408-934-7274, Monday to Friday, 3:00 am to 5:00 pm, PDT. * For RAID and Fibre Channel products, call 321-207-2000, Monday to Friday, 3:00 am to 5:00 pm, PDT. To expedite your service, have your computer with you.h](j])}(h-To speak with a Technical Support Specialist,h]h-To speak with a Technical Support Specialist,}(hj?'hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhj;'ubj )}(hhh](j# )}(hTFor hardware products, call 408-934-7274, Monday to Friday, 3:00 am to 5:00 pm, PDT.h]j])}(hTFor hardware products, call 408-934-7274, Monday to Friday, 3:00 am to 5:00 pm, PDT.h]hTFor hardware products, call 408-934-7274, Monday to Friday, 3:00 am to 5:00 pm, PDT.}(hjT'hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhjP'ubah}(h]h ]h"]h$]h&]uh1j" hjM'ubj# )}(hcFor RAID and Fibre Channel products, call 321-207-2000, Monday to Friday, 3:00 am to 5:00 pm, PDT. h]j])}(hbFor RAID and Fibre Channel products, call 321-207-2000, Monday to Friday, 3:00 am to 5:00 pm, PDT.h]hbFor RAID and Fibre Channel products, call 321-207-2000, Monday to Friday, 3:00 am to 5:00 pm, PDT.}(hjl'hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhjh'ubah}(h]h ]h"]h$]h&]uh1j" hjM'ubeh}(h]h ]h"]h$]h&]j juh1j hhhMhj;'ubj])}(h6To expedite your service, have your computer with you.h]h6To expedite your service, have your computer with you.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMhj;'ubeh}(h]h ]h"]h$]h&]uh1j" hj&ubj# )}(hTo order Adaptec products, including accessories and cables, call 408-957-7274. To order cables online go to http://www.adaptec.com/buy-cables/. h]j])}(hTo order Adaptec products, including accessories and cables, call 408-957-7274. To order cables online go to http://www.adaptec.com/buy-cables/.h](hnTo order Adaptec products, including accessories and cables, call 408-957-7274. To order cables online go to }(hj'hhhNhNubj%)}(h"http://www.adaptec.com/buy-cables/h]h"http://www.adaptec.com/buy-cables/}(hj'hhhNhNubah}(h]h ]h"]h$]h&]refurij'uh1j%hj'ubh.}(hj'hhhNhNubeh}(h]h ]h"]h$]h&]uh1j\hhhMhj'ubah}(h]h ]h"]h$]h&]uh1j" hj&ubeh}(h]h ]h"]h$]h&]j j uh1j hhhMhj&ubah}(h]h ]h"]h$]h&]uh1jC hj&ubeh}(h]h ]h"]h$]h&]uh1j- hhhMhj^&ubj. )}(hXEurope - Visit our Web site at http://www.adaptec.com/en-US/_common/world_index. - To speak with a Technical Support Specialist, call, or email, * German: +49 89 4366 5522, Monday-Friday, 9:00-17:00 CET, http://ask-de.adaptec.com/. * French: +49 89 4366 5533, Monday-Friday, 9:00-17:00 CET, http://ask-fr.adaptec.com/. * English: +49 89 4366 5544, Monday-Friday, 9:00-17:00 GMT, http://ask.adaptec.com/. - You can order Adaptec cables online at http://www.adaptec.com/buy-cables/. h](j4 )}(hEuropeh]hEurope}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhM-hj'ubjD )}(hhh]j )}(hhh](j# )}(hGVisit our Web site at http://www.adaptec.com/en-US/_common/world_index.h]j])}(hj'h](hVisit our Web site at }(hj'hhhNhNubj%)}(h0http://www.adaptec.com/en-US/_common/world_indexh]h0http://www.adaptec.com/en-US/_common/world_index}(hj'hhhNhNubah}(h]h ]h"]h$]h&]refurij'uh1j%hj'ubh.}(hj'hhhNhNubeh}(h]h ]h"]h$]h&]uh1j\hhhM"hj'ubah}(h]h ]h"]h$]h&]uh1j" hj'ubj# )}(hXJTo speak with a Technical Support Specialist, call, or email, * German: +49 89 4366 5522, Monday-Friday, 9:00-17:00 CET, http://ask-de.adaptec.com/. * French: +49 89 4366 5533, Monday-Friday, 9:00-17:00 CET, http://ask-fr.adaptec.com/. * English: +49 89 4366 5544, Monday-Friday, 9:00-17:00 GMT, http://ask.adaptec.com/. h](j])}(h=To speak with a Technical Support Specialist, call, or email,h]h=To speak with a Technical Support Specialist, call, or email,}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhM#hj(ubj )}(hhh](j# )}(hUGerman: +49 89 4366 5522, Monday-Friday, 9:00-17:00 CET, http://ask-de.adaptec.com/.h]j])}(hUGerman: +49 89 4366 5522, Monday-Friday, 9:00-17:00 CET, http://ask-de.adaptec.com/.h](h:German: +49 89 4366 5522, Monday-Friday, 9:00-17:00 CET, }(hj2(hhhNhNubj%)}(hhttp://ask-de.adaptec.com/h]hhttp://ask-de.adaptec.com/}(hj:(hhhNhNubah}(h]h ]h"]h$]h&]refurij<(uh1j%hj2(ubh.}(hj2(hhhNhNubeh}(h]h ]h"]h$]h&]uh1j\hhhM%hj.(ubah}(h]h ]h"]h$]h&]uh1j" hj+(ubj# )}(hUFrench: +49 89 4366 5533, Monday-Friday, 9:00-17:00 CET, http://ask-fr.adaptec.com/.h]j])}(hUFrench: +49 89 4366 5533, Monday-Friday, 9:00-17:00 CET, http://ask-fr.adaptec.com/.h](h:French: +49 89 4366 5533, Monday-Friday, 9:00-17:00 CET, }(hj](hhhNhNubj%)}(hhttp://ask-fr.adaptec.com/h]hhttp://ask-fr.adaptec.com/}(hje(hhhNhNubah}(h]h ]h"]h$]h&]refurijg(uh1j%hj](ubh.}(hj](hhhNhNubeh}(h]h ]h"]h$]h&]uh1j\hhhM'hjY(ubah}(h]h ]h"]h$]h&]uh1j" hj+(ubj# )}(hSEnglish: +49 89 4366 5544, Monday-Friday, 9:00-17:00 GMT, http://ask.adaptec.com/. h]j])}(hREnglish: +49 89 4366 5544, Monday-Friday, 9:00-17:00 GMT, http://ask.adaptec.com/.h](h:English: +49 89 4366 5544, Monday-Friday, 9:00-17:00 GMT, }(hj(hhhNhNubj%)}(hhttp://ask.adaptec.com/h]hhttp://ask.adaptec.com/}(hj(hhhNhNubah}(h]h ]h"]h$]h&]refurij(uh1j%hj(ubh.}(hj(hhhNhNubeh}(h]h ]h"]h$]h&]uh1j\hhhM)hj(ubah}(h]h ]h"]h$]h&]uh1j" hj+(ubeh}(h]h ]h"]h$]h&]j juh1j hhhM%hj(ubeh}(h]h ]h"]h$]h&]uh1j" hj'ubj# )}(hKYou can order Adaptec cables online at http://www.adaptec.com/buy-cables/. h]j])}(hJYou can order Adaptec cables online at http://www.adaptec.com/buy-cables/.h](h'You can order Adaptec cables online at }(hj(hhhNhNubj%)}(h"http://www.adaptec.com/buy-cables/h]h"http://www.adaptec.com/buy-cables/}(hj(hhhNhNubah}(h]h ]h"]h$]h&]refurij(uh1j%hj(ubh.}(hj(hhhNhNubeh}(h]h ]h"]h$]h&]uh1j\hhhM,hj(ubah}(h]h ]h"]h$]h&]uh1j" hj'ubeh}(h]h ]h"]h$]h&]j j uh1j hhhM"hj'ubah}(h]h ]h"]h$]h&]uh1jC hj'ubeh}(h]h ]h"]h$]h&]uh1j- hhhM-hj^&ubj. )}(hJapan - Visit our web site at http://www.adaptec.co.jp/. - To speak with a Technical Support Specialist, call +81 3 5308 6120, Monday-Friday, 9:00 a.m. to 12:00 p.m., 1:00 p.m. to 6:00 p.m. h](j4 )}(hJapanh]hJapan}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j3 hhhM3hj(ubjD )}(hhh]j )}(hhh](j# )}(h0Visit our web site at http://www.adaptec.co.jp/.h]j])}(hj)h](hVisit our web site at }(hj)hhhNhNubj%)}(hhttp://www.adaptec.co.jp/h]hhttp://www.adaptec.co.jp/}(hj)hhhNhNubah}(h]h ]h"]h$]h&]refurij)uh1j%hj)ubh.}(hj)hhhNhNubeh}(h]h ]h"]h$]h&]uh1j\hhhM0hj)ubah}(h]h ]h"]h$]h&]uh1j" hj )ubj# )}(hTo speak with a Technical Support Specialist, call +81 3 5308 6120, Monday-Friday, 9:00 a.m. to 12:00 p.m., 1:00 p.m. to 6:00 p.m. h]j])}(hTo speak with a Technical Support Specialist, call +81 3 5308 6120, Monday-Friday, 9:00 a.m. to 12:00 p.m., 1:00 p.m. to 6:00 p.m.h]hTo speak with a Technical Support Specialist, call +81 3 5308 6120, Monday-Friday, 9:00 a.m. to 12:00 p.m., 1:00 p.m. to 6:00 p.m.}(hj>)hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhM1hj:)ubah}(h]h ]h"]h$]h&]uh1j" hj )ubeh}(h]h ]h"]h$]h&]j j uh1j hhhM0hj )ubah}(h]h ]h"]h$]h&]uh1jC hj(ubeh}(h]h ]h"]h$]h&]uh1j- hhhM3hj^&ubeh}(h]h ]h"]h$]h&]uh1j( hj!&ubeh}(h]h ]h"]h$]h&]uh1jhhhMhj&hhubj])}(heCopyright |copy| 2003 Adaptec Inc. 691 S. Milpitas Blvd., Milpitas CA 95035 USA. All rights reserved.h](h Copyright }(hjp)hhhNhNubh©}(hjp)hhhNhNubhU 2003 Adaptec Inc. 691 S. Milpitas Blvd., Milpitas CA 95035 USA. All rights reserved.}(hjp)hhhNhNubeh}(h]h ]h"]h$]h&]uh1j\hhhM5hj&hhubj])}(hYou are permitted to redistribute, use and modify this README file in whole or in part in conjunction with redistribution of software governed by the General Public License, provided that the following conditions are met:h]hYou are permitted to redistribute, use and modify this README file in whole or in part in conjunction with redistribution of software governed by the General Public License, provided that the following conditions are met:}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhM8hj&hhubhenumerated_list)}(hhh](j# )}(hRedistributions of README file must retain the above copyright notice, this list of conditions, and the following disclaimer, without modification.h]j])}(hRedistributions of README file must retain the above copyright notice, this list of conditions, and the following disclaimer, without modification.h]hRedistributions of README file must retain the above copyright notice, this list of conditions, and the following disclaimer, without modification.}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhM<hj)ubah}(h]h ]h"]h$]h&]uh1j" hj)hhhhhNubj# )}(hThe name of the author may not be used to endorse or promote products derived from this software without specific prior written permission.h]j])}(hThe name of the author may not be used to endorse or promote products derived from this software without specific prior written permission.h]hThe name of the author may not be used to endorse or promote products derived from this software without specific prior written permission.}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhM?hj)ubah}(h]h ]h"]h$]h&]uh1j" hj)hhhhhNubj# )}(hX5Modifications or new contributions must be attributed in a copyright notice identifying the author ("Contributor") and added below the original copyright notice. The copyright notice is for purposes of identifying contributors and should not be deemed as permission to alter the permissions given by Adaptec. h]j])}(hX4Modifications or new contributions must be attributed in a copyright notice identifying the author ("Contributor") and added below the original copyright notice. The copyright notice is for purposes of identifying contributors and should not be deemed as permission to alter the permissions given by Adaptec.h]hX8Modifications or new contributions must be attributed in a copyright notice identifying the author (“Contributor”) and added below the original copyright notice. The copyright notice is for purposes of identifying contributors and should not be deemed as permission to alter the permissions given by Adaptec.}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j\hhhMAhj)ubah}(h]h ]h"]h$]h&]uh1j" hj)hhhhhNubeh}(h]h ]h"]h$]h&]enumtypearabicprefixhsuffix.uh1j)hj&hhhhhM<ubj])}(hXTHIS README FILE IS PROVIDED BY ADAPTEC AND CONTRIBUTORS ``AS IS`` AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ANY WARRANTIES OF NON-INFRINGEMENT OR THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ADAPTEC OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS README FILE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.h](h9THIS README FILE IS PROVIDED BY ADAPTEC AND CONTRIBUTORS }(hj)hhhNhNubj)}(h ``AS IS``h]hAS IS}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj)ubhX AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ANY WARRANTIES OF NON-INFRINGEMENT OR THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 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