sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget /translations/zh_CN/scsi/aic79xxmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget /translations/zh_TW/scsi/aic79xxmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget /translations/it_IT/scsi/aic79xxmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget /translations/ja_JP/scsi/aic79xxmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget /translations/ko_KR/scsi/aic79xxmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hPortuguese (Brazilian)}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget /translations/pt_BR/scsi/aic79xxmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget /translations/sp_SP/scsi/aic79xxmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhcomment)}(h SPDX-License-Identifier: GPL-2.0h]h SPDX-License-Identifier: GPL-2.0}hhsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1hhhhhh:/var/lib/git/docbuild/linux/Documentation/scsi/aic79xx.rsthKubh)}(h4This data file has been placed in the public domain.h]h4This data file has been placed in the public domain.}hhsbah}(h]h ]h"]h$]h&]hhuh1hhhhhho/srv/docbuild/lib/venvs/build-kernel-docs/lib64/python3.9/site-packages/docutils/parsers/rst/include/isonum.txthKubh)}(hDerived from the Unicode character mappings available from . Processed by unicode2rstsubs.py, part of Docutils: .h]hDerived from the Unicode character mappings available from . Processed by unicode2rstsubs.py, part of Docutils: .}hhsbah}(h]h ]h"]h$]h&]hhuh1hhhhhhhhKubhsubstitution_definition)}(h*.. |amp| unicode:: U+00026 .. AMPERSANDh]h&}hhsbah}(h]h ]h"]ampah$]h&]uh1hhhhKhhhhubh)}(h+.. |apos| unicode:: U+00027 .. APOSTROPHEh]h'}hhsbah}(h]h ]h"]aposah$]h&]uh1hhhhKhhhhubh)}(h).. |ast| unicode:: U+0002A .. ASTERISKh]h*}hjsbah}(h]h ]h"]astah$]h&]uh1hhhhK hhhhubh)}(h+.. |brvbar| unicode:: U+000A6 .. BROKEN BARh]h¦}hjsbah}(h]h ]h"]brvbarah$]h&]uh1hhhhK hhhhubh)}(h0.. |bsol| unicode:: U+0005C .. REVERSE SOLIDUSh]h\}hj#sbah}(h]h ]h"]bsolah$]h&]uh1hhhhK hhhhubh)}(h*.. |cent| unicode:: U+000A2 .. CENT SIGNh]h¢}hj2sbah}(h]h ]h"]centah$]h&]uh1hhhhK hhhhubh)}(h&.. |colon| unicode:: U+0003A .. COLONh]h:}hjAsbah}(h]h ]h"]colonah$]h&]uh1hhhhK hhhhubh)}(h&.. |comma| unicode:: U+0002C .. COMMAh]h,}hjPsbah}(h]h ]h"]commaah$]h&]uh1hhhhKhhhhubh)}(h... |commat| unicode:: U+00040 .. COMMERCIAL ATh]h@}hj_sbah}(h]h ]h"]commatah$]h&]uh1hhhhKhhhhubh)}(h/.. |copy| unicode:: U+000A9 .. COPYRIGHT SIGNh]h©}hjnsbah}(h]h ]h"]copyah$]h&]uh1hhhhKhhhhubh)}(h... |curren| unicode:: U+000A4 .. CURRENCY SIGNh]h¤}hj}sbah}(h]h ]h"]currenah$]h&]uh1hhhhKhhhhubh)}(h0.. |darr| unicode:: U+02193 .. DOWNWARDS ARROWh]h↓}hjsbah}(h]h ]h"]darrah$]h&]uh1hhhhKhhhhubh)}(h,.. |deg| unicode:: U+000B0 .. DEGREE SIGNh]h°}hjsbah}(h]h ]h"]degah$]h&]uh1hhhhKhhhhubh)}(h... |divide| unicode:: U+000F7 .. DIVISION SIGNh]h÷}hjsbah}(h]h ]h"]divideah$]h&]uh1hhhhKhhhhubh)}(h,.. |dollar| unicode:: U+00024 .. DOLLAR SIGNh]h$}hjsbah}(h]h ]h"]dollarah$]h&]uh1hhhhKhhhhubh)}(h,.. |equals| unicode:: U+0003D .. EQUALS SIGNh]h=}hjsbah}(h]h ]h"]equalsah$]h&]uh1hhhhKhhhhubh)}(h1.. |excl| unicode:: U+00021 .. EXCLAMATION MARKh]h!}hjsbah}(h]h ]h"]exclah$]h&]uh1hhhhKhhhhubh)}(h9.. |frac12| unicode:: U+000BD .. VULGAR FRACTION ONE HALFh]h½}hjsbah}(h]h ]h"]frac12ah$]h&]uh1hhhhKhhhhubh)}(h<.. |frac14| unicode:: U+000BC .. VULGAR FRACTION ONE QUARTERh]h¼}hjsbah}(h]h ]h"]frac14ah$]h&]uh1hhhhKhhhhubh)}(h;.. |frac18| unicode:: U+0215B .. VULGAR FRACTION ONE EIGHTHh]h⅛}hjsbah}(h]h ]h"]frac18ah$]h&]uh1hhhhKhhhhubh)}(h?.. |frac34| unicode:: U+000BE .. VULGAR FRACTION THREE QUARTERSh]h¾}hjsbah}(h]h ]h"]frac34ah$]h&]uh1hhhhKhhhhubh)}(h>.. |frac38| unicode:: U+0215C .. VULGAR FRACTION THREE EIGHTHSh]h⅜}hj"sbah}(h]h ]h"]frac38ah$]h&]uh1hhhhKhhhhubh)}(h=.. |frac58| unicode:: U+0215D .. VULGAR FRACTION FIVE EIGHTHSh]h⅝}hj1sbah}(h]h ]h"]frac58ah$]h&]uh1hhhhKhhhhubh)}(h>.. |frac78| unicode:: U+0215E .. VULGAR FRACTION SEVEN EIGHTHSh]h⅞}hj@sbah}(h]h ]h"]frac78ah$]h&]uh1hhhhKhhhhubh)}(h2.. |gt| unicode:: U+0003E .. GREATER-THAN SIGNh]h>}hjOsbah}(h]h ]h"]gtah$]h&]uh1hhhhKhhhhubh)}(h9.. |half| unicode:: U+000BD .. VULGAR FRACTION ONE HALFh]h½}hj^sbah}(h]h ]h"]halfah$]h&]uh1hhhhK hhhhubh)}(h/.. |horbar| unicode:: U+02015 .. HORIZONTAL BARh]h―}hjmsbah}(h]h ]h"]horbarah$]h&]uh1hhhhK!hhhhubh)}(h'.. |hyphen| unicode:: U+02010 .. HYPHENh]h‐}hj|sbah}(h]h ]h"]hyphenah$]h&]uh1hhhhK"hhhhubh)}(h:.. |iexcl| unicode:: U+000A1 .. INVERTED EXCLAMATION MARKh]h¡}hjsbah}(h]h ]h"]iexclah$]h&]uh1hhhhK#hhhhubh)}(h7.. |iquest| unicode:: U+000BF .. INVERTED QUESTION MARKh]h¿}hjsbah}(h]h ]h"]iquestah$]h&]uh1hhhhK$hhhhubh)}(hJ.. |laquo| unicode:: U+000AB .. LEFT-POINTING DOUBLE ANGLE QUOTATION MARKh]h«}hjsbah}(h]h ]h"]laquoah$]h&]uh1hhhhK%hhhhubh)}(h0.. |larr| unicode:: U+02190 .. LEFTWARDS ARROWh]h←}hjsbah}(h]h ]h"]larrah$]h&]uh1hhhhK&hhhhubh)}(h3.. |lcub| unicode:: U+0007B .. LEFT CURLY BRACKETh]h{}hjsbah}(h]h ]h"]lcubah$]h&]uh1hhhhK'hhhhubh)}(h;.. |ldquo| unicode:: U+0201C .. LEFT DOUBLE QUOTATION MARKh]h“}hjsbah}(h]h ]h"]ldquoah$]h&]uh1hhhhK(hhhhubh)}(h).. |lowbar| unicode:: U+0005F .. LOW LINEh]h_}hjsbah}(h]h ]h"]lowbarah$]h&]uh1hhhhK)hhhhubh)}(h1.. |lpar| unicode:: U+00028 .. LEFT PARENTHESISh]h(}hjsbah}(h]h ]h"]lparah$]h&]uh1hhhhK*hhhhubh)}(h4.. |lsqb| unicode:: U+0005B .. LEFT SQUARE BRACKETh]h[}hjsbah}(h]h ]h"]lsqbah$]h&]uh1hhhhK+hhhhubh)}(h;.. |lsquo| unicode:: U+02018 .. LEFT SINGLE QUOTATION MARKh]h‘}hjsbah}(h]h ]h"]lsquoah$]h&]uh1hhhhK,hhhhubh)}(h/.. |lt| unicode:: U+0003C .. LESS-THAN SIGNh]h<}hj!sbah}(h]h ]h"]ltah$]h&]uh1hhhhK-hhhhubh)}(h+.. |micro| unicode:: U+000B5 .. MICRO SIGNh]hµ}hj0sbah}(h]h ]h"]microah$]h&]uh1hhhhK.hhhhubh)}(h+.. |middot| unicode:: U+000B7 .. MIDDLE DOTh]h·}hj?sbah}(h]h ]h"]middotah$]h&]uh1hhhhK/hhhhubh)}(h/.. |nbsp| unicode:: U+000A0 .. NO-BREAK SPACEh]h }hjNsbah}(h]h ]h"]nbspah$]h&]uh1hhhhK0hhhhubh)}(h).. |not| unicode:: U+000AC .. NOT SIGNh]h¬}hj]sbah}(h]h ]h"]notah$]h&]uh1hhhhK1hhhhubh)}(h,.. |num| unicode:: U+00023 .. NUMBER SIGNh]h#}hjlsbah}(h]h ]h"]numah$]h&]uh1hhhhK2hhhhubh)}(h).. |ohm| unicode:: U+02126 .. OHM SIGNh]hΩ}hj{sbah}(h]h ]h"]ohmah$]h&]uh1hhhhK3hhhhubh)}(h;.. |ordf| unicode:: U+000AA .. FEMININE ORDINAL INDICATORh]hª}hjsbah}(h]h ]h"]ordfah$]h&]uh1hhhhK4hhhhubh)}(h<.. |ordm| unicode:: U+000BA .. MASCULINE ORDINAL INDICATORh]hº}hjsbah}(h]h ]h"]ordmah$]h&]uh1hhhhK5hhhhubh)}(h-.. |para| unicode:: U+000B6 .. PILCROW SIGNh]h¶}hjsbah}(h]h ]h"]paraah$]h&]uh1hhhhK6hhhhubh)}(h-.. |percnt| unicode:: U+00025 .. PERCENT SIGNh]h%}hjsbah}(h]h ]h"]percntah$]h&]uh1hhhhK7hhhhubh)}(h*.. |period| unicode:: U+0002E .. FULL STOPh]h.}hjsbah}(h]h ]h"]periodah$]h&]uh1hhhhK8hhhhubh)}(h*.. |plus| unicode:: U+0002B .. PLUS SIGNh]h+}hjsbah}(h]h ]h"]plusah$]h&]uh1hhhhK9hhhhubh)}(h0.. |plusmn| unicode:: U+000B1 .. PLUS-MINUS SIGNh]h±}hjsbah}(h]h ]h"]plusmnah$]h&]uh1hhhhK:hhhhubh)}(h+.. |pound| unicode:: U+000A3 .. POUND SIGNh]h£}hjsbah}(h]h ]h"]poundah$]h&]uh1hhhhK;hhhhubh)}(h... |quest| unicode:: U+0003F .. QUESTION MARKh]h?}hjsbah}(h]h ]h"]questah$]h&]uh1hhhhKhhhhubh)}(h1.. |rarr| unicode:: U+02192 .. RIGHTWARDS ARROWh]h→}hj/sbah}(h]h ]h"]rarrah$]h&]uh1hhhhK?hhhhubh)}(h4.. |rcub| unicode:: U+0007D .. RIGHT CURLY BRACKETh]h}}hj>sbah}(h]h ]h"]rcubah$]h&]uh1hhhhK@hhhhubh)}(h<.. |rdquo| unicode:: U+0201D .. RIGHT DOUBLE QUOTATION MARKh]h”}hjMsbah}(h]h ]h"]rdquoah$]h&]uh1hhhhKAhhhhubh)}(h0.. |reg| unicode:: U+000AE .. REGISTERED SIGNh]h®}hj\sbah}(h]h ]h"]regah$]h&]uh1hhhhKBhhhhubh)}(h2.. |rpar| unicode:: U+00029 .. RIGHT PARENTHESISh]h)}hjksbah}(h]h ]h"]rparah$]h&]uh1hhhhKChhhhubh)}(h5.. |rsqb| unicode:: U+0005D .. RIGHT SQUARE BRACKETh]h]}hjzsbah}(h]h ]h"]rsqbah$]h&]uh1hhhhKDhhhhubh)}(h<.. |rsquo| unicode:: U+02019 .. RIGHT SINGLE QUOTATION MARKh]h’}hjsbah}(h]h ]h"]rsquoah$]h&]uh1hhhhKEhhhhubh)}(h-.. |sect| unicode:: U+000A7 .. SECTION SIGNh]h§}hjsbah}(h]h ]h"]sectah$]h&]uh1hhhhKFhhhhubh)}(h*.. |semi| unicode:: U+0003B .. SEMICOLONh]h;}hjsbah}(h]h ]h"]semiah$]h&]uh1hhhhKGhhhhubh)}(h,.. |shy| unicode:: U+000AD .. SOFT HYPHENh]h­}hjsbah}(h]h ]h"]shyah$]h&]uh1hhhhKHhhhhubh)}(h(.. |sol| unicode:: U+0002F .. SOLIDUSh]h/}hjsbah}(h]h ]h"]solah$]h&]uh1hhhhKIhhhhubh)}(h,.. |sung| unicode:: U+0266A .. EIGHTH NOTEh]h♪}hjsbah}(h]h ]h"]sungah$]h&]uh1hhhhKJhhhhubh)}(h0.. |sup1| unicode:: U+000B9 .. SUPERSCRIPT ONEh]h¹}hjsbah}(h]h ]h"]sup1ah$]h&]uh1hhhhKKhhhhubh)}(h0.. |sup2| unicode:: U+000B2 .. SUPERSCRIPT TWOh]h²}hjsbah}(h]h ]h"]sup2ah$]h&]uh1hhhhKLhhhhubh)}(h2.. |sup3| unicode:: U+000B3 .. SUPERSCRIPT THREEh]h³}hjsbah}(h]h ]h"]sup3ah$]h&]uh1hhhhKMhhhhubh)}(h4.. |times| unicode:: U+000D7 .. MULTIPLICATION SIGNh]h×}hjsbah}(h]h ]h"]timesah$]h&]uh1hhhhKNhhhhubh)}(h0.. |trade| unicode:: U+02122 .. TRADE MARK SIGNh]h™}hjsbah}(h]h ]h"]tradeah$]h&]uh1hhhhKOhhhhubh)}(h... |uarr| unicode:: U+02191 .. UPWARDS ARROWh]h↑}hj.sbah}(h]h ]h"]uarrah$]h&]uh1hhhhKPhhhhubh)}(h... |verbar| unicode:: U+0007C .. VERTICAL LINEh]h|}hj=sbah}(h]h ]h"]verbarah$]h&]uh1hhhhKQhhhhubh)}(h*.. |yen| unicode:: U+000A5 .. YEN SIGN h]h¥}hjLsbah}(h]h ]h"]yenah$]h&]uh1hhhhKRhhhhubhsection)}(hhh](htitle)}(h#Adaptec Ultra320 Family Manager Seth]h#Adaptec Ultra320 Family Manager Set}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j`hj]hhhhhKubh paragraph)}(h%README for The Linux Operating Systemh]h%README for The Linux Operating System}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhj]hhubh)}(hThe following information is available in this file: 1. Supported Hardware 2. Version History 3. Command Line Options 4. Additional Notes 5. Contacting Adaptech]hThe following information is available in this file: 1. Supported Hardware 2. Version History 3. Command Line Options 4. Additional Notes 5. Contacting Adaptec}hjsbah}(h]h ]h"]h$]h&]hhuh1hhj]hhhhhKubj\)}(hhh](ja)}(h1. Supported Hardwareh]h1. Supported Hardware}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j`hjhhhhhKubh block_quote)}(hX= The following Adaptec SCSI Host Adapters are supported by this driver set. ============= ========================================= Ultra320 ASIC Description ============= ========================================= AIC-7901A Single Channel 64-bit PCI-X 133MHz to Ultra320 SCSI ASIC AIC-7901B Single Channel 64-bit PCI-X 133MHz to Ultra320 SCSI ASIC with Retained Training AIC-7902A4 Dual Channel 64-bit PCI-X 133MHz to Ultra320 SCSI ASIC AIC-7902B Dual Channel 64-bit PCI-X 133MHz to Ultra320 SCSI ASIC with Retained Training ============= ========================================= ========================== ===================================== ============ Ultra320 Adapters Description ASIC ========================== ===================================== ============ Adaptec SCSI Card 39320 Dual Channel 64-bit PCI-X 133MHz to 7902A4/7902B Ultra320 SCSI Card (one external 68-pin, two internal 68-pin) Adaptec SCSI Card 39320A Dual Channel 64-bit PCI-X 133MHz to 7902B Ultra320 SCSI Card (one external 68-pin, two internal 68-pin) Adaptec SCSI Card 39320D Dual Channel 64-bit PCI-X 133MHz to 7902A4 Ultra320 SCSI Card (two external VHDC and one internal 68-pin) Adaptec SCSI Card 39320D Dual Channel 64-bit PCI-X 133MHz to 7902A4 Ultra320 SCSI Card (two external VHDC and one internal 68-pin) based on the AIC-7902B ASIC Adaptec SCSI Card 29320 Single Channel 64-bit PCI-X 133MHz to 7901A Ultra320 SCSI Card (one external 68-pin, two internal 68-pin, one internal 50-pin) Adaptec SCSI Card 29320A Single Channel 64-bit PCI-X 133MHz to 7901B Ultra320 SCSI Card (one external 68-pin, two internal 68-pin, one internal 50-pin) Adaptec SCSI Card 29320LP Single Channel 64-bit Low Profile 7901A PCI-X 133MHz to Ultra320 SCSI Card (One external VHDC, one internal 68-pin) Adaptec SCSI Card 29320ALP Single Channel 64-bit Low Profile 7901B PCI-X 133MHz to Ultra320 SCSI Card (One external VHDC, one internal 68-pin) ========================== ===================================== ============ h](jq)}(hJThe following Adaptec SCSI Host Adapters are supported by this driver set.h]hJThe following Adaptec SCSI Host Adapters are supported by this driver set.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubhtable)}(hhh]htgroup)}(hhh](hcolspec)}(hhh]h}(h]h ]h"]h$]h&]colwidthK uh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthK)uh1jhjubhthead)}(hhh]hrow)}(hhh](hentry)}(hhh]jq)}(h Ultra320 ASICh]h Ultra320 ASIC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]jq)}(h Descriptionh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhjubhtbody)}(hhh](j)}(hhh](j)}(hhh]jq)}(h AIC-7901Ah]h AIC-7901A}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhj!ubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]jq)}(h8Single Channel 64-bit PCI-X 133MHz to Ultra320 SCSI ASICh]h8Single Channel 64-bit PCI-X 133MHz to Ultra320 SCSI ASIC}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhj8ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]jq)}(h AIC-7901Bh]h AIC-7901B}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjXubah}(h]h ]h"]h$]h&]uh1jhjUubj)}(hhh]jq)}(hOSingle Channel 64-bit PCI-X 133MHz to Ultra320 SCSI ASIC with Retained Trainingh]hOSingle Channel 64-bit PCI-X 133MHz to Ultra320 SCSI ASIC with Retained Training}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjoubah}(h]h ]h"]h$]h&]uh1jhjUubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]jq)}(h AIC-7902A4h]h AIC-7902A4}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]jq)}(h6Dual Channel 64-bit PCI-X 133MHz to Ultra320 SCSI ASICh]h6Dual Channel 64-bit PCI-X 133MHz to Ultra320 SCSI ASIC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]jq)}(h AIC-7902Bh]h AIC-7902B}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK"hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]jq)}(hMDual Channel 64-bit PCI-X 133MHz to Ultra320 SCSI ASIC with Retained Trainingh]hMDual Channel 64-bit PCI-X 133MHz to Ultra320 SCSI ASIC with Retained Training}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK"hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]colsKuh1jhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]j)}(hhh](j)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthK%uh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthK uh1jhjubj)}(hhh]j)}(hhh](j)}(hhh]jq)}(hUltra320 Adaptersh]hUltra320 Adapters}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK'hj7ubah}(h]h ]h"]h$]h&]uh1jhj4ubj)}(hhh]jq)}(h Descriptionh]h Description}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK'hjNubah}(h]h ]h"]h$]h&]uh1jhj4ubj)}(hhh]jq)}(hASICh]hASIC}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK'hjeubah}(h]h ]h"]h$]h&]uh1jhj4ubeh}(h]h ]h"]h$]h&]uh1jhj1ubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh](j)}(hhh]jq)}(hAdaptec SCSI Card 39320h]hAdaptec SCSI Card 39320}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK)hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]jq)}(haDual Channel 64-bit PCI-X 133MHz to Ultra320 SCSI Card (one external 68-pin, two internal 68-pin)h]haDual Channel 64-bit PCI-X 133MHz to Ultra320 SCSI Card (one external 68-pin, two internal 68-pin)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK)hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]jq)}(h 7902A4/7902Bh]h 7902A4/7902B}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK)hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]jq)}(hAdaptec SCSI Card 39320Ah]hAdaptec SCSI Card 39320A}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK,hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]jq)}(haDual Channel 64-bit PCI-X 133MHz to Ultra320 SCSI Card (one external 68-pin, two internal 68-pin)h]haDual Channel 64-bit PCI-X 133MHz to Ultra320 SCSI Card (one external 68-pin, two internal 68-pin)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK,hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]jq)}(h7902Bh]h7902B}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK,hj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]jq)}(hAdaptec SCSI Card 39320Dh]hAdaptec SCSI Card 39320D}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK/hj*ubah}(h]h ]h"]h$]h&]uh1jhj'ubj)}(hhh]jq)}(hbDual Channel 64-bit PCI-X 133MHz to Ultra320 SCSI Card (two external VHDC and one internal 68-pin)h]hbDual Channel 64-bit PCI-X 133MHz to Ultra320 SCSI Card (two external VHDC and one internal 68-pin)}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK/hjAubah}(h]h ]h"]h$]h&]uh1jhj'ubj)}(hhh]jq)}(h7902A4h]h7902A4}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK/hjXubah}(h]h ]h"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]jq)}(hAdaptec SCSI Card 39320Dh]hAdaptec SCSI Card 39320D}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK2hjxubah}(h]h ]h"]h$]h&]uh1jhjuubj)}(hhh]jq)}(h~Dual Channel 64-bit PCI-X 133MHz to Ultra320 SCSI Card (two external VHDC and one internal 68-pin) based on the AIC-7902B ASICh]h~Dual Channel 64-bit PCI-X 133MHz to Ultra320 SCSI Card (two external VHDC and one internal 68-pin) based on the AIC-7902B ASIC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK2hjubah}(h]h ]h"]h$]h&]uh1jhjuubj)}(hhh]jq)}(h7902A4h]h7902A4}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK2hjubah}(h]h ]h"]h$]h&]uh1jhjuubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]jq)}(hAdaptec SCSI Card 29320h]hAdaptec SCSI Card 29320}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK6hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]jq)}(hxSingle Channel 64-bit PCI-X 133MHz to Ultra320 SCSI Card (one external 68-pin, two internal 68-pin, one internal 50-pin)h]hxSingle Channel 64-bit PCI-X 133MHz to Ultra320 SCSI Card (one external 68-pin, two internal 68-pin, one internal 50-pin)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK6hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]jq)}(h7901Ah]h7901A}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK6hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]jq)}(hAdaptec SCSI Card 29320Ah]hAdaptec SCSI Card 29320A}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK:hj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]jq)}(hxSingle Channel 64-bit PCI-X 133MHz to Ultra320 SCSI Card (one external 68-pin, two internal 68-pin, one internal 50-pin)h]hxSingle Channel 64-bit PCI-X 133MHz to Ultra320 SCSI Card (one external 68-pin, two internal 68-pin, one internal 50-pin)}(hj. hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK:hj+ ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]jq)}(h7901Bh]h7901B}(hjE hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK:hjB ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]jq)}(hAdaptec SCSI Card 29320LPh]hAdaptec SCSI Card 29320LP}(hje hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK>hjb ubah}(h]h ]h"]h$]h&]uh1jhj_ ubj)}(hhh]jq)}(hmSingle Channel 64-bit Low Profile PCI-X 133MHz to Ultra320 SCSI Card (One external VHDC, one internal 68-pin)h]hmSingle Channel 64-bit Low Profile PCI-X 133MHz to Ultra320 SCSI Card (One external VHDC, one internal 68-pin)}(hj| hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK>hjy ubah}(h]h ]h"]h$]h&]uh1jhj_ ubj)}(hhh]jq)}(h7901Ah]h7901A}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK>hj ubah}(h]h ]h"]h$]h&]uh1jhj_ ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]jq)}(hAdaptec SCSI Card 29320ALPh]hAdaptec SCSI Card 29320ALP}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKBhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]jq)}(hmSingle Channel 64-bit Low Profile PCI-X 133MHz to Ultra320 SCSI Card (One external VHDC, one internal 68-pin)h]hmSingle Channel 64-bit Low Profile PCI-X 133MHz to Ultra320 SCSI Card (One external VHDC, one internal 68-pin)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKBhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]jq)}(h7901Bh]h7901B}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKBhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]colsKuh1jhj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubeh}(h]supported-hardwareah ]h"]1. supported hardwareah$]h&]uh1j[hj]hhhhhKubj\)}(hhh](ja)}(h2. Version Historyh]h2. Version History}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j`hj hhhhhKIubj)}(hX* 3.0 (December 1st, 2005) - Updated driver to use SCSI transport class infrastructure - Upported sequencer and core fixes from adaptec released version 2.0.15 of the driver. * 1.3.11 (July 11, 2003) - Fix several deadlock issues. - Add 29320ALP and 39320B Id's. * 1.3.10 (June 3rd, 2003) - Align the SCB_TAG field on a 16byte boundary. This avoids SCB corruption on some PCI-33 busses. - Correct non-zero luns on Rev B. hardware. - Update for change in 2.5.X SCSI proc FS interface. - When negotiation async via an 8bit WDTR message, send an SDTR with an offset of 0 to be sure the target knows we are async. This works around a firmware defect in the Quantum Atlas 10K. - Implement controller suspend and resume. - Clear PCI error state during driver attach so that we don't disable memory mapped I/O due to a stray write by some other driver probe that occurred before we claimed the controller. * 1.3.9 (May 22nd, 2003) - Fix compiler errors. - Remove S/G splitting for segments that cross a 4GB boundary. This is guaranteed not to happen in Linux. - Add support for scsi_report_device_reset() found in 2.5.X kernels. - Add 7901B support. - Simplify handling of the packetized lun Rev A workaround. - Correct and simplify handling of the ignore wide residue message. The previous code would fail to report a residual if the transaction data length was even and we received an IWR message. * 1.3.8 (April 29th, 2003) - Fix types accessed via the command line interface code. - Perform a few firmware optimizations. - Fix "Unexpected PKT busfree" errors. - Use a sequencer interrupt to notify the host of commands with bad status. We defer the notification until there are no outstanding selections to ensure that the host is interrupted for as short a time as possible. - Remove pre-2.2.X support. - Add support for new 2.5.X interrupt API. - Correct big-endian architecture support. * 1.3.7 (April 16th, 2003) - Use del_timer_sync() to ensure that no timeouts are pending during controller shutdown. - For pre-2.5.X kernels, carefully adjust our segment list size to avoid SCSI malloc pool fragmentation. - Cleanup channel display in our /proc output. - Workaround duplicate device entries in the mid-layer device list during add-single-device. * 1.3.6 (March 28th, 2003) - Correct a double free in the Domain Validation code. - Correct a reference to free'ed memory during controller shutdown. - Reset the bus on an SE->LVD change. This is required to reset our transceivers. * 1.3.5 (March 24th, 2003) - Fix a few register window mode bugs. - Include read streaming in the PPR flags we display in diagnostics as well as /proc. - Add PCI hot plug support for 2.5.X kernels. - Correct default precompensation value for RevA hardware. - Fix Domain Validation thread shutdown. - Add a firmware workaround to make the LED blink brighter during packetized operations on the H2A4. - Correct /proc display of user read streaming settings. - Simplify driver locking by releasing the io_request_lock upon driver entry from the mid-layer. - Cleanup command line parsing and move much of this code to aiclib. * 1.3.4 (February 28th, 2003) - Correct a race condition in our error recovery handler. - Allow Test Unit Ready commands to take a full 5 seconds during Domain Validation. * 1.3.2 (February 19th, 2003) - Correct a Rev B. regression due to the GEM318 compatibility fix included in 1.3.1. * 1.3.1 (February 11th, 2003) - Add support for the 39320A. - Improve recovery for certain PCI-X errors. - Fix handling of LQ/DATA/LQ/DATA for the same write transaction that can occur without interveining training. - Correct compatibility issues with the GEM318 enclosure services device. - Correct data corruption issue that occurred under high tag depth write loads. - Adapt to a change in the 2.5.X daemonize() API. - Correct a "Missing case in ahd_handle_scsiint" panic. * 1.3.0 (January 21st, 2003) - Full regression testing for all U320 products completed. - Added abort and target/lun reset error recovery handler and interrupt coalescing. * 1.2.0 (November 14th, 2002) - Added support for Domain Validation - Add support for the Hewlett-Packard version of the 39320D and AIC-7902 adapters. Support for previous adapters has not been fully tested and should only be used at the customer's own risk. * 1.1.1 (September 24th, 2002) - Added support for the Linux 2.5.X kernel series * 1.1.0 (September 17th, 2002) - Added support for four additional SCSI products: ASC-39320, ASC-29320, ASC-29320LP, AIC-7901. * 1.0.0 (May 30th, 2002) - Initial driver release. * 2.1. Software/Hardware Features - Support for the SPI-4 "Ultra320" standard: - 320MB/s transfer rates - Packetized SCSI Protocol at 160MB/s and 320MB/s - Quick Arbitration Selection (QAS) - Retained Training Information (Rev B. ASIC only) - Interrupt Coalescing - Initiator Mode (target mode not currently supported) - Support for the PCI-X standard up to 133MHz - Support for the PCI v2.2 standard - Domain Validation * 2.2. Operating System Support: - Redhat Linux 7.2, 7.3, 8.0, Advanced Server 2.1 - SuSE Linux 7.3, 8.0, 8.1, Enterprise Server 7 - only Intel and AMD x86 supported at this time - >4GB memory configurations supported. Refer to the User's Guide for more details on this. h]h bullet_list)}(hhh](h list_item)}(h3.0 (December 1st, 2005) - Updated driver to use SCSI transport class infrastructure - Upported sequencer and core fixes from adaptec released version 2.0.15 of the driver. h]hdefinition_list)}(hhh]hdefinition_list_item)}(h3.0 (December 1st, 2005) - Updated driver to use SCSI transport class infrastructure - Upported sequencer and core fixes from adaptec released version 2.0.15 of the driver. h](hterm)}(h3.0 (December 1st, 2005)h]h3.0 (December 1st, 2005)}(hjI hhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhKOhjC ubh definition)}(hhh]j2 )}(hhh](j7 )}(h9Updated driver to use SCSI transport class infrastructureh]jq)}(hja h]h9Updated driver to use SCSI transport class infrastructure}(hjc hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKMhj_ ubah}(h]h ]h"]h$]h&]uh1j6 hj\ ubj7 )}(hVUpported sequencer and core fixes from adaptec released version 2.0.15 of the driver. h]jq)}(hUUpported sequencer and core fixes from adaptec released version 2.0.15 of the driver.h]hUUpported sequencer and core fixes from adaptec released version 2.0.15 of the driver.}(hjz hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKNhjv ubah}(h]h ]h"]h$]h&]uh1j6 hj\ ubeh}(h]h ]h"]h$]h&]bullet-uh1j1 hhhKMhjY ubah}(h]h ]h"]h$]h&]uh1jW hjC ubeh}(h]h ]h"]h$]h&]uh1jA hhhKOhj> ubah}(h]h ]h"]h$]h&]uh1j< hj8 ubah}(h]h ]h"]h$]h&]uh1j6 hj3 ubj7 )}(h`1.3.11 (July 11, 2003) - Fix several deadlock issues. - Add 29320ALP and 39320B Id's. h]j= )}(hhh]jB )}(hV1.3.11 (July 11, 2003) - Fix several deadlock issues. - Add 29320ALP and 39320B Id's. h](jH )}(h1.3.11 (July 11, 2003)h]h1.3.11 (July 11, 2003)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhKShj ubjX )}(hhh]j2 )}(hhh](j7 )}(hFix several deadlock issues.h]jq)}(hj h]hFix several deadlock issues.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKRhj ubah}(h]h ]h"]h$]h&]uh1j6 hj ubj7 )}(hAdd 29320ALP and 39320B Id's. h]jq)}(hAdd 29320ALP and 39320B Id's.h]hAdd 29320ALP and 39320B Id’s.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKShj ubah}(h]h ]h"]h$]h&]uh1j6 hj ubeh}(h]h ]h"]h$]h&]j j uh1j1 hhhKRhj ubah}(h]h ]h"]h$]h&]uh1jW hj ubeh}(h]h ]h"]h$]h&]uh1jA hhhKShj ubah}(h]h ]h"]h$]h&]uh1j< hj ubah}(h]h ]h"]h$]h&]uh1j6 hj3 ubj7 )}(hX1.3.10 (June 3rd, 2003) - Align the SCB_TAG field on a 16byte boundary. This avoids SCB corruption on some PCI-33 busses. - Correct non-zero luns on Rev B. hardware. - Update for change in 2.5.X SCSI proc FS interface. - When negotiation async via an 8bit WDTR message, send an SDTR with an offset of 0 to be sure the target knows we are async. This works around a firmware defect in the Quantum Atlas 10K. - Implement controller suspend and resume. - Clear PCI error state during driver attach so that we don't disable memory mapped I/O due to a stray write by some other driver probe that occurred before we claimed the controller. h]j= )}(hhh]jB )}(hX1.3.10 (June 3rd, 2003) - Align the SCB_TAG field on a 16byte boundary. This avoids SCB corruption on some PCI-33 busses. - Correct non-zero luns on Rev B. hardware. - Update for change in 2.5.X SCSI proc FS interface. - When negotiation async via an 8bit WDTR message, send an SDTR with an offset of 0 to be sure the target knows we are async. This works around a firmware defect in the Quantum Atlas 10K. - Implement controller suspend and resume. - Clear PCI error state during driver attach so that we don't disable memory mapped I/O due to a stray write by some other driver probe that occurred before we claimed the controller. h](jH )}(h1.3.10 (June 3rd, 2003)h]h1.3.10 (June 3rd, 2003)}(hj% hhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhKbhj! ubjX )}(hhh]j2 )}(hhh](j7 )}(h`Align the SCB_TAG field on a 16byte boundary. This avoids SCB corruption on some PCI-33 busses.h]jq)}(h`Align the SCB_TAG field on a 16byte boundary. This avoids SCB corruption on some PCI-33 busses.h]h`Align the SCB_TAG field on a 16byte boundary. This avoids SCB corruption on some PCI-33 busses.}(hj= hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKVhj9 ubah}(h]h ]h"]h$]h&]uh1j6 hj6 ubj7 )}(h)Correct non-zero luns on Rev B. hardware.h]jq)}(hjS h]h)Correct non-zero luns on Rev B. hardware.}(hjU hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKXhjQ ubah}(h]h ]h"]h$]h&]uh1j6 hj6 ubj7 )}(h2Update for change in 2.5.X SCSI proc FS interface.h]jq)}(hjj h]h2Update for change in 2.5.X SCSI proc FS interface.}(hjl hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKYhjh ubah}(h]h ]h"]h$]h&]uh1j6 hj6 ubj7 )}(hWhen negotiation async via an 8bit WDTR message, send an SDTR with an offset of 0 to be sure the target knows we are async. This works around a firmware defect in the Quantum Atlas 10K.h]jq)}(hWhen negotiation async via an 8bit WDTR message, send an SDTR with an offset of 0 to be sure the target knows we are async. This works around a firmware defect in the Quantum Atlas 10K.h]hWhen negotiation async via an 8bit WDTR message, send an SDTR with an offset of 0 to be sure the target knows we are async. This works around a firmware defect in the Quantum Atlas 10K.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKZhj ubah}(h]h ]h"]h$]h&]uh1j6 hj6 ubj7 )}(h(Implement controller suspend and resume.h]jq)}(hj h]h(Implement controller suspend and resume.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK^hj ubah}(h]h ]h"]h$]h&]uh1j6 hj6 ubj7 )}(hClear PCI error state during driver attach so that we don't disable memory mapped I/O due to a stray write by some other driver probe that occurred before we claimed the controller. h]jq)}(hClear PCI error state during driver attach so that we don't disable memory mapped I/O due to a stray write by some other driver probe that occurred before we claimed the controller.h]hClear PCI error state during driver attach so that we don’t disable memory mapped I/O due to a stray write by some other driver probe that occurred before we claimed the controller.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK_hj ubah}(h]h ]h"]h$]h&]uh1j6 hj6 ubeh}(h]h ]h"]h$]h&]j j uh1j1 hhhKVhj3 ubah}(h]h ]h"]h$]h&]uh1jW hj! ubeh}(h]h ]h"]h$]h&]uh1jA hhhKbhj ubah}(h]h ]h"]h$]h&]uh1j< hj ubah}(h]h ]h"]h$]h&]uh1j6 hj3 ubj7 )}(hX.1.3.9 (May 22nd, 2003) - Fix compiler errors. - Remove S/G splitting for segments that cross a 4GB boundary. This is guaranteed not to happen in Linux. - Add support for scsi_report_device_reset() found in 2.5.X kernels. - Add 7901B support. - Simplify handling of the packetized lun Rev A workaround. - Correct and simplify handling of the ignore wide residue message. The previous code would fail to report a residual if the transaction data length was even and we received an IWR message. h]j= )}(hhh]jB )}(hX1.3.9 (May 22nd, 2003) - Fix compiler errors. - Remove S/G splitting for segments that cross a 4GB boundary. This is guaranteed not to happen in Linux. - Add support for scsi_report_device_reset() found in 2.5.X kernels. - Add 7901B support. - Simplify handling of the packetized lun Rev A workaround. - Correct and simplify handling of the ignore wide residue message. The previous code would fail to report a residual if the transaction data length was even and we received an IWR message. h](jH )}(h1.3.9 (May 22nd, 2003)h]h1.3.9 (May 22nd, 2003)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhKohj ubjX )}(hhh]j2 )}(hhh](j7 )}(hFix compiler errors.h]jq)}(hj h]hFix compiler errors.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKehj ubah}(h]h ]h"]h$]h&]uh1j6 hj ubj7 )}(hgRemove S/G splitting for segments that cross a 4GB boundary. This is guaranteed not to happen in Linux.h]jq)}(hgRemove S/G splitting for segments that cross a 4GB boundary. This is guaranteed not to happen in Linux.h]hgRemove S/G splitting for segments that cross a 4GB boundary. This is guaranteed not to happen in Linux.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKfhj ubah}(h]h ]h"]h$]h&]uh1j6 hj ubj7 )}(hBAdd support for scsi_report_device_reset() found in 2.5.X kernels.h]jq)}(hBAdd support for scsi_report_device_reset() found in 2.5.X kernels.h]hBAdd support for scsi_report_device_reset() found in 2.5.X kernels.}(hj6 hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhhj2 ubah}(h]h ]h"]h$]h&]uh1j6 hj ubj7 )}(hAdd 7901B support.h]jq)}(hjL h]hAdd 7901B support.}(hjN hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKjhjJ ubah}(h]h ]h"]h$]h&]uh1j6 hj ubj7 )}(h9Simplify handling of the packetized lun Rev A workaround.h]jq)}(hjc h]h9Simplify handling of the packetized lun Rev A workaround.}(hje hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKkhja ubah}(h]h ]h"]h$]h&]uh1j6 hj ubj7 )}(hCorrect and simplify handling of the ignore wide residue message. The previous code would fail to report a residual if the transaction data length was even and we received an IWR message. h]jq)}(hCorrect and simplify handling of the ignore wide residue message. The previous code would fail to report a residual if the transaction data length was even and we received an IWR message.h]hCorrect and simplify handling of the ignore wide residue message. The previous code would fail to report a residual if the transaction data length was even and we received an IWR message.}(hj| hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKlhjx ubah}(h]h ]h"]h$]h&]uh1j6 hj ubeh}(h]h ]h"]h$]h&]j j uh1j1 hhhKehj ubah}(h]h ]h"]h$]h&]uh1jW hj ubeh}(h]h ]h"]h$]h&]uh1jA hhhKohj ubah}(h]h ]h"]h$]h&]uh1j< hj ubah}(h]h ]h"]h$]h&]uh1j6 hj3 ubj7 )}(hX,1.3.8 (April 29th, 2003) - Fix types accessed via the command line interface code. - Perform a few firmware optimizations. - Fix "Unexpected PKT busfree" errors. - Use a sequencer interrupt to notify the host of commands with bad status. We defer the notification until there are no outstanding selections to ensure that the host is interrupted for as short a time as possible. - Remove pre-2.2.X support. - Add support for new 2.5.X interrupt API. - Correct big-endian architecture support. h]j= )}(hhh]jB )}(hX1.3.8 (April 29th, 2003) - Fix types accessed via the command line interface code. - Perform a few firmware optimizations. - Fix "Unexpected PKT busfree" errors. - Use a sequencer interrupt to notify the host of commands with bad status. We defer the notification until there are no outstanding selections to ensure that the host is interrupted for as short a time as possible. - Remove pre-2.2.X support. - Add support for new 2.5.X interrupt API. - Correct big-endian architecture support. h](jH )}(h1.3.8 (April 29th, 2003)h]h1.3.8 (April 29th, 2003)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhK|hj ubjX )}(hhh]j2 )}(hhh](j7 )}(h7Fix types accessed via the command line interface code.h]jq)}(hj h]h7Fix types accessed via the command line interface code.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKrhj ubah}(h]h ]h"]h$]h&]uh1j6 hj ubj7 )}(h%Perform a few firmware optimizations.h]jq)}(hj h]h%Perform a few firmware optimizations.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKshj ubah}(h]h ]h"]h$]h&]uh1j6 hj ubj7 )}(h$Fix "Unexpected PKT busfree" errors.h]jq)}(hj h]h(Fix “Unexpected PKT busfree” errors.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKthj ubah}(h]h ]h"]h$]h&]uh1j6 hj ubj7 )}(hUse a sequencer interrupt to notify the host of commands with bad status. We defer the notification until there are no outstanding selections to ensure that the host is interrupted for as short a time as possible.h]jq)}(hUse a sequencer interrupt to notify the host of commands with bad status. We defer the notification until there are no outstanding selections to ensure that the host is interrupted for as short a time as possible.h]hUse a sequencer interrupt to notify the host of commands with bad status. We defer the notification until there are no outstanding selections to ensure that the host is interrupted for as short a time as possible.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKuhj ubah}(h]h ]h"]h$]h&]uh1j6 hj ubj7 )}(hRemove pre-2.2.X support.h]jq)}(hj, h]hRemove pre-2.2.X support.}(hj. hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKzhj* ubah}(h]h ]h"]h$]h&]uh1j6 hj ubj7 )}(h(Add support for new 2.5.X interrupt API.h]jq)}(hjC h]h(Add support for new 2.5.X interrupt API.}(hjE hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK{hjA ubah}(h]h ]h"]h$]h&]uh1j6 hj ubj7 )}(h)Correct big-endian architecture support. h]jq)}(h(Correct big-endian architecture support.h]h(Correct big-endian architecture support.}(hj\ hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhK|hjX ubah}(h]h ]h"]h$]h&]uh1j6 hj ubeh}(h]h ]h"]h$]h&]j j uh1j1 hhhKrhj ubah}(h]h ]h"]h$]h&]uh1jW hj ubeh}(h]h ]h"]h$]h&]uh1jA hhhK|hj ubah}(h]h ]h"]h$]h&]uh1j< hj ubah}(h]h ]h"]h$]h&]uh1j6 hj3 ubj7 )}(hX1.3.7 (April 16th, 2003) - Use del_timer_sync() to ensure that no timeouts are pending during controller shutdown. - For pre-2.5.X kernels, carefully adjust our segment list size to avoid SCSI malloc pool fragmentation. - Cleanup channel display in our /proc output. - Workaround duplicate device entries in the mid-layer device list during add-single-device. h]j= )}(hhh]jB )}(hXn1.3.7 (April 16th, 2003) - Use del_timer_sync() to ensure that no timeouts are pending during controller shutdown. - For pre-2.5.X kernels, carefully adjust our segment list size to avoid SCSI malloc pool fragmentation. - Cleanup channel display in our /proc output. - Workaround duplicate device entries in the mid-layer device list during add-single-device. h](jH )}(h1.3.7 (April 16th, 2003)h]h1.3.7 (April 16th, 2003)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhKhj ubjX )}(hhh]j2 )}(hhh](j7 )}(hWUse del_timer_sync() to ensure that no timeouts are pending during controller shutdown.h]jq)}(hWUse del_timer_sync() to ensure that no timeouts are pending during controller shutdown.h]hWUse del_timer_sync() to ensure that no timeouts are pending during controller shutdown.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhj ubah}(h]h ]h"]h$]h&]uh1j6 hj ubj7 )}(hfFor pre-2.5.X kernels, carefully adjust our segment list size to avoid SCSI malloc pool fragmentation.h]jq)}(hfFor pre-2.5.X kernels, carefully adjust our segment list size to avoid SCSI malloc pool fragmentation.h]hfFor pre-2.5.X kernels, carefully adjust our segment list size to avoid SCSI malloc pool fragmentation.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhj ubah}(h]h ]h"]h$]h&]uh1j6 hj ubj7 )}(h,Cleanup channel display in our /proc output.h]jq)}(hj h]h,Cleanup channel display in our /proc output.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhj ubah}(h]h ]h"]h$]h&]uh1j6 hj ubj7 )}(h[Workaround duplicate device entries in the mid-layer device list during add-single-device. h]jq)}(hZWorkaround duplicate device entries in the mid-layer device list during add-single-device.h]hZWorkaround duplicate device entries in the mid-layer device list during add-single-device.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhj ubah}(h]h ]h"]h$]h&]uh1j6 hj ubeh}(h]h ]h"]h$]h&]j j uh1j1 hhhKhj ubah}(h]h ]h"]h$]h&]uh1jW hj ubeh}(h]h ]h"]h$]h&]uh1jA hhhKhj ubah}(h]h ]h"]h$]h&]uh1j< hj ubah}(h]h ]h"]h$]h&]uh1j6 hj3 ubj7 )}(hX1.3.6 (March 28th, 2003) - Correct a double free in the Domain Validation code. - Correct a reference to free'ed memory during controller shutdown. - Reset the bus on an SE->LVD change. This is required to reset our transceivers. h]j= )}(hhh]jB )}(h1.3.6 (March 28th, 2003) - Correct a double free in the Domain Validation code. - Correct a reference to free'ed memory during controller shutdown. - Reset the bus on an SE->LVD change. This is required to reset our transceivers. h](jH )}(h1.3.6 (March 28th, 2003)h]h1.3.6 (March 28th, 2003)}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhKhj1ubjX )}(hhh]j2 )}(hhh](j7 )}(h4Correct a double free in the Domain Validation code.h]jq)}(hjKh]h4Correct a double free in the Domain Validation code.}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjIubah}(h]h ]h"]h$]h&]uh1j6 hjFubj7 )}(hACorrect a reference to free'ed memory during controller shutdown.h]jq)}(hACorrect a reference to free'ed memory during controller shutdown.h]hCCorrect a reference to free’ed memory during controller shutdown.}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhj`ubah}(h]h ]h"]h$]h&]uh1j6 hjFubj7 )}(hQReset the bus on an SE->LVD change. This is required to reset our transceivers. h]jq)}(hPReset the bus on an SE->LVD change. This is required to reset our transceivers.h]hPReset the bus on an SE->LVD change. This is required to reset our transceivers.}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjxubah}(h]h ]h"]h$]h&]uh1j6 hjFubeh}(h]h ]h"]h$]h&]j j uh1j1 hhhKhjCubah}(h]h ]h"]h$]h&]uh1jW hj1ubeh}(h]h ]h"]h$]h&]uh1jA hhhKhj.ubah}(h]h ]h"]h$]h&]uh1j< hj*ubah}(h]h ]h"]h$]h&]uh1j6 hj3 ubj7 )}(hX1.3.5 (March 24th, 2003) - Fix a few register window mode bugs. - Include read streaming in the PPR flags we display in diagnostics as well as /proc. - Add PCI hot plug support for 2.5.X kernels. - Correct default precompensation value for RevA hardware. - Fix Domain Validation thread shutdown. - Add a firmware workaround to make the LED blink brighter during packetized operations on the H2A4. - Correct /proc display of user read streaming settings. - Simplify driver locking by releasing the io_request_lock upon driver entry from the mid-layer. - Cleanup command line parsing and move much of this code to aiclib. h]j= )}(hhh]jB )}(hXt1.3.5 (March 24th, 2003) - Fix a few register window mode bugs. - Include read streaming in the PPR flags we display in diagnostics as well as /proc. - Add PCI hot plug support for 2.5.X kernels. - Correct default precompensation value for RevA hardware. - Fix Domain Validation thread shutdown. - Add a firmware workaround to make the LED blink brighter during packetized operations on the H2A4. - Correct /proc display of user read streaming settings. - Simplify driver locking by releasing the io_request_lock upon driver entry from the mid-layer. - Cleanup command line parsing and move much of this code to aiclib. h](jH )}(h1.3.5 (March 24th, 2003)h]h1.3.5 (March 24th, 2003)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhKhjubjX )}(hhh]j2 )}(hhh](j7 )}(h$Fix a few register window mode bugs.h]jq)}(hjh]h$Fix a few register window mode bugs.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubah}(h]h ]h"]h$]h&]uh1j6 hjubj7 )}(hSInclude read streaming in the PPR flags we display in diagnostics as well as /proc.h]jq)}(hSInclude read streaming in the PPR flags we display in diagnostics as well as /proc.h]hSInclude read streaming in the PPR flags we display in diagnostics as well as /proc.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubah}(h]h ]h"]h$]h&]uh1j6 hjubj7 )}(h+Add PCI hot plug support for 2.5.X kernels.h]jq)}(hjh]h+Add PCI hot plug support for 2.5.X kernels.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubah}(h]h ]h"]h$]h&]uh1j6 hjubj7 )}(h8Correct default precompensation value for RevA hardware.h]jq)}(hjh]h8Correct default precompensation value for RevA hardware.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubah}(h]h ]h"]h$]h&]uh1j6 hjubj7 )}(h&Fix Domain Validation thread shutdown.h]jq)}(hj,h]h&Fix Domain Validation thread shutdown.}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhj*ubah}(h]h ]h"]h$]h&]uh1j6 hjubj7 )}(hbAdd a firmware workaround to make the LED blink brighter during packetized operations on the H2A4.h]jq)}(hbAdd a firmware workaround to make the LED blink brighter during packetized operations on the H2A4.h]hbAdd a firmware workaround to make the LED blink brighter during packetized operations on the H2A4.}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjAubah}(h]h ]h"]h$]h&]uh1j6 hjubj7 )}(h6Correct /proc display of user read streaming settings.h]jq)}(hj[h]h6Correct /proc display of user read streaming settings.}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjYubah}(h]h ]h"]h$]h&]uh1j6 hjubj7 )}(h^Simplify driver locking by releasing the io_request_lock upon driver entry from the mid-layer.h]jq)}(h^Simplify driver locking by releasing the io_request_lock upon driver entry from the mid-layer.h]h^Simplify driver locking by releasing the io_request_lock upon driver entry from the mid-layer.}(hjthhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjpubah}(h]h ]h"]h$]h&]uh1j6 hjubj7 )}(hCCleanup command line parsing and move much of this code to aiclib. h]jq)}(hBCleanup command line parsing and move much of this code to aiclib.h]hBCleanup command line parsing and move much of this code to aiclib.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubah}(h]h ]h"]h$]h&]uh1j6 hjubeh}(h]h ]h"]h$]h&]j j uh1j1 hhhKhjubah}(h]h ]h"]h$]h&]uh1jW hjubeh}(h]h ]h"]h$]h&]uh1jA hhhKhjubah}(h]h ]h"]h$]h&]uh1j< hjubah}(h]h ]h"]h$]h&]uh1j6 hj3 ubj7 )}(h1.3.4 (February 28th, 2003) - Correct a race condition in our error recovery handler. - Allow Test Unit Ready commands to take a full 5 seconds during Domain Validation. h]j= )}(hhh]jB )}(h1.3.4 (February 28th, 2003) - Correct a race condition in our error recovery handler. - Allow Test Unit Ready commands to take a full 5 seconds during Domain Validation. h](jH )}(h1.3.4 (February 28th, 2003)h]h1.3.4 (February 28th, 2003)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhKhjubjX )}(hhh]j2 )}(hhh](j7 )}(h7Correct a race condition in our error recovery handler.h]jq)}(hjh]h7Correct a race condition in our error recovery handler.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubah}(h]h ]h"]h$]h&]uh1j6 hjubj7 )}(hRAllow Test Unit Ready commands to take a full 5 seconds during Domain Validation. h]jq)}(hQAllow Test Unit Ready commands to take a full 5 seconds during Domain Validation.h]hQAllow Test Unit Ready commands to take a full 5 seconds during Domain Validation.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubah}(h]h ]h"]h$]h&]uh1j6 hjubeh}(h]h ]h"]h$]h&]j j uh1j1 hhhKhjubah}(h]h ]h"]h$]h&]uh1jW hjubeh}(h]h ]h"]h$]h&]uh1jA hhhKhjubah}(h]h ]h"]h$]h&]uh1j< hjubah}(h]h ]h"]h$]h&]uh1j6 hj3 ubj7 )}(h}1.3.2 (February 19th, 2003) - Correct a Rev B. regression due to the GEM318 compatibility fix included in 1.3.1. h]j= )}(hhh]jB )}(hs1.3.2 (February 19th, 2003) - Correct a Rev B. regression due to the GEM318 compatibility fix included in 1.3.1. h](jH )}(h1.3.2 (February 19th, 2003)h]h1.3.2 (February 19th, 2003)}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhKhj1ubjX )}(hhh]j2 )}(hhh]j7 )}(hSCorrect a Rev B. regression due to the GEM318 compatibility fix included in 1.3.1. h]jq)}(hRCorrect a Rev B. regression due to the GEM318 compatibility fix included in 1.3.1.h]hRCorrect a Rev B. regression due to the GEM318 compatibility fix included in 1.3.1.}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjIubah}(h]h ]h"]h$]h&]uh1j6 hjFubah}(h]h ]h"]h$]h&]j j uh1j1 hhhKhjCubah}(h]h ]h"]h$]h&]uh1jW hj1ubeh}(h]h ]h"]h$]h&]uh1jA hhhKhj.ubah}(h]h ]h"]h$]h&]uh1j< hj*ubah}(h]h ]h"]h$]h&]uh1j6 hj3 ubj7 )}(hX1.3.1 (February 11th, 2003) - Add support for the 39320A. - Improve recovery for certain PCI-X errors. - Fix handling of LQ/DATA/LQ/DATA for the same write transaction that can occur without interveining training. - Correct compatibility issues with the GEM318 enclosure services device. - Correct data corruption issue that occurred under high tag depth write loads. - Adapt to a change in the 2.5.X daemonize() API. - Correct a "Missing case in ahd_handle_scsiint" panic. h]j= )}(hhh]jB )}(hX1.3.1 (February 11th, 2003) - Add support for the 39320A. - Improve recovery for certain PCI-X errors. - Fix handling of LQ/DATA/LQ/DATA for the same write transaction that can occur without interveining training. - Correct compatibility issues with the GEM318 enclosure services device. - Correct data corruption issue that occurred under high tag depth write loads. - Adapt to a change in the 2.5.X daemonize() API. - Correct a "Missing case in ahd_handle_scsiint" panic. h](jH )}(h1.3.1 (February 11th, 2003)h]h1.3.1 (February 11th, 2003)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhKhjubjX )}(hhh]j2 )}(hhh](j7 )}(hAdd support for the 39320A.h]jq)}(hjh]hAdd support for the 39320A.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubah}(h]h ]h"]h$]h&]uh1j6 hjubj7 )}(h*Improve recovery for certain PCI-X errors.h]jq)}(hjh]h*Improve recovery for certain PCI-X errors.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubah}(h]h ]h"]h$]h&]uh1j6 hjubj7 )}(hlFix handling of LQ/DATA/LQ/DATA for the same write transaction that can occur without interveining training.h]jq)}(hlFix handling of LQ/DATA/LQ/DATA for the same write transaction that can occur without interveining training.h]hlFix handling of LQ/DATA/LQ/DATA for the same write transaction that can occur without interveining training.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubah}(h]h ]h"]h$]h&]uh1j6 hjubj7 )}(hGCorrect compatibility issues with the GEM318 enclosure services device.h]jq)}(hGCorrect compatibility issues with the GEM318 enclosure services device.h]hGCorrect compatibility issues with the GEM318 enclosure services device.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubah}(h]h ]h"]h$]h&]uh1j6 hjubj7 )}(hMCorrect data corruption issue that occurred under high tag depth write loads.h]jq)}(hMCorrect data corruption issue that occurred under high tag depth write loads.h]hMCorrect data corruption issue that occurred under high tag depth write loads.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubah}(h]h ]h"]h$]h&]uh1j6 hjubj7 )}(h/Adapt to a change in the 2.5.X daemonize() API.h]jq)}(hjh]h/Adapt to a change in the 2.5.X daemonize() API.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubah}(h]h ]h"]h$]h&]uh1j6 hjubj7 )}(h6Correct a "Missing case in ahd_handle_scsiint" panic. h]jq)}(h5Correct a "Missing case in ahd_handle_scsiint" panic.h]h9Correct a “Missing case in ahd_handle_scsiint” panic.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhj+ubah}(h]h ]h"]h$]h&]uh1j6 hjubeh}(h]h ]h"]h$]h&]j j uh1j1 hhhKhjubah}(h]h ]h"]h$]h&]uh1jW hjubeh}(h]h ]h"]h$]h&]uh1jA hhhKhjubah}(h]h ]h"]h$]h&]uh1j< hjubah}(h]h ]h"]h$]h&]uh1j6 hj3 ubj7 )}(h1.3.0 (January 21st, 2003) - Full regression testing for all U320 products completed. - Added abort and target/lun reset error recovery handler and interrupt coalescing. h]j= )}(hhh]jB )}(h1.3.0 (January 21st, 2003) - Full regression testing for all U320 products completed. - Added abort and target/lun reset error recovery handler and interrupt coalescing. h](jH )}(h1.3.0 (January 21st, 2003)h]h1.3.0 (January 21st, 2003)}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhKhjhubjX )}(hhh]j2 )}(hhh](j7 )}(h8Full regression testing for all U320 products completed.h]jq)}(hjh]h8Full regression testing for all U320 products completed.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubah}(h]h ]h"]h$]h&]uh1j6 hj}ubj7 )}(hRAdded abort and target/lun reset error recovery handler and interrupt coalescing. h]jq)}(hQAdded abort and target/lun reset error recovery handler and interrupt coalescing.h]hQAdded abort and target/lun reset error recovery handler and interrupt coalescing.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubah}(h]h ]h"]h$]h&]uh1j6 hj}ubeh}(h]h ]h"]h$]h&]j j uh1j1 hhhKhjzubah}(h]h ]h"]h$]h&]uh1jW hjhubeh}(h]h ]h"]h$]h&]uh1jA hhhKhjeubah}(h]h ]h"]h$]h&]uh1j< hjaubah}(h]h ]h"]h$]h&]uh1j6 hj3 ubj7 )}(hX1.2.0 (November 14th, 2002) - Added support for Domain Validation - Add support for the Hewlett-Packard version of the 39320D and AIC-7902 adapters. Support for previous adapters has not been fully tested and should only be used at the customer's own risk. h]j= )}(hhh]jB )}(hX1.2.0 (November 14th, 2002) - Added support for Domain Validation - Add support for the Hewlett-Packard version of the 39320D and AIC-7902 adapters. Support for previous adapters has not been fully tested and should only be used at the customer's own risk. h](jH )}(h1.2.0 (November 14th, 2002)h]h1.2.0 (November 14th, 2002)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhKhjubjX )}(hhh](j2 )}(hhh](j7 )}(h#Added support for Domain Validationh]jq)}(hjh]h#Added support for Domain Validation}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubah}(h]h ]h"]h$]h&]uh1j6 hjubj7 )}(hQAdd support for the Hewlett-Packard version of the 39320D and AIC-7902 adapters. h]jq)}(hPAdd support for the Hewlett-Packard version of the 39320D and AIC-7902 adapters.h]hPAdd support for the Hewlett-Packard version of the 39320D and AIC-7902 adapters.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubah}(h]h ]h"]h$]h&]uh1j6 hjubeh}(h]h ]h"]h$]h&]j j uh1j1 hhhKhjubjq)}(hkSupport for previous adapters has not been fully tested and should only be used at the customer's own risk.h]hmSupport for previous adapters has not been fully tested and should only be used at the customer’s own risk.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubeh}(h]h ]h"]h$]h&]uh1jW hjubeh}(h]h ]h"]h$]h&]uh1jA hhhKhjubah}(h]h ]h"]h$]h&]uh1j< hjubah}(h]h ]h"]h$]h&]uh1j6 hj3 ubj7 )}(hT1.1.1 (September 24th, 2002) - Added support for the Linux 2.5.X kernel series h]j= )}(hhh]jB )}(hO1.1.1 (September 24th, 2002) - Added support for the Linux 2.5.X kernel series h](jH )}(h1.1.1 (September 24th, 2002)h]h1.1.1 (September 24th, 2002)}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhKhjNubjX )}(hhh]j2 )}(hhh]j7 )}(h0Added support for the Linux 2.5.X kernel series h]jq)}(h/Added support for the Linux 2.5.X kernel seriesh]h/Added support for the Linux 2.5.X kernel series}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjfubah}(h]h ]h"]h$]h&]uh1j6 hjcubah}(h]h ]h"]h$]h&]j j uh1j1 hhhKhj`ubah}(h]h ]h"]h$]h&]uh1jW hjNubeh}(h]h ]h"]h$]h&]uh1jA hhhKhjKubah}(h]h ]h"]h$]h&]uh1j< hjGubah}(h]h ]h"]h$]h&]uh1j6 hj3 ubj7 )}(h1.1.0 (September 17th, 2002) - Added support for four additional SCSI products: ASC-39320, ASC-29320, ASC-29320LP, AIC-7901. h]j= )}(hhh]jB )}(h1.1.0 (September 17th, 2002) - Added support for four additional SCSI products: ASC-39320, ASC-29320, ASC-29320LP, AIC-7901. h](jH )}(h1.1.0 (September 17th, 2002)h]h1.1.0 (September 17th, 2002)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhKhjubjX )}(hhh]j2 )}(hhh]j7 )}(h^Added support for four additional SCSI products: ASC-39320, ASC-29320, ASC-29320LP, AIC-7901. h]jq)}(h]Added support for four additional SCSI products: ASC-39320, ASC-29320, ASC-29320LP, AIC-7901.h]h]Added support for four additional SCSI products: ASC-39320, ASC-29320, ASC-29320LP, AIC-7901.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubah}(h]h ]h"]h$]h&]uh1j6 hjubah}(h]h ]h"]h$]h&]j j uh1j1 hhhKhjubah}(h]h ]h"]h$]h&]uh1jW hjubeh}(h]h ]h"]h$]h&]uh1jA hhhKhjubah}(h]h ]h"]h$]h&]uh1j< hjubah}(h]h ]h"]h$]h&]uh1j6 hj3 ubj7 )}(h61.0.0 (May 30th, 2002) - Initial driver release. h]j= )}(hhh]jB )}(h11.0.0 (May 30th, 2002) - Initial driver release. h](jH )}(h1.0.0 (May 30th, 2002)h]h1.0.0 (May 30th, 2002)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhKhjubjX )}(hhh]j2 )}(hhh]j7 )}(hInitial driver release. h]jq)}(hInitial driver release.h]hInitial driver release.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubah}(h]h ]h"]h$]h&]uh1j6 hj ubah}(h]h ]h"]h$]h&]j j uh1j1 hhhKhj ubah}(h]h ]h"]h$]h&]uh1jW hjubeh}(h]h ]h"]h$]h&]uh1jA hhhKhjubah}(h]h ]h"]h$]h&]uh1j< hjubah}(h]h ]h"]h$]h&]uh1j6 hj3 ubj7 )}(hX2.1. Software/Hardware Features - Support for the SPI-4 "Ultra320" standard: - 320MB/s transfer rates - Packetized SCSI Protocol at 160MB/s and 320MB/s - Quick Arbitration Selection (QAS) - Retained Training Information (Rev B. ASIC only) - Interrupt Coalescing - Initiator Mode (target mode not currently supported) - Support for the PCI-X standard up to 133MHz - Support for the PCI v2.2 standard - Domain Validation h]j= )}(hhh]jB )}(hX2.1. Software/Hardware Features - Support for the SPI-4 "Ultra320" standard: - 320MB/s transfer rates - Packetized SCSI Protocol at 160MB/s and 320MB/s - Quick Arbitration Selection (QAS) - Retained Training Information (Rev B. ASIC only) - Interrupt Coalescing - Initiator Mode (target mode not currently supported) - Support for the PCI-X standard up to 133MHz - Support for the PCI v2.2 standard - Domain Validation h](jH )}(h2.1. Software/Hardware Featuresh]h2.1. Software/Hardware Features}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhKhjMubjX )}(hhh]j2 )}(hhh](j7 )}(hSupport for the SPI-4 "Ultra320" standard: - 320MB/s transfer rates - Packetized SCSI Protocol at 160MB/s and 320MB/s - Quick Arbitration Selection (QAS) - Retained Training Information (Rev B. ASIC only)h]jq)}(hSupport for the SPI-4 "Ultra320" standard: - 320MB/s transfer rates - Packetized SCSI Protocol at 160MB/s and 320MB/s - Quick Arbitration Selection (QAS) - Retained Training Information (Rev B. ASIC only)h]hSupport for the SPI-4 “Ultra320” standard: - 320MB/s transfer rates - Packetized SCSI Protocol at 160MB/s and 320MB/s - Quick Arbitration Selection (QAS) - Retained Training Information (Rev B. ASIC only)}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjeubah}(h]h ]h"]h$]h&]uh1j6 hjbubj7 )}(hInterrupt Coalescingh]jq)}(hjh]hInterrupt Coalescing}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhj}ubah}(h]h ]h"]h$]h&]uh1j6 hjbubj7 )}(h4Initiator Mode (target mode not currently supported)h]jq)}(h4Initiator Mode (target mode not currently supported)h]h4Initiator Mode (target mode not currently supported)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubah}(h]h ]h"]h$]h&]uh1j6 hjbubj7 )}(h+Support for the PCI-X standard up to 133MHzh]jq)}(hjh]h+Support for the PCI-X standard up to 133MHz}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubah}(h]h ]h"]h$]h&]uh1j6 hjbubj7 )}(h!Support for the PCI v2.2 standardh]jq)}(hjh]h!Support for the PCI v2.2 standard}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubah}(h]h ]h"]h$]h&]uh1j6 hjbubj7 )}(hDomain Validation h]jq)}(hDomain Validationh]hDomain Validation}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubah}(h]h ]h"]h$]h&]uh1j6 hjbubeh}(h]h ]h"]h$]h&]j j uh1j1 hhhKhj_ubah}(h]h ]h"]h$]h&]uh1jW hjMubeh}(h]h ]h"]h$]h&]uh1jA hhhKhjJubah}(h]h ]h"]h$]h&]uh1j< hjFubah}(h]h ]h"]h$]h&]uh1j6 hj3 ubj7 )}(hX$2.2. Operating System Support: - Redhat Linux 7.2, 7.3, 8.0, Advanced Server 2.1 - SuSE Linux 7.3, 8.0, 8.1, Enterprise Server 7 - only Intel and AMD x86 supported at this time - >4GB memory configurations supported. Refer to the User's Guide for more details on this. h]j= )}(hhh]jB )}(hX2.2. Operating System Support: - Redhat Linux 7.2, 7.3, 8.0, Advanced Server 2.1 - SuSE Linux 7.3, 8.0, 8.1, Enterprise Server 7 - only Intel and AMD x86 supported at this time - >4GB memory configurations supported. Refer to the User's Guide for more details on this. h](jH )}(h2.2. Operating System Support:h]h2.2. Operating System Support:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhKhjubjX )}(hhh](j)}(h- Redhat Linux 7.2, 7.3, 8.0, Advanced Server 2.1 - SuSE Linux 7.3, 8.0, 8.1, Enterprise Server 7 - only Intel and AMD x86 supported at this time - >4GB memory configurations supported. h]j2 )}(hhh](j7 )}(h/Redhat Linux 7.2, 7.3, 8.0, Advanced Server 2.1h]jq)}(hj5h]h/Redhat Linux 7.2, 7.3, 8.0, Advanced Server 2.1}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhj3ubah}(h]h ]h"]h$]h&]uh1j6 hj0ubj7 )}(h-SuSE Linux 7.3, 8.0, 8.1, Enterprise Server 7h]jq)}(hjLh]h-SuSE Linux 7.3, 8.0, 8.1, Enterprise Server 7}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjJubah}(h]h ]h"]h$]h&]uh1j6 hj0ubj7 )}(h-only Intel and AMD x86 supported at this timeh]jq)}(hjch]h-only Intel and AMD x86 supported at this time}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjaubah}(h]h ]h"]h$]h&]uh1j6 hj0ubj7 )}(h&>4GB memory configurations supported. h]jq)}(h%>4GB memory configurations supported.h]h%>4GB memory configurations supported.}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjxubah}(h]h ]h"]h$]h&]uh1j6 hj0ubeh}(h]h ]h"]h$]h&]j j uh1j1 hhhKhj,ubah}(h]h ]h"]h$]h&]uh1jhhhKhj)ubjq)}(h3Refer to the User's Guide for more details on this.h]h5Refer to the User’s Guide for more details on this.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhj)ubeh}(h]h ]h"]h$]h&]uh1jW hjubeh}(h]h ]h"]h$]h&]uh1jA hhhKhjubah}(h]h ]h"]h$]h&]uh1j< hjubah}(h]h ]h"]h$]h&]uh1j6 hj3 ubeh}(h]h ]h"]h$]h&]j *uh1j1 hhhKLhj- ubah}(h]h ]h"]h$]h&]uh1jhhhKLhj hhubeh}(h]version-historyah ]h"]2. version historyah$]h&]uh1j[hj]hhhhhKIubj\)}(hhh](ja)}(h3. Command Line Optionsh]h3. Command Line Options}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j`hjhhhhhKubj)}(hXd .. Warning:: ALTERING OR ADDING THESE DRIVER PARAMETERS INCORRECTLY CAN RENDER YOUR SYSTEM INOPERABLE. USE THEM WITH CAUTION. Put a .conf file in the /etc/modprobe.d/ directory and add/edit a line containing ``options aic79xx aic79xx=[command[,command...]]`` where ``command`` is one or more of the following: h](j)}(h.. Warning:: ALTERING OR ADDING THESE DRIVER PARAMETERS INCORRECTLY CAN RENDER YOUR SYSTEM INOPERABLE. USE THEM WITH CAUTION. h]hwarning)}(hpALTERING OR ADDING THESE DRIVER PARAMETERS INCORRECTLY CAN RENDER YOUR SYSTEM INOPERABLE. USE THEM WITH CAUTION.h]jq)}(hpALTERING OR ADDING THESE DRIVER PARAMETERS INCORRECTLY CAN RENDER YOUR SYSTEM INOPERABLE. USE THEM WITH CAUTION.h]hpALTERING OR ADDING THESE DRIVER PARAMETERS INCORRECTLY CAN RENDER YOUR SYSTEM INOPERABLE. USE THEM WITH CAUTION.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhhhKhjubjq)}(hPut a .conf file in the /etc/modprobe.d/ directory and add/edit a line containing ``options aic79xx aic79xx=[command[,command...]]`` where ``command`` is one or more of the following:h](hRPut a .conf file in the /etc/modprobe.d/ directory and add/edit a line containing }(hjhhhNhNubhliteral)}(h2``options aic79xx aic79xx=[command[,command...]]``h]h.options aic79xx aic79xx=[command[,command...]]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh where }(hjhhhNhNubj)}(h ``command``h]hcommand}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh! is one or more of the following:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jphhhKhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj= )}(hhh](jB )}(hverbose :Definition: enable additional informative messages during driver operation. :Possible Values: This option is a flag :Default Value: disabled h](jH )}(hverboseh]hverbose}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhKhjMubjX )}(hhh]h field_list)}(hhh](hfield)}(hhh](h field_name)}(h Definitionh]h Definition}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1jlhjihhhKubh field_body)}(h?enable additional informative messages during driver operation.h]jq)}(hjh]h?enable additional informative messages during driver operation.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhj~ubah}(h]h ]h"]h$]h&]uh1j|hjiubeh}(h]h ]h"]h$]h&]uh1jghhhKhjdubjh)}(hhh](jm)}(hPossible Valuesh]hPossible Values}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jlhjhhhKubj})}(hThis option is a flagh]jq)}(hjh]hThis option is a flag}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubah}(h]h ]h"]h$]h&]uh1j|hjubeh}(h]h ]h"]h$]h&]uh1jghhhKhjdubjh)}(hhh](jm)}(h Default Valueh]h Default Value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jlhjhhhKubj})}(h disabled h]jq)}(hdisabledh]hdisabled}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubah}(h]h ]h"]h$]h&]uh1j|hjubeh}(h]h ]h"]h$]h&]uh1jghhhKhjdubeh}(h]h ]h"]h$]h&]uh1jbhj_ubah}(h]h ]h"]h$]h&]uh1jW hjMubeh}(h]h ]h"]h$]h&]uh1jA hhhKhjJubjB )}(hX?debug:[value] :Definition: Enables various levels of debugging information The bit definitions for the debugging mask can be found in drivers/scsi/aic7xxx/aic79xx.h under the "Debug" heading. :Possible Values: 0x0000 = no debugging, 0xffff = full debugging :Default Value: 0x0000 h](jH )}(h debug:[value]h]h debug:[value]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhKhj ubjX )}(hhh]jc)}(hhh](jh)}(hhh](jm)}(h Definitionh]h Definition}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jlhj"hhhKubj})}(hEnables various levels of debugging information The bit definitions for the debugging mask can be found in drivers/scsi/aic7xxx/aic79xx.h under the "Debug" heading.h]jq)}(hEnables various levels of debugging information The bit definitions for the debugging mask can be found in drivers/scsi/aic7xxx/aic79xx.h under the "Debug" heading.h]hEnables various levels of debugging information The bit definitions for the debugging mask can be found in drivers/scsi/aic7xxx/aic79xx.h under the “Debug” heading.}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhj3ubah}(h]h ]h"]h$]h&]uh1j|hj"ubeh}(h]h ]h"]h$]h&]uh1jghhhKhjubjh)}(hhh](jm)}(hPossible Valuesh]hPossible Values}(hjThhhNhNubah}(h]h ]h"]h$]h&]uh1jlhjQhhhKubj})}(h.0x0000 = no debugging, 0xffff = full debuggingh]jq)}(hjdh]h.0x0000 = no debugging, 0xffff = full debugging}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjbubah}(h]h ]h"]h$]h&]uh1j|hjQubeh}(h]h ]h"]h$]h&]uh1jghhhKhjubjh)}(hhh](jm)}(h Default Valueh]h Default Value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jlhjhhhKubj})}(h0x0000 h]jq)}(h0x0000h]h0x0000}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubah}(h]h ]h"]h$]h&]uh1j|hjubeh}(h]h ]h"]h$]h&]uh1jghhhKhjubeh}(h]h ]h"]h$]h&]uh1jbhjubah}(h]h ]h"]h$]h&]uh1jW hj ubeh}(h]h ]h"]h$]h&]uh1jA hhhKhjJhhubjB )}(hno_reset :Definition: Do not reset the bus during the initial probe phase :Possible Values: This option is a flag :Default Value: disabled h](jH )}(hno_reseth]hno_reset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhKhjubjX )}(hhh]jc)}(hhh](jh)}(hhh](jm)}(h Definitionh]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jlhjhhhKubj})}(h3Do not reset the bus during the initial probe phaseh]jq)}(h3Do not reset the bus during the initial probe phaseh]h3Do not reset the bus during the initial probe phase}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubah}(h]h ]h"]h$]h&]uh1j|hjubeh}(h]h ]h"]h$]h&]uh1jghhhKhjubjh)}(hhh](jm)}(hPossible Valuesh]hPossible Values}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jlhjhhhKubj})}(hThis option is a flagh]jq)}(hjh]hThis option is a flag}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjubah}(h]h ]h"]h$]h&]uh1j|hjubeh}(h]h ]h"]h$]h&]uh1jghhhKhjubjh)}(hhh](jm)}(h Default Valueh]h Default Value}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1jlhj5hhhKubj})}(h disabled h]jq)}(hdisabledh]hdisabled}(hjJhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhKhjFubah}(h]h ]h"]h$]h&]uh1j|hj5ubeh}(h]h ]h"]h$]h&]uh1jghhhKhjubeh}(h]h ]h"]h$]h&]uh1jbhjubah}(h]h ]h"]h$]h&]uh1jW hjubeh}(h]h ]h"]h$]h&]uh1jA hhhKhjJhhubjB )}(hextended :Definition: Force extended translation on the controller :Possible Values: This option is a flag :Default Value: disabled h](jH )}(hextendedh]hextended}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhMhjvubjX )}(hhh]jc)}(hhh](jh)}(hhh](jm)}(h Definitionh]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jlhjhhhKubj})}(h,Force extended translation on the controllerh]jq)}(hjh]h,Force extended translation on the controller}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhjubah}(h]h ]h"]h$]h&]uh1j|hjubeh}(h]h ]h"]h$]h&]uh1jghhhMhjubjh)}(hhh](jm)}(hPossible Valuesh]hPossible Values}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jlhjhhhKubj})}(hThis option is a flagh]jq)}(hjh]hThis option is a flag}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhjubah}(h]h ]h"]h$]h&]uh1j|hjubeh}(h]h ]h"]h$]h&]uh1jghhhMhjubjh)}(hhh](jm)}(h Default Valueh]h Default Value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jlhjhhhKubj})}(h disabled h]jq)}(hdisabledh]hdisabled}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhjubah}(h]h ]h"]h$]h&]uh1j|hjubeh}(h]h ]h"]h$]h&]uh1jghhhMhjubeh}(h]h ]h"]h$]h&]uh1jbhjubah}(h]h ]h"]h$]h&]uh1jW hjvubeh}(h]h ]h"]h$]h&]uh1jA hhhMhjJhhubjB )}(hperiodic_otag :Definition: Send an ordered tag periodically to prevent tag starvation. Needed for some older devices :Possible Values: This option is a flag :Default Value: disabled h](jH )}(h periodic_otagh]h periodic_otag}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhM hj+ubjX )}(hhh]jc)}(hhh](jh)}(hhh](jm)}(h Definitionh]h Definition}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1jlhjChhhKubj})}(hZSend an ordered tag periodically to prevent tag starvation. Needed for some older devicesh]jq)}(hZSend an ordered tag periodically to prevent tag starvation. Needed for some older devicesh]hZSend an ordered tag periodically to prevent tag starvation. Needed for some older devices}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhjTubah}(h]h ]h"]h$]h&]uh1j|hjCubeh}(h]h ]h"]h$]h&]uh1jghhhMhj@ubjh)}(hhh](jm)}(hPossible Valuesh]hPossible Values}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1jlhjrhhhKubj})}(hThis option is a flagh]jq)}(hjh]hThis option is a flag}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhjubah}(h]h ]h"]h$]h&]uh1j|hjrubeh}(h]h ]h"]h$]h&]uh1jghhhMhj@ubjh)}(hhh](jm)}(h Default Valueh]h Default Value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jlhjhhhKubj})}(h disabled h]jq)}(hdisabledh]hdisabled}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhM hjubah}(h]h ]h"]h$]h&]uh1j|hjubeh}(h]h ]h"]h$]h&]uh1jghhhM hj@ubeh}(h]h ]h"]h$]h&]uh1jbhj=ubah}(h]h ]h"]h$]h&]uh1jW hj+ubeh}(h]h ]h"]h$]h&]uh1jA hhhM hjJhhubjB )}(hreverse_scan :Definition: Probe the scsi bus in reverse order, starting with target 15 :Possible Values: This option is a flag :Default Value: disabled h](jH )}(h reverse_scanh]h reverse_scan}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhMhjubjX )}(hhh]jc)}(hhh](jh)}(hhh](jm)}(h Definitionh]h Definition}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jlhjhhhKubj})}(h 0 Enable DV ==== =============================== :Default Value: DV Serial EEPROM configuration setting. Example: :: dv:{-1,0,,1,1,0} - On Controller 0 leave DV at its default setting. - On Controller 1 disable DV. - Skip configuration on Controller 2. - On Controllers 3 and 4 enable DV. - On Controller 5 disable DV. h](jH )}(hdv: {value[,value...]}h]hdv: {value[,value...]}}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhMhj ubjX )}(hhh](jc)}(hhh](jh)}(hhh](jm)}(h Definitionh]h Definition}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jlhj"hhhKubj})}(hXSet Domain Validation Policy on a per-controller basis. Controllers may be omitted indicating that they should retain the default read streaming setting. :Possible Values: ==== =============================== < 0 Use setting from serial EEPROM. 0 Disable DV > 0 Enable DV ==== =============================== h](j= )}(hhh]jB )}(hSet Domain Validation Policy on a per-controller basis. Controllers may be omitted indicating that they should retain the default read streaming setting. h](jH )}(h7Set Domain Validation Policy on a per-controller basis.h]h7Set Domain Validation Policy on a per-controller basis.}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhMjhj:ubjX )}(hhh]jq)}(haControllers may be omitted indicating that they should retain the default read streaming setting.h]haControllers may be omitted indicating that they should retain the default read streaming setting.}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMihjLubah}(h]h ]h"]h$]h&]uh1jW hj:ubeh}(h]h ]h"]h$]h&]uh1jA hhhMjhj7ubah}(h]h ]h"]h$]h&]uh1j< hj3ubjc)}(hhh]jh)}(hhh](jm)}(hPossible Valuesh]hPossible Values}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1jlhjrhhhKubj})}(h==== =============================== < 0 Use setting from serial EEPROM. 0 Disable DV > 0 Enable DV ==== =============================== h]j)}(hhh]j)}(hhh](j)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjubj)}(hhh](j)}(hhh](j)}(hhh]jq)}(h< 0h]h< 0}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMohjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]jq)}(hUse setting from serial EEPROM.h]hUse setting from serial EEPROM.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMohjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]jq)}(h0h]h0}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMphjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]jq)}(h Disable DVh]h Disable DV}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMphjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]jq)}(h> 0h]h> 0}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMqhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]jq)}(h Enable DVh]h Enable DV}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMqhj,ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]colsKuh1jhjubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1j|hjrubeh}(h]h ]h"]h$]h&]uh1jghhhMlhjoubah}(h]h ]h"]h$]h&]uh1jbhj3ubeh}(h]h ]h"]h$]h&]uh1j|hj"ubeh}(h]h ]h"]h$]h&]uh1jghhhMhhjubjh)}(hhh](jm)}(h Default Valueh]h Default Value}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1jlhjzhhhKubj})}(h(DV Serial EEPROM configuration setting. h]jq)}(h'DV Serial EEPROM configuration setting.h]h'DV Serial EEPROM configuration setting.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMthjubah}(h]h ]h"]h$]h&]uh1j|hjzubeh}(h]h ]h"]h$]h&]uh1jghhhMthjubeh}(h]h ]h"]h$]h&]uh1jbhjubjq)}(hExample:h]hExample:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMvhjubj)}(h:: dv:{-1,0,,1,1,0} - On Controller 0 leave DV at its default setting. - On Controller 1 disable DV. - Skip configuration on Controller 2. - On Controllers 3 and 4 enable DV. - On Controller 5 disable DV. h](j )}(hdv:{-1,0,,1,1,0}h]hdv:{-1,0,,1,1,0}}hjsbah}(h]h ]h"]h$]h&]hhuh1jhhhMzhjubj2 )}(hhh](j7 )}(h0On Controller 0 leave DV at its default setting.h]jq)}(hjh]h0On Controller 0 leave DV at its default setting.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhM|hjubah}(h]h ]h"]h$]h&]uh1j6 hjubj7 )}(hOn Controller 1 disable DV.h]jq)}(hjh]hOn Controller 1 disable DV.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhM}hjubah}(h]h ]h"]h$]h&]uh1j6 hjubj7 )}(h#Skip configuration on Controller 2.h]jq)}(hj h]h#Skip configuration on Controller 2.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhM~hj ubah}(h]h ]h"]h$]h&]uh1j6 hjubj7 )}(h!On Controllers 3 and 4 enable DV.h]jq)}(hj h]h!On Controllers 3 and 4 enable DV.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhj ubah}(h]h ]h"]h$]h&]uh1j6 hjubj7 )}(hOn Controller 5 disable DV. h]jq)}(hOn Controller 5 disable DV.h]hOn Controller 5 disable DV.}(hj2 hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhj. ubah}(h]h ]h"]h$]h&]uh1j6 hjubeh}(h]h ]h"]h$]h&]j j uh1j1 hhhM|hjubeh}(h]h ]h"]h$]h&]uh1jhhhMxhjubeh}(h]h ]h"]h$]h&]uh1jW hj ubeh}(h]h ]h"]h$]h&]uh1jA hhhMhjJhhubjB )}(hseltime:[value] :Definition: Specifies the selection timeout value :Possible Values: 0 = 256ms, 1 = 128ms, 2 = 64ms, 3 = 32ms :Default Value: 0 h](jH )}(hseltime:[value]h]hseltime:[value]}(hjb hhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhMhj^ ubjX )}(hhh]jc)}(hhh](jh)}(hhh](jm)}(h Definitionh]h Definition}(hjy hhhNhNubah}(h]h ]h"]h$]h&]uh1jlhjv hhhKubj})}(h%Specifies the selection timeout valueh]jq)}(hj h]h%Specifies the selection timeout value}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhj ubah}(h]h ]h"]h$]h&]uh1j|hjv ubeh}(h]h ]h"]h$]h&]uh1jghhhMhjs ubjh)}(hhh](jm)}(hPossible Valuesh]hPossible Values}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jlhj hhhKubj})}(h(0 = 256ms, 1 = 128ms, 2 = 64ms, 3 = 32msh]jq)}(hj h]h(0 = 256ms, 1 = 128ms, 2 = 64ms, 3 = 32ms}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhj ubah}(h]h ]h"]h$]h&]uh1j|hj ubeh}(h]h ]h"]h$]h&]uh1jghhhMhjs ubjh)}(hhh](jm)}(h Default Valueh]h Default Value}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jlhj hhhKubj})}(h0 h]jq)}(hjh]h0}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhj ubah}(h]h ]h"]h$]h&]uh1j|hj ubeh}(h]h ]h"]h$]h&]uh1jghhhMhjs ubeh}(h]h ]h"]h$]h&]uh1jbhjp ubah}(h]h ]h"]h$]h&]uh1jW hj^ ubeh}(h]h ]h"]h$]h&]uh1jA hhhMhjJhhubeh}(h]h ]h"]h$]h&]uh1j< hjhhhNhNubh)}(htWarning: The following three options should only be changed at the direction of a technical support representative.h]htWarning: The following three options should only be changed at the direction of a technical support representative.}hj!sbah}(h]h ]h"]h$]h&]hhuh1hhjhhhhhMubj= )}(hhh](jB )}(hXprecomp: {value[,value...]} :Definition: Set IO Cell precompensation value on a per-controller basis. Controllers may be omitted indicating that they should retain the default precompensation setting. :Possible Values: 0 - 7 :Default Value: Varies based on chip revision Examples: :: precomp:{0x1} On Controller 0 set precompensation to 1. :: precomp:{1,,7} - On Controller 0 set precompensation to 1. - On Controller 2 set precompensation to 8. h](jH )}(hprecomp: {value[,value...]}h]hprecomp: {value[,value...]}}(hj-!hhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhMhj)!ubjX )}(hhh](jc)}(hhh](jh)}(hhh](jm)}(h Definitionh]h Definition}(hjD!hhhNhNubah}(h]h ]h"]h$]h&]uh1jlhjA!hhhKubj})}(hSet IO Cell precompensation value on a per-controller basis. Controllers may be omitted indicating that they should retain the default precompensation setting. h]jq)}(hSet IO Cell precompensation value on a per-controller basis. Controllers may be omitted indicating that they should retain the default precompensation setting.h]hSet IO Cell precompensation value on a per-controller basis. Controllers may be omitted indicating that they should retain the default precompensation setting.}(hjV!hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhjR!ubah}(h]h ]h"]h$]h&]uh1j|hjA!ubeh}(h]h ]h"]h$]h&]uh1jghhhMhj>!ubjh)}(hhh](jm)}(hPossible Valuesh]hPossible Values}(hjs!hhhNhNubah}(h]h ]h"]h$]h&]uh1jlhjp!hhhKubj})}(h0 - 7h]jq)}(hj!h]h0 - 7}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhj!ubah}(h]h ]h"]h$]h&]uh1j|hjp!ubeh}(h]h ]h"]h$]h&]uh1jghhhMhj>!ubjh)}(hhh](jm)}(h Default Valueh]h Default Value}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jlhj!hhhKubj})}(hVaries based on chip revision h]jq)}(hVaries based on chip revisionh]hVaries based on chip revision}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhj!ubah}(h]h ]h"]h$]h&]uh1j|hj!ubeh}(h]h ]h"]h$]h&]uh1jghhhMhj>!ubeh}(h]h ]h"]h$]h&]uh1jbhj;!ubjq)}(h Examples:h]h Examples:}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhj;!ubj)}(h:: precomp:{0x1} On Controller 0 set precompensation to 1. :: precomp:{1,,7} - On Controller 0 set precompensation to 1. - On Controller 2 set precompensation to 8. h](j )}(h precomp:{0x1}h]h precomp:{0x1}}hj!sbah}(h]h ]h"]h$]h&]hhuh1jhhhMhj!ubjq)}(h)On Controller 0 set precompensation to 1.h]h)On Controller 0 set precompensation to 1.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhj!ubj )}(hprecomp:{1,,7}h]hprecomp:{1,,7}}hj"sbah}(h]h ]h"]h$]h&]hhuh1jhhhMhj!ubj2 )}(hhh](j7 )}(h)On Controller 0 set precompensation to 1.h]jq)}(hj"h]h)On Controller 0 set precompensation to 1.}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhj"ubah}(h]h ]h"]h$]h&]uh1j6 hj"ubj7 )}(h*On Controller 2 set precompensation to 8. h]jq)}(h)On Controller 2 set precompensation to 8.h]h)On Controller 2 set precompensation to 8.}(hj-"hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhj)"ubah}(h]h ]h"]h$]h&]uh1j6 hj"ubeh}(h]h ]h"]h$]h&]j j uh1j1 hhhMhj!ubeh}(h]h ]h"]h$]h&]uh1jhhhMhj;!ubeh}(h]h ]h"]h$]h&]uh1jW hj)!ubeh}(h]h ]h"]h$]h&]uh1jA hhhMhj&!ubjB )}(hXslewrate: {value[,value...]} :Definition: Set IO Cell slew rate on a per-controller basis. Controllers may be omitted indicating that they should retain the default slew rate setting. :Possible Values: 0 - 15 :Default Value: Varies based on chip revision Examples: :: slewrate:{0x1} - On Controller 0 set slew rate to 1. :: slewrate :{1,,8} - On Controller 0 set slew rate to 1. - On Controller 2 set slew rate to 8. h](jH )}(hslewrate: {value[,value...]}h]hslewrate: {value[,value...]}}(hj]"hhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhMhjY"ubjX )}(hhh](jc)}(hhh](jh)}(hhh](jm)}(h Definitionh]h Definition}(hjt"hhhNhNubah}(h]h ]h"]h$]h&]uh1jlhjq"hhhKubj})}(hSet IO Cell slew rate on a per-controller basis. Controllers may be omitted indicating that they should retain the default slew rate setting. h]jq)}(hSet IO Cell slew rate on a per-controller basis. Controllers may be omitted indicating that they should retain the default slew rate setting.h]hSet IO Cell slew rate on a per-controller basis. Controllers may be omitted indicating that they should retain the default slew rate setting.}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhj"ubah}(h]h ]h"]h$]h&]uh1j|hjq"ubeh}(h]h ]h"]h$]h&]uh1jghhhMhjn"ubjh)}(hhh](jm)}(hPossible Valuesh]hPossible Values}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jlhj"hhhKubj})}(h0 - 15h]jq)}(hj"h]h0 - 15}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhj"ubah}(h]h ]h"]h$]h&]uh1j|hj"ubeh}(h]h ]h"]h$]h&]uh1jghhhMhjn"ubjh)}(hhh](jm)}(h Default Valueh]h Default Value}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jlhj"hhhKubj})}(hVaries based on chip revision h]jq)}(hVaries based on chip revisionh]hVaries based on chip revision}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhj"ubah}(h]h ]h"]h$]h&]uh1j|hj"ubeh}(h]h ]h"]h$]h&]uh1jghhhMhjn"ubeh}(h]h ]h"]h$]h&]uh1jbhjk"ubjq)}(h Examples:h]h Examples:}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhjk"ubj)}(h:: slewrate:{0x1} - On Controller 0 set slew rate to 1. :: slewrate :{1,,8} - On Controller 0 set slew rate to 1. - On Controller 2 set slew rate to 8. h](j )}(hslewrate:{0x1}h]hslewrate:{0x1}}hj#sbah}(h]h ]h"]h$]h&]hhuh1jhhhMhj#ubj2 )}(hhh]j7 )}(h$On Controller 0 set slew rate to 1. h]jq)}(h#On Controller 0 set slew rate to 1.h]h#On Controller 0 set slew rate to 1.}(hj*#hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhj&#ubah}(h]h ]h"]h$]h&]uh1j6 hj##ubah}(h]h ]h"]h$]h&]j j uh1j1 hhhMhj#ubj )}(hslewrate :{1,,8}h]hslewrate :{1,,8}}hjD#sbah}(h]h ]h"]h$]h&]hhuh1jhhhMhj#ubj2 )}(hhh](j7 )}(h#On Controller 0 set slew rate to 1.h]jq)}(hjW#h]h#On Controller 0 set slew rate to 1.}(hjY#hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhjU#ubah}(h]h ]h"]h$]h&]uh1j6 hjR#ubj7 )}(h$On Controller 2 set slew rate to 8. h]jq)}(h#On Controller 2 set slew rate to 8.h]h#On Controller 2 set slew rate to 8.}(hjp#hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhjl#ubah}(h]h ]h"]h$]h&]uh1j6 hjR#ubeh}(h]h ]h"]h$]h&]j j uh1j1 hhhMhj#ubeh}(h]h ]h"]h$]h&]uh1jhhhMhjk"ubeh}(h]h ]h"]h$]h&]uh1jW hjY"ubeh}(h]h ]h"]h$]h&]uh1jA hhhMhj&!hhubjB )}(hXamplitude: {value[,value...]} :Definition: Set IO Cell signal amplitude on a per-controller basis. Controllers may be omitted indicating that they should retain the default read streaming setting. :Possible Values: 1 - 7 :Default Value: Varies based on chip revision Examples: :: amplitude:{0x1} On Controller 0 set amplitude to 1. :: amplitude :{1,,7} - On Controller 0 set amplitude to 1. - On Controller 2 set amplitude to 7. h](jH )}(hamplitude: {value[,value...]}h]hamplitude: {value[,value...]}}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhMhj#ubjX )}(hhh](jc)}(hhh](jh)}(hhh](jm)}(h Definitionh]h Definition}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jlhj#hhhKubj})}(hSet IO Cell signal amplitude on a per-controller basis. Controllers may be omitted indicating that they should retain the default read streaming setting. h]jq)}(hSet IO Cell signal amplitude on a per-controller basis. Controllers may be omitted indicating that they should retain the default read streaming setting.h]hSet IO Cell signal amplitude on a per-controller basis. Controllers may be omitted indicating that they should retain the default read streaming setting.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhj#ubah}(h]h ]h"]h$]h&]uh1j|hj#ubeh}(h]h ]h"]h$]h&]uh1jghhhMhj#ubjh)}(hhh](jm)}(hPossible Valuesh]hPossible Values}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jlhj#hhhKubj})}(h1 - 7h]jq)}(hj#h]h1 - 7}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhj#ubah}(h]h ]h"]h$]h&]uh1j|hj#ubeh}(h]h ]h"]h$]h&]uh1jghhhMhj#ubjh)}(hhh](jm)}(h Default Valueh]h Default Value}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1jlhj$hhhKubj})}(hVaries based on chip revision h]jq)}(hVaries based on chip revisionh]hVaries based on chip revision}(hj&$hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhj"$ubah}(h]h ]h"]h$]h&]uh1j|hj$ubeh}(h]h ]h"]h$]h&]uh1jghhhMhj#ubeh}(h]h ]h"]h$]h&]uh1jbhj#ubjq)}(h Examples:h]h Examples:}(hjF$hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhj#ubj )}(hamplitude:{0x1}h]hamplitude:{0x1}}hjT$sbah}(h]h ]h"]h$]h&]hhuh1jhhhMhj#ubjq)}(h#On Controller 0 set amplitude to 1.h]h#On Controller 0 set amplitude to 1.}(hjb$hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhj#ubj )}(hamplitude :{1,,7}h]hamplitude :{1,,7}}hjp$sbah}(h]h ]h"]h$]h&]hhuh1jhhhMhj#ubj2 )}(hhh](j7 )}(h#On Controller 0 set amplitude to 1.h]jq)}(hj$h]h#On Controller 0 set amplitude to 1.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhj$ubah}(h]h ]h"]h$]h&]uh1j6 hj~$ubj7 )}(h$On Controller 2 set amplitude to 7. h]jq)}(h#On Controller 2 set amplitude to 7.h]h#On Controller 2 set amplitude to 7.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhj$ubah}(h]h ]h"]h$]h&]uh1j6 hj~$ubeh}(h]h ]h"]h$]h&]j j uh1j1 hhhMhj#ubeh}(h]h ]h"]h$]h&]uh1jW hj#ubeh}(h]h ]h"]h$]h&]uh1jA hhhMhj&!hhubeh}(h]h ]h"]h$]h&]uh1j< hjhhhhhNubjq)}(h Example::h]hExample:}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhjhhubj )}(h2options aic79xx aic79xx=verbose,rd_strm:{{0x0041}}h]h2options aic79xx aic79xx=verbose,rd_strm:{{0x0041}}}hj$sbah}(h]h ]h"]h$]h&]hhuh1jhhhMhjhhubjq)}(heenables verbose output in the driver and turns read streaming on for targets 0 and 6 of Controller 0.h]heenables verbose output in the driver and turns read streaming on for targets 0 and 6 of Controller 0.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhjhhubeh}(h]command-line-optionsah ]h"]3. command line optionsah$]h&]uh1j[hj]hhhhhKubj\)}(hhh](ja)}(h4. Additional Notesh]h4. Additional Notes}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j`hj$hhhhhMubj\)}(hhh](ja)}(h#4.1. Known/Unresolved or FYI Issuesh]h#4.1. Known/Unresolved or FYI Issues}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j`hj %hhhhhMubj)}(h* Under SuSE Linux Enterprise 7, the driver may fail to operate correctly due to a problem with PCI interrupt routing in the Linux kernel. Please contact SuSE for an updated Linux kernel. h]j2 )}(hhh]j7 )}(hUnder SuSE Linux Enterprise 7, the driver may fail to operate correctly due to a problem with PCI interrupt routing in the Linux kernel. Please contact SuSE for an updated Linux kernel. h]jq)}(hUnder SuSE Linux Enterprise 7, the driver may fail to operate correctly due to a problem with PCI interrupt routing in the Linux kernel. Please contact SuSE for an updated Linux kernel.h]hUnder SuSE Linux Enterprise 7, the driver may fail to operate correctly due to a problem with PCI interrupt routing in the Linux kernel. Please contact SuSE for an updated Linux kernel.}(hj'%hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhj#%ubah}(h]h ]h"]h$]h&]uh1j6 hj %ubah}(h]h ]h"]h$]h&]j juh1j1 hhhMhj%ubah}(h]h ]h"]h$]h&]uh1jhhhMhj %hhubeh}(h]known-unresolved-or-fyi-issuesah ]h"]#4.1. known/unresolved or fyi issuesah$]h&]uh1j[hj$hhhhhMubj\)}(hhh](ja)}(h%4.2. Third-Party Compatibility Issuesh]h%4.2. Third-Party Compatibility Issues}(hjR%hhhNhNubah}(h]h ]h"]h$]h&]uh1j`hjO%hhhhhMubj)}(h* Adaptec only supports Ultra320 hard drives running the latest firmware available. Please check with your hard drive manufacturer to ensure you have the latest version. h]j2 )}(hhh]j7 )}(hAdaptec only supports Ultra320 hard drives running the latest firmware available. Please check with your hard drive manufacturer to ensure you have the latest version. h]jq)}(hAdaptec only supports Ultra320 hard drives running the latest firmware available. Please check with your hard drive manufacturer to ensure you have the latest version.h]hAdaptec only supports Ultra320 hard drives running the latest firmware available. Please check with your hard drive manufacturer to ensure you have the latest version.}(hjk%hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhjg%ubah}(h]h ]h"]h$]h&]uh1j6 hjd%ubah}(h]h ]h"]h$]h&]j juh1j1 hhhMhj`%ubah}(h]h ]h"]h$]h&]uh1jhhhMhjO%hhubeh}(h] third-party-compatibility-issuesah ]h"]%4.2. third-party compatibility issuesah$]h&]uh1j[hj$hhhhhMubj\)}(hhh](ja)}(h/4.3. Operating System or Technology Limitationsh]h/4.3. Operating System or Technology Limitations}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1j`hj%hhhhhMubj)}(hX(* PCI Hot Plug is untested and may cause the operating system to stop responding. * Luns that are not numbered contiguously starting with 0 might not be automatically probed during system startup. This is a limitation of the OS. Please contact your Linux vendor for instructions on manually probing non-contiguous luns. * Using the Driver Update Disk version of this package during OS installation under RedHat might result in two versions of this driver being installed into the system module directory. This might cause problems with the /sbin/mkinitrd program and/or other RPM packages that try to install system modules. The best way to correct this once the system is running is to install the latest RPM package version of this driver, available from http://www.adaptec.com. h]j2 )}(hhh](j7 )}(hOPCI Hot Plug is untested and may cause the operating system to stop responding.h]jq)}(hOPCI Hot Plug is untested and may cause the operating system to stop responding.h]hOPCI Hot Plug is untested and may cause the operating system to stop responding.}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhj%ubah}(h]h ]h"]h$]h&]uh1j6 hj%ubj7 )}(hLuns that are not numbered contiguously starting with 0 might not be automatically probed during system startup. This is a limitation of the OS. Please contact your Linux vendor for instructions on manually probing non-contiguous luns.h]jq)}(hLuns that are not numbered contiguously starting with 0 might not be automatically probed during system startup. This is a limitation of the OS. Please contact your Linux vendor for instructions on manually probing non-contiguous luns.h]hLuns that are not numbered contiguously starting with 0 might not be automatically probed during system startup. This is a limitation of the OS. Please contact your Linux vendor for instructions on manually probing non-contiguous luns.}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhj%ubah}(h]h ]h"]h$]h&]uh1j6 hj%ubj7 )}(hXUsing the Driver Update Disk version of this package during OS installation under RedHat might result in two versions of this driver being installed into the system module directory. This might cause problems with the /sbin/mkinitrd program and/or other RPM packages that try to install system modules. The best way to correct this once the system is running is to install the latest RPM package version of this driver, available from http://www.adaptec.com. h]jq)}(hXUsing the Driver Update Disk version of this package during OS installation under RedHat might result in two versions of this driver being installed into the system module directory. This might cause problems with the /sbin/mkinitrd program and/or other RPM packages that try to install system modules. The best way to correct this once the system is running is to install the latest RPM package version of this driver, available from http://www.adaptec.com.h](hXUsing the Driver Update Disk version of this package during OS installation under RedHat might result in two versions of this driver being installed into the system module directory. This might cause problems with the /sbin/mkinitrd program and/or other RPM packages that try to install system modules. The best way to correct this once the system is running is to install the latest RPM package version of this driver, available from }(hj%hhhNhNubh reference)}(hhttp://www.adaptec.comh]hhttp://www.adaptec.com}(hj%hhhNhNubah}(h]h ]h"]h$]h&]refurij%uh1j%hj%ubh.}(hj%hhhNhNubeh}(h]h ]h"]h$]h&]uh1jphhhMhj%ubah}(h]h ]h"]h$]h&]uh1j6 hj%ubeh}(h]h ]h"]h$]h&]j juh1j1 hhhMhj%ubah}(h]h ]h"]h$]h&]uh1jhhhMhj%hhubeh}(h]*operating-system-or-technology-limitationsah ]h"]/4.3. operating system or technology limitationsah$]h&]uh1j[hj$hhhhhMubeh}(h]additional-notesah ]h"]4. additional notesah$]h&]uh1j[hj]hhhhhMubj\)}(hhh](ja)}(h5. Adaptec Customer Supporth]h5. Adaptec Customer Support}(hj'&hhhNhNubah}(h]h ]h"]h$]h&]uh1j`hj$&hhhhhMubj)}(hXA Technical Support Identification (TSID) Number is required for Adaptec technical support. - The 12-digit TSID can be found on the white barcode-type label included inside the box with your product. The TSID helps us provide more efficient service by accurately identifying your product and support status. Support Options - Search the Adaptec Support Knowledgebase (ASK) at http://ask.adaptec.com for articles, troubleshooting tips, and frequently asked questions about your product. - For support via Email, submit your question to Adaptec's Technical Support Specialists at http://ask.adaptec.com/. North America - Visit our Web site at http://www.adaptec.com/. - For information about Adaptec's support options, call 408-957-2550, 24 hours a day, 7 days a week. - To speak with a Technical Support Specialist, * For hardware products, call 408-934-7274, Monday to Friday, 3:00 am to 5:00 pm, PDT. * For RAID and Fibre Channel products, call 321-207-2000, Monday to Friday, 3:00 am to 5:00 pm, PDT. To expedite your service, have your computer with you. - To order Adaptec products, including accessories and cables, call 408-957-7274. To order cables online go to http://www.adaptec.com/buy-cables/. Europe - Visit our Web site at http://www.adaptec.com/en-US/_common/world_index. - To speak with a Technical Support Specialist, call, or email, * German: +49 89 4366 5522, Monday-Friday, 9:00-17:00 CET, http://ask-de.adaptec.com/. * French: +49 89 4366 5533, Monday-Friday, 9:00-17:00 CET, http://ask-fr.adaptec.com/. * English: +49 89 4366 5544, Monday-Friday, 9:00-17:00 GMT, http://ask.adaptec.com/. - You can order Adaptec cables online at http://www.adaptec.com/buy-cables/. Japan - Visit our web site at http://www.adaptec.co.jp/. - To speak with a Technical Support Specialist, call +81 3 5308 6120, Monday-Friday, 9:00 a.m. to 12:00 p.m., 1:00 p.m. to 6:00 p.m. h](jq)}(h[A Technical Support Identification (TSID) Number is required for Adaptec technical support.h]h[A Technical Support Identification (TSID) Number is required for Adaptec technical support.}(hj9&hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhj5&ubj)}(h- The 12-digit TSID can be found on the white barcode-type label included inside the box with your product. The TSID helps us provide more efficient service by accurately identifying your product and support status. h]j2 )}(hhh]j7 )}(hThe 12-digit TSID can be found on the white barcode-type label included inside the box with your product. The TSID helps us provide more efficient service by accurately identifying your product and support status. h]jq)}(hThe 12-digit TSID can be found on the white barcode-type label included inside the box with your product. The TSID helps us provide more efficient service by accurately identifying your product and support status.h]hThe 12-digit TSID can be found on the white barcode-type label included inside the box with your product. The TSID helps us provide more efficient service by accurately identifying your product and support status.}(hjR&hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhjN&ubah}(h]h ]h"]h$]h&]uh1j6 hjK&ubah}(h]h ]h"]h$]h&]j j uh1j1 hhhMhjG&ubah}(h]h ]h"]h$]h&]uh1jhhhMhj5&ubj= )}(hhh](jB )}(hX-Support Options - Search the Adaptec Support Knowledgebase (ASK) at http://ask.adaptec.com for articles, troubleshooting tips, and frequently asked questions about your product. - For support via Email, submit your question to Adaptec's Technical Support Specialists at http://ask.adaptec.com/. h](jH )}(hSupport Optionsh]hSupport Options}(hjy&hhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhMhju&ubjX )}(hhh]j2 )}(hhh](j7 )}(hSearch the Adaptec Support Knowledgebase (ASK) at http://ask.adaptec.com for articles, troubleshooting tips, and frequently asked questions about your product.h]jq)}(hSearch the Adaptec Support Knowledgebase (ASK) at http://ask.adaptec.com for articles, troubleshooting tips, and frequently asked questions about your product.h](h2Search the Adaptec Support Knowledgebase (ASK) at }(hj&hhhNhNubj%)}(hhttp://ask.adaptec.comh]hhttp://ask.adaptec.com}(hj&hhhNhNubah}(h]h ]h"]h$]h&]refurij&uh1j%hj&ubhW for articles, troubleshooting tips, and frequently asked questions about your product.}(hj&hhhNhNubeh}(h]h ]h"]h$]h&]uh1jphhhM hj&ubah}(h]h ]h"]h$]h&]uh1j6 hj&ubj7 )}(hsFor support via Email, submit your question to Adaptec's Technical Support Specialists at http://ask.adaptec.com/. h]jq)}(hrFor support via Email, submit your question to Adaptec's Technical Support Specialists at http://ask.adaptec.com/.h](h\For support via Email, submit your question to Adaptec’s Technical Support Specialists at }(hj&hhhNhNubj%)}(hhttp://ask.adaptec.com/h]hhttp://ask.adaptec.com/}(hj&hhhNhNubah}(h]h ]h"]h$]h&]refurij&uh1j%hj&ubh.}(hj&hhhNhNubeh}(h]h ]h"]h$]h&]uh1jphhhMhj&ubah}(h]h ]h"]h$]h&]uh1j6 hj&ubeh}(h]h ]h"]h$]h&]j j uh1j1 hhhM hj&ubah}(h]h ]h"]h$]h&]uh1jW hju&ubeh}(h]h ]h"]h$]h&]uh1jA hhhMhjr&ubjB )}(hXqNorth America - Visit our Web site at http://www.adaptec.com/. - For information about Adaptec's support options, call 408-957-2550, 24 hours a day, 7 days a week. - To speak with a Technical Support Specialist, * For hardware products, call 408-934-7274, Monday to Friday, 3:00 am to 5:00 pm, PDT. * For RAID and Fibre Channel products, call 321-207-2000, Monday to Friday, 3:00 am to 5:00 pm, PDT. To expedite your service, have your computer with you. - To order Adaptec products, including accessories and cables, call 408-957-7274. To order cables online go to http://www.adaptec.com/buy-cables/. h](jH )}(h North Americah]h North America}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhMhj&ubjX )}(hhh]j2 )}(hhh](j7 )}(h.Visit our Web site at http://www.adaptec.com/.h]jq)}(hj'h](hVisit our Web site at }(hj'hhhNhNubj%)}(hhttp://www.adaptec.com/h]hhttp://www.adaptec.com/}(hj'hhhNhNubah}(h]h ]h"]h$]h&]refurij'uh1j%hj'ubh.}(hj'hhhNhNubeh}(h]h ]h"]h$]h&]uh1jphhhMhj 'ubah}(h]h ]h"]h$]h&]uh1j6 hj 'ubj7 )}(hbFor information about Adaptec's support options, call 408-957-2550, 24 hours a day, 7 days a week.h]jq)}(hbFor information about Adaptec's support options, call 408-957-2550, 24 hours a day, 7 days a week.h]hdFor information about Adaptec’s support options, call 408-957-2550, 24 hours a day, 7 days a week.}(hj;'hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhj7'ubah}(h]h ]h"]h$]h&]uh1j6 hj 'ubj7 )}(hX&To speak with a Technical Support Specialist, * For hardware products, call 408-934-7274, Monday to Friday, 3:00 am to 5:00 pm, PDT. * For RAID and Fibre Channel products, call 321-207-2000, Monday to Friday, 3:00 am to 5:00 pm, PDT. To expedite your service, have your computer with you.h](jq)}(h-To speak with a Technical Support Specialist,h]h-To speak with a Technical Support Specialist,}(hjS'hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhjO'ubj2 )}(hhh](j7 )}(hTFor hardware products, call 408-934-7274, Monday to Friday, 3:00 am to 5:00 pm, PDT.h]jq)}(hTFor hardware products, call 408-934-7274, Monday to Friday, 3:00 am to 5:00 pm, PDT.h]hTFor hardware products, call 408-934-7274, Monday to Friday, 3:00 am to 5:00 pm, PDT.}(hjh'hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhjd'ubah}(h]h ]h"]h$]h&]uh1j6 hja'ubj7 )}(hcFor RAID and Fibre Channel products, call 321-207-2000, Monday to Friday, 3:00 am to 5:00 pm, PDT. h]jq)}(hbFor RAID and Fibre Channel products, call 321-207-2000, Monday to Friday, 3:00 am to 5:00 pm, PDT.h]hbFor RAID and Fibre Channel products, call 321-207-2000, Monday to Friday, 3:00 am to 5:00 pm, PDT.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhj|'ubah}(h]h ]h"]h$]h&]uh1j6 hja'ubeh}(h]h ]h"]h$]h&]j juh1j1 hhhMhjO'ubjq)}(h6To expedite your service, have your computer with you.h]h6To expedite your service, have your computer with you.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMhjO'ubeh}(h]h ]h"]h$]h&]uh1j6 hj 'ubj7 )}(hTo order Adaptec products, including accessories and cables, call 408-957-7274. To order cables online go to http://www.adaptec.com/buy-cables/. h]jq)}(hTo order Adaptec products, including accessories and cables, call 408-957-7274. To order cables online go to http://www.adaptec.com/buy-cables/.h](hnTo order Adaptec products, including accessories and cables, call 408-957-7274. To order cables online go to }(hj'hhhNhNubj%)}(h"http://www.adaptec.com/buy-cables/h]h"http://www.adaptec.com/buy-cables/}(hj'hhhNhNubah}(h]h ]h"]h$]h&]refurij'uh1j%hj'ubh.}(hj'hhhNhNubeh}(h]h ]h"]h$]h&]uh1jphhhMhj'ubah}(h]h ]h"]h$]h&]uh1j6 hj 'ubeh}(h]h ]h"]h$]h&]j j uh1j1 hhhMhj'ubah}(h]h ]h"]h$]h&]uh1jW hj&ubeh}(h]h ]h"]h$]h&]uh1jA hhhMhjr&ubjB )}(hXEurope - Visit our Web site at http://www.adaptec.com/en-US/_common/world_index. - To speak with a Technical Support Specialist, call, or email, * German: +49 89 4366 5522, Monday-Friday, 9:00-17:00 CET, http://ask-de.adaptec.com/. * French: +49 89 4366 5533, Monday-Friday, 9:00-17:00 CET, http://ask-fr.adaptec.com/. * English: +49 89 4366 5544, Monday-Friday, 9:00-17:00 GMT, http://ask.adaptec.com/. - You can order Adaptec cables online at http://www.adaptec.com/buy-cables/. h](jH )}(hEuropeh]hEurope}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhM-hj'ubjX )}(hhh]j2 )}(hhh](j7 )}(hGVisit our Web site at http://www.adaptec.com/en-US/_common/world_index.h]jq)}(hj(h](hVisit our Web site at }(hj(hhhNhNubj%)}(h0http://www.adaptec.com/en-US/_common/world_indexh]h0http://www.adaptec.com/en-US/_common/world_index}(hj(hhhNhNubah}(h]h ]h"]h$]h&]refurij(uh1j%hj(ubh.}(hj(hhhNhNubeh}(h]h ]h"]h$]h&]uh1jphhhM"hj(ubah}(h]h ]h"]h$]h&]uh1j6 hj(ubj7 )}(hXJTo speak with a Technical Support Specialist, call, or email, * German: +49 89 4366 5522, Monday-Friday, 9:00-17:00 CET, http://ask-de.adaptec.com/. * French: +49 89 4366 5533, Monday-Friday, 9:00-17:00 CET, http://ask-fr.adaptec.com/. * English: +49 89 4366 5544, Monday-Friday, 9:00-17:00 GMT, http://ask.adaptec.com/. h](jq)}(h=To speak with a Technical Support Specialist, call, or email,h]h=To speak with a Technical Support Specialist, call, or email,}(hj1(hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhM#hj-(ubj2 )}(hhh](j7 )}(hUGerman: +49 89 4366 5522, Monday-Friday, 9:00-17:00 CET, http://ask-de.adaptec.com/.h]jq)}(hUGerman: +49 89 4366 5522, Monday-Friday, 9:00-17:00 CET, http://ask-de.adaptec.com/.h](h:German: +49 89 4366 5522, Monday-Friday, 9:00-17:00 CET, }(hjF(hhhNhNubj%)}(hhttp://ask-de.adaptec.com/h]hhttp://ask-de.adaptec.com/}(hjN(hhhNhNubah}(h]h ]h"]h$]h&]refurijP(uh1j%hjF(ubh.}(hjF(hhhNhNubeh}(h]h ]h"]h$]h&]uh1jphhhM%hjB(ubah}(h]h ]h"]h$]h&]uh1j6 hj?(ubj7 )}(hUFrench: +49 89 4366 5533, Monday-Friday, 9:00-17:00 CET, http://ask-fr.adaptec.com/.h]jq)}(hUFrench: +49 89 4366 5533, Monday-Friday, 9:00-17:00 CET, http://ask-fr.adaptec.com/.h](h:French: +49 89 4366 5533, Monday-Friday, 9:00-17:00 CET, }(hjq(hhhNhNubj%)}(hhttp://ask-fr.adaptec.com/h]hhttp://ask-fr.adaptec.com/}(hjy(hhhNhNubah}(h]h ]h"]h$]h&]refurij{(uh1j%hjq(ubh.}(hjq(hhhNhNubeh}(h]h ]h"]h$]h&]uh1jphhhM'hjm(ubah}(h]h ]h"]h$]h&]uh1j6 hj?(ubj7 )}(hSEnglish: +49 89 4366 5544, Monday-Friday, 9:00-17:00 GMT, http://ask.adaptec.com/. h]jq)}(hREnglish: +49 89 4366 5544, Monday-Friday, 9:00-17:00 GMT, http://ask.adaptec.com/.h](h:English: +49 89 4366 5544, Monday-Friday, 9:00-17:00 GMT, }(hj(hhhNhNubj%)}(hhttp://ask.adaptec.com/h]hhttp://ask.adaptec.com/}(hj(hhhNhNubah}(h]h ]h"]h$]h&]refurij(uh1j%hj(ubh.}(hj(hhhNhNubeh}(h]h ]h"]h$]h&]uh1jphhhM)hj(ubah}(h]h ]h"]h$]h&]uh1j6 hj?(ubeh}(h]h ]h"]h$]h&]j juh1j1 hhhM%hj-(ubeh}(h]h ]h"]h$]h&]uh1j6 hj(ubj7 )}(hKYou can order Adaptec cables online at http://www.adaptec.com/buy-cables/. h]jq)}(hJYou can order Adaptec cables online at http://www.adaptec.com/buy-cables/.h](h'You can order Adaptec cables online at }(hj(hhhNhNubj%)}(h"http://www.adaptec.com/buy-cables/h]h"http://www.adaptec.com/buy-cables/}(hj(hhhNhNubah}(h]h ]h"]h$]h&]refurij(uh1j%hj(ubh.}(hj(hhhNhNubeh}(h]h ]h"]h$]h&]uh1jphhhM,hj(ubah}(h]h ]h"]h$]h&]uh1j6 hj(ubeh}(h]h ]h"]h$]h&]j j uh1j1 hhhM"hj'ubah}(h]h ]h"]h$]h&]uh1jW hj'ubeh}(h]h ]h"]h$]h&]uh1jA hhhM-hjr&ubjB )}(hJapan - Visit our web site at http://www.adaptec.co.jp/. - To speak with a Technical Support Specialist, call +81 3 5308 6120, Monday-Friday, 9:00 a.m. to 12:00 p.m., 1:00 p.m. to 6:00 p.m. h](jH )}(hJapanh]hJapan}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jG hhhM3hj )ubjX )}(hhh]j2 )}(hhh](j7 )}(h0Visit our web site at http://www.adaptec.co.jp/.h]jq)}(hj&)h](hVisit our web site at }(hj()hhhNhNubj%)}(hhttp://www.adaptec.co.jp/h]hhttp://www.adaptec.co.jp/}(hj/)hhhNhNubah}(h]h ]h"]h$]h&]refurij1)uh1j%hj()ubh.}(hj()hhhNhNubeh}(h]h ]h"]h$]h&]uh1jphhhM0hj$)ubah}(h]h ]h"]h$]h&]uh1j6 hj!)ubj7 )}(hTo speak with a Technical Support Specialist, call +81 3 5308 6120, Monday-Friday, 9:00 a.m. to 12:00 p.m., 1:00 p.m. to 6:00 p.m. h]jq)}(hTo speak with a Technical Support Specialist, call +81 3 5308 6120, Monday-Friday, 9:00 a.m. to 12:00 p.m., 1:00 p.m. to 6:00 p.m.h]hTo speak with a Technical Support Specialist, call +81 3 5308 6120, Monday-Friday, 9:00 a.m. to 12:00 p.m., 1:00 p.m. to 6:00 p.m.}(hjR)hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhM1hjN)ubah}(h]h ]h"]h$]h&]uh1j6 hj!)ubeh}(h]h ]h"]h$]h&]j j uh1j1 hhhM0hj)ubah}(h]h ]h"]h$]h&]uh1jW hj )ubeh}(h]h ]h"]h$]h&]uh1jA hhhM3hjr&ubeh}(h]h ]h"]h$]h&]uh1j< hj5&ubeh}(h]h ]h"]h$]h&]uh1jhhhMhj$&hhubjq)}(heCopyright |copy| 2003 Adaptec Inc. 691 S. Milpitas Blvd., Milpitas CA 95035 USA. All rights reserved.h](h Copyright }(hj)hhhNhNubh©}(hj)hhhNhNubhU 2003 Adaptec Inc. 691 S. Milpitas Blvd., Milpitas CA 95035 USA. All rights reserved.}(hj)hhhNhNubeh}(h]h ]h"]h$]h&]uh1jphhhM5hj$&hhubjq)}(hYou are permitted to redistribute, use and modify this README file in whole or in part in conjunction with redistribution of software governed by the General Public License, provided that the following conditions are met:h]hYou are permitted to redistribute, use and modify this README file in whole or in part in conjunction with redistribution of software governed by the General Public License, provided that the following conditions are met:}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhM8hj$&hhubhenumerated_list)}(hhh](j7 )}(hRedistributions of README file must retain the above copyright notice, this list of conditions, and the following disclaimer, without modification.h]jq)}(hRedistributions of README file must retain the above copyright notice, this list of conditions, and the following disclaimer, without modification.h]hRedistributions of README file must retain the above copyright notice, this list of conditions, and the following disclaimer, without modification.}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhM<hj)ubah}(h]h ]h"]h$]h&]uh1j6 hj)hhhhhNubj7 )}(hThe name of the author may not be used to endorse or promote products derived from this software without specific prior written permission.h]jq)}(hThe name of the author may not be used to endorse or promote products derived from this software without specific prior written permission.h]hThe name of the author may not be used to endorse or promote products derived from this software without specific prior written permission.}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhM?hj)ubah}(h]h ]h"]h$]h&]uh1j6 hj)hhhhhNubj7 )}(hX5Modifications or new contributions must be attributed in a copyright notice identifying the author ("Contributor") and added below the original copyright notice. The copyright notice is for purposes of identifying contributors and should not be deemed as permission to alter the permissions given by Adaptec. h]jq)}(hX4Modifications or new contributions must be attributed in a copyright notice identifying the author ("Contributor") and added below the original copyright notice. The copyright notice is for purposes of identifying contributors and should not be deemed as permission to alter the permissions given by Adaptec.h]hX8Modifications or new contributions must be attributed in a copyright notice identifying the author (“Contributor”) and added below the original copyright notice. The copyright notice is for purposes of identifying contributors and should not be deemed as permission to alter the permissions given by Adaptec.}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jphhhMAhj)ubah}(h]h ]h"]h$]h&]uh1j6 hj)hhhhhNubeh}(h]h ]h"]h$]h&]enumtypearabicprefixhsuffix.uh1j)hj$&hhhhhM<ubjq)}(hXTHIS README FILE IS PROVIDED BY ADAPTEC AND CONTRIBUTORS ``AS IS`` AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ANY WARRANTIES OF NON-INFRINGEMENT OR THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ADAPTEC OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS README FILE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.h](h9THIS README FILE IS PROVIDED BY ADAPTEC AND CONTRIBUTORS }(hj*hhhNhNubj)}(h ``AS IS``h]hAS IS}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj*ubhX AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ANY WARRANTIES OF NON-INFRINGEMENT OR THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 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