Usphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget/translations/zh_CN/scsi/53c700modnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget/translations/zh_TW/scsi/53c700modnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget/translations/it_IT/scsi/53c700modnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget/translations/ja_JP/scsi/53c700modnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget/translations/ko_KR/scsi/53c700modnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget/translations/sp_SP/scsi/53c700modnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhcomment)}(h SPDX-License-Identifier: GPL-2.0h]h SPDX-License-Identifier: GPL-2.0}hhsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1hhhhhh9/var/lib/git/docbuild/linux/Documentation/scsi/53c700.rsthKubhsection)}(hhh](htitle)}(hThe 53c700 Driver Notesh]hThe 53c700 Driver Notes}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hGeneral Descriptionh]hGeneral Description}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh paragraph)}(hThis driver supports the 53c700 and 53c700-66 chips. It also supports the 53c710 but only in 53c700 emulation mode. It is full featured and does sync (-66 and 710 only), disconnects and tag command queueing.h]hThis driver supports the 53c700 and 53c700-66 chips. It also supports the 53c710 but only in 53c700 emulation mode. It is full featured and does sync (-66 and 710 only), disconnects and tag command queueing.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hhhhubh)}(hSince the 53c700 must be interfaced to a bus, you need to wrapper the card detector around this driver. For an example, see the NCR_D700.[ch] or lasi700.[ch] files.h]hSince the 53c700 must be interfaced to a bus, you need to wrapper the card detector around this driver. For an example, see the NCR_D700.[ch] or lasi700.[ch] files.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hiThe comments in the 53c700.[ch] files tell you which parts you need to fill in to get the driver working.h]hiThe comments in the 53c700.[ch] files tell you which parts you need to fill in to get the driver working.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubeh}(h]general-descriptionah ]h"]general descriptionah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hCompile Time Flagsh]hCompile Time Flags}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hA compile time flag is::h]hA compile time flag is:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh literal_block)}(hCONFIG_53C700_LE_ON_BEh]hCONFIG_53C700_LE_ON_BE}hj/sbah}(h]h ]h"]h$]h&]hhuh1j-hhhKhjhhubh)}(hxdefine if the chipset must be supported in little endian mode on a big endian architecture (used for the 700 on parisc).h]hxdefine if the chipset must be supported in little endian mode on a big endian architecture (used for the 700 on parisc).}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubeh}(h]compile-time-flagsah ]h"]compile time flagsah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hUsing the Chip Core Driverh]hUsing the Chip Core Driver}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjShhhhhK"ubh)}(hIn order to plumb the 53c700 chip core driver into a working SCSI driver, you need to know three things about the way the chip is wired into your system (or expansion card).h]hIn order to plumb the 53c700 chip core driver into a working SCSI driver, you need to know three things about the way the chip is wired into your system (or expansion card).}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK$hjShhubhenumerated_list)}(hhh](h list_item)}(h The clock speed of the SCSI coreh]h)}(hj{h]h The clock speed of the SCSI core}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK(hjyubah}(h]h ]h"]h$]h&]uh1jwhjthhhhhNubjx)}(hThe interrupt line usedh]h)}(hjh]hThe interrupt line used}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK)hjubah}(h]h ]h"]h$]h&]uh1jwhjthhhhhNubjx)}(h;The memory (or io space) location of the 53c700 registers. h]h)}(h:The memory (or io space) location of the 53c700 registers.h]h:The memory (or io space) location of the 53c700 registers.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK*hjubah}(h]h ]h"]h$]h&]uh1jwhjthhhhhNubeh}(h]h ]h"]h$]h&]enumtypearabicprefixhsuffix.uh1jrhjShhhhhK(ubh)}(hOptionally, you may also need to know other things, like how to read the SCSI Id from the card bios or whether the chip is wired for differential operation.h]hOptionally, you may also need to know other things, like how to read the SCSI Id from the card bios or whether the chip is wired for differential operation.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK,hjShhubh)}(hUsually you can find items 2. and 3. from general spec. documents or even by examining the configuration of a working driver under another operating system.h]hUsually you can find items 2. and 3. from general spec. documents or even by examining the configuration of a working driver under another operating system.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK0hjShhubh)}(hXThe clock speed is usually buried deep in the technical literature. It is required because it is used to set up both the synchronous and asynchronous dividers for the chip. As a general rule of thumb, manufacturers set the clock speed at the lowest possible setting consistent with the best operation of the chip (although some choose to drive it off the CPU or bus clock rather than going to the expense of an extra clock chip). The best operation clock speeds are:h]hXThe clock speed is usually buried deep in the technical literature. It is required because it is used to set up both the synchronous and asynchronous dividers for the chip. As a general rule of thumb, manufacturers set the clock speed at the lowest possible setting consistent with the best operation of the chip (although some choose to drive it off the CPU or bus clock rather than going to the expense of an extra clock chip). The best operation clock speeds are:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK4hjShhubhtable)}(hhh]htgroup)}(hhh](hcolspec)}(hhh]h}(h]h ]h"]h$]h&]colwidthK uh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjubhtbody)}(hhh](hrow)}(hhh](hentry)}(hhh]h)}(h53c700h]h53c700}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK=hj ubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h25MHzh]h25MHz}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK=hj7ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(h 53c700-66h]h 53c700-66}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK>hjWubah}(h]h ]h"]h$]h&]uh1jhjTubj)}(hhh]h)}(h50MHzh]h50MHz}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK>hjnubah}(h]h ]h"]h$]h&]uh1jhjTubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(h53c710h]h53c710}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK?hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h40Mhzh]h40Mhz}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK?hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]colsKuh1jhjubah}(h]h ]h"]h$]h&]uh1jhjShhhhhNubeh}(h]using-the-chip-core-driverah ]h"]using the chip core driverah$]h&]uh1hhhhhhhhK"ubh)}(hhh](h)}(hWriting Your Glue Driverh]hWriting Your Glue Driver}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKCubh)}(hThis will be a standard SCSI driver (I don't know of a good document describing this, just copy from some other driver) with at least a detect and release entry.h]hThis will be a standard SCSI driver (I don’t know of a good document describing this, just copy from some other driver) with at least a detect and release entry.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKEhjhhubh)}(hXIn the detect routine, you need to allocate a struct NCR_700_Host_Parameters sized memory area and clear it (so that the default values for everything are 0). Then you must fill in the parameters that matter to you (see below), plumb the NCR_700_intr routine into the interrupt line and call NCR_700_detect with the host template and the new parameters as arguments. You should also call the relevant request_*_region function and place the register base address into the 'base' pointer of the host parameters.h]hXIn the detect routine, you need to allocate a struct NCR_700_Host_Parameters sized memory area and clear it (so that the default values for everything are 0). Then you must fill in the parameters that matter to you (see below), plumb the NCR_700_intr routine into the interrupt line and call NCR_700_detect with the host template and the new parameters as arguments. You should also call the relevant request_*_region function and place the register base address into the ‘base’ pointer of the host parameters.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKIhjhhubh)}(hIn the release routine, you must free the NCR_700_Host_Parameters that you allocated, call the corresponding release_*_region and free the interrupt.h]hIn the release routine, you must free the NCR_700_Host_Parameters that you allocated, call the corresponding release_*_region and free the interrupt.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKRhjhhubh)}(hhh](h)}(hHandling Interruptsh]hHandling Interrupts}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKWubh)}(hCIn general, you should just plumb the card's interrupt line in withh]hEIn general, you should just plumb the card’s interrupt line in with}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKYhjhhubh)}(hArequest_irq(irq, NCR_700_intr, , , host);h]hArequest_irq(irq, NCR_700_intr, , , host);}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK[hjhhubh)}(hDwhere host is the return from the relevant NCR_700_detect() routine.h]hDwhere host is the return from the relevant NCR_700_detect() routine.}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK]hjhhubh)}(hXYou may also write your own interrupt handling routine which calls NCR_700_intr() directly. However, you should only really do this if you have a card with more than one chip on it and you can read a register to tell which set of chips wants the interrupt.h]hXYou may also write your own interrupt handling routine which calls NCR_700_intr() directly. However, you should only really do this if you have a card with more than one chip on it and you can read a register to tell which set of chips wants the interrupt.}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK_hjhhubeh}(h]handling-interruptsah ]h"]handling interruptsah$]h&]uh1hhjhhhhhKWubh)}(hhh](h)}(h Settable NCR_700_Host_Parametersh]h Settable NCR_700_Host_Parameters}(hjlhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjihhhhhKeubh)}(h9The following are a list of the user settable parameters:h]h9The following are a list of the user settable parameters:}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKghjihhubhdefinition_list)}(hhh](hdefinition_list_item)}(h>clock: (MANDATORY) Set to the clock speed of the chip in MHz. h](hterm)}(hclock: (MANDATORY)h]hclock: (MANDATORY)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKjhjubh definition)}(hhh]h)}(h*Set to the clock speed of the chip in MHz.h]h*Set to the clock speed of the chip in MHz.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKjhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKjhjubj)}(hbase: (MANDATORY) Set to the base of the io or mem region for the register set. On 64 bit architectures this is only 32 bits wide, so the registers must be mapped into the low 32 bits of memory. h](j)}(hbase: (MANDATORY)h]hbase: (MANDATORY)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKohjubj)}(hhh]h)}(hSet to the base of the io or mem region for the register set. On 64 bit architectures this is only 32 bits wide, so the registers must be mapped into the low 32 bits of memory.h]hSet to the base of the io or mem region for the register set. On 64 bit architectures this is only 32 bits wide, so the registers must be mapped into the low 32 bits of memory.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKmhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKohjhhubj)}(hpci_dev: (OPTIONAL) Set to the PCI board device. Leave NULL for a non-pci board. This is used for the pci_alloc_consistent() and pci_map_*() functions. h](j)}(hpci_dev: (OPTIONAL)h]hpci_dev: (OPTIONAL)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKshjubj)}(hhh]h)}(hSet to the PCI board device. Leave NULL for a non-pci board. This is used for the pci_alloc_consistent() and pci_map_*() functions.h]hSet to the PCI board device. Leave NULL for a non-pci board. This is used for the pci_alloc_consistent() and pci_map_*() functions.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKrhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKshjhhubj)}(hX1dmode_extra: (OPTIONAL, 53c710 only) Extra flags for the DMODE register. These are used to control bus output pins on the 710. The settings should be a combination of DMODE_FC1 and DMODE_FC2. What these pins actually do is entirely up to the board designer. Usually it is safe to ignore this setting. h](j)}(h$dmode_extra: (OPTIONAL, 53c710 only)h]h$dmode_extra: (OPTIONAL, 53c710 only)}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKyhj ubj)}(hhh]h)}(hX Extra flags for the DMODE register. These are used to control bus output pins on the 710. The settings should be a combination of DMODE_FC1 and DMODE_FC2. What these pins actually do is entirely up to the board designer. Usually it is safe to ignore this setting.h]hX Extra flags for the DMODE register. These are used to control bus output pins on the 710. The settings should be a combination of DMODE_FC1 and DMODE_FC2. What these pins actually do is entirely up to the board designer. Usually it is safe to ignore this setting.}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKvhj2ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhhhKyhjhhubj)}(hIdifferential: (OPTIONAL) Set to 1 if the chip drives a differential bus. h](j)}(hdifferential: (OPTIONAL)h]hdifferential: (OPTIONAL)}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhK|hjOubj)}(hhh]h)}(h/Set to 1 if the chip drives a differential bus.h]h/Set to 1 if the chip drives a differential bus.}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK|hjaubah}(h]h ]h"]h$]h&]uh1jhjOubeh}(h]h ]h"]h$]h&]uh1jhhhK|hjhhubj)}(hforce_le_on_be: (OPTIONAL, only if CONFIG_53C700_LE_ON_BE is set) Set to 1 if the chip is operating in little endian mode on a big endian architecture. h](j)}(hAforce_le_on_be: (OPTIONAL, only if CONFIG_53C700_LE_ON_BE is set)h]hAforce_le_on_be: (OPTIONAL, only if CONFIG_53C700_LE_ON_BE is set)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhj~ubj)}(hhh]h)}(hUSet to 1 if the chip is operating in little endian mode on a big endian architecture.h]hUSet to 1 if the chip is operating in little endian mode on a big endian architecture.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhj~ubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(h6chip710: (OPTIONAL) Set to 1 if the chip is a 53c710. h](j)}(hchip710: (OPTIONAL)h]hchip710: (OPTIONAL)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhjubj)}(hhh]h)}(h!Set to 1 if the chip is a 53c710.h]h!Set to 1 if the chip is a 53c710.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubj)}(hQburst_disable: (OPTIONAL, 53c710 only) Disable 8 byte bursting for DMA transfers.h](j)}(h&burst_disable: (OPTIONAL, 53c710 only)h]h&burst_disable: (OPTIONAL, 53c710 only)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhjubj)}(hhh]h)}(h*Disable 8 byte bursting for DMA transfers.h]h*Disable 8 byte bursting for DMA transfers.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjhhubeh}(h]h ]h"]h$]h&]uh1jhjihhhhhNubeh}(h] settable-ncr-700-host-parametersah ]h"] settable ncr_700_host_parametersah$]h&]uh1hhjhhhhhKeubeh}(h]writing-your-glue-driverah ]h"]writing your glue driverah$]h&]uh1hhhhhhhhKCubeh}(h]the-53c700-driver-notesah ]h"]the 53c700 driver notesah$]h&]uh1hhhhhhhhKubeh}(h]h ]h"]h$]h&]sourcehuh1hcurrent_sourceN current_lineNsettingsdocutils.frontendValues)}(hN generatorN datestampN source_linkN source_urlN toc_backlinksjfootnote_backlinksK sectnum_xformKstrip_commentsNstrip_elements_with_classesN strip_classesN report_levelK halt_levelKexit_status_levelKdebugNwarning_streamN tracebackinput_encoding utf-8-siginput_encoding_error_handlerstrictoutput_encodingutf-8output_encoding_error_handlerjKerror_encodingutf-8error_encoding_error_handlerbackslashreplace language_codeenrecord_dependenciesNconfigN id_prefixhauto_id_prefixid dump_settingsNdump_internalsNdump_transformsNdump_pseudo_xmlNexpose_internalsNstrict_visitorN_disable_configN_sourceh _destinationN _config_files]7/var/lib/git/docbuild/linux/Documentation/docutils.confafile_insertion_enabled raw_enabledKline_length_limitM'pep_referencesN pep_base_urlhttps://peps.python.org/pep_file_url_templatepep-%04drfc_referencesN rfc_base_url&https://datatracker.ietf.org/doc/html/ tab_widthKtrim_footnote_reference_spacesyntax_highlightlong smart_quotessmartquotes_locales]character_level_inline_markupdoctitle_xform docinfo_xformKsectsubtitle_xform image_loadinglinkembed_stylesheetcloak_email_addressessection_self_linkenvNubreporterNindirect_targets]substitution_defs}substitution_names}refnames}refids}nameids}(j&j#j jjPjMjjjjjfjcjju nametypes}(j&j jPjjjfjuh}(j#hjhjMjjjSjjjcjjjiu footnote_refs} citation_refs} autofootnotes]autofootnote_refs]symbol_footnotes]symbol_footnote_refs] footnotes] citations]autofootnote_startKsymbol_footnote_startK id_counter collectionsCounter}Rparse_messages]transform_messages] transformerN include_log] decorationNhhub.