sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget/translations/zh_CN/power/pcimodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget/translations/zh_TW/power/pcimodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget/translations/it_IT/power/pcimodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget/translations/ja_JP/power/pcimodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget/translations/ko_KR/power/pcimodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget/translations/sp_SP/power/pcimodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhsection)}(hhh](htitle)}(hPCI Power Managementh]hPCI Power Management}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhh7/var/lib/git/docbuild/linux/Documentation/power/pci.rsthKubh paragraph)}(h?Copyright (c) 2010 Rafael J. Wysocki , Novell Inc.h](h&Copyright (c) 2010 Rafael J. Wysocki <}(hhhhhNhNubh reference)}(h rjw@sisk.plh]h rjw@sisk.pl}(hhhhhNhNubah}(h]h ]h"]h$]h&]refurimailto:rjw@sisk.pluh1hhhubh>, Novell Inc.}(hhhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hAn overview of concepts and the Linux kernel's interfaces related to PCI power management. Based on previous work by Patrick Mochel (and others).h](hAn overview of concepts and the Linux kernel’s interfaces related to PCI power management. Based on previous work by Patrick Mochel <}(hhhhhNhNubh)}(hmochel@transmeta.comh]hmochel@transmeta.com}(hhhhhNhNubah}(h]h ]h"]h$]h&]refurimailto:mochel@transmeta.comuh1hhhubh> (and others).}(hhhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hXThis document only covers the aspects of power management specific to PCI devices. For general description of the kernel's interfaces related to device power management refer to Documentation/driver-api/pm/devices.rst and Documentation/power/runtime_pm.rst.h]hXThis document only covers the aspects of power management specific to PCI devices. For general description of the kernel’s interfaces related to device power management refer to Documentation/driver-api/pm/devices.rst and Documentation/power/runtime_pm.rst.}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hhhhubhcomment)}(hcontents: 1. Hardware and Platform Support for PCI Power Management 2. PCI Subsystem and Device Power Management 3. PCI Device Drivers and Power Management 4. Resourcesh]hcontents: 1. Hardware and Platform Support for PCI Power Management 2. PCI Subsystem and Device Power Management 3. PCI Device Drivers and Power Management 4. Resources}hjsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1j hhhhhhhKubh)}(hhh](h)}(h91. Hardware and Platform Support for PCI Power Managementh]h91. Hardware and Platform Support for PCI Power Management}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hhh](h)}(h/1.1. Native and Platform-Based Power Managementh]h/1.1. Native and Platform-Based Power Management}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj0hhhhhKubh)}(hIn general, power management is a feature allowing one to save energy by putting devices into states in which they draw less power (low-power states) at the price of reduced functionality or performance.h]hIn general, power management is a feature allowing one to save energy by putting devices into states in which they draw less power (low-power states) at the price of reduced functionality or performance.}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj0hhubh)}(hXUsually, a device is put into a low-power state when it is underutilized or completely inactive. However, when it is necessary to use the device once again, it has to be put back into the "fully functional" state (full-power state). This may happen when there are some data for the device to handle or as a result of an external event requiring the device to be active, which may be signaled by the device itself.h]hXUsually, a device is put into a low-power state when it is underutilized or completely inactive. However, when it is necessary to use the device once again, it has to be put back into the “fully functional” state (full-power state). This may happen when there are some data for the device to handle or as a result of an external event requiring the device to be active, which may be signaled by the device itself.}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK"hj0hhubh)}(hXYPCI devices may be put into low-power states in two ways, by using the device capabilities introduced by the PCI Bus Power Management Interface Specification, or with the help of platform firmware, such as an ACPI BIOS. In the first approach, that is referred to as the native PCI power management (native PCI PM) in what follows, the device power state is changed as a result of writing a specific value into one of its standard configuration registers. The second approach requires the platform firmware to provide special methods that may be used by the kernel to change the device's power state.h]hX[PCI devices may be put into low-power states in two ways, by using the device capabilities introduced by the PCI Bus Power Management Interface Specification, or with the help of platform firmware, such as an ACPI BIOS. In the first approach, that is referred to as the native PCI power management (native PCI PM) in what follows, the device power state is changed as a result of writing a specific value into one of its standard configuration registers. The second approach requires the platform firmware to provide special methods that may be used by the kernel to change the device’s power state.}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK)hj0hhubh)}(hXDevices supporting the native PCI PM usually can generate wakeup signals called Power Management Events (PMEs) to let the kernel know about external events requiring the device to be active. After receiving a PME the kernel is supposed to put the device that sent it into the full-power state. However, the PCI Bus Power Management Interface Specification doesn't define any standard method of delivering the PME from the device to the CPU and the operating system kernel. It is assumed that the platform firmware will perform this task and therefore, even though a PCI device is set up to generate PMEs, it also may be necessary to prepare the platform firmware for notifying the CPU of the PMEs coming from the device (e.g. by generating interrupts).h]hXDevices supporting the native PCI PM usually can generate wakeup signals called Power Management Events (PMEs) to let the kernel know about external events requiring the device to be active. After receiving a PME the kernel is supposed to put the device that sent it into the full-power state. However, the PCI Bus Power Management Interface Specification doesn’t define any standard method of delivering the PME from the device to the CPU and the operating system kernel. It is assumed that the platform firmware will perform this task and therefore, even though a PCI device is set up to generate PMEs, it also may be necessary to prepare the platform firmware for notifying the CPU of the PMEs coming from the device (e.g. by generating interrupts).}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK2hj0hhubh)}(hXIn turn, if the methods provided by the platform firmware are used for changing the power state of a device, usually the platform also provides a method for preparing the device to generate wakeup signals. In that case, however, it often also is necessary to prepare the device for generating PMEs using the native PCI PM mechanism, because the method provided by the platform depends on that.h]hXIn turn, if the methods provided by the platform firmware are used for changing the power state of a device, usually the platform also provides a method for preparing the device to generate wakeup signals. In that case, however, it often also is necessary to prepare the device for generating PMEs using the native PCI PM mechanism, because the method provided by the platform depends on that.}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK=hj0hhubh)}(hThus in many situations both the native and the platform-based power management mechanisms have to be used simultaneously to obtain the desired result.h]hThus in many situations both the native and the platform-based power management mechanisms have to be used simultaneously to obtain the desired result.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKDhj0hhubeh}(h]*native-and-platform-based-power-managementah ]h"]/1.1. native and platform-based power managementah$]h&]uh1hhjhhhhhKubh)}(hhh](h)}(h 1.2. Native PCI Power Managementh]h 1.2. Native PCI Power Management}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKHubh)}(hThe PCI Bus Power Management Interface Specification (PCI PM Spec) was introduced between the PCI 2.1 and PCI 2.2 Specifications. It defined a standard interface for performing various operations related to power management.h]hThe PCI Bus Power Management Interface Specification (PCI PM Spec) was introduced between the PCI 2.1 and PCI 2.2 Specifications. It defined a standard interface for performing various operations related to power management.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKJhjhhubh)}(hXdThe implementation of the PCI PM Spec is optional for conventional PCI devices, but it is mandatory for PCI Express devices. If a device supports the PCI PM Spec, it has an 8 byte power management capability field in its PCI configuration space. This field is used to describe and control the standard features related to the native PCI power management.h]hXdThe implementation of the PCI PM Spec is optional for conventional PCI devices, but it is mandatory for PCI Express devices. If a device supports the PCI PM Spec, it has an 8 byte power management capability field in its PCI configuration space. This field is used to describe and control the standard features related to the native PCI power management.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKOhjhhubh)}(hX3The PCI PM Spec defines 4 operating states for devices (D0-D3) and for buses (B0-B3). The higher the number, the less power is drawn by the device or bus in that state. However, the higher the number, the longer the latency for the device or bus to return to the full-power state (D0 or B0, respectively).h]hX3The PCI PM Spec defines 4 operating states for devices (D0-D3) and for buses (B0-B3). The higher the number, the less power is drawn by the device or bus in that state. However, the higher the number, the longer the latency for the device or bus to return to the full-power state (D0 or B0, respectively).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKUhjhhubh)}(hXThere are two variants of the D3 state defined by the specification. The first one is D3hot, referred to as the software accessible D3, because devices can be programmed to go into it. The second one, D3cold, is the state that PCI devices are in when the supply voltage (Vcc) is removed from them. It is not possible to program a PCI device to go into D3cold, although there may be a programmable interface for putting the bus the device is on into a state in which Vcc is removed from all devices on the bus.h]hXThere are two variants of the D3 state defined by the specification. The first one is D3hot, referred to as the software accessible D3, because devices can be programmed to go into it. The second one, D3cold, is the state that PCI devices are in when the supply voltage (Vcc) is removed from them. It is not possible to program a PCI device to go into D3cold, although there may be a programmable interface for putting the bus the device is on into a state in which Vcc is removed from all devices on the bus.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKZhjhhubh)}(hPCI bus power management, however, is not supported by the Linux kernel at the time of this writing and therefore it is not covered by this document.h]hPCI bus power management, however, is not supported by the Linux kernel at the time of this writing and therefore it is not covered by this document.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKbhjhhubh)}(hX-Note that every PCI device can be in the full-power state (D0) or in D3cold, regardless of whether or not it implements the PCI PM Spec. In addition to that, if the PCI PM Spec is implemented by the device, it must support D3hot as well as D0. The support for the D1 and D2 power states is optional.h]hX-Note that every PCI device can be in the full-power state (D0) or in D3cold, regardless of whether or not it implements the PCI PM Spec. In addition to that, if the PCI PM Spec is implemented by the device, it must support D3hot as well as D0. The support for the D1 and D2 power states is optional.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKehjhhubh)}(hXfPCI devices supporting the PCI PM Spec can be programmed to go to any of the supported low-power states (except for D3cold). While in D1-D3hot the standard configuration registers of the device must be accessible to software (i.e. the device is required to respond to PCI configuration accesses), although its I/O and memory spaces are then disabled. This allows the device to be programmatically put into D0. Thus the kernel can switch the device back and forth between D0 and the supported low-power states (except for D3cold) and the possible power state transitions the device can undergo are the following:h]hXfPCI devices supporting the PCI PM Spec can be programmed to go to any of the supported low-power states (except for D3cold). While in D1-D3hot the standard configuration registers of the device must be accessible to software (i.e. the device is required to respond to PCI configuration accesses), although its I/O and memory spaces are then disabled. This allows the device to be programmatically put into D0. Thus the kernel can switch the device back and forth between D0 and the supported low-power states (except for D3cold) and the possible power state transitions the device can undergo are the following:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKjhjhhubhtable)}(hhh]htgroup)}(hhh](hcolspec)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjubhtbody)}(hhh](hrow)}(hhh]hentry)}(hhh]h)}(hCurrent State | New Stateh]hCurrent State | New State}(hj5hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKthj2ubah}(h]h ]h"]h$]h&]uh1j0hj-ubah}(h]h ]h"]h$]h&]uh1j+hj(ubj,)}(hhh]j1)}(hhh]h)}(hD0 | D1, D2, D3h]hD0 | D1, D2, D3}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKvhjRubah}(h]h ]h"]h$]h&]uh1j0hjOubah}(h]h ]h"]h$]h&]uh1j+hj(ubj,)}(hhh]j1)}(hhh]h)}(hD1 | D2, D3h]hD1 | D2, D3}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKxhjrubah}(h]h ]h"]h$]h&]uh1j0hjoubah}(h]h ]h"]h$]h&]uh1j+hj(ubj,)}(hhh]j1)}(hhh]h)}(hD2 | D3h]hD2 | D3}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKzhjubah}(h]h ]h"]h$]h&]uh1j0hjubah}(h]h ]h"]h$]h&]uh1j+hj(ubj,)}(hhh]j1)}(hhh]h)}(hD1, D2, D3 | D0h]hD1, D2, D3 | D0}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK|hjubah}(h]h ]h"]h$]h&]uh1j0hjubah}(h]h ]h"]h$]h&]uh1j+hj(ubeh}(h]h ]h"]h$]h&]uh1j&hjubeh}(h]h ]h"]h$]h&]colsKuh1jhjubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubh)}(hXThe transition from D3cold to D0 occurs when the supply voltage is provided to the device (i.e. power is restored). In that case the device returns to D0 with a full power-on reset sequence and the power-on defaults are restored to the device by hardware just as at initial power up.h]hXThe transition from D3cold to D0 occurs when the supply voltage is provided to the device (i.e. power is restored). In that case the device returns to D0 with a full power-on reset sequence and the power-on defaults are restored to the device by hardware just as at initial power up.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh)}(hXPCI devices supporting the PCI PM Spec can be programmed to generate PMEs while in any power state (D0-D3), but they are not required to be capable of generating PMEs from all supported power states. In particular, the capability of generating PMEs from D3cold is optional and depends on the presence of additional voltage (3.3Vaux) allowing the device to remain sufficiently active to generate a wakeup signal.h]hXPCI devices supporting the PCI PM Spec can be programmed to generate PMEs while in any power state (D0-D3), but they are not required to be capable of generating PMEs from all supported power states. In particular, the capability of generating PMEs from D3cold is optional and depends on the presence of additional voltage (3.3Vaux) allowing the device to remain sufficiently active to generate a wakeup signal.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubeh}(h]native-pci-power-managementah ]h"] 1.2. native pci power managementah$]h&]uh1hhjhhhhhKHubh)}(hhh](h)}(h!1.3. ACPI Device Power Managementh]h!1.3. ACPI Device Power Management}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hXYThe platform firmware support for the power management of PCI devices is system-specific. However, if the system in question is compliant with the Advanced Configuration and Power Interface (ACPI) Specification, like the majority of x86-based systems, it is supposed to implement device power management interfaces defined by the ACPI standard.h]hXYThe platform firmware support for the power management of PCI devices is system-specific. However, if the system in question is compliant with the Advanced Configuration and Power Interface (ACPI) Specification, like the majority of x86-based systems, it is supposed to implement device power management interfaces defined by the ACPI standard.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh)}(hXFor this purpose the ACPI BIOS provides special functions called "control methods" that may be executed by the kernel to perform specific tasks, such as putting a device into a low-power state. These control methods are encoded using special byte-code language called the ACPI Machine Language (AML) and stored in the machine's BIOS. The kernel loads them from the BIOS and executes them as needed using an AML interpreter that translates the AML byte code into computations and memory or I/O space accesses. This way, in theory, a BIOS writer can provide the kernel with a means to perform actions depending on the system design in a system-specific fashion.h]hXFor this purpose the ACPI BIOS provides special functions called “control methods” that may be executed by the kernel to perform specific tasks, such as putting a device into a low-power state. These control methods are encoded using special byte-code language called the ACPI Machine Language (AML) and stored in the machine’s BIOS. The kernel loads them from the BIOS and executes them as needed using an AML interpreter that translates the AML byte code into computations and memory or I/O space accesses. This way, in theory, a BIOS writer can provide the kernel with a means to perform actions depending on the system design in a system-specific fashion.}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh)}(hXACPI control methods may be divided into global control methods, that are not associated with any particular devices, and device control methods, that have to be defined separately for each device supposed to be handled with the help of the platform. This means, in particular, that ACPI device control methods can only be used to handle devices that the BIOS writer knew about in advance. The ACPI methods used for device power management fall into that category.h]hXACPI control methods may be divided into global control methods, that are not associated with any particular devices, and device control methods, that have to be defined separately for each device supposed to be handled with the help of the platform. This means, in particular, that ACPI device control methods can only be used to handle devices that the BIOS writer knew about in advance. The ACPI methods used for device power management fall into that category.}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh)}(hX>The ACPI specification assumes that devices can be in one of four power states labeled as D0, D1, D2, and D3 that roughly correspond to the native PCI PM D0-D3 states (although the difference between D3hot and D3cold is not taken into account by ACPI). Moreover, for each power state of a device there is a set of power resources that have to be enabled for the device to be put into that state. These power resources are controlled (i.e. enabled or disabled) with the help of their own control methods, _ON and _OFF, that have to be defined individually for each of them.h]hX>The ACPI specification assumes that devices can be in one of four power states labeled as D0, D1, D2, and D3 that roughly correspond to the native PCI PM D0-D3 states (although the difference between D3hot and D3cold is not taken into account by ACPI). Moreover, for each power state of a device there is a set of power resources that have to be enabled for the device to be put into that state. These power resources are controlled (i.e. enabled or disabled) with the help of their own control methods, _ON and _OFF, that have to be defined individually for each of them.}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh)}(hX2To put a device into the ACPI power state Dx (where x is a number between 0 and 3 inclusive) the kernel is supposed to (1) enable the power resources required by the device in this state using their _ON control methods and (2) execute the _PSx control method defined for the device. In addition to that, if the device is going to be put into a low-power state (D1-D3) and is supposed to generate wakeup signals from that state, the _DSW (or _PSW, replaced with _DSW by ACPI 3.0) control method defined for it has to be executed before _PSx. Power resources that are not required by the device in the target power state and are not required any more by any other device should be disabled (by executing their _OFF control methods). If the current power state of the device is D3, it can only be put into D0 this way.h]hX2To put a device into the ACPI power state Dx (where x is a number between 0 and 3 inclusive) the kernel is supposed to (1) enable the power resources required by the device in this state using their _ON control methods and (2) execute the _PSx control method defined for the device. In addition to that, if the device is going to be put into a low-power state (D1-D3) and is supposed to generate wakeup signals from that state, the _DSW (or _PSW, replaced with _DSW by ACPI 3.0) control method defined for it has to be executed before _PSx. Power resources that are not required by the device in the target power state and are not required any more by any other device should be disabled (by executing their _OFF control methods). If the current power state of the device is D3, it can only be put into D0 this way.}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh)}(hXHowever, quite often the power states of devices are changed during a system-wide transition into a sleep state or back into the working state. ACPI defines four system sleep states, S1, S2, S3, and S4, and denotes the system working state as S0. In general, the target system sleep (or working) state determines the highest power (lowest number) state the device can be put into and the kernel is supposed to obtain this information by executing the device's _SxD control method (where x is a number between 0 and 4 inclusive). If the device is required to wake up the system from the target sleep state, the lowest power (highest number) state it can be put into is also determined by the target state of the system. The kernel is then supposed to use the device's _SxW control method to obtain the number of that state. It also is supposed to use the device's _PRW control method to learn which power resources need to be enabled for the device to be able to generate wakeup signals.h]hXHowever, quite often the power states of devices are changed during a system-wide transition into a sleep state or back into the working state. ACPI defines four system sleep states, S1, S2, S3, and S4, and denotes the system working state as S0. In general, the target system sleep (or working) state determines the highest power (lowest number) state the device can be put into and the kernel is supposed to obtain this information by executing the device’s _SxD control method (where x is a number between 0 and 4 inclusive). If the device is required to wake up the system from the target sleep state, the lowest power (highest number) state it can be put into is also determined by the target state of the system. The kernel is then supposed to use the device’s _SxW control method to obtain the number of that state. It also is supposed to use the device’s _PRW control method to learn which power resources need to be enabled for the device to be able to generate wakeup signals.}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubeh}(h]acpi-device-power-managementah ]h"]!1.3. acpi device power managementah$]h&]uh1hhjhhhhhKubh)}(hhh](h)}(h1.4. Wakeup Signalingh]h1.4. Wakeup Signaling}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjshhhhhKubh)}(hXUWakeup signals generated by PCI devices, either as native PCI PMEs, or as a result of the execution of the _DSW (or _PSW) ACPI control method before putting the device into a low-power state, have to be caught and handled as appropriate. If they are sent while the system is in the working state (ACPI S0), they should be translated into interrupts so that the kernel can put the devices generating them into the full-power state and take care of the events that triggered them. In turn, if they are sent while the system is sleeping, they should cause the system's core logic to trigger wakeup.h]hXWWakeup signals generated by PCI devices, either as native PCI PMEs, or as a result of the execution of the _DSW (or _PSW) ACPI control method before putting the device into a low-power state, have to be caught and handled as appropriate. If they are sent while the system is in the working state (ACPI S0), they should be translated into interrupts so that the kernel can put the devices generating them into the full-power state and take care of the events that triggered them. In turn, if they are sent while the system is sleeping, they should cause the system’s core logic to trigger wakeup.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjshhubh)}(hX3On ACPI-based systems wakeup signals sent by conventional PCI devices are converted into ACPI General-Purpose Events (GPEs) which are hardware signals from the system core logic generated in response to various events that need to be acted upon. Every GPE is associated with one or more sources of potentially interesting events. In particular, a GPE may be associated with a PCI device capable of signaling wakeup. The information on the connections between GPEs and event sources is recorded in the system's ACPI BIOS from where it can be read by the kernel.h]hX5On ACPI-based systems wakeup signals sent by conventional PCI devices are converted into ACPI General-Purpose Events (GPEs) which are hardware signals from the system core logic generated in response to various events that need to be acted upon. Every GPE is associated with one or more sources of potentially interesting events. In particular, a GPE may be associated with a PCI device capable of signaling wakeup. The information on the connections between GPEs and event sources is recorded in the system’s ACPI BIOS from where it can be read by the kernel.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjshhubh)}(hXIf a PCI device known to the system's ACPI BIOS signals wakeup, the GPE associated with it (if there is one) is triggered. The GPEs associated with PCI bridges may also be triggered in response to a wakeup signal from one of the devices below the bridge (this also is the case for root bridges) and, for example, native PCI PMEs from devices unknown to the system's ACPI BIOS may be handled this way.h]hXIf a PCI device known to the system’s ACPI BIOS signals wakeup, the GPE associated with it (if there is one) is triggered. The GPEs associated with PCI bridges may also be triggered in response to a wakeup signal from one of the devices below the bridge (this also is the case for root bridges) and, for example, native PCI PMEs from devices unknown to the system’s ACPI BIOS may be handled this way.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjshhubh)}(hXKA GPE may be triggered when the system is sleeping (i.e. when it is in one of the ACPI S1-S4 states), in which case system wakeup is started by its core logic (the device that was the source of the signal causing the system wakeup to occur may be identified later). The GPEs used in such situations are referred to as wakeup GPEs.h]hXKA GPE may be triggered when the system is sleeping (i.e. when it is in one of the ACPI S1-S4 states), in which case system wakeup is started by its core logic (the device that was the source of the signal causing the system wakeup to occur may be identified later). The GPEs used in such situations are referred to as wakeup GPEs.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjshhubh)}(hXUsually, however, GPEs are also triggered when the system is in the working state (ACPI S0) and in that case the system's core logic generates a System Control Interrupt (SCI) to notify the kernel of the event. Then, the SCI handler identifies the GPE that caused the interrupt to be generated which, in turn, allows the kernel to identify the source of the event (that may be a PCI device signaling wakeup). The GPEs used for notifying the kernel of events occurring while the system is in the working state are referred to as runtime GPEs.h]hX!Usually, however, GPEs are also triggered when the system is in the working state (ACPI S0) and in that case the system’s core logic generates a System Control Interrupt (SCI) to notify the kernel of the event. Then, the SCI handler identifies the GPE that caused the interrupt to be generated which, in turn, allows the kernel to identify the source of the event (that may be a PCI device signaling wakeup). The GPEs used for notifying the kernel of events occurring while the system is in the working state are referred to as runtime GPEs.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjshhubh)}(hX Unfortunately, there is no standard way of handling wakeup signals sent by conventional PCI devices on systems that are not ACPI-based, but there is one for PCI Express devices. Namely, the PCI Express Base Specification introduced a native mechanism for converting native PCI PMEs into interrupts generated by root ports. For conventional PCI devices native PMEs are out-of-band, so they are routed separately and they need not pass through bridges (in principle they may be routed directly to the system's core logic), but for PCI Express devices they are in-band messages that have to pass through the PCI Express hierarchy, including the root port on the path from the device to the Root Complex. Thus it was possible to introduce a mechanism by which a root port generates an interrupt whenever it receives a PME message from one of the devices below it. The PCI Express Requester ID of the device that sent the PME message is then recorded in one of the root port's configuration registers from where it may be read by the interrupt handler allowing the device to be identified. [PME messages sent by PCI Express endpoints integrated with the Root Complex don't pass through root ports, but instead they cause a Root Complex Event Collector (if there is one) to generate interrupts.]h]hXUnfortunately, there is no standard way of handling wakeup signals sent by conventional PCI devices on systems that are not ACPI-based, but there is one for PCI Express devices. Namely, the PCI Express Base Specification introduced a native mechanism for converting native PCI PMEs into interrupts generated by root ports. For conventional PCI devices native PMEs are out-of-band, so they are routed separately and they need not pass through bridges (in principle they may be routed directly to the system’s core logic), but for PCI Express devices they are in-band messages that have to pass through the PCI Express hierarchy, including the root port on the path from the device to the Root Complex. Thus it was possible to introduce a mechanism by which a root port generates an interrupt whenever it receives a PME message from one of the devices below it. The PCI Express Requester ID of the device that sent the PME message is then recorded in one of the root port’s configuration registers from where it may be read by the interrupt handler allowing the device to be identified. [PME messages sent by PCI Express endpoints integrated with the Root Complex don’t pass through root ports, but instead they cause a Root Complex Event Collector (if there is one) to generate interrupts.]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjshhubh)}(hXIn principle the native PCI Express PME signaling may also be used on ACPI-based systems along with the GPEs, but to use it the kernel has to ask the system's ACPI BIOS to release control of root port configuration registers. The ACPI BIOS, however, is not required to allow the kernel to control these registers and if it doesn't do that, the kernel must not modify their contents. Of course the native PCI Express PME signaling cannot be used by the kernel in that case.h]hXIn principle the native PCI Express PME signaling may also be used on ACPI-based systems along with the GPEs, but to use it the kernel has to ask the system’s ACPI BIOS to release control of root port configuration registers. The ACPI BIOS, however, is not required to allow the kernel to control these registers and if it doesn’t do that, the kernel must not modify their contents. Of course the native PCI Express PME signaling cannot be used by the kernel in that case.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjshhubeh}(h]wakeup-signalingah ]h"]1.4. wakeup signalingah$]h&]uh1hhjhhhhhKubeh}(h]6hardware-and-platform-support-for-pci-power-managementah ]h"]91. hardware and platform support for pci power managementah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(h,2. PCI Subsystem and Device Power Managementh]h,2. PCI Subsystem and Device Power Management}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhMubh)}(hhh](h)}(h&2.1. Device Power Management Callbacksh]h&2.1. Device Power Management Callbacks}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhMubh)}(hXThe PCI Subsystem participates in the power management of PCI devices in a number of ways. First of all, it provides an intermediate code layer between the device power management core (PM core) and PCI device drivers. Specifically, the pm field of the PCI subsystem's struct bus_type object, pci_bus_type, points to a struct dev_pm_ops object, pci_dev_pm_ops, containing pointers to several device power management callbacks::h]hXThe PCI Subsystem participates in the power management of PCI devices in a number of ways. First of all, it provides an intermediate code layer between the device power management core (PM core) and PCI device drivers. Specifically, the pm field of the PCI subsystem’s struct bus_type object, pci_bus_type, points to a struct dev_pm_ops object, pci_dev_pm_ops, containing pointers to several device power management callbacks:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubh literal_block)}(hXconst struct dev_pm_ops pci_dev_pm_ops = { .prepare = pci_pm_prepare, .complete = pci_pm_complete, .suspend = pci_pm_suspend, .resume = pci_pm_resume, .freeze = pci_pm_freeze, .thaw = pci_pm_thaw, .poweroff = pci_pm_poweroff, .restore = pci_pm_restore, .suspend_noirq = pci_pm_suspend_noirq, .resume_noirq = pci_pm_resume_noirq, .freeze_noirq = pci_pm_freeze_noirq, .thaw_noirq = pci_pm_thaw_noirq, .poweroff_noirq = pci_pm_poweroff_noirq, .restore_noirq = pci_pm_restore_noirq, .runtime_suspend = pci_pm_runtime_suspend, .runtime_resume = pci_pm_runtime_resume, .runtime_idle = pci_pm_runtime_idle, };h]hXconst struct dev_pm_ops pci_dev_pm_ops = { .prepare = pci_pm_prepare, .complete = pci_pm_complete, .suspend = pci_pm_suspend, .resume = pci_pm_resume, .freeze = pci_pm_freeze, .thaw = pci_pm_thaw, .poweroff = pci_pm_poweroff, .restore = pci_pm_restore, .suspend_noirq = pci_pm_suspend_noirq, .resume_noirq = pci_pm_resume_noirq, .freeze_noirq = pci_pm_freeze_noirq, .thaw_noirq = pci_pm_thaw_noirq, .poweroff_noirq = pci_pm_poweroff_noirq, .restore_noirq = pci_pm_restore_noirq, .runtime_suspend = pci_pm_runtime_suspend, .runtime_resume = pci_pm_runtime_resume, .runtime_idle = pci_pm_runtime_idle, };}hj(sbah}(h]h ]h"]h$]h&]jjuh1j&hhhMhjhhubh)}(hXYThese callbacks are executed by the PM core in various situations related to device power management and they, in turn, execute power management callbacks provided by PCI device drivers. They also perform power management operations involving some standard configuration registers of PCI devices that device drivers need not know or care about.h]hXYThese callbacks are executed by the PM core in various situations related to device power management and they, in turn, execute power management callbacks provided by PCI device drivers. They also perform power management operations involving some standard configuration registers of PCI devices that device drivers need not know or care about.}(hj6hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM.hjhhubh)}(hrThe structure representing a PCI device, struct pci_dev, contains several fields that these callbacks operate on::h]hqThe structure representing a PCI device, struct pci_dev, contains several fields that these callbacks operate on:}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM4hjhhubj')}(hX6struct pci_dev { ... pci_power_t current_state; /* Current operating state. */ int pm_cap; /* PM capability offset in the configuration space */ unsigned int pme_support:5; /* Bitmask of states from which PME# can be generated */ unsigned int pme_poll:1; /* Poll device's PME status bit */ unsigned int d1_support:1; /* Low power state D1 is supported */ unsigned int d2_support:1; /* Low power state D2 is supported */ unsigned int no_d1d2:1; /* D1 and D2 are forbidden */ unsigned int wakeup_prepared:1; /* Device prepared for wake up */ unsigned int d3hot_delay; /* D3hot->D0 transition time in ms */ ... };h]hX6struct pci_dev { ... pci_power_t current_state; /* Current operating state. */ int pm_cap; /* PM capability offset in the configuration space */ unsigned int pme_support:5; /* Bitmask of states from which PME# can be generated */ unsigned int pme_poll:1; /* Poll device's PME status bit */ unsigned int d1_support:1; /* Low power state D1 is supported */ unsigned int d2_support:1; /* Low power state D2 is supported */ unsigned int no_d1d2:1; /* D1 and D2 are forbidden */ unsigned int wakeup_prepared:1; /* Device prepared for wake up */ unsigned int d3hot_delay; /* D3hot->D0 transition time in ms */ ... };}hjRsbah}(h]h ]h"]h$]h&]jjuh1j&hhhM7hjhhubh)}(h]They also indirectly use some fields of the struct device that is embedded in struct pci_dev.h]h]They also indirectly use some fields of the struct device that is embedded in struct pci_dev.}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMGhjhhubeh}(h]!device-power-management-callbacksah ]h"]&2.1. device power management callbacksah$]h&]uh1hhjhhhhhMubh)}(hhh](h)}(h2.2. Device Initializationh]h2.2. Device Initialization}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjvhhhhhMKubh)}(hXThe PCI subsystem's first task related to device power management is to prepare the device for power management and initialize the fields of struct pci_dev used for this purpose. This happens in two functions defined in drivers/pci/, pci_pm_init() and pci_acpi_setup().h]hXThe PCI subsystem’s first task related to device power management is to prepare the device for power management and initialize the fields of struct pci_dev used for this purpose. This happens in two functions defined in drivers/pci/, pci_pm_init() and pci_acpi_setup().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMMhjvhhubh)}(hXAThe first of these functions checks if the device supports native PCI PM and if that's the case the offset of its power management capability structure in the configuration space is stored in the pm_cap field of the device's struct pci_dev object. Next, the function checks which PCI low-power states are supported by the device and from which low-power states the device can generate native PCI PMEs. The power management fields of the device's struct pci_dev and the struct device embedded in it are updated accordingly and the generation of PMEs by the device is disabled.h]hXGThe first of these functions checks if the device supports native PCI PM and if that’s the case the offset of its power management capability structure in the configuration space is stored in the pm_cap field of the device’s struct pci_dev object. Next, the function checks which PCI low-power states are supported by the device and from which low-power states the device can generate native PCI PMEs. The power management fields of the device’s struct pci_dev and the struct device embedded in it are updated accordingly and the generation of PMEs by the device is disabled.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMRhjvhhubh)}(hXQThe second function checks if the device can be prepared to signal wakeup with the help of the platform firmware, such as the ACPI BIOS. If that is the case, the function updates the wakeup fields in struct device embedded in the device's struct pci_dev and uses the firmware-provided method to prevent the device from signaling wakeup.h]hXSThe second function checks if the device can be prepared to signal wakeup with the help of the platform firmware, such as the ACPI BIOS. If that is the case, the function updates the wakeup fields in struct device embedded in the device’s struct pci_dev and uses the firmware-provided method to prevent the device from signaling wakeup.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM[hjvhhubh)}(hAt this point the device is ready for power management. For driverless devices, however, this functionality is limited to a few basic operations carried out during system-wide transitions to a sleep state and back to the working state.h]hAt this point the device is ready for power management. For driverless devices, however, this functionality is limited to a few basic operations carried out during system-wide transitions to a sleep state and back to the working state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMahjvhhubeh}(h]device-initializationah ]h"]2.2. device initializationah$]h&]uh1hhjhhhhhMKubh)}(hhh](h)}(h$2.3. Runtime Device Power Managementh]h$2.3. Runtime Device Power Management}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhMfubh)}(hX The PCI subsystem plays a vital role in the runtime power management of PCI devices. For this purpose it uses the general runtime power management (runtime PM) framework described in Documentation/power/runtime_pm.rst. Namely, it provides subsystem-level callbacks::h]hX The PCI subsystem plays a vital role in the runtime power management of PCI devices. For this purpose it uses the general runtime power management (runtime PM) framework described in Documentation/power/runtime_pm.rst. Namely, it provides subsystem-level callbacks:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhhjhhubj')}(hFpci_pm_runtime_suspend() pci_pm_runtime_resume() pci_pm_runtime_idle()h]hFpci_pm_runtime_suspend() pci_pm_runtime_resume() pci_pm_runtime_idle()}hjsbah}(h]h ]h"]h$]h&]jjuh1j&hhhMmhjhhubh)}(hXEthat are executed by the core runtime PM routines. It also implements the entire mechanics necessary for handling runtime wakeup signals from PCI devices in low-power states, which at the time of this writing works for both the native PCI Express PME signaling and the ACPI GPE-based wakeup signaling described in Section 1.h]hXEthat are executed by the core runtime PM routines. It also implements the entire mechanics necessary for handling runtime wakeup signals from PCI devices in low-power states, which at the time of this writing works for both the native PCI Express PME signaling and the ACPI GPE-based wakeup signaling described in Section 1.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMqhjhhubh)}(hX?First, a PCI device is put into a low-power state, or suspended, with the help of pm_schedule_suspend() or pm_runtime_suspend() which for PCI devices call pci_pm_runtime_suspend() to do the actual job. For this to work, the device's driver has to provide a pm->runtime_suspend() callback (see below), which is run by pci_pm_runtime_suspend() as the first action. If the driver's callback returns successfully, the device's standard configuration registers are saved, the device is prepared to generate wakeup signals and, finally, it is put into the target low-power state.h]hXEFirst, a PCI device is put into a low-power state, or suspended, with the help of pm_schedule_suspend() or pm_runtime_suspend() which for PCI devices call pci_pm_runtime_suspend() to do the actual job. For this to work, the device’s driver has to provide a pm->runtime_suspend() callback (see below), which is run by pci_pm_runtime_suspend() as the first action. If the driver’s callback returns successfully, the device’s standard configuration registers are saved, the device is prepared to generate wakeup signals and, finally, it is put into the target low-power state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMwhjhhubh)}(hXThe low-power state to put the device into is the lowest-power (highest number) state from which it can signal wakeup. The exact method of signaling wakeup is system-dependent and is determined by the PCI subsystem on the basis of the reported capabilities of the device and the platform firmware. To prepare the device for signaling wakeup and put it into the selected low-power state, the PCI subsystem can use the platform firmware as well as the device's native PCI PM capabilities, if supported.h]hXThe low-power state to put the device into is the lowest-power (highest number) state from which it can signal wakeup. The exact method of signaling wakeup is system-dependent and is determined by the PCI subsystem on the basis of the reported capabilities of the device and the platform firmware. To prepare the device for signaling wakeup and put it into the selected low-power state, the PCI subsystem can use the platform firmware as well as the device’s native PCI PM capabilities, if supported.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubh)}(hXIt is expected that the device driver's pm->runtime_suspend() callback will not attempt to prepare the device for signaling wakeup or to put it into a low-power state. The driver ought to leave these tasks to the PCI subsystem that has all of the information necessary to perform them.h]hX It is expected that the device driver’s pm->runtime_suspend() callback will not attempt to prepare the device for signaling wakeup or to put it into a low-power state. The driver ought to leave these tasks to the PCI subsystem that has all of the information necessary to perform them.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubh)}(hXhA suspended device is brought back into the "active" state, or resumed, with the help of pm_request_resume() or pm_runtime_resume() which both call pci_pm_runtime_resume() for PCI devices. Again, this only works if the device's driver provides a pm->runtime_resume() callback (see below). However, before the driver's callback is executed, pci_pm_runtime_resume() brings the device back into the full-power state, prevents it from signaling wakeup while in that state and restores its standard configuration registers. Thus the driver's callback need not worry about the PCI-specific aspects of the device resume.h]hXrA suspended device is brought back into the “active” state, or resumed, with the help of pm_request_resume() or pm_runtime_resume() which both call pci_pm_runtime_resume() for PCI devices. Again, this only works if the device’s driver provides a pm->runtime_resume() callback (see below). However, before the driver’s callback is executed, pci_pm_runtime_resume() brings the device back into the full-power state, prevents it from signaling wakeup while in that state and restores its standard configuration registers. Thus the driver’s callback need not worry about the PCI-specific aspects of the device resume.}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubh)}(hX!Note that generally pci_pm_runtime_resume() may be called in two different situations. First, it may be called at the request of the device's driver, for example if there are some data for it to process. Second, it may be called as a result of a wakeup signal from the device itself (this sometimes is referred to as "remote wakeup"). Of course, for this purpose the wakeup signal is handled in one of the ways described in Section 1 and finally converted into a notification for the PCI subsystem after the source device has been identified.h]hX'Note that generally pci_pm_runtime_resume() may be called in two different situations. First, it may be called at the request of the device’s driver, for example if there are some data for it to process. Second, it may be called as a result of a wakeup signal from the device itself (this sometimes is referred to as “remote wakeup”). Of course, for this purpose the wakeup signal is handled in one of the ways described in Section 1 and finally converted into a notification for the PCI subsystem after the source device has been identified.}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubh)}(hXThe pci_pm_runtime_idle() function, called for PCI devices by pm_runtime_idle() and pm_request_idle(), executes the device driver's pm->runtime_idle() callback, if defined, and if that callback doesn't return error code (or is not present at all), suspends the device with the help of pm_runtime_suspend(). Sometimes pci_pm_runtime_idle() is called automatically by the PM core (for example, it is called right after the device has just been resumed), in which cases it is expected to suspend the device if that makes sense. Usually, however, the PCI subsystem doesn't really know if the device really can be suspended, so it lets the device's driver decide by running its pm->runtime_idle() callback.h]hXThe pci_pm_runtime_idle() function, called for PCI devices by pm_runtime_idle() and pm_request_idle(), executes the device driver’s pm->runtime_idle() callback, if defined, and if that callback doesn’t return error code (or is not present at all), suspends the device with the help of pm_runtime_suspend(). Sometimes pci_pm_runtime_idle() is called automatically by the PM core (for example, it is called right after the device has just been resumed), in which cases it is expected to suspend the device if that makes sense. Usually, however, the PCI subsystem doesn’t really know if the device really can be suspended, so it lets the device’s driver decide by running its pm->runtime_idle() callback.}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubeh}(h]runtime-device-power-managementah ]h"]$2.3. runtime device power managementah$]h&]uh1hhjhhhhhMfubh)}(hhh](h)}(h"2.4. System-Wide Power Transitionsh]h"2.4. System-Wide Power Transitions}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^hhhhhMubh)}(hXThere are a few different types of system-wide power transitions, described in Documentation/driver-api/pm/devices.rst. Each of them requires devices to be handled in a specific way and the PM core executes subsystem-level power management callbacks for this purpose. They are executed in phases such that each phase involves executing the same subsystem-level callback for every device belonging to the given subsystem before the next phase begins. These phases always run after tasks have been frozen.h]hXThere are a few different types of system-wide power transitions, described in Documentation/driver-api/pm/devices.rst. Each of them requires devices to be handled in a specific way and the PM core executes subsystem-level power management callbacks for this purpose. They are executed in phases such that each phase involves executing the same subsystem-level callback for every device belonging to the given subsystem before the next phase begins. These phases always run after tasks have been frozen.}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj^hhubh)}(hhh](h)}(h2.4.1. System Suspendh]h2.4.1. System Suspend}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhj}hhhhhMubh)}(hWhen the system is going into a sleep state in which the contents of memory will be preserved, such as one of the ACPI sleep states S1-S3, the phases are:h]hWhen the system is going into a sleep state in which the contents of memory will be preserved, such as one of the ACPI sleep states S1-S3, the phases are:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj}hhubh block_quote)}(h!prepare, suspend, suspend_noirq. h]h)}(h prepare, suspend, suspend_noirq.h]h prepare, suspend, suspend_noirq.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhhhMhj}hhubh)}(hPThe following PCI bus type's callbacks, respectively, are used in these phases::h]hQThe following PCI bus type’s callbacks, respectively, are used in these phases:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj}hhubj')}(h8pci_pm_prepare() pci_pm_suspend() pci_pm_suspend_noirq()h]h8pci_pm_prepare() pci_pm_suspend() pci_pm_suspend_noirq()}hjsbah}(h]h ]h"]h$]h&]jjuh1j&hhhMhj}hhubh)}(hX/The pci_pm_prepare() routine first puts the device into the "fully functional" state with the help of pm_runtime_resume(). Then, it executes the device driver's pm->prepare() callback if defined (i.e. if the driver's struct dev_pm_ops object is present and the prepare pointer in that object is valid).h]hX7The pci_pm_prepare() routine first puts the device into the “fully functional” state with the help of pm_runtime_resume(). Then, it executes the device driver’s pm->prepare() callback if defined (i.e. if the driver’s struct dev_pm_ops object is present and the prepare pointer in that object is valid).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj}hhubh)}(hXThe pci_pm_suspend() routine first checks if the device's driver implements legacy PCI suspend routines (see Section 3), in which case the driver's legacy suspend callback is executed, if present, and its result is returned. Next, if the device's driver doesn't provide a struct dev_pm_ops object (containing pointers to the driver's callbacks), pci_pm_default_suspend() is called, which simply turns off the device's bus master capability and runs pcibios_disable_device() to disable it, unless the device is a bridge (PCI bridges are ignored by this routine). Next, the device driver's pm->suspend() callback is executed, if defined, and its result is returned if it fails. Finally, pci_fixup_device() is called to apply hardware suspend quirks related to the device if necessary.h]hXThe pci_pm_suspend() routine first checks if the device’s driver implements legacy PCI suspend routines (see Section 3), in which case the driver’s legacy suspend callback is executed, if present, and its result is returned. Next, if the device’s driver doesn’t provide a struct dev_pm_ops object (containing pointers to the driver’s callbacks), pci_pm_default_suspend() is called, which simply turns off the device’s bus master capability and runs pcibios_disable_device() to disable it, unless the device is a bridge (PCI bridges are ignored by this routine). Next, the device driver’s pm->suspend() callback is executed, if defined, and its result is returned if it fails. Finally, pci_fixup_device() is called to apply hardware suspend quirks related to the device if necessary.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj}hhubh)}(hX;Note that the suspend phase is carried out asynchronously for PCI devices, so the pci_pm_suspend() callback may be executed in parallel for any pair of PCI devices that don't depend on each other in a known way (i.e. none of the paths in the device tree from the root bridge to a leaf device contains both of them).h]hX=Note that the suspend phase is carried out asynchronously for PCI devices, so the pci_pm_suspend() callback may be executed in parallel for any pair of PCI devices that don’t depend on each other in a known way (i.e. none of the paths in the device tree from the root bridge to a leaf device contains both of them).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj}hhubh)}(hX The pci_pm_suspend_noirq() routine is executed after suspend_device_irqs() has been called, which means that the device driver's interrupt handler won't be invoked while this routine is running. It first checks if the device's driver implements legacy PCI suspends routines (Section 3), in which case the legacy late suspend routine is called and its result is returned (the standard configuration registers of the device are saved if the driver's callback hasn't done that). Second, if the device driver's struct dev_pm_ops object is not present, the device's standard configuration registers are saved and the routine returns success. Otherwise the device driver's pm->suspend_noirq() callback is executed, if present, and its result is returned if it fails. Next, if the device's standard configuration registers haven't been saved yet (one of the device driver's callbacks executed before might do that), pci_pm_suspend_noirq() saves them, prepares the device to signal wakeup (if necessary) and puts it into a low-power state.h]hX!The pci_pm_suspend_noirq() routine is executed after suspend_device_irqs() has been called, which means that the device driver’s interrupt handler won’t be invoked while this routine is running. It first checks if the device’s driver implements legacy PCI suspends routines (Section 3), in which case the legacy late suspend routine is called and its result is returned (the standard configuration registers of the device are saved if the driver’s callback hasn’t done that). Second, if the device driver’s struct dev_pm_ops object is not present, the device’s standard configuration registers are saved and the routine returns success. Otherwise the device driver’s pm->suspend_noirq() callback is executed, if present, and its result is returned if it fails. Next, if the device’s standard configuration registers haven’t been saved yet (one of the device driver’s callbacks executed before might do that), pci_pm_suspend_noirq() saves them, prepares the device to signal wakeup (if necessary) and puts it into a low-power state.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj}hhubh)}(hXThe low-power state to put the device into is the lowest-power (highest number) state from which it can signal wakeup while the system is in the target sleep state. Just like in the runtime PM case described above, the mechanism of signaling wakeup is system-dependent and determined by the PCI subsystem, which is also responsible for preparing the device to signal wakeup from the system's target sleep state as appropriate.h]hXThe low-power state to put the device into is the lowest-power (highest number) state from which it can signal wakeup while the system is in the target sleep state. Just like in the runtime PM case described above, the mechanism of signaling wakeup is system-dependent and determined by the PCI subsystem, which is also responsible for preparing the device to signal wakeup from the system’s target sleep state as appropriate.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj}hhubh)}(hXPCI device drivers (that don't implement legacy power management callbacks) are generally not expected to prepare devices for signaling wakeup or to put them into low-power states. However, if one of the driver's suspend callbacks (pm->suspend() or pm->suspend_noirq()) saves the device's standard configuration registers, pci_pm_suspend_noirq() will assume that the device has been prepared to signal wakeup and put into a low-power state by the driver (the driver is then assumed to have used the helper functions provided by the PCI subsystem for this purpose). PCI device drivers are not encouraged to do that, but in some rare cases doing that in the driver may be the optimum approach.h]hXPCI device drivers (that don’t implement legacy power management callbacks) are generally not expected to prepare devices for signaling wakeup or to put them into low-power states. However, if one of the driver’s suspend callbacks (pm->suspend() or pm->suspend_noirq()) saves the device’s standard configuration registers, pci_pm_suspend_noirq() will assume that the device has been prepared to signal wakeup and put into a low-power state by the driver (the driver is then assumed to have used the helper functions provided by the PCI subsystem for this purpose). PCI device drivers are not encouraged to do that, but in some rare cases doing that in the driver may be the optimum approach.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj}hhubeh}(h]system-suspendah ]h"]2.4.1. system suspendah$]h&]uh1hhj^hhhhhMubh)}(hhh](h)}(h2.4.2. System Resumeh]h2.4.2. System Resume}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.hhhhhMubh)}(hWhen the system is undergoing a transition from a sleep state in which the contents of memory have been preserved, such as one of the ACPI sleep states S1-S3, into the working state (ACPI S0), the phases are:h]hWhen the system is undergoing a transition from a sleep state in which the contents of memory have been preserved, such as one of the ACPI sleep states S1-S3, into the working state (ACPI S0), the phases are:}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj.hhubj)}(h resume_noirq, resume, complete. h]h)}(hresume_noirq, resume, complete.h]hresume_noirq, resume, complete.}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjMubah}(h]h ]h"]h$]h&]uh1jhhhMhj.hhubh)}(hTThe following PCI bus type's callbacks, respectively, are executed in these phases::h]hUThe following PCI bus type’s callbacks, respectively, are executed in these phases:}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj.hhubj')}(h7pci_pm_resume_noirq() pci_pm_resume() pci_pm_complete()h]h7pci_pm_resume_noirq() pci_pm_resume() pci_pm_complete()}hjssbah}(h]h ]h"]h$]h&]jjuh1j&hhhMhj.hhubh)}(hXThe pci_pm_resume_noirq() routine first puts the device into the full-power state, restores its standard configuration registers and applies early resume hardware quirks related to the device, if necessary. This is done unconditionally, regardless of whether or not the device's driver implements legacy PCI power management callbacks (this way all PCI devices are in the full-power state and their standard configuration registers have been restored when their interrupt handlers are invoked for the first time during resume, which allows the kernel to avoid problems with the handling of shared interrupts by drivers whose devices are still suspended). If legacy PCI power management callbacks (see Section 3) are implemented by the device's driver, the legacy early resume callback is executed and its result is returned. Otherwise, the device driver's pm->resume_noirq() callback is executed, if defined, and its result is returned.h]hXThe pci_pm_resume_noirq() routine first puts the device into the full-power state, restores its standard configuration registers and applies early resume hardware quirks related to the device, if necessary. This is done unconditionally, regardless of whether or not the device’s driver implements legacy PCI power management callbacks (this way all PCI devices are in the full-power state and their standard configuration registers have been restored when their interrupt handlers are invoked for the first time during resume, which allows the kernel to avoid problems with the handling of shared interrupts by drivers whose devices are still suspended). If legacy PCI power management callbacks (see Section 3) are implemented by the device’s driver, the legacy early resume callback is executed and its result is returned. Otherwise, the device driver’s pm->resume_noirq() callback is executed, if defined, and its result is returned.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj.hhubh)}(hX|The pci_pm_resume() routine first checks if the device's standard configuration registers have been restored and restores them if that's not the case (this only is necessary in the error path during a failing suspend). Next, resume hardware quirks related to the device are applied, if necessary, and if the device's driver implements legacy PCI power management callbacks (see Section 3), the driver's legacy resume callback is executed and its result is returned. Otherwise, the device's wakeup signaling mechanisms are blocked and its driver's pm->resume() callback is executed, if defined (the callback's result is then returned).h]hXThe pci_pm_resume() routine first checks if the device’s standard configuration registers have been restored and restores them if that’s not the case (this only is necessary in the error path during a failing suspend). Next, resume hardware quirks related to the device are applied, if necessary, and if the device’s driver implements legacy PCI power management callbacks (see Section 3), the driver’s legacy resume callback is executed and its result is returned. Otherwise, the device’s wakeup signaling mechanisms are blocked and its driver’s pm->resume() callback is executed, if defined (the callback’s result is then returned).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj.hhubh)}(hXThe resume phase is carried out asynchronously for PCI devices, like the suspend phase described above, which means that if two PCI devices don't depend on each other in a known way, the pci_pm_resume() routine may be executed for the both of them in parallel.h]hXThe resume phase is carried out asynchronously for PCI devices, like the suspend phase described above, which means that if two PCI devices don’t depend on each other in a known way, the pci_pm_resume() routine may be executed for the both of them in parallel.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM hj.hhubh)}(hdThe pci_pm_complete() routine only executes the device driver's pm->complete() callback, if defined.h]hfThe pci_pm_complete() routine only executes the device driver’s pm->complete() callback, if defined.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM%hj.hhubeh}(h] system-resumeah ]h"]2.4.2. system resumeah$]h&]uh1hhj^hhhhhMubh)}(hhh](h)}(h2.4.3. System Hibernationh]h2.4.3. System Hibernation}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhM)ubh)}(hSystem hibernation is more complicated than system suspend, because it requires a system image to be created and written into a persistent storage medium. The image is created atomically and all devices are quiesced, or frozen, before that happens.h]hSystem hibernation is more complicated than system suspend, because it requires a system image to be created and written into a persistent storage medium. The image is created atomically and all devices are quiesced, or frozen, before that happens.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM+hjhhubh)}(hThe freezing of devices is carried out after enough memory has been freed (at the time of this writing the image creation requires at least 50% of system RAM to be free) in the following three phases:h]hThe freezing of devices is carried out after enough memory has been freed (at the time of this writing the image creation requires at least 50% of system RAM to be free) in the following three phases:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM0hjhhubj)}(hprepare, freeze, freeze_noirq h]h)}(hprepare, freeze, freeze_noirqh]hprepare, freeze, freeze_noirq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM4hjubah}(h]h ]h"]h$]h&]uh1jhhhM4hjhhubh)}(h1that correspond to the PCI bus type's callbacks::h]h2that correspond to the PCI bus type’s callbacks:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM6hjhhubj')}(h6pci_pm_prepare() pci_pm_freeze() pci_pm_freeze_noirq()h]h6pci_pm_prepare() pci_pm_freeze() pci_pm_freeze_noirq()}hjsbah}(h]h ]h"]h$]h&]jjuh1j&hhhM8hjhhubh)}(hzThis means that the prepare phase is exactly the same as for system suspend. The other two phases, however, are different.h]hzThis means that the prepare phase is exactly the same as for system suspend. The other two phases, however, are different.}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM<hjhhubh)}(hXAThe pci_pm_freeze() routine is quite similar to pci_pm_suspend(), but it runs the device driver's pm->freeze() callback, if defined, instead of pm->suspend(), and it doesn't apply the suspend-related hardware quirks. It is executed asynchronously for different PCI devices that don't depend on each other in a known way.h]hXGThe pci_pm_freeze() routine is quite similar to pci_pm_suspend(), but it runs the device driver’s pm->freeze() callback, if defined, instead of pm->suspend(), and it doesn’t apply the suspend-related hardware quirks. It is executed asynchronously for different PCI devices that don’t depend on each other in a known way.}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM?hjhhubh)}(hXThe pci_pm_freeze_noirq() routine, in turn, is similar to pci_pm_suspend_noirq(), but it calls the device driver's pm->freeze_noirq() routine instead of pm->suspend_noirq(). It also doesn't attempt to prepare the device for signaling wakeup and put it into a low-power state. Still, it saves the device's standard configuration registers if they haven't been saved by one of the driver's callbacks.h]hXThe pci_pm_freeze_noirq() routine, in turn, is similar to pci_pm_suspend_noirq(), but it calls the device driver’s pm->freeze_noirq() routine instead of pm->suspend_noirq(). It also doesn’t attempt to prepare the device for signaling wakeup and put it into a low-power state. Still, it saves the device’s standard configuration registers if they haven’t been saved by one of the driver’s callbacks.}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMEhjhhubh)}(hX9Once the image has been created, it has to be saved. However, at this point all devices are frozen and they cannot handle I/O, while their ability to handle I/O is obviously necessary for the image saving. Thus they have to be brought back to the fully functional state and this is done in the following phases:h]hX9Once the image has been created, it has to be saved. However, at this point all devices are frozen and they cannot handle I/O, while their ability to handle I/O is obviously necessary for the image saving. Thus they have to be brought back to the fully functional state and this is done in the following phases:}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMLhjhhubj)}(hthaw_noirq, thaw, complete h]h)}(hthaw_noirq, thaw, completeh]hthaw_noirq, thaw, complete}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMQhjZubah}(h]h ]h"]h$]h&]uh1jhhhMQhjhhubh)}(h.using the following PCI bus type's callbacks::h]h/using the following PCI bus type’s callbacks:}(hjrhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMShjhhubj')}(h3pci_pm_thaw_noirq() pci_pm_thaw() pci_pm_complete()h]h3pci_pm_thaw_noirq() pci_pm_thaw() pci_pm_complete()}hjsbah}(h]h ]h"]h$]h&]jjuh1j&hhhMUhjhhubh)}(h respectively.h]h respectively.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMYhjhhubh)}(hXThe first of them, pci_pm_thaw_noirq(), is analogous to pci_pm_resume_noirq(). It puts the device into the full power state and restores its standard configuration registers. It also executes the device driver's pm->thaw_noirq() callback, if defined, instead of pm->resume_noirq().h]hXThe first of them, pci_pm_thaw_noirq(), is analogous to pci_pm_resume_noirq(). It puts the device into the full power state and restores its standard configuration registers. It also executes the device driver’s pm->thaw_noirq() callback, if defined, instead of pm->resume_noirq().}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM[hjhhubh)}(hThe pci_pm_thaw() routine is similar to pci_pm_resume(), but it runs the device driver's pm->thaw() callback instead of pm->resume(). It is executed asynchronously for different PCI devices that don't depend on each other in a known way.h]hThe pci_pm_thaw() routine is similar to pci_pm_resume(), but it runs the device driver’s pm->thaw() callback instead of pm->resume(). It is executed asynchronously for different PCI devices that don’t depend on each other in a known way.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM`hjhhubh)}(h4The complete phase is the same as for system resume.h]h4The complete phase is the same as for system resume.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMehjhhubh)}(hAfter saving the image, devices need to be powered down before the system can enter the target sleep state (ACPI S4 for ACPI-based systems). This is done in three phases:h]hAfter saving the image, devices need to be powered down before the system can enter the target sleep state (ACPI S4 for ACPI-based systems). This is done in three phases:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMghjhhubj)}(h"prepare, poweroff, poweroff_noirq h]h)}(h!prepare, poweroff, poweroff_noirqh]h!prepare, poweroff, poweroff_noirq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMkhjubah}(h]h ]h"]h$]h&]uh1jhhhMkhjhhubh)}(hwhere the prepare phase is exactly the same as for system suspend. The other two phases are analogous to the suspend and suspend_noirq phases, respectively. The PCI subsystem-level callbacks they correspond to::h]hwhere the prepare phase is exactly the same as for system suspend. The other two phases are analogous to the suspend and suspend_noirq phases, respectively. The PCI subsystem-level callbacks they correspond to:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMmhjhhubj')}(h)pci_pm_poweroff() pci_pm_poweroff_noirq()h]h)pci_pm_poweroff() pci_pm_poweroff_noirq()}hjsbah}(h]h ]h"]h$]h&]jjuh1j&hhhMqhjhhubh)}(hwork in analogy with pci_pm_suspend() and pci_pm_suspend_noirq(), respectively, although they don't attempt to save the device's standard configuration registers.h]hwork in analogy with pci_pm_suspend() and pci_pm_suspend_noirq(), respectively, although they don’t attempt to save the device’s standard configuration registers.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMthjhhubeh}(h]system-hibernationah ]h"]2.4.3. system hibernationah$]h&]uh1hhj^hhhhhM)ubh)}(hhh](h)}(h2.4.4. System Restoreh]h2.4.4. System Restore}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhMyubh)}(hSystem restore requires a hibernation image to be loaded into memory and the pre-hibernation memory contents to be restored before the pre-hibernation system activity can be resumed.h]hSystem restore requires a hibernation image to be loaded into memory and the pre-hibernation memory contents to be restored before the pre-hibernation system activity can be resumed.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM{hjhhubh)}(hXAs described in Documentation/driver-api/pm/devices.rst, the hibernation image is loaded into memory by a fresh instance of the kernel, called the boot kernel, which in turn is loaded and run by a boot loader in the usual way. After the boot kernel has loaded the image, it needs to replace its own code and data with the code and data of the "hibernated" kernel stored within the image, called the image kernel. For this purpose all devices are frozen just like before creating the image during hibernation, in theh]hX As described in Documentation/driver-api/pm/devices.rst, the hibernation image is loaded into memory by a fresh instance of the kernel, called the boot kernel, which in turn is loaded and run by a boot loader in the usual way. After the boot kernel has loaded the image, it needs to replace its own code and data with the code and data of the “hibernated” kernel stored within the image, called the image kernel. For this purpose all devices are frozen just like before creating the image during hibernation, in the}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubj)}(hprepare, freeze, freeze_noirq h]h)}(hprepare, freeze, freeze_noirqh]hprepare, freeze, freeze_noirq}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjKubah}(h]h ]h"]h$]h&]uh1jhhhMhjhhubh)}(hphases described above. However, the devices affected by these phases are only those having drivers in the boot kernel; other devices will still be in whatever state the boot loader left them.h]hphases described above. However, the devices affected by these phases are only those having drivers in the boot kernel; other devices will still be in whatever state the boot loader left them.}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubh)}(hX(Should the restoration of the pre-hibernation memory contents fail, the boot kernel would go through the "thawing" procedure described above, using the thaw_noirq, thaw, and complete phases (that will only affect the devices having drivers in the boot kernel), and then continue running normally.h]hX,Should the restoration of the pre-hibernation memory contents fail, the boot kernel would go through the “thawing” procedure described above, using the thaw_noirq, thaw, and complete phases (that will only affect the devices having drivers in the boot kernel), and then continue running normally.}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubh)}(hXIf the pre-hibernation memory contents are restored successfully, which is the usual situation, control is passed to the image kernel, which then becomes responsible for bringing the system back to the working state. To achieve this, it must restore the devices' pre-hibernation functionality, which is done much like waking up from the memory sleep state, although it involves different phases:h]hXIf the pre-hibernation memory contents are restored successfully, which is the usual situation, control is passed to the image kernel, which then becomes responsible for bringing the system back to the working state. To achieve this, it must restore the devices’ pre-hibernation functionality, which is done much like waking up from the memory sleep state, although it involves different phases:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubj)}(h!restore_noirq, restore, complete h]h)}(h restore_noirq, restore, completeh]h restore_noirq, restore, complete}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjubah}(h]h ]h"]h$]h&]uh1jhhhMhjhhubh)}(hThe first two of these are analogous to the resume_noirq and resume phases described above, respectively, and correspond to the following PCI subsystem callbacks::h]hThe first two of these are analogous to the resume_noirq and resume phases described above, respectively, and correspond to the following PCI subsystem callbacks:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubj')}(h'pci_pm_restore_noirq() pci_pm_restore()h]h'pci_pm_restore_noirq() pci_pm_restore()}hjsbah}(h]h ]h"]h$]h&]jjuh1j&hhhMhjhhubh)}(hThese callbacks work in analogy with pci_pm_resume_noirq() and pci_pm_resume(), respectively, but they execute the device driver's pm->restore_noirq() and pm->restore() callbacks, if available.h]hThese callbacks work in analogy with pci_pm_resume_noirq() and pci_pm_resume(), respectively, but they execute the device driver’s pm->restore_noirq() and pm->restore() callbacks, if available.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubh)}(hRThe complete phase is carried out in exactly the same way as during system resume.h]hRThe complete phase is carried out in exactly the same way as during system resume.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubeh}(h]system-restoreah ]h"]2.4.4. system restoreah$]h&]uh1hhj^hhhhhMyubeh}(h]system-wide-power-transitionsah ]h"]"2.4. system-wide power transitionsah$]h&]uh1hhjhhhhhMubeh}(h])pci-subsystem-and-device-power-managementah ]h"],2. pci subsystem and device power managementah$]h&]uh1hhhhhhhhMubh)}(hhh](h)}(h*3. PCI Device Drivers and Power Managementh]h*3. PCI Device Drivers and Power Management}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhMubh)}(hhh](h)}(h3.1. Power Management Callbacksh]h3.1. Power Management Callbacks}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhMubh)}(hPCI device drivers participate in power management by providing callbacks to be executed by the PCI subsystem's power management routines described above and by controlling the runtime power management of their devices.h]hPCI device drivers participate in power management by providing callbacks to be executed by the PCI subsystem’s power management routines described above and by controlling the runtime power management of their devices.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj hhubh)}(hX3At the time of this writing there are two ways to define power management callbacks for a PCI device driver, the recommended one, based on using a dev_pm_ops structure described in Documentation/driver-api/pm/devices.rst, and the "legacy" one, in which the .suspend() and .resume() callbacks from struct pci_driver are used. The legacy approach, however, doesn't allow one to define runtime power management callbacks and is not really suitable for any new drivers. Therefore it is not covered by this document (refer to the source code to learn more about it).h]hX9At the time of this writing there are two ways to define power management callbacks for a PCI device driver, the recommended one, based on using a dev_pm_ops structure described in Documentation/driver-api/pm/devices.rst, and the “legacy” one, in which the .suspend() and .resume() callbacks from struct pci_driver are used. The legacy approach, however, doesn’t allow one to define runtime power management callbacks and is not really suitable for any new drivers. Therefore it is not covered by this document (refer to the source code to learn more about it).}(hj% hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj hhubh)}(hXIt is recommended that all PCI device drivers define a struct dev_pm_ops object containing pointers to power management (PM) callbacks that will be executed by the PCI subsystem's PM routines in various circumstances. A pointer to the driver's struct dev_pm_ops object has to be assigned to the driver.pm field in its struct pci_driver object. Once that has happened, the "legacy" PM callbacks in struct pci_driver are ignored (even if they are not NULL).h]hXIt is recommended that all PCI device drivers define a struct dev_pm_ops object containing pointers to power management (PM) callbacks that will be executed by the PCI subsystem’s PM routines in various circumstances. A pointer to the driver’s struct dev_pm_ops object has to be assigned to the driver.pm field in its struct pci_driver object. Once that has happened, the “legacy” PM callbacks in struct pci_driver are ignored (even if they are not NULL).}(hj3 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj hhubh)}(hX=The PM callbacks in struct dev_pm_ops are not mandatory and if they are not defined (i.e. the respective fields of struct dev_pm_ops are unset) the PCI subsystem will handle the device in a simplified default manner. If they are defined, though, they are expected to behave as described in the following subsections.h]hX=The PM callbacks in struct dev_pm_ops are not mandatory and if they are not defined (i.e. the respective fields of struct dev_pm_ops are unset) the PCI subsystem will handle the device in a simplified default manner. If they are defined, though, they are expected to behave as described in the following subsections.}(hjA hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj hhubh)}(hhh](h)}(h3.1.1. prepare()h]h3.1.1. prepare()}(hjR hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjO hhhhhMubh)}(hXThe prepare() callback is executed during system suspend, during hibernation (when a hibernation image is about to be created), during power-off after saving a hibernation image and during system restore, when a hibernation image has just been loaded into memory.h]hXThe prepare() callback is executed during system suspend, during hibernation (when a hibernation image is about to be created), during power-off after saving a hibernation image and during system restore, when a hibernation image has just been loaded into memory.}(hj` hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjO hhubh)}(hX6This callback is only necessary if the driver's device has children that in general may be registered at any time. In that case the role of the prepare() callback is to prevent new children of the device from being registered until one of the resume_noirq(), thaw_noirq(), or restore_noirq() callbacks is run.h]hX8This callback is only necessary if the driver’s device has children that in general may be registered at any time. In that case the role of the prepare() callback is to prevent new children of the device from being registered until one of the resume_noirq(), thaw_noirq(), or restore_noirq() callbacks is run.}(hjn hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjO hhubh)}(hXYIn addition to that the prepare() callback may carry out some operations preparing the device to be suspended, although it should not allocate memory (if additional memory is required to suspend the device, it has to be preallocated earlier, for example in a suspend/hibernate notifier as described in Documentation/driver-api/pm/notifiers.rst).h]hXYIn addition to that the prepare() callback may carry out some operations preparing the device to be suspended, although it should not allocate memory (if additional memory is required to suspend the device, it has to be preallocated earlier, for example in a suspend/hibernate notifier as described in Documentation/driver-api/pm/notifiers.rst).}(hj| hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjO hhubeh}(h]prepareah ]h"]3.1.1. prepare()ah$]h&]uh1hhj hhhhhMubh)}(hhh](h)}(h3.1.2. suspend()h]h3.1.2. suspend()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhMubh)}(hThe suspend() callback is only executed during system suspend, after prepare() callbacks have been executed for all devices in the system.h]hThe suspend() callback is only executed during system suspend, after prepare() callbacks have been executed for all devices in the system.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj hhubh)}(hXThis callback is expected to quiesce the device and prepare it to be put into a low-power state by the PCI subsystem. It is not required (in fact it even is not recommended) that a PCI driver's suspend() callback save the standard configuration registers of the device, prepare it for waking up the system, or put it into a low-power state. All of these operations can very well be taken care of by the PCI subsystem, without the driver's participation.h]hXThis callback is expected to quiesce the device and prepare it to be put into a low-power state by the PCI subsystem. It is not required (in fact it even is not recommended) that a PCI driver’s suspend() callback save the standard configuration registers of the device, prepare it for waking up the system, or put it into a low-power state. All of these operations can very well be taken care of by the PCI subsystem, without the driver’s participation.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj hhubh)}(hX5However, in some rare case it is convenient to carry out these operations in a PCI driver. Then, pci_save_state(), pci_prepare_to_sleep(), and pci_set_power_state() should be used to save the device's standard configuration registers, to prepare it for system wakeup (if necessary), and to put it into a low-power state, respectively. Moreover, if the driver calls pci_save_state(), the PCI subsystem will not execute either pci_prepare_to_sleep(), or pci_set_power_state() for its device, so the driver is then responsible for handling the device as appropriate.h]hX7However, in some rare case it is convenient to carry out these operations in a PCI driver. Then, pci_save_state(), pci_prepare_to_sleep(), and pci_set_power_state() should be used to save the device’s standard configuration registers, to prepare it for system wakeup (if necessary), and to put it into a low-power state, respectively. Moreover, if the driver calls pci_save_state(), the PCI subsystem will not execute either pci_prepare_to_sleep(), or pci_set_power_state() for its device, so the driver is then responsible for handling the device as appropriate.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj hhubh)}(hXWhile the suspend() callback is being executed, the driver's interrupt handler can be invoked to handle an interrupt from the device, so all suspend-related operations relying on the driver's ability to handle interrupts should be carried out in this callback.h]hXWhile the suspend() callback is being executed, the driver’s interrupt handler can be invoked to handle an interrupt from the device, so all suspend-related operations relying on the driver’s ability to handle interrupts should be carried out in this callback.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj hhubeh}(h]suspendah ]h"]3.1.2. suspend()ah$]h&]uh1hhj hhhhhMubh)}(hhh](h)}(h3.1.3. suspend_noirq()h]h3.1.3. suspend_noirq()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhMubh)}(hThe suspend_noirq() callback is only executed during system suspend, after suspend() callbacks have been executed for all devices in the system and after device interrupts have been disabled by the PM core.h]hThe suspend_noirq() callback is only executed during system suspend, after suspend() callbacks have been executed for all devices in the system and after device interrupts have been disabled by the PM core.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj hhubh)}(hXThe difference between suspend_noirq() and suspend() is that the driver's interrupt handler will not be invoked while suspend_noirq() is running. Thus suspend_noirq() can carry out operations that would cause race conditions to arise if they were performed in suspend().h]hXThe difference between suspend_noirq() and suspend() is that the driver’s interrupt handler will not be invoked while suspend_noirq() is running. Thus suspend_noirq() can carry out operations that would cause race conditions to arise if they were performed in suspend().}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj hhubeh}(h] suspend-noirqah ]h"]3.1.3. suspend_noirq()ah$]h&]uh1hhj hhhhhMubh)}(hhh](h)}(h3.1.4. freeze()h]h3.1.4. freeze()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhMubh)}(hXqThe freeze() callback is hibernation-specific and is executed in two situations, during hibernation, after prepare() callbacks have been executed for all devices in preparation for the creation of a system image, and during restore, after a system image has been loaded into memory from persistent storage and the prepare() callbacks have been executed for all devices.h]hXqThe freeze() callback is hibernation-specific and is executed in two situations, during hibernation, after prepare() callbacks have been executed for all devices in preparation for the creation of a system image, and during restore, after a system image has been loaded into memory from persistent storage and the prepare() callbacks have been executed for all devices.}(hj) hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj hhubh)}(hThe role of this callback is analogous to the role of the suspend() callback described above. In fact, they only need to be different in the rare cases when the driver takes the responsibility for putting the device into a low-power state.h]hThe role of this callback is analogous to the role of the suspend() callback described above. In fact, they only need to be different in the rare cases when the driver takes the responsibility for putting the device into a low-power state.}(hj7 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM hj hhubh)}(hIn that cases the freeze() callback should not prepare the device system wakeup or put it into a low-power state. Still, either it or freeze_noirq() should save the device's standard configuration registers using pci_save_state().h]hIn that cases the freeze() callback should not prepare the device system wakeup or put it into a low-power state. Still, either it or freeze_noirq() should save the device’s standard configuration registers using pci_save_state().}(hjE hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj hhubeh}(h]freezeah ]h"]3.1.4. freeze()ah$]h&]uh1hhj hhhhhMubh)}(hhh](h)}(h3.1.5. freeze_noirq()h]h3.1.5. freeze_noirq()}(hj^ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj[ hhhhhMubh)}(hXThe freeze_noirq() callback is hibernation-specific. It is executed during hibernation, after prepare() and freeze() callbacks have been executed for all devices in preparation for the creation of a system image, and during restore, after a system image has been loaded into memory and after prepare() and freeze() callbacks have been executed for all devices. It is always executed after device interrupts have been disabled by the PM core.h]hXThe freeze_noirq() callback is hibernation-specific. It is executed during hibernation, after prepare() and freeze() callbacks have been executed for all devices in preparation for the creation of a system image, and during restore, after a system image has been loaded into memory and after prepare() and freeze() callbacks have been executed for all devices. It is always executed after device interrupts have been disabled by the PM core.}(hjl hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj[ hhubh)}(hThe role of this callback is analogous to the role of the suspend_noirq() callback described above and it very rarely is necessary to define freeze_noirq().h]hThe role of this callback is analogous to the role of the suspend_noirq() callback described above and it very rarely is necessary to define freeze_noirq().}(hjz hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM hj[ hhubh)}(hxThe difference between freeze_noirq() and freeze() is analogous to the difference between suspend_noirq() and suspend().h]hxThe difference between freeze_noirq() and freeze() is analogous to the difference between suspend_noirq() and suspend().}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM$hj[ hhubeh}(h] freeze-noirqah ]h"]3.1.5. freeze_noirq()ah$]h&]uh1hhj hhhhhMubh)}(hhh](h)}(h3.1.6. poweroff()h]h3.1.6. poweroff()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhM(ubh)}(hThe poweroff() callback is hibernation-specific. It is executed when the system is about to be powered off after saving a hibernation image to a persistent storage. prepare() callbacks are executed for all devices before poweroff() is called.h]hThe poweroff() callback is hibernation-specific. It is executed when the system is about to be powered off after saving a hibernation image to a persistent storage. prepare() callbacks are executed for all devices before poweroff() is called.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM*hj hhubh)}(hX/The role of this callback is analogous to the role of the suspend() and freeze() callbacks described above, although it does not need to save the contents of the device's registers. In particular, if the driver wants to put the device into a low-power state itself instead of allowing the PCI subsystem to do that, the poweroff() callback should use pci_prepare_to_sleep() and pci_set_power_state() to prepare the device for system wakeup and to put it into a low-power state, respectively, but it need not save the device's standard configuration registers.h]hX3The role of this callback is analogous to the role of the suspend() and freeze() callbacks described above, although it does not need to save the contents of the device’s registers. In particular, if the driver wants to put the device into a low-power state itself instead of allowing the PCI subsystem to do that, the poweroff() callback should use pci_prepare_to_sleep() and pci_set_power_state() to prepare the device for system wakeup and to put it into a low-power state, respectively, but it need not save the device’s standard configuration registers.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM/hj hhubeh}(h]poweroffah ]h"]3.1.6. poweroff()ah$]h&]uh1hhj hhhhhM(ubh)}(hhh](h)}(h3.1.7. poweroff_noirq()h]h3.1.7. poweroff_noirq()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhM9ubh)}(hThe poweroff_noirq() callback is hibernation-specific. It is executed after poweroff() callbacks have been executed for all devices in the system.h]hThe poweroff_noirq() callback is hibernation-specific. It is executed after poweroff() callbacks have been executed for all devices in the system.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM;hj hhubh)}(hThe role of this callback is analogous to the role of the suspend_noirq() and freeze_noirq() callbacks described above, but it does not need to save the contents of the device's registers.h]hThe role of this callback is analogous to the role of the suspend_noirq() and freeze_noirq() callbacks described above, but it does not need to save the contents of the device’s registers.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM>hj hhubh)}(h|The difference between poweroff_noirq() and poweroff() is analogous to the difference between suspend_noirq() and suspend().h]h|The difference between poweroff_noirq() and poweroff() is analogous to the difference between suspend_noirq() and suspend().}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMBhj hhubeh}(h]poweroff-noirqah ]h"]3.1.7. poweroff_noirq()ah$]h&]uh1hhj hhhhhM9ubh)}(hhh](h)}(h3.1.8. resume_noirq()h]h3.1.8. resume_noirq()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhMFubh)}(hXThe resume_noirq() callback is only executed during system resume, after the PM core has enabled the non-boot CPUs. The driver's interrupt handler will not be invoked while resume_noirq() is running, so this callback can carry out operations that might race with the interrupt handler.h]hX The resume_noirq() callback is only executed during system resume, after the PM core has enabled the non-boot CPUs. The driver’s interrupt handler will not be invoked while resume_noirq() is running, so this callback can carry out operations that might race with the interrupt handler.}(hj' hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMHhj hhubh)}(hXWSince the PCI subsystem unconditionally puts all devices into the full power state in the resume_noirq phase of system resume and restores their standard configuration registers, resume_noirq() is usually not necessary. In general it should only be used for performing operations that would lead to race conditions if carried out by resume().h]hXWSince the PCI subsystem unconditionally puts all devices into the full power state in the resume_noirq phase of system resume and restores their standard configuration registers, resume_noirq() is usually not necessary. In general it should only be used for performing operations that would lead to race conditions if carried out by resume().}(hj5 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMMhj hhubeh}(h] resume-noirqah ]h"]3.1.8. resume_noirq()ah$]h&]uh1hhj hhhhhMFubh)}(hhh](h)}(h3.1.9. resume()h]h3.1.9. resume()}(hjN hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjK hhhhhMTubh)}(hThe resume() callback is only executed during system resume, after resume_noirq() callbacks have been executed for all devices in the system and device interrupts have been enabled by the PM core.h]hThe resume() callback is only executed during system resume, after resume_noirq() callbacks have been executed for all devices in the system and device interrupts have been enabled by the PM core.}(hj\ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMVhjK hhubh)}(hThis callback is responsible for restoring the pre-suspend configuration of the device and bringing it back to the fully functional state. The device should be able to process I/O in a usual way after resume() has returned.h]hThis callback is responsible for restoring the pre-suspend configuration of the device and bringing it back to the fully functional state. The device should be able to process I/O in a usual way after resume() has returned.}(hjj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMZhjK hhubeh}(h]resumeah ]h"]3.1.9. resume()ah$]h&]uh1hhj hhhhhMTubh)}(hhh](h)}(h3.1.10. thaw_noirq()h]h3.1.10. thaw_noirq()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhM_ubh)}(hXThe thaw_noirq() callback is hibernation-specific. It is executed after a system image has been created and the non-boot CPUs have been enabled by the PM core, in the thaw_noirq phase of hibernation. It also may be executed if the loading of a hibernation image fails during system restore (it is then executed after enabling the non-boot CPUs). The driver's interrupt handler will not be invoked while thaw_noirq() is running.h]hXThe thaw_noirq() callback is hibernation-specific. It is executed after a system image has been created and the non-boot CPUs have been enabled by the PM core, in the thaw_noirq phase of hibernation. It also may be executed if the loading of a hibernation image fails during system restore (it is then executed after enabling the non-boot CPUs). The driver’s interrupt handler will not be invoked while thaw_noirq() is running.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMahj hhubh)}(hXThe role of this callback is analogous to the role of resume_noirq(). The difference between these two callbacks is that thaw_noirq() is executed after freeze() and freeze_noirq(), so in general it does not need to modify the contents of the device's registers.h]hXThe role of this callback is analogous to the role of resume_noirq(). The difference between these two callbacks is that thaw_noirq() is executed after freeze() and freeze_noirq(), so in general it does not need to modify the contents of the device’s registers.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhhj hhubeh}(h] thaw-noirqah ]h"]3.1.10. thaw_noirq()ah$]h&]uh1hhj hhhhhM_ubh)}(hhh](h)}(h3.1.11. thaw()h]h3.1.11. thaw()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhMnubh)}(hThe thaw() callback is hibernation-specific. It is executed after thaw_noirq() callbacks have been executed for all devices in the system and after device interrupts have been enabled by the PM core.h]hThe thaw() callback is hibernation-specific. It is executed after thaw_noirq() callbacks have been executed for all devices in the system and after device interrupts have been enabled by the PM core.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMphj hhubh)}(hThis callback is responsible for restoring the pre-freeze configuration of the device, so that it will work in a usual way after thaw() has returned.h]hThis callback is responsible for restoring the pre-freeze configuration of the device, so that it will work in a usual way after thaw() has returned.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMthj hhubeh}(h]thawah ]h"]3.1.11. thaw()ah$]h&]uh1hhj hhhhhMnubh)}(hhh](h)}(h3.1.12. restore_noirq()h]h3.1.12. restore_noirq()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhMxubh)}(hThe restore_noirq() callback is hibernation-specific. It is executed in the restore_noirq phase of hibernation, when the boot kernel has passed control to the image kernel and the non-boot CPUs have been enabled by the image kernel's PM core.h]hThe restore_noirq() callback is hibernation-specific. It is executed in the restore_noirq phase of hibernation, when the boot kernel has passed control to the image kernel and the non-boot CPUs have been enabled by the image kernel’s PM core.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMzhj hhubh)}(hThis callback is analogous to resume_noirq() with the exception that it cannot make any assumption on the previous state of the device, even if the BIOS (or generally the platform firmware) is known to preserve that state over a suspend-resume cycle.h]hThis callback is analogous to resume_noirq() with the exception that it cannot make any assumption on the previous state of the device, even if the BIOS (or generally the platform firmware) is known to preserve that state over a suspend-resume cycle.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj hhubh)}(hnFor the vast majority of PCI device drivers there is no difference between resume_noirq() and restore_noirq().h]hnFor the vast majority of PCI device drivers there is no difference between resume_noirq() and restore_noirq().}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj hhubeh}(h] restore-noirqah ]h"]3.1.12. restore_noirq()ah$]h&]uh1hhj hhhhhMxubh)}(hhh](h)}(h3.1.13. restore()h]h3.1.13. restore()}(hj0 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj- hhhhhMubh)}(hThe restore() callback is hibernation-specific. It is executed after restore_noirq() callbacks have been executed for all devices in the system and after the PM core has enabled device drivers' interrupt handlers to be invoked.h]hThe restore() callback is hibernation-specific. It is executed after restore_noirq() callbacks have been executed for all devices in the system and after the PM core has enabled device drivers’ interrupt handlers to be invoked.}(hj> hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj- hhubh)}(hThis callback is analogous to resume(), just like restore_noirq() is analogous to resume_noirq(). Consequently, the difference between restore_noirq() and restore() is analogous to the difference between resume_noirq() and resume().h]hThis callback is analogous to resume(), just like restore_noirq() is analogous to resume_noirq(). Consequently, the difference between restore_noirq() and restore() is analogous to the difference between resume_noirq() and resume().}(hjL hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj- hhubh)}(hbFor the vast majority of PCI device drivers there is no difference between resume() and restore().h]hbFor the vast majority of PCI device drivers there is no difference between resume() and restore().}(hjZ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj- hhubeh}(h]restoreah ]h"]3.1.13. restore()ah$]h&]uh1hhj hhhhhMubh)}(hhh](h)}(h3.1.14. complete()h]h3.1.14. complete()}(hjs hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjp hhhhhMubh)}(h@The complete() callback is executed in the following situations:h]h@The complete() callback is executed in the following situations:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjp hhubj)}(hX_- during system resume, after resume() callbacks have been executed for all devices, - during hibernation, before saving the system image, after thaw() callbacks have been executed for all devices, - during system restore, when the system is going back to its pre-hibernation state, after restore() callbacks have been executed for all devices. h]h bullet_list)}(hhh](h list_item)}(hRduring system resume, after resume() callbacks have been executed for all devices,h]h)}(hRduring system resume, after resume() callbacks have been executed for all devices,h]hRduring system resume, after resume() callbacks have been executed for all devices,}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj ubah}(h]h ]h"]h$]h&]uh1j hj ubj )}(hnduring hibernation, before saving the system image, after thaw() callbacks have been executed for all devices,h]h)}(hnduring hibernation, before saving the system image, after thaw() callbacks have been executed for all devices,h]hnduring hibernation, before saving the system image, after thaw() callbacks have been executed for all devices,}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj ubah}(h]h ]h"]h$]h&]uh1j hj ubj )}(hduring system restore, when the system is going back to its pre-hibernation state, after restore() callbacks have been executed for all devices. h]h)}(hduring system restore, when the system is going back to its pre-hibernation state, after restore() callbacks have been executed for all devices.h]hduring system restore, when the system is going back to its pre-hibernation state, after restore() callbacks have been executed for all devices.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj ubah}(h]h ]h"]h$]h&]uh1j hj ubeh}(h]h ]h"]h$]h&]bullet-uh1j hhhMhj ubah}(h]h ]h"]h$]h&]uh1jhhhMhjp hhubh)}(hIt also may be executed if the loading of a hibernation image into memory fails (in that case it is run after thaw() callbacks have been executed for all devices that have drivers in the boot kernel).h]hIt also may be executed if the loading of a hibernation image into memory fails (in that case it is run after thaw() callbacks have been executed for all devices that have drivers in the boot kernel).}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjp hhubh)}(hThis callback is entirely optional, although it may be necessary if the prepare() callback performs operations that need to be reversed.h]hThis callback is entirely optional, although it may be necessary if the prepare() callback performs operations that need to be reversed.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjp hhubeh}(h]completeah ]h"]3.1.14. complete()ah$]h&]uh1hhj hhhhhMubh)}(hhh](h)}(h3.1.15. runtime_suspend()h]h3.1.15. runtime_suspend()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhMubh)}(hThe runtime_suspend() callback is specific to device runtime power management (runtime PM). It is executed by the PM core's runtime PM framework when the device is about to be suspended (i.e. quiesced and put into a low-power state) at run time.h]hThe runtime_suspend() callback is specific to device runtime power management (runtime PM). It is executed by the PM core’s runtime PM framework when the device is about to be suspended (i.e. quiesced and put into a low-power state) at run time.}(hj% hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj hhubh)}(hThis callback is responsible for freezing the device and preparing it to be put into a low-power state, but it must allow the PCI subsystem to perform all of the PCI-specific actions necessary for suspending the device.h]hThis callback is responsible for freezing the device and preparing it to be put into a low-power state, but it must allow the PCI subsystem to perform all of the PCI-specific actions necessary for suspending the device.}(hj3 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj hhubeh}(h]runtime-suspendah ]h"]3.1.15. runtime_suspend()ah$]h&]uh1hhj hhhhhMubh)}(hhh](h)}(h3.1.16. runtime_resume()h]h3.1.16. runtime_resume()}(hjL hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjI hhhhhMubh)}(hThe runtime_resume() callback is specific to device runtime PM. It is executed by the PM core's runtime PM framework when the device is about to be resumed (i.e. put into the full-power state and programmed to process I/O normally) at run time.h]hThe runtime_resume() callback is specific to device runtime PM. It is executed by the PM core’s runtime PM framework when the device is about to be resumed (i.e. put into the full-power state and programmed to process I/O normally) at run time.}(hjZ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjI hhubh)}(hThis callback is responsible for restoring the normal functionality of the device after it has been put into the full-power state by the PCI subsystem. The device is expected to be able to process I/O in the usual way after runtime_resume() has returned.h]hThis callback is responsible for restoring the normal functionality of the device after it has been put into the full-power state by the PCI subsystem. The device is expected to be able to process I/O in the usual way after runtime_resume() has returned.}(hjh hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjI hhubeh}(h]runtime-resumeah ]h"]3.1.16. runtime_resume()ah$]h&]uh1hhj hhhhhMubh)}(hhh](h)}(h3.1.17. runtime_idle()h]h3.1.17. runtime_idle()}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj~ hhhhhMubh)}(hXtThe runtime_idle() callback is specific to device runtime PM. It is executed by the PM core's runtime PM framework whenever it may be desirable to suspend the device according to the PM core's information. In particular, it is automatically executed right after runtime_resume() has returned in case the resume of the device has happened as a result of a spurious event.h]hXxThe runtime_idle() callback is specific to device runtime PM. It is executed by the PM core’s runtime PM framework whenever it may be desirable to suspend the device according to the PM core’s information. In particular, it is automatically executed right after runtime_resume() has returned in case the resume of the device has happened as a result of a spurious event.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj~ hhubh)}(hThis callback is optional, but if it is not implemented or if it returns 0, the PCI subsystem will call pm_runtime_suspend() for the device, which in turn will cause the driver's runtime_suspend() callback to be executed.h]hThis callback is optional, but if it is not implemented or if it returns 0, the PCI subsystem will call pm_runtime_suspend() for the device, which in turn will cause the driver’s runtime_suspend() callback to be executed.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj~ hhubeh}(h] runtime-idleah ]h"]3.1.17. runtime_idle()ah$]h&]uh1hhj hhhhhMubh)}(hhh](h)}(h:3.1.18. Pointing Multiple Callback Pointers to One Routineh]h:3.1.18. Pointing Multiple Callback Pointers to One Routine}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhMubh)}(hXAlthough in principle each of the callbacks described in the previous subsections can be defined as a separate function, it often is convenient to point two or more members of struct dev_pm_ops to the same routine. There are a few convenience macros that can be used for this purpose.h]hXAlthough in principle each of the callbacks described in the previous subsections can be defined as a separate function, it often is convenient to point two or more members of struct dev_pm_ops to the same routine. There are a few convenience macros that can be used for this purpose.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj hhubh)}(hX3The DEFINE_SIMPLE_DEV_PM_OPS() declares a struct dev_pm_ops object with one suspend routine pointed to by the .suspend(), .freeze(), and .poweroff() members and one resume routine pointed to by the .resume(), .thaw(), and .restore() members. The other function pointers in this struct dev_pm_ops are unset.h]hX3The DEFINE_SIMPLE_DEV_PM_OPS() declares a struct dev_pm_ops object with one suspend routine pointed to by the .suspend(), .freeze(), and .poweroff() members and one resume routine pointed to by the .resume(), .thaw(), and .restore() members. The other function pointers in this struct dev_pm_ops are unset.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj hhubh)}(hThe DEFINE_RUNTIME_DEV_PM_OPS() is similar to DEFINE_SIMPLE_DEV_PM_OPS(), but it additionally sets the .runtime_resume() pointer to pm_runtime_force_resume() and the .runtime_suspend() pointer to pm_runtime_force_suspend().h]hThe DEFINE_RUNTIME_DEV_PM_OPS() is similar to DEFINE_SIMPLE_DEV_PM_OPS(), but it additionally sets the .runtime_resume() pointer to pm_runtime_force_resume() and the .runtime_suspend() pointer to pm_runtime_force_suspend().}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj hhubh)}(hXThe SYSTEM_SLEEP_PM_OPS() can be used inside of a declaration of struct dev_pm_ops to indicate that one suspend routine is to be pointed to by the .suspend(), .freeze(), and .poweroff() members and one resume routine is to be pointed to by the .resume(), .thaw(), and .restore() members.h]hXThe SYSTEM_SLEEP_PM_OPS() can be used inside of a declaration of struct dev_pm_ops to indicate that one suspend routine is to be pointed to by the .suspend(), .freeze(), and .poweroff() members and one resume routine is to be pointed to by the .resume(), .thaw(), and .restore() members.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhj hhubeh}(h]2pointing-multiple-callback-pointers-to-one-routineah ]h"]:3.1.18. pointing multiple callback pointers to one routineah$]h&]uh1hhj hhhhhMubh)}(hhh](h)}(h)3.1.19. Driver Flags for Power Managementh]h)3.1.19. Driver Flags for Power Management}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhMubh)}(hXYThe PM core allows device drivers to set flags that influence the handling of power management for the devices by the core itself and by middle layer code including the PCI bus type. The flags should be set once at the driver probe time with the help of the dev_pm_set_driver_flags() function and they should not be updated directly afterwards.h]hXYThe PM core allows device drivers to set flags that influence the handling of power management for the devices by the core itself and by middle layer code including the PCI bus type. The flags should be set once at the driver probe time with the help of the dev_pm_set_driver_flags() function and they should not be updated directly afterwards.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubh)}(hXNThe DPM_FLAG_NO_DIRECT_COMPLETE flag prevents the PM core from using the direct-complete mechanism allowing device suspend/resume callbacks to be skipped if the device is in runtime suspend when the system suspend starts. That also affects all of the ancestors of the device, so this flag should only be used if absolutely necessary.h]hXNThe DPM_FLAG_NO_DIRECT_COMPLETE flag prevents the PM core from using the direct-complete mechanism allowing device suspend/resume callbacks to be skipped if the device is in runtime suspend when the system suspend starts. That also affects all of the ancestors of the device, so this flag should only be used if absolutely necessary.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubh)}(hXeThe DPM_FLAG_SMART_PREPARE flag causes the PCI bus type to return a positive value from pci_pm_prepare() only if the ->prepare callback provided by the driver of the device returns a positive value. That allows the driver to opt out from using the direct-complete mechanism dynamically (whereas setting DPM_FLAG_NO_DIRECT_COMPLETE means permanent opt-out).h]hXeThe DPM_FLAG_SMART_PREPARE flag causes the PCI bus type to return a positive value from pci_pm_prepare() only if the ->prepare callback provided by the driver of the device returns a positive value. That allows the driver to opt out from using the direct-complete mechanism dynamically (whereas setting DPM_FLAG_NO_DIRECT_COMPLETE means permanent opt-out).}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubh)}(hXThe DPM_FLAG_SMART_SUSPEND flag tells the PCI bus type that from the driver's perspective the device can be safely left in runtime suspend during system suspend. That causes pci_pm_suspend(), pci_pm_freeze() and pci_pm_poweroff() to avoid resuming the device from runtime suspend unless there are PCI-specific reasons for doing that. Also, it causes pci_pm_suspend_late/noirq() and pci_pm_poweroff_late/noirq() to return early if the device remains in runtime suspend during the "late" phase of the system-wide transition under way. Moreover, if the device is in runtime suspend in pci_pm_resume_noirq() or pci_pm_restore_noirq(), its runtime PM status will be changed to "active" (as it is going to be put into D0 going forward).h]hXThe DPM_FLAG_SMART_SUSPEND flag tells the PCI bus type that from the driver’s perspective the device can be safely left in runtime suspend during system suspend. That causes pci_pm_suspend(), pci_pm_freeze() and pci_pm_poweroff() to avoid resuming the device from runtime suspend unless there are PCI-specific reasons for doing that. Also, it causes pci_pm_suspend_late/noirq() and pci_pm_poweroff_late/noirq() to return early if the device remains in runtime suspend during the “late” phase of the system-wide transition under way. Moreover, if the device is in runtime suspend in pci_pm_resume_noirq() or pci_pm_restore_noirq(), its runtime PM status will be changed to “active” (as it is going to be put into D0 going forward).}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubh)}(hXSetting the DPM_FLAG_MAY_SKIP_RESUME flag means that the driver allows its "noirq" and "early" resume callbacks to be skipped if the device can be left in suspend after a system-wide transition into the working state. This flag is taken into consideration by the PM core along with the power.may_skip_resume status bit of the device which is set by pci_pm_suspend_noirq() in certain situations. If the PM core determines that the driver's "noirq" and "early" resume callbacks should be skipped, the dev_pm_skip_resume() helper function will return "true" and that will cause pci_pm_resume_noirq() and pci_pm_resume_early() to return upfront without touching the device and executing the driver callbacks.>h]hXSetting the DPM_FLAG_MAY_SKIP_RESUME flag means that the driver allows its “noirq” and “early” resume callbacks to be skipped if the device can be left in suspend after a system-wide transition into the working state. This flag is taken into consideration by the PM core along with the power.may_skip_resume status bit of the device which is set by pci_pm_suspend_noirq() in certain situations. If the PM core determines that the driver’s “noirq” and “early” resume callbacks should be skipped, the dev_pm_skip_resume() helper function will return “true” and that will cause pci_pm_resume_noirq() and pci_pm_resume_early() to return upfront without touching the device and executing the driver callbacks.}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjhhubeh}(h]!driver-flags-for-power-managementah ]h"])3.1.19. driver flags for power managementah$]h&]uh1hhj hhhhhMubeh}(h]power-management-callbacksah ]h"]3.1. power management callbacksah$]h&]uh1hhjhhhhhMubh)}(hhh](h)}(h$3.2. Device Runtime Power Managementh]h$3.2. Device Runtime Power Management}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjkhhhhhMubh)}(hIn addition to providing device power management callbacks PCI device drivers are responsible for controlling the runtime power management (runtime PM) of their devices.h]hIn addition to providing device power management callbacks PCI device drivers are responsible for controlling the runtime power management (runtime PM) of their devices.}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjkhhubh)}(hX7The PCI device runtime PM is optional, but it is recommended that PCI device drivers implement it at least in the cases where there is a reliable way of verifying that the device is not used (like when the network cable is detached from an Ethernet adapter or there are no devices attached to a USB controller).h]hX7The PCI device runtime PM is optional, but it is recommended that PCI device drivers implement it at least in the cases where there is a reliable way of verifying that the device is not used (like when the network cable is detached from an Ethernet adapter or there are no devices attached to a USB controller).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjkhhubh)}(hXTo support the PCI runtime PM the driver first needs to implement the runtime_suspend() and runtime_resume() callbacks. It also may need to implement the runtime_idle() callback to prevent the device from being suspended again every time right after the runtime_resume() callback has returned (alternatively, the runtime_suspend() callback will have to check if the device should really be suspended and return -EAGAIN if that is not the case).h]hXTo support the PCI runtime PM the driver first needs to implement the runtime_suspend() and runtime_resume() callbacks. It also may need to implement the runtime_idle() callback to prevent the device from being suspended again every time right after the runtime_resume() callback has returned (alternatively, the runtime_suspend() callback will have to check if the device should really be suspended and return -EAGAIN if that is not the case).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMhjkhhubh)}(hXThe runtime PM of PCI devices is enabled by default by the PCI core. PCI device drivers do not need to enable it and should not attempt to do so. However, it is blocked by pci_pm_init() that runs the pm_runtime_forbid() helper function. In addition to that, the runtime PM usage counter of each PCI device is incremented by local_pci_probe() before executing the probe callback provided by the device's driver.h]hXThe runtime PM of PCI devices is enabled by default by the PCI core. PCI device drivers do not need to enable it and should not attempt to do so. However, it is blocked by pci_pm_init() that runs the pm_runtime_forbid() helper function. In addition to that, the runtime PM usage counter of each PCI device is incremented by local_pci_probe() before executing the probe callback provided by the device’s driver.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM#hjkhhubh)}(hXIf a PCI driver implements the runtime PM callbacks and intends to use the runtime PM framework provided by the PM core and the PCI subsystem, it needs to decrement the device's runtime PM usage counter in its probe callback function. If it doesn't do that, the counter will always be different from zero for the device and it will never be runtime-suspended. The simplest way to do that is by calling pm_runtime_put_noidle(), but if the driver wants to schedule an autosuspend right away, for example, it may call pm_runtime_put_autosuspend() instead for this purpose. Generally, it just needs to call a function that decrements the devices usage counter from its probe routine to make runtime PM work for the device.h]hXIf a PCI driver implements the runtime PM callbacks and intends to use the runtime PM framework provided by the PM core and the PCI subsystem, it needs to decrement the device’s runtime PM usage counter in its probe callback function. If it doesn’t do that, the counter will always be different from zero for the device and it will never be runtime-suspended. The simplest way to do that is by calling pm_runtime_put_noidle(), but if the driver wants to schedule an autosuspend right away, for example, it may call pm_runtime_put_autosuspend() instead for this purpose. Generally, it just needs to call a function that decrements the devices usage counter from its probe routine to make runtime PM work for the device.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM*hjkhhubh)}(hXJIt is important to remember that the driver's runtime_suspend() callback may be executed right after the usage counter has been decremented, because user space may already have caused the pm_runtime_allow() helper function unblocking the runtime PM of the device to run via sysfs, so the driver must be prepared to cope with that.h]hXLIt is important to remember that the driver’s runtime_suspend() callback may be executed right after the usage counter has been decremented, because user space may already have caused the pm_runtime_allow() helper function unblocking the runtime PM of the device to run via sysfs, so the driver must be prepared to cope with that.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM5hjkhhubh)}(hXlThe driver itself should not call pm_runtime_allow(), though. Instead, it should let user space or some platform-specific code do that (user space can do it via sysfs as stated above), but it must be prepared to handle the runtime PM of the device correctly as soon as pm_runtime_allow() is called (which may happen at any time, even before the driver is loaded).h]hXlThe driver itself should not call pm_runtime_allow(), though. Instead, it should let user space or some platform-specific code do that (user space can do it via sysfs as stated above), but it must be prepared to handle the runtime PM of the device correctly as soon as pm_runtime_allow() is called (which may happen at any time, even before the driver is loaded).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM;hjkhhubh)}(hXWhen the driver's remove callback runs, it has to balance the decrementation of the device's runtime PM usage counter at the probe time. For this reason, if it has decremented the counter in its probe callback, it must run pm_runtime_get_noresume() in its remove callback. [Since the core carries out a runtime resume of the device and bumps up the device's usage counter before running the driver's remove callback, the runtime PM of the device is effectively disabled for the duration of the remove execution and all runtime PM helper functions incrementing the device's usage counter are then effectively equivalent to pm_runtime_get_noresume().]h]hXWhen the driver’s remove callback runs, it has to balance the decrementation of the device’s runtime PM usage counter at the probe time. For this reason, if it has decremented the counter in its probe callback, it must run pm_runtime_get_noresume() in its remove callback. [Since the core carries out a runtime resume of the device and bumps up the device’s usage counter before running the driver’s remove callback, the runtime PM of the device is effectively disabled for the duration of the remove execution and all runtime PM helper functions incrementing the device’s usage counter are then effectively equivalent to pm_runtime_get_noresume().]}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMAhjkhhubh)}(hXThe runtime PM framework works by processing requests to suspend or resume devices, or to check if they are idle (in which cases it is reasonable to subsequently request that they be suspended). These requests are represented by work items put into the power management workqueue, pm_wq. Although there are a few situations in which power management requests are automatically queued by the PM core (for example, after processing a request to resume a device the PM core automatically queues a request to check if the device is idle), device drivers are generally responsible for queuing power management requests for their devices. For this purpose they should use the runtime PM helper functions provided by the PM core, discussed in Documentation/power/runtime_pm.rst.h]hXThe runtime PM framework works by processing requests to suspend or resume devices, or to check if they are idle (in which cases it is reasonable to subsequently request that they be suspended). These requests are represented by work items put into the power management workqueue, pm_wq. Although there are a few situations in which power management requests are automatically queued by the PM core (for example, after processing a request to resume a device the PM core automatically queues a request to check if the device is idle), device drivers are generally responsible for queuing power management requests for their devices. For this purpose they should use the runtime PM helper functions provided by the PM core, discussed in Documentation/power/runtime_pm.rst.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMKhjkhhubh)}(hDevices can also be suspended and resumed synchronously, without placing a request into pm_wq. In the majority of cases this also is done by their drivers that use helper functions provided by the PM core for this purpose.h]hDevices can also be suspended and resumed synchronously, without placing a request into pm_wq. In the majority of cases this also is done by their drivers that use helper functions provided by the PM core for this purpose.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhMWhjkhhubh)}(h^For more information on the runtime PM of devices refer to Documentation/power/runtime_pm.rst.h]h^For more information on the runtime PM of devices refer to Documentation/power/runtime_pm.rst.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhM[hjkhhubeh}(h]device-runtime-power-managementah ]h"]$3.2. device runtime power managementah$]h&]uh1hhjhhhhhMubeh}(h]'pci-device-drivers-and-power-managementah ]h"]*3. pci device drivers and power managementah$]h&]uh1hhhhhhhhMubh)}(hhh](h)}(h 4. Resourcesh]h 4. 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