€•kŒsphinx.addnodes”Œdocument”“”)�”}”(Œ rawsource”Œ”Œchildren”]”(Œ translations”Œ LanguagesNode”“”)�”}”(hhh]”(hŒ pending_xref”“”)�”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…”�”}”Œparent”hsbaŒ attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ refdomain”Œstd”Œreftype”Œdoc”Œ reftarget”Œ//translations/zh_CN/networking/oa-tc6-framework”Œmodname”NŒ classname”NŒ refexplicit”ˆuŒtagname”hhh ubh)�”}”(hhh]”hŒChinese (Traditional)”…”�”}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ//translations/zh_TW/networking/oa-tc6-framework”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)�”}”(hhh]”hŒItalian”…”�”}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ//translations/it_IT/networking/oa-tc6-framework”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)�”}”(hhh]”hŒJapanese”…”�”}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ//translations/ja_JP/networking/oa-tc6-framework”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)�”}”(hhh]”hŒKorean”…”�”}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ//translations/ko_KR/networking/oa-tc6-framework”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)�”}”(hhh]”hŒPortuguese (Brazilian)”…”�”}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ//translations/pt_BR/networking/oa-tc6-framework”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)�”}”(hhh]”hŒSpanish”…”�”}”hh–sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ//translations/sp_SP/networking/oa-tc6-framework”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h hhŒ _document”hŒsource”NŒline”NubhŒcomment”“”)�”}”(hŒ!SPDX-License-Identifier: GPL-2.0+”h]”hŒ!SPDX-License-Identifier: GPL-2.0+”…”�”}”hh·sbah}”(h]”h ]”h"]”h$]”h&]”Œ xml:space”Œpreserve”uh1hµhhh²hh³ŒI/var/lib/git/docbuild/linux/Documentation/networking/oa-tc6-framework.rst”h´KubhŒsection”“”)�”}”(hhh]”(hŒtitle”“”)�”}”(hŒIOPEN Alliance 10BASE-T1x MAC-PHY Serial Interface (TC6) Framework Support”h]”hŒIOPEN Alliance 10BASE-T1x MAC-PHY Serial Interface (TC6) Framework Support”…”�”}”(hhÏh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhhÊh²hh³hÇh´KubhÉ)�”}”(hhh]”(hÎ)�”}”(hŒ Introduction”h]”hŒ Introduction”…”�”}”(hhàh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhhÝh²hh³hÇh´KubhŒ paragraph”“”)�”}”(hXáThe IEEE 802.3cg project defines two 10 Mbit/s PHYs operating over a single pair of conductors. The 10BASE-T1L (Clause 146) is a long reach PHY supporting full duplex point-to-point operation over 1 km of single balanced pair of conductors. The 10BASE-T1S (Clause 147) is a short reach PHY supporting full / half duplex point-to-point operation over 15 m of single balanced pair of conductors, or half duplex multidrop bus operation over 25 m of single balanced pair of conductors.”h]”hXáThe IEEE 802.3cg project defines two 10 Mbit/s PHYs operating over a single pair of conductors. The 10BASE-T1L (Clause 146) is a long reach PHY supporting full duplex point-to-point operation over 1 km of single balanced pair of conductors. The 10BASE-T1S (Clause 147) is a short reach PHY supporting full / half duplex point-to-point operation over 15 m of single balanced pair of conductors, or half duplex multidrop bus operation over 25 m of single balanced pair of conductors.”…”�”}”(hhðh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´K hhÝh²hubhï)�”}”(hXFurthermore, the IEEE 802.3cg project defines the new Physical Layer Collision Avoidance (PLCA) Reconciliation Sublayer (Clause 148) meant to provide improved determinism to the CSMA/CD media access method. PLCA works in conjunction with the 10BASE-T1S PHY operating in multidrop mode.”h]”hXFurthermore, the IEEE 802.3cg project defines the new Physical Layer Collision Avoidance (PLCA) Reconciliation Sublayer (Clause 148) meant to provide improved determinism to the CSMA/CD media access method. PLCA works in conjunction with the 10BASE-T1S PHY operating in multidrop mode.”…”�”}”(hhþh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´KhhÝh²hubhï)�”}”(hXBThe aforementioned PHYs are intended to cover the low-speed / low-cost applications in industrial and automotive environment. The large number of pins (16) required by the MII interface, which is specified by the IEEE 802.3 in Clause 22, is one of the major cost factors that need to be addressed to fulfil this objective.”h]”hXBThe aforementioned PHYs are intended to cover the low-speed / low-cost applications in industrial and automotive environment. The large number of pins (16) required by the MII interface, which is specified by the IEEE 802.3 in Clause 22, is one of the major cost factors that need to be addressed to fulfil this objective.”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´KhhÝh²hubhï)�”}”(hX(The MAC-PHY solution integrates an IEEE Clause 4 MAC and a 10BASE-T1x PHY exposing a low pin count Serial Peripheral Interface (SPI) to the host microcontroller. This also enables the addition of Ethernet functionality to existing low-end microcontrollers which do not integrate a MAC controller.”h]”hX(The MAC-PHY solution integrates an IEEE Clause 4 MAC and a 10BASE-T1x PHY exposing a low pin count Serial Peripheral Interface (SPI) to the host microcontroller. This also enables the addition of Ethernet functionality to existing low-end microcontrollers which do not integrate a MAC controller.”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´KhhÝh²hubeh}”(h]”Œ introduction”ah ]”h"]”Œ introduction”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´KubhÉ)�”}”(hhh]”(hÎ)�”}”(hŒOverview”h]”hŒOverview”…”�”}”(hj3h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhj0h²hh³hÇh´K$ubhï)�”}”(hŒŸThe MAC-PHY is specified to carry both data (Ethernet frames) and control (register access) transactions over a single full-duplex serial peripheral interface.”h]”hŒŸThe MAC-PHY is specified to carry both data (Ethernet frames) and control (register access) transactions over a single full-duplex serial peripheral interface.”…”�”}”(hjAh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´K&hj0h²hubeh}”(h]”Œoverview”ah ]”h"]”Œoverview”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´K$ubhÉ)�”}”(hhh]”(hÎ)�”}”(hŒProtocol Overview”h]”hŒProtocol Overview”…”�”}”(hjZh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjWh²hh³hÇh´K+ubhï)�”}”(hX¸Two types of transactions are defined in the protocol: data transactions for Ethernet frame transfers and control transactions for register read/write transfers. A chunk is the basic element of data transactions and is composed of 4 bytes of overhead plus 64 bytes of payload size for each chunk. Ethernet frames are transferred over one or more data chunks. Control transactions consist of one or more register read/write control commands.”h]”hX¸Two types of transactions are defined in the protocol: data transactions for Ethernet frame transfers and control transactions for register read/write transfers. A chunk is the basic element of data transactions and is composed of 4 bytes of overhead plus 64 bytes of payload size for each chunk. Ethernet frames are transferred over one or more data chunks. Control transactions consist of one or more register read/write control commands.”…”�”}”(hjhh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´K-hjWh²hubhï)�”}”(hXSPI transactions are initiated by the SPI host with the assertion of CSn low to the MAC-PHY and ends with the deassertion of CSn high. In between each SPI transaction, the SPI host may need time for additional processing and to setup the next SPI data or control transaction.”h]”hXSPI transactions are initiated by the SPI host with the assertion of CSn low to the MAC-PHY and ends with the deassertion of CSn high. In between each SPI transaction, the SPI host may need time for additional processing and to setup the next SPI data or control transaction.”…”�”}”(hjvh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´K5hjWh²hubhï)�”}”(hX#SPI data transactions consist of an equal number of transmit (TX) and receive (RX) chunks. Chunks in both transmit and receive directions may or may not contain valid frame data independent from each other, allowing for the simultaneous transmission and reception of different length frames.”h]”hX#SPI data transactions consist of an equal number of transmit (TX) and receive (RX) chunks. Chunks in both transmit and receive directions may or may not contain valid frame data independent from each other, allowing for the simultaneous transmission and reception of different length frames.”…”�”}”(hj„h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´K:hjWh²hubhï)�”}”(hXEach transmit data chunk begins with a 32-bit data header followed by a data chunk payload on MOSI. The data header indicates whether transmit frame data is present and provides the information to determine which bytes of the payload contain valid frame data.”h]”hXEach transmit data chunk begins with a 32-bit data header followed by a data chunk payload on MOSI. The data header indicates whether transmit frame data is present and provides the information to determine which bytes of the payload contain valid frame data.”…”�”}”(hj’h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´K@hjWh²hubhï)�”}”(hXKIn parallel, receive data chunks are received on MISO. Each receive data chunk consists of a data chunk payload ending with a 32-bit data footer. The data footer indicates if there is receive frame data present within the payload or not and provides the information to determine which bytes of the payload contain valid frame data.”h]”hXKIn parallel, receive data chunks are received on MISO. Each receive data chunk consists of a data chunk payload ending with a 32-bit data footer. The data footer indicates if there is receive frame data present within the payload or not and provides the information to determine which bytes of the payload contain valid frame data.”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´KEhjWh²hubeh}”(h]”Œprotocol-overview”ah ]”h"]”Œprotocol overview”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´K+ubhÉ)�”}”(hhh]”(hÎ)�”}”(hŒ Reference”h]”hŒ Reference”…”�”}”(hj¹h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhj¶h²hh³hÇh´KLubhï)�”}”(hŒ210BASE-T1x MAC-PHY Serial Interface Specification,”h]”hŒ210BASE-T1x MAC-PHY Serial Interface Specification,”…”�”}”(hjÇh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´KNhj¶h²hubhï)�”}”(hŒnLink: https://opensig.org/wp-content/uploads/2023/12/OPEN_Alliance_10BASET1x_MAC-PHY_Serial_Interface_V1.1.pdf”h]”(hŒLink: ”…”�”}”(hjÕh²hh³Nh´NubhŒ reference”“”)�”}”(hŒhhttps://opensig.org/wp-content/uploads/2023/12/OPEN_Alliance_10BASET1x_MAC-PHY_Serial_Interface_V1.1.pdf”h]”hŒhhttps://opensig.org/wp-content/uploads/2023/12/OPEN_Alliance_10BASET1x_MAC-PHY_Serial_Interface_V1.1.pdf”…”�”}”(hjßh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”jáuh1jÝhjÕubeh}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´KPhj¶h²hubeh}”(h]”Œ reference”ah ]”h"]”Œ reference”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´KLubhÉ)�”}”(hhh]”(hÎ)�”}”(hŒHardware Architecture”h]”hŒHardware Architecture”…”�”}”(hjÿh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjüh²hh³hÇh´KSubhŒ literal_block”“”)�”}”(hX[+----------+ +-------------------------------------+ | | | MAC-PHY | | |<---->| +-----------+ +-------+ +-------+ | | SPI Host | | | SPI Slave | | MAC | | PHY | | | | | +-----------+ +-------+ +-------+ | +----------+ +-------------------------------------+”h]”hX[+----------+ +-------------------------------------+ | | | MAC-PHY | | |<---->| +-----------+ +-------+ +-------+ | | SPI Host | | | SPI Slave | | MAC | | PHY | | | | | +-----------+ +-------+ +-------+ | +----------+ +-------------------------------------+”…”�”}”hjsbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆŒforce”‰Œlanguage”Œnone”Œhighlight_args”}”uh1j h³hÇh´KUhjüh²hubeh}”(h]”Œhardware-architecture”ah ]”h"]”Œhardware architecture”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´KSubhÉ)�”}”(hhh]”(hÎ)�”}”(hŒSoftware Architecture”h]”hŒSoftware Architecture”…”�”}”(hj-h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhj*h²hh³hÇh´K_ubj)�”}”(hX´+----------------------------------------------------------+ | Networking Subsystem | +----------------------------------------------------------+ / \ / \ | | | | \ / | +----------------------+ +-----------------------------+ | MAC Driver |<--->| OPEN Alliance TC6 Framework | +----------------------+ +-----------------------------+ / \ / \ | | | | | \ / +----------------------------------------------------------+ | SPI Subsystem | +----------------------------------------------------------+ / \ | | \ / +----------------------------------------------------------+ | 10BASE-T1x MAC-PHY Device | +----------------------------------------------------------+”h]”hX´+----------------------------------------------------------+ | Networking Subsystem | +----------------------------------------------------------+ / \ / \ | | | | \ / | +----------------------+ +-----------------------------+ | MAC Driver |<--->| OPEN Alliance TC6 Framework | +----------------------+ +-----------------------------+ / \ / \ | | | | | \ / +----------------------------------------------------------+ | SPI Subsystem | +----------------------------------------------------------+ / \ | | \ / +----------------------------------------------------------+ | 10BASE-T1x MAC-PHY Device | +----------------------------------------------------------+”…”�”}”hj;sbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆj‰jŒnone”j }”uh1j h³hÇh´Kahj*h²hubeh}”(h]”Œsoftware-architecture”ah ]”h"]”Œsoftware architecture”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´K_ubhÉ)�”}”(hhh]”(hÎ)�”}”(hŒImplementation”h]”hŒImplementation”…”�”}”(hjVh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjSh²hh³hÇh´K}ubhÉ)�”}”(hhh]”(hÎ)�”}”(hŒ MAC Driver”h]”hŒ MAC Driver”…”�”}”(hjgh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjdh²hh³hÇh´K€ubhŒ bullet_list”“”)�”}”(hhh]”(hŒ list_item”“”)�”}”(hŒProbed by SPI subsystem. ”h]”hï)�”}”(hŒProbed by SPI subsystem.”h]”hŒProbed by SPI subsystem.”…”�”}”(hj€h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´K‚hj|ubah}”(h]”h ]”h"]”h$]”h&]”uh1jzhjwh²hh³hÇh´Nubj{)�”}”(hŒ.Initializes OA TC6 framework for the MAC-PHY. ”h]”hï)�”}”(hŒ-Initializes OA TC6 framework for the MAC-PHY.”h]”hŒ-Initializes OA TC6 framework for the MAC-PHY.”…”�”}”(hj˜h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´K„hj”ubah}”(h]”h ]”h"]”h$]”h&]”uh1jzhjwh²hh³hÇh´Nubj{)�”}”(hŒ-Registers and configures the network device. ”h]”hï)�”}”(hŒ,Registers and configures the network device.”h]”hŒ,Registers and configures the network device.”…”�”}”(hj°h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´K†hj¬ubah}”(h]”h ]”h"]”h$]”h&]”uh1jzhjwh²hh³hÇh´Nubj{)�”}”(hŒESends the tx ethernet frames from n/w subsystem to OA TC6 framework. ”h]”hï)�”}”(hŒDSends the tx ethernet frames from n/w subsystem to OA TC6 framework.”h]”hŒDSends the tx ethernet frames from n/w subsystem to OA TC6 framework.”…”�”}”(hjÈh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´KˆhjÄubah}”(h]”h ]”h"]”h$]”h&]”uh1jzhjwh²hh³hÇh´Nubeh}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ-”uh1juh³hÇh´K‚hjdh²hubeh}”(h]”Œ mac-driver”ah ]”h"]”Œ mac driver”ah$]”h&]”uh1hÈhjSh²hh³hÇh´K€ubhÉ)�”}”(hhh]”(hÎ)�”}”(hŒOPEN Alliance TC6 Framework”h]”hŒOPEN Alliance TC6 Framework”…”�”}”(hjïh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjìh²hh³hÇh´K‹ubjv)�”}”(hhh]”(j{)�”}”(hŒInitializes PHYLIB interface. ”h]”hï)�”}”(hŒInitializes PHYLIB interface.”h]”hŒInitializes PHYLIB interface.”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´K�hjubah}”(h]”h ]”h"]”h$]”h&]”uh1jzhjýh²hh³hÇh´Nubj{)�”}”(hŒRegisters mac-phy interrupt. ”h]”hï)�”}”(hŒRegisters mac-phy interrupt.”h]”hŒRegisters mac-phy interrupt.”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´K�hjubah}”(h]”h ]”h"]”h$]”h&]”uh1jzhjýh²hh³hÇh´Nubj{)�”}”(hŒ¨Performs mac-phy register read/write operation using the control transaction protocol specified in the OPEN Alliance 10BASE-T1x MAC-PHY Serial Interface specification. ”h]”hï)�”}”(hŒ§Performs mac-phy register read/write operation using the control transaction protocol specified in the OPEN Alliance 10BASE-T1x MAC-PHY Serial Interface specification.”h]”hŒ§Performs mac-phy register read/write operation using the control transaction protocol specified in the OPEN Alliance 10BASE-T1x MAC-PHY Serial Interface specification.”…”�”}”(hj4h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´K‘hj0ubah}”(h]”h ]”h"]”h$]”h&]”uh1jzhjýh²hh³hÇh´Nubj{)�”}”(hŒ¯Performs Ethernet frames transaction using the data transaction protocol for Ethernet frames specified in the OPEN Alliance 10BASE-T1x MAC-PHY Serial Interface specification. ”h]”hï)�”}”(hŒ®Performs Ethernet frames transaction using the data transaction protocol for Ethernet frames specified in the OPEN Alliance 10BASE-T1x MAC-PHY Serial Interface specification.”h]”hŒ®Performs Ethernet frames transaction using the data transaction protocol for Ethernet frames specified in the OPEN Alliance 10BASE-T1x MAC-PHY Serial Interface specification.”…”�”}”(hjLh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´K•hjHubah}”(h]”h ]”h"]”h$]”h&]”uh1jzhjýh²hh³hÇh´Nubj{)�”}”(hŒOForwards the received Ethernet frame from 10Base-T1x MAC-PHY to n/w subsystem. ”h]”hï)�”}”(hŒNForwards the received Ethernet frame from 10Base-T1x MAC-PHY to n/w subsystem.”h]”hŒNForwards the received Ethernet frame from 10Base-T1x MAC-PHY to n/w subsystem.”…”�”}”(hjdh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´K™hj`ubah}”(h]”h ]”h"]”h$]”h&]”uh1jzhjýh²hh³hÇh´Nubeh}”(h]”h ]”h"]”h$]”h&]”jâjãuh1juh³hÇh´K�hjìh²hubeh}”(h]”Œopen-alliance-tc6-framework”ah ]”h"]”Œopen alliance tc6 framework”ah$]”h&]”uh1hÈhjSh²hh³hÇh´K‹ubhÉ)�”}”(hhh]”(hÎ)�”}”(hŒData Transaction”h]”hŒData Transaction”…”�”}”(hj‰h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhj†h²hh³hÇh´K�ubhï)�”}”(hXQThe Ethernet frames that are typically transferred from the SPI host to the MAC-PHY will be converted into multiple transmit data chunks. Each transmit data chunk will have a 4 bytes header which contains the information needed to determine the validity and the location of the transmit frame data within the 64 bytes data chunk payload.”h]”hXQThe Ethernet frames that are typically transferred from the SPI host to the MAC-PHY will be converted into multiple transmit data chunks. Each transmit data chunk will have a 4 bytes header which contains the information needed to determine the validity and the location of the transmit frame data within the 64 bytes data chunk payload.”…”�”}”(hj—h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´KŸhj†h²hubj)�”}”(hXW+---------------------------------------------------+ | Tx Chunk | | +---------------------------+ +----------------+ | MOSI | | 64 bytes chunk payload | | 4 bytes header | |------------> | +---------------------------+ +----------------+ | +---------------------------------------------------+”h]”hXW+---------------------------------------------------+ | Tx Chunk | | +---------------------------+ +----------------+ | MOSI | | 64 bytes chunk payload | | 4 bytes header | |------------> | +---------------------------+ +----------------+ | +---------------------------------------------------+”…”�”}”hj¥sbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆj‰jŒnone”j }”uh1j h³hÇh´K¥hj†h²hubhï)�”}”(hŒ)4 bytes header contains the below fields,”h]”hŒ)4 bytes header contains the below fields,”…”�”}”(hjµh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´K®hj†h²hubhŒdefinition_list”“”)�”}”(hhh]”(hŒdefinition_list_item”“”)�”}”(hŒ©DNC (Bit 31) - Data-Not-Control flag. This flag specifies the type of SPI transaction. For TX data chunks, this bit shall be ’1’. 0 - Control command 1 - Data chunk ”h]”(hŒterm”“”)�”}”(hŒIDNC (Bit 31) - Data-Not-Control flag. This flag specifies the type of SPI”h]”hŒIDNC (Bit 31) - Data-Not-Control flag. This flag specifies the type of SPI”…”�”}”(hjÐh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÎh³hÇh´K³hjÊubhŒ definition”“”)�”}”(hhh]”hï)�”}”(hŒ^transaction. For TX data chunks, this bit shall be ’1’. 0 - Control command 1 - Data chunk”h]”hŒ^transaction. For TX data chunks, this bit shall be ’1’. 0 - Control command 1 - Data chunk”…”�”}”(hjãh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´K±hjàubah}”(h]”h ]”h"]”h$]”h&]”uh1jÞhjÊubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÈh³hÇh´K³hjÅubjÉ)�”}”(hŒzSEQ (Bit 30) - Data Chunk Sequence. This bit is used to indicate an even/odd transmit data chunk sequence to the MAC-PHY. ”h]”(jÏ)�”}”(hŒCSEQ (Bit 30) - Data Chunk Sequence. This bit is used to indicate an”h]”hŒCSEQ (Bit 30) - Data Chunk Sequence. This bit is used to indicate an”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÎh³hÇh´K¶hjýubjß)�”}”(hhh]”hï)�”}”(hŒ5even/odd transmit data chunk sequence to the MAC-PHY.”h]”hŒ5even/odd transmit data chunk sequence to the MAC-PHY.”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´K¶hjubah}”(h]”h ]”h"]”h$]”h&]”uh1jÞhjýubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÈh³hÇh´K¶hjÅh²hubjÉ)�”}”(hX^NORX (Bit 29) - No Receive flag. The SPI host may set this bit to prevent the MAC-PHY from conveying RX data on the MISO for the current chunk (DV = 0 in the footer), indicating that the host would not process it. Typically, the SPI host should set NORX = 0 indicating that it will accept and process any receive frame data within the current chunk. ”h]”(jÏ)�”}”(hŒINORX (Bit 29) - No Receive flag. The SPI host may set this bit to prevent”h]”hŒINORX (Bit 29) - No Receive flag. The SPI host may set this bit to prevent”…”�”}”(hj0h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÎh³hÇh´K½hj,ubjß)�”}”(hhh]”hï)�”}”(hXthe MAC-PHY from conveying RX data on the MISO for the current chunk (DV = 0 in the footer), indicating that the host would not process it. Typically, the SPI host should set NORX = 0 indicating that it will accept and process any receive frame data within the current chunk.”h]”hXthe MAC-PHY from conveying RX data on the MISO for the current chunk (DV = 0 in the footer), indicating that the host would not process it. Typically, the SPI host should set NORX = 0 indicating that it will accept and process any receive frame data within the current chunk.”…”�”}”(hjAh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´K¹hj>ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÞhj,ubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÈh³hÇh´K½hjÅh²hubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÃhj†h²hh³hÇh´Nubhï)�”}”(hŒARSVD (Bit 28..24) - Reserved: All reserved bits shall be ‘0’.”h]”hŒARSVD (Bit 28..24) - Reserved: All reserved bits shall be ‘0’.”…”�”}”(hjah²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´K¿hj†h²hubjÄ)�”}”(hhh]”(jÉ)�”}”(hŒ�VS (Bit 23..22) - Vendor Specific. These bits are implementation specific. If the MAC-PHY does not implement these bits, the host shall set them to ‘0’. ”h]”(jÏ)�”}”(hŒJVS (Bit 23..22) - Vendor Specific. These bits are implementation specific.”h]”hŒJVS (Bit 23..22) - Vendor Specific. These bits are implementation specific.”…”�”}”(hjvh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÎh³hÇh´KÃhjrubjß)�”}”(hhh]”hï)�”}”(hŒQIf the MAC-PHY does not implement these bits, the host shall set them to ‘0’.”h]”hŒQIf the MAC-PHY does not implement these bits, the host shall set them to ‘0’.”…”�”}”(hj‡h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´KÂhj„ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÞhjrubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÈh³hÇh´KÃhjoubjÉ)�”}”(hX,DV (Bit 21) - Data Valid flag. The SPI host uses this bit to indicate whether the current chunk contains valid transmit frame data (DV = 1) or not (DV = 0). When ‘0’, the MAC-PHY ignores the chunk payload. Note that the receive path is unaffected by the setting of the DV bit in the data header. ”h]”(jÏ)�”}”(hŒEDV (Bit 21) - Data Valid flag. The SPI host uses this bit to indicate”h]”hŒEDV (Bit 21) - Data Valid flag. The SPI host uses this bit to indicate”…”�”}”(hj¥h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÎh³hÇh´KÉhj¡ubjß)�”}”(hhh]”hï)�”}”(hŒåwhether the current chunk contains valid transmit frame data (DV = 1) or not (DV = 0). When ‘0’, the MAC-PHY ignores the chunk payload. Note that the receive path is unaffected by the setting of the DV bit in the data header.”h]”hŒåwhether the current chunk contains valid transmit frame data (DV = 1) or not (DV = 0). When ‘0’, the MAC-PHY ignores the chunk payload. Note that the receive path is unaffected by the setting of the DV bit in the data header.”…”�”}”(hj¶h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´KÆhj³ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÞhj¡ubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÈh³hÇh´KÉhjoh²hubjÉ)�”}”(hX+SV (Bit 20) - Start Valid flag. The SPI host shall set this bit when the beginning of an Ethernet frame is present in the current transmit data chunk payload. Otherwise, this bit shall be zero. This bit is not to be confused with the Start-of-Frame Delimiter (SFD) byte described in IEEE 802.3 [2]. ”h]”(jÏ)�”}”(hŒHSV (Bit 20) - Start Valid flag. The SPI host shall set this bit when the”h]”hŒHSV (Bit 20) - Start Valid flag. The SPI host shall set this bit when the”…”�”}”(hjÔh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÎh³hÇh´KÏhjÐubjß)�”}”(hhh]”hï)�”}”(hŒábeginning of an Ethernet frame is present in the current transmit data chunk payload. Otherwise, this bit shall be zero. This bit is not to be confused with the Start-of-Frame Delimiter (SFD) byte described in IEEE 802.3 [2].”h]”hŒábeginning of an Ethernet frame is present in the current transmit data chunk payload. Otherwise, this bit shall be zero. This bit is not to be confused with the Start-of-Frame Delimiter (SFD) byte described in IEEE 802.3 [2].”…”�”}”(hjåh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´KÌhjâubah}”(h]”h ]”h"]”h$]”h&]”uh1jÞhjÐubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÈh³hÇh´KÏhjoh²hubjÉ)�”}”(hXSWO (Bit 19..16) - Start Word Offset. When SV = 1, this field shall contain the 32-bit word offset into the transmit data chunk payload that points to the start of a new Ethernet frame to be transmitted. The host shall write this field as zero when SV = 0. ”h]”(jÏ)�”}”(hŒCSWO (Bit 19..16) - Start Word Offset. When SV = 1, this field shall”h]”hŒCSWO (Bit 19..16) - Start Word Offset. When SV = 1, this field shall”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÎh³hÇh´KÕhjÿubjß)�”}”(hhh]”hï)�”}”(hŒ¼contain the 32-bit word offset into the transmit data chunk payload that points to the start of a new Ethernet frame to be transmitted. The host shall write this field as zero when SV = 0.”h]”hŒ¼contain the 32-bit word offset into the transmit data chunk payload that points to the start of a new Ethernet frame to be transmitted. The host shall write this field as zero when SV = 0.”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´KÒhjubah}”(h]”h ]”h"]”h$]”h&]”uh1jÞhjÿubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÈh³hÇh´KÕhjoh²hubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÃhj†h²hh³hÇh´Nubhï)�”}”(hŒ=RSVD (Bit 15) - Reserved: All reserved bits shall be ‘0’.”h]”hŒ=RSVD (Bit 15) - Reserved: All reserved bits shall be ‘0’.”…”�”}”(hj4h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´K×hj†h²hubjÄ)�”}”(hhh]”(jÉ)�”}”(hŒºEV (Bit 14) - End Valid flag. The SPI host shall set this bit when the end of an Ethernet frame is present in the current transmit data chunk payload. Otherwise, this bit shall be zero. ”h]”(jÏ)�”}”(hŒJEV (Bit 14) - End Valid flag. The SPI host shall set this bit when the end”h]”hŒJEV (Bit 14) - End Valid flag. The SPI host shall set this bit when the end”…”�”}”(hjIh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÎh³hÇh´KÛhjEubjß)�”}”(hhh]”hï)�”}”(hŒnof an Ethernet frame is present in the current transmit data chunk payload. Otherwise, this bit shall be zero.”h]”hŒnof an Ethernet frame is present in the current transmit data chunk payload. Otherwise, this bit shall be zero.”…”�”}”(hjZh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´KÚhjWubah}”(h]”h ]”h"]”h$]”h&]”uh1jÞhjEubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÈh³hÇh´KÛhjBubjÉ)�”}”(hŒäEBO (Bit 13..8) - End Byte Offset. When EV = 1, this field shall contain the byte offset into the transmit data chunk payload that points to the last byte of the Ethernet frame to transmit. This field shall be zero when EV = 0. ”h]”(jÏ)�”}”(hŒHEBO (Bit 13..8) - End Byte Offset. When EV = 1, this field shall contain”h]”hŒHEBO (Bit 13..8) - End Byte Offset. When EV = 1, this field shall contain”…”�”}”(hjxh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÎh³hÇh´Kàhjtubjß)�”}”(hhh]”hï)�”}”(hŒšthe byte offset into the transmit data chunk payload that points to the last byte of the Ethernet frame to transmit. This field shall be zero when EV = 0.”h]”hŒšthe byte offset into the transmit data chunk payload that points to the last byte of the Ethernet frame to transmit. This field shall be zero when EV = 0.”…”�”}”(hj‰h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´KÞhj†ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÞhjtubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÈh³hÇh´KàhjBh²hubjÉ)�”}”(hX;TSC (Bit 7..6) - Timestamp Capture. Request a timestamp capture when the frame is transmitted onto the network. 00 - Do not capture a timestamp 01 - Capture timestamp into timestamp capture register A 10 - Capture timestamp into timestamp capture register B 11 - Capture timestamp into timestamp capture register C ”h]”(jÏ)�”}”(hŒHTSC (Bit 7..6) - Timestamp Capture. Request a timestamp capture when the”h]”hŒHTSC (Bit 7..6) - Timestamp Capture. Request a timestamp capture when the”…”�”}”(hj§h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÎh³hÇh´Kçhj£ubjß)�”}”(hhh]”hï)�”}”(hŒñframe is transmitted onto the network. 00 - Do not capture a timestamp 01 - Capture timestamp into timestamp capture register A 10 - Capture timestamp into timestamp capture register B 11 - Capture timestamp into timestamp capture register C”h]”hŒñframe is transmitted onto the network. 00 - Do not capture a timestamp 01 - Capture timestamp into timestamp capture register A 10 - Capture timestamp into timestamp capture register B 11 - Capture timestamp into timestamp capture register C”…”�”}”(hj¸h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´Kãhjµubah}”(h]”h ]”h"]”h$]”h&]”uh1jÞhj£ubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÈh³hÇh´KçhjBh²hubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÃhj†h²hh³hÇh´Nubhï)�”}”(hŒ?RSVD (Bit 5..1) - Reserved: All reserved bits shall be ‘0’.”h]”hŒ?RSVD (Bit 5..1) - Reserved: All reserved bits shall be ‘0’.”…”�”}”(hjØh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´Kéhj†h²hubjÄ)�”}”(hhh]”jÉ)�”}”(hŒdP (Bit 0) - Parity. Parity bit calculated over the transmit data header. Method used is odd parity. ”h]”(jÏ)�”}”(hŒHP (Bit 0) - Parity. Parity bit calculated over the transmit data header.”h]”hŒHP (Bit 0) - Parity. Parity bit calculated over the transmit data header.”…”�”}”(hjíh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÎh³hÇh´Kìhjéubjß)�”}”(hhh]”hï)�”}”(hŒMethod used is odd parity.”h]”hŒMethod used is odd parity.”…”�”}”(hjþh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´Kìhjûubah}”(h]”h ]”h"]”h$]”h&]”uh1jÞhjéubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÈh³hÇh´Kìhjæubah}”(h]”h ]”h"]”h$]”h&]”uh1jÃhj†h²hh³hÇh´Nubhï)�”}”(hXµThe number of buffers available in the MAC-PHY to store the incoming transmit data chunk payloads is represented as transmit credits. The available transmit credits in the MAC-PHY can be read either from the Buffer Status Register or footer (Refer below for the footer info) received from the MAC-PHY. The SPI host should not write more data chunks than the available transmit credits as this will lead to transmit buffer overflow error.”h]”hXµThe number of buffers available in the MAC-PHY to store the incoming transmit data chunk payloads is represented as transmit credits. The available transmit credits in the MAC-PHY can be read either from the Buffer Status Register or footer (Refer below for the footer info) received from the MAC-PHY. The SPI host should not write more data chunks than the available transmit credits as this will lead to transmit buffer overflow error.”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´Kîhj†h²hubhï)�”}”(hXvIn case the previous data footer had no transmit credits available and once the transmit credits become available for transmitting transmit data chunks, the MAC-PHY interrupt is asserted to SPI host. On reception of the first data header this interrupt will be deasserted and the received footer for the first data chunk will have the transmit credits available information.”h]”hXvIn case the previous data footer had no transmit credits available and once the transmit credits become available for transmitting transmit data chunks, the MAC-PHY interrupt is asserted to SPI host. On reception of the first data header this interrupt will be deasserted and the received footer for the first data chunk will have the transmit credits available information.”…”�”}”(hj,h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´Köhj†h²hubhï)�”}”(hXhThe Ethernet frames that are typically transferred from MAC-PHY to SPI host will be sent as multiple receive data chunks. Each receive data chunk will have 64 bytes of data chunk payload followed by 4 bytes footer which contains the information needed to determine the validity and the location of the receive frame data within the 64 bytes data chunk payload.”h]”hXhThe Ethernet frames that are typically transferred from MAC-PHY to SPI host will be sent as multiple receive data chunks. Each receive data chunk will have 64 bytes of data chunk payload followed by 4 bytes footer which contains the information needed to determine the validity and the location of the receive frame data within the 64 bytes data chunk payload.”…”�”}”(hj:h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´Kýhj†h²hubj)�”}”(hXW+---------------------------------------------------+ | Rx Chunk | | +----------------+ +---------------------------+ | MISO | | 4 bytes footer | | 64 bytes chunk payload | |------------> | +----------------+ +---------------------------+ | +---------------------------------------------------+”h]”hXW+---------------------------------------------------+ | Rx Chunk | | +----------------+ +---------------------------+ | MISO | | 4 bytes footer | | 64 bytes chunk payload | |------------> | +----------------+ +---------------------------+ | +---------------------------------------------------+”…”�”}”hjHsbah}”(h]”h ]”h"]”h$]”h&]”hÅhÆj‰jŒnone”j }”uh1j h³hÇh´Mhj†h²hubhï)�”}”(hŒ)4 bytes footer contains the below fields,”h]”hŒ)4 bytes footer contains the below fields,”…”�”}”(hjXh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´M hj†h²hubjÄ)�”}”(hhh]”(jÉ)�”}”(hŒzEXST (Bit 31) - Extended Status. This bit is set when any bit in the STATUS0 or STATUS1 registers are set and not masked. ”h]”(jÏ)�”}”(hŒDEXST (Bit 31) - Extended Status. This bit is set when any bit in the”h]”hŒDEXST (Bit 31) - Extended Status. This bit is set when any bit in the”…”�”}”(hjmh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÎh³hÇh´Mhjiubjß)�”}”(hhh]”hï)�”}”(hŒ4STATUS0 or STATUS1 registers are set and not masked.”h]”hŒ4STATUS0 or STATUS1 registers are set and not masked.”…”�”}”(hj~h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´Mhj{ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÞhjiubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÈh³hÇh´MhjfubjÉ)�”}”(hŒ�HDRB (Bit 30) - Received Header Bad. When set, indicates that the MAC-PHY received a control or data header with a parity error. ”h]”(jÏ)�”}”(hŒIHDRB (Bit 30) - Received Header Bad. When set, indicates that the MAC-PHY”h]”hŒIHDRB (Bit 30) - Received Header Bad. When set, indicates that the MAC-PHY”…”�”}”(hjœh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÎh³hÇh´Mhj˜ubjß)�”}”(hhh]”hï)�”}”(hŒ6received a control or data header with a parity error.”h]”hŒ6received a control or data header with a parity error.”…”�”}”(hj­h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´Mhjªubah}”(h]”h ]”h"]”h$]”h&]”uh1jÞhj˜ubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÈh³hÇh´Mhjfh²hubjÉ)�”}”(hXkSYNC (Bit 29) - Configuration Synchronized flag. This bit reflects the state of the SYNC bit in the CONFIG0 configuration register (see Table 12). A zero indicates that the MAC-PHY configuration may not be as expected by the SPI host. Following configuration, the SPI host sets the corresponding bitin the configuration register which is reflected in this field. ”h]”(jÏ)�”}”(hŒFSYNC (Bit 29) - Configuration Synchronized flag. This bit reflects the”h]”hŒFSYNC (Bit 29) - Configuration Synchronized flag. This bit reflects the”…”�”}”(hjËh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÎh³hÇh´MhjÇubjß)�”}”(hhh]”hï)�”}”(hX#state of the SYNC bit in the CONFIG0 configuration register (see Table 12). A zero indicates that the MAC-PHY configuration may not be as expected by the SPI host. Following configuration, the SPI host sets the corresponding bitin the configuration register which is reflected in this field.”h]”hX#state of the SYNC bit in the CONFIG0 configuration register (see Table 12). A zero indicates that the MAC-PHY configuration may not be as expected by the SPI host. Following configuration, the SPI host sets the corresponding bitin the configuration register which is reflected in this field.”…”�”}”(hjÜh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´MhjÙubah}”(h]”h ]”h"]”h$]”h&]”uh1jÞhjÇubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÈh³hÇh´Mhjfh²hubjÉ)�”}”(hXDRCA (Bit 28..24) - Receive Chunks Available. The RCA field indicates to the SPI host the minimum number of additional receive data chunks of frame data that are available for reading beyond the current receive data chunk. This field is zero when there is no receive frame data pending in the MAC-PHY’s buffer for reading. ”h]”(jÏ)�”}”(hŒGRCA (Bit 28..24) - Receive Chunks Available. The RCA field indicates to”h]”hŒGRCA (Bit 28..24) - Receive Chunks Available. The RCA field indicates to”…”�”}”(hjúh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÎh³hÇh´M!hjöubjß)�”}”(hhh]”hï)�”}”(hŒûthe SPI host the minimum number of additional receive data chunks of frame data that are available for reading beyond the current receive data chunk. This field is zero when there is no receive frame data pending in the MAC-PHY’s buffer for reading.”h]”hŒûthe SPI host the minimum number of additional receive data chunks of frame data that are available for reading beyond the current receive data chunk. This field is zero when there is no receive frame data pending in the MAC-PHY’s buffer for reading.”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´Mhjubah}”(h]”h ]”h"]”h$]”h&]”uh1jÞhjöubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÈh³hÇh´M!hjfh²hubjÉ)�”}”(hŒŒVS (Bit 23..22) - Vendor Specific. These bits are implementation specific. If not implemented, the MAC-PHY shall set these bits to ‘0’. ”h]”(jÏ)�”}”(hŒJVS (Bit 23..22) - Vendor Specific. These bits are implementation specific.”h]”hŒJVS (Bit 23..22) - Vendor Specific. These bits are implementation specific.”…”�”}”(hj)h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÎh³hÇh´M%hj%ubjß)�”}”(hhh]”hï)�”}”(hŒ@If not implemented, the MAC-PHY shall set these bits to ‘0’.”h]”hŒ@If not implemented, the MAC-PHY shall set these bits to ‘0’.”…”�”}”(hj:h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´M$hj7ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÞhj%ubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÈh³hÇh´M%hjfh²hubjÉ)�”}”(hŒãDV (Bit 21) - Data Valid flag. The MAC-PHY uses this bit to indicate whether the current receive data chunk contains valid receive frame data (DV = 1) or not (DV = 0). When ‘0’, the SPI host shall ignore the chunk payload. ”h]”(jÏ)�”}”(hŒDDV (Bit 21) - Data Valid flag. The MAC-PHY uses this bit to indicate”h]”hŒDDV (Bit 21) - Data Valid flag. The MAC-PHY uses this bit to indicate”…”�”}”(hjXh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÎh³hÇh´M*hjTubjß)�”}”(hhh]”hï)�”}”(hŒ�whether the current receive data chunk contains valid receive frame data (DV = 1) or not (DV = 0). When ‘0’, the SPI host shall ignore the chunk payload.”h]”hŒ�whether the current receive data chunk contains valid receive frame data (DV = 1) or not (DV = 0). When ‘0’, the SPI host shall ignore the chunk payload.”…”�”}”(hjih²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´M(hjfubah}”(h]”h ]”h"]”h$]”h&]”uh1jÞhjTubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÈh³hÇh´M*hjfh²hubjÉ)�”}”(hX SV (Bit 20) - Start Valid flag. The MAC-PHY sets this bit when the current chunk payload contains the start of an Ethernet frame. Otherwise, this bit is zero. The SV bit is not to be confused with the Start-of-Frame Delimiter (SFD) byte described in IEEE 802.3 [2]. ”h]”(jÏ)�”}”(hŒJSV (Bit 20) - Start Valid flag. The MAC-PHY sets this bit when the current”h]”hŒJSV (Bit 20) - Start Valid flag. The MAC-PHY sets this bit when the current”…”�”}”(hj‡h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÎh³hÇh´M0hjƒubjß)�”}”(hhh]”hï)�”}”(hŒ¾chunk payload contains the start of an Ethernet frame. Otherwise, this bit is zero. The SV bit is not to be confused with the Start-of-Frame Delimiter (SFD) byte described in IEEE 802.3 [2].”h]”hŒ¾chunk payload contains the start of an Ethernet frame. Otherwise, this bit is zero. The SV bit is not to be confused with the Start-of-Frame Delimiter (SFD) byte described in IEEE 802.3 [2].”…”�”}”(hj˜h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´M-hj•ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÞhjƒubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÈh³hÇh´M0hjfh²hubjÉ)�”}”(hX…SWO (Bit 19..16) - Start Word Offset. When SV = 1, this field contains the 32-bit word offset into the receive data chunk payload containing the first byte of a new received Ethernet frame. When a receive timestamp has been added to the beginning of the received Ethernet frame (RTSA = 1) then SWO points to the most significant byte of the timestamp. This field will be zero when SV = 0. ”h]”(jÏ)�”}”(hŒJSWO (Bit 19..16) - Start Word Offset. When SV = 1, this field contains the”h]”hŒJSWO (Bit 19..16) - Start Word Offset. When SV = 1, this field contains the”…”�”}”(hj¶h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÎh³hÇh´M8hj²ubjß)�”}”(hhh]”hï)�”}”(hX932-bit word offset into the receive data chunk payload containing the first byte of a new received Ethernet frame. When a receive timestamp has been added to the beginning of the received Ethernet frame (RTSA = 1) then SWO points to the most significant byte of the timestamp. This field will be zero when SV = 0.”h]”hX932-bit word offset into the receive data chunk payload containing the first byte of a new received Ethernet frame. When a receive timestamp has been added to the beginning of the received Ethernet frame (RTSA = 1) then SWO points to the most significant byte of the timestamp. This field will be zero when SV = 0.”…”�”}”(hjÇh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´M3hjÄubah}”(h]”h ]”h"]”h$]”h&]”uh1jÞhj²ubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÈh³hÇh´M8hjfh²hubjÉ)�”}”(hX FD (Bit 15) - Frame Drop. When set, this bit indicates that the MAC has detected a condition for which the SPI host should drop the received Ethernet frame. This bit is only valid at the end of a received Ethernet frame (EV = 1) and shall be zero at all other times. ”h]”(jÏ)�”}”(hŒGFD (Bit 15) - Frame Drop. When set, this bit indicates that the MAC has”h]”hŒGFD (Bit 15) - Frame Drop. When set, this bit indicates that the MAC has”…”�”}”(hjåh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÎh³hÇh´M>hjáubjß)�”}”(hhh]”hï)�”}”(hŒÂdetected a condition for which the SPI host should drop the received Ethernet frame. This bit is only valid at the end of a received Ethernet frame (EV = 1) and shall be zero at all other times.”h]”hŒÂdetected a condition for which the SPI host should drop the received Ethernet frame. This bit is only valid at the end of a received Ethernet frame (EV = 1) and shall be zero at all other times.”…”�”}”(hjöh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´M;hjóubah}”(h]”h ]”h"]”h$]”h&]”uh1jÞhjáubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÈh³hÇh´M>hjfh²hubjÉ)�”}”(hŒ‘EV (Bit 14) - End Valid flag. The MAC-PHY sets this bit when the end of a received Ethernet frame is present in this receive data chunk payload. ”h]”(jÏ)�”}”(hŒIEV (Bit 14) - End Valid flag. The MAC-PHY sets this bit when the end of a”h]”hŒIEV (Bit 14) - End Valid flag. The MAC-PHY sets this bit when the end of a”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÎh³hÇh´MBhjubjß)�”}”(hhh]”hï)�”}”(hŒFreceived Ethernet frame is present in this receive data chunk payload.”h]”hŒFreceived Ethernet frame is present in this receive data chunk payload.”…”�”}”(hj%h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´MAhj"ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÞhjubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÈh³hÇh´MBhjfh²hubjÉ)�”}”(hŒÓEBO (Bit 13..8) - End Byte Offset: When EV = 1, this field contains the byte offset into the receive data chunk payload that locates the last byte of the received Ethernet frame. This field is zero when EV = 0. ”h]”(jÏ)�”}”(hŒGEBO (Bit 13..8) - End Byte Offset: When EV = 1, this field contains the”h]”hŒGEBO (Bit 13..8) - End Byte Offset: When EV = 1, this field contains the”…”�”}”(hjCh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÎh³hÇh´MGhj?ubjß)�”}”(hhh]”hï)�”}”(hŒŠbyte offset into the receive data chunk payload that locates the last byte of the received Ethernet frame. This field is zero when EV = 0.”h]”hŒŠbyte offset into the receive data chunk payload that locates the last byte of the received Ethernet frame. This field is zero when EV = 0.”…”�”}”(hjTh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´MEhjQubah}”(h]”h ]”h"]”h$]”h&]”uh1jÞhj?ubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÈh³hÇh´MGhjfh²hubjÉ)�”}”(hŒÎRTSA (Bit 7) - Receive Timestamp Added. This bit is set when a 32-bit or 64-bit timestamp has been added to the beginning of the received Ethernet frame. The MAC-PHY shall set this bit to zero when SV = 0. ”h]”(jÏ)�”}”(hŒHRTSA (Bit 7) - Receive Timestamp Added. This bit is set when a 32-bit or”h]”hŒHRTSA (Bit 7) - Receive Timestamp Added. This bit is set when a 32-bit or”…”�”}”(hjrh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÎh³hÇh´MLhjnubjß)�”}”(hhh]”hï)�”}”(hŒ„64-bit timestamp has been added to the beginning of the received Ethernet frame. The MAC-PHY shall set this bit to zero when SV = 0.”h]”hŒ„64-bit timestamp has been added to the beginning of the received Ethernet frame. The MAC-PHY shall set this bit to zero when SV = 0.”…”�”}”(hjƒh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´MJhj€ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÞhjnubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÈh³hÇh´MLhjfh²hubjÉ)�”}”(hŒèRTSP (Bit 6) - Receive Timestamp Parity. Parity bit calculated over the 32-bit/64-bit timestamp added to the beginning of the received Ethernet frame. Method used is odd parity. The MAC-PHY shall set this bit to zero when RTSA = 0. ”h]”(jÏ)�”}”(hŒGRTSP (Bit 6) - Receive Timestamp Parity. Parity bit calculated over the”h]”hŒGRTSP (Bit 6) - Receive Timestamp Parity. Parity bit calculated over the”…”�”}”(hj¡h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÎh³hÇh´MQhj�ubjß)�”}”(hhh]”hï)�”}”(hŒŸ32-bit/64-bit timestamp added to the beginning of the received Ethernet frame. Method used is odd parity. The MAC-PHY shall set this bit to zero when RTSA = 0.”h]”hŒŸ32-bit/64-bit timestamp added to the beginning of the received Ethernet frame. Method used is odd parity. The MAC-PHY shall set this bit to zero when RTSA = 0.”…”�”}”(hj²h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´MOhj¯ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÞhj�ubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÈh³hÇh´MQhjfh²hubjÉ)�”}”(hŒØTXC (Bit 5..1) - Transmit Credits. This field contains the minimum number of transmit data chunks of frame data that the SPI host can write in a single transaction without incurring a transmit buffer overflow error. ”h]”(jÏ)�”}”(hŒITXC (Bit 5..1) - Transmit Credits. This field contains the minimum number”h]”hŒITXC (Bit 5..1) - Transmit Credits. This field contains the minimum number”…”�”}”(hjÐh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÎh³hÇh´MVhjÌubjß)�”}”(hhh]”hï)�”}”(hŒ�of transmit data chunks of frame data that the SPI host can write in a single transaction without incurring a transmit buffer overflow error.”h]”hŒ�of transmit data chunks of frame data that the SPI host can write in a single transaction without incurring a transmit buffer overflow error.”…”�”}”(hjáh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´MThjÞubah}”(h]”h ]”h"]”h$]”h&]”uh1jÞhjÌubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÈh³hÇh´MVhjfh²hubjÉ)�”}”(hŒcP (Bit 0) - Parity. Parity bit calculated over the receive data footer. Method used is odd parity. ”h]”(jÏ)�”}”(hŒGP (Bit 0) - Parity. Parity bit calculated over the receive data footer.”h]”hŒGP (Bit 0) - Parity. Parity bit calculated over the receive data footer.”…”�”}”(hjÿh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÎh³hÇh´MYhjûubjß)�”}”(hhh]”hï)�”}”(hŒMethod used is odd parity.”h]”hŒMethod used is odd parity.”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´MYhj ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÞhjûubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÈh³hÇh´MYhjfh²hubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÃhj†h²hh³hÇh´Nubhï)�”}”(hXËSPI host will initiate the data receive transaction based on the receive chunks available in the MAC-PHY which is provided in the receive chunk footer (RCA - Receive Chunks Available). SPI host will create data invalid transmit data chunks (empty chunks) or data valid transmit data chunks in case there are valid Ethernet frames to transmit to the MAC-PHY. The receive chunks available in MAC-PHY can be read either from the Buffer Status Register or footer.”h]”hXËSPI host will initiate the data receive transaction based on the receive chunks available in the MAC-PHY which is provided in the receive chunk footer (RCA - Receive Chunks Available). SPI host will create data invalid transmit data chunks (empty chunks) or data valid transmit data chunks in case there are valid Ethernet frames to transmit to the MAC-PHY. The receive chunks available in MAC-PHY can be read either from the Buffer Status Register or footer.”…”�”}”(hj0 h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´M[hj†h²hubhï)�”}”(hXfIn case the previous data footer had no receive data chunks available and once the receive data chunks become available again for reading, the MAC-PHY interrupt is asserted to SPI host. On reception of the first data header this interrupt will be deasserted and the received footer for the first data chunk will have the receive chunks available information.”h]”hXfIn case the previous data footer had no receive data chunks available and once the receive data chunks become available again for reading, the MAC-PHY interrupt is asserted to SPI host. On reception of the first data header this interrupt will be deasserted and the received footer for the first data chunk will have the receive chunks available information.”…”�”}”(hj> h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´Mchj†h²hubeh}”(h]”Œdata-transaction”ah ]”h"]”Œdata transaction”ah$]”h&]”uh1hÈhjSh²hh³hÇh´K�ubhÉ)�”}”(hhh]”(hÎ)�”}”(hŒMAC-PHY Interrupt”h]”hŒMAC-PHY Interrupt”…”�”}”(hjW h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhjT h²hh³hÇh´Mjubhï)�”}”(hŒHThe MAC-PHY interrupt is asserted when the following conditions are met.”h]”hŒHThe MAC-PHY interrupt is asserted when the following conditions are met.”…”�”}”(hje h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´MlhjT h²hubhï)�”}”(hXReceive chunks available - This interrupt is asserted when the previous data footer had no receive data chunks available and once the receive data chunks become available for reading. On reception of the first data header this interrupt will be deasserted.”h]”hXReceive chunks available - This interrupt is asserted when the previous data footer had no receive data chunks available and once the receive data chunks become available for reading. On reception of the first data header this interrupt will be deasserted.”…”�”}”(hjs h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´MnhjT h²hubhï)�”}”(hX"Transmit chunk credits available - This interrupt is asserted when the previous data footer indicated no transmit credits available and once the transmit credits become available for transmitting transmit data chunks. On reception of the first data header this interrupt will be deasserted.”h]”hX"Transmit chunk credits available - This interrupt is asserted when the previous data footer indicated no transmit credits available and once the transmit credits become available for transmitting transmit data chunks. On reception of the first data header this interrupt will be deasserted.”…”�”}”(hj� h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´MshjT h²hubhï)�”}”(hX@Extended status event - This interrupt is asserted when the previous data footer indicated no extended status and once the extended event become available. In this case the host should read status #0 register to know the corresponding error/event. On reception of the first data header this interrupt will be deasserted.”h]”hX@Extended status event - This interrupt is asserted when the previous data footer indicated no extended status and once the extended event become available. In this case the host should read status #0 register to know the corresponding error/event. On reception of the first data header this interrupt will be deasserted.”…”�”}”(hj� h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´MxhjT h²hubeh}”(h]”Œmac-phy-interrupt”ah ]”h"]”Œmac-phy interrupt”ah$]”h&]”uh1hÈhjSh²hh³hÇh´MjubhÉ)�”}”(hhh]”(hÎ)�”}”(hŒControl Transaction”h]”hŒControl Transaction”…”�”}”(hj¨ h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÍhj¥ h²hh³hÇh´Mubhï)�”}”(hŒ14 bytes control header contains the below fields,”h]”hŒ14 bytes control header contains the below fields,”…”�”}”(hj¶ h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´M�hj¥ h²hubjÄ)�”}”(hhh]”(jÉ)�”}”(hŒ«DNC (Bit 31) - Data-Not-Control flag. This flag specifies the type of SPI transaction. For control commands, this bit shall be ‘0’. 0 - Control command 1 - Data chunk ”h]”(jÏ)�”}”(hŒIDNC (Bit 31) - Data-Not-Control flag. This flag specifies the type of SPI”h]”hŒIDNC (Bit 31) - Data-Not-Control flag. This flag specifies the type of SPI”…”�”}”(hjË h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÎh³hÇh´M†hjÇ ubjß)�”}”(hhh]”hï)�”}”(hŒ`transaction. For control commands, this bit shall be ‘0’. 0 - Control command 1 - Data chunk”h]”hŒ`transaction. For control commands, this bit shall be ‘0’. 0 - Control command 1 - Data chunk”…”�”}”(hjÜ h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´M„hjÙ ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÞhjÇ ubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÈh³hÇh´M†hjÄ ubjÉ)�”}”(hŒäHDRB (Bit 30) - Received Header Bad. When set by the MAC-PHY, indicates that a header was received with a parity error. The SPI host should always clear this bit. The MAC-PHY ignores the HDRB value sent by the SPI host on MOSI. ”h]”(jÏ)�”}”(hŒGHDRB (Bit 30) - Received Header Bad. When set by the MAC-PHY, indicates”h]”hŒGHDRB (Bit 30) - Received Header Bad. When set by the MAC-PHY, indicates”…”�”}”(hjú h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÎh³hÇh´M‹hjö ubjß)�”}”(hhh]”hï)�”}”(hŒ›that a header was received with a parity error. The SPI host should always clear this bit. The MAC-PHY ignores the HDRB value sent by the SPI host on MOSI.”h]”hŒ›that a header was received with a parity error. The SPI host should always clear this bit. The MAC-PHY ignores the HDRB value sent by the SPI host on MOSI.”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´M‰hj ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÞhjö ubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÈh³hÇh´M‹hjÄ h²hubjÉ)�”}”(hŒˆWNR (Bit 29) - Write-Not-Read. This bit indicates if data is to be written to registers (when set) or read from registers (when clear). ”h]”(jÏ)�”}”(hŒJWNR (Bit 29) - Write-Not-Read. This bit indicates if data is to be written”h]”hŒJWNR (Bit 29) - Write-Not-Read. This bit indicates if data is to be written”…”�”}”(hj) h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jÎh³hÇh´M�hj% ubjß)�”}”(hhh]”hï)�”}”(hŒ ubjC )�”}”(hŒstruct net_device *netdev”h]”(j± )�”}”(hj´ h]”hŒstruct”…”�”}”(hj¸ h²hh³Nh´Nubah}”(h]”h ]”j½ ah"]”h$]”h&]”uh1j° hj´ ubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hjÅ h²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hj´ ubh)�”}”(hhh]”jÖ )�”}”(hŒ net_device”h]”hŒ net_device”…”�”}”(hjÖ h²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hjÓ ubah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”jí Œreftype”jï Œ reftarget”jØ Œmodname”NŒ classname”Njó jö )�”}”jù ]”jý Œ c.oa_tc6_init”†”asbuh1hhj´ ubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hjô h²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hj´ ubj )�”}”(hj h]”hŒ*”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”j ah"]”h$]”h&]”uh1j hj´ ubjÖ )�”}”(hŒnetdev”h]”hŒnetdev”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hj´ ubeh}”(h]”h ]”h"]”h$]”h&]”Œnoemph”ˆhÅhÆuh1jB hj> ubjC )�”}”(hŒstruct oa_tc6_quirks *quirks”h]”(j± )�”}”(hj´ h]”hŒstruct”…”�”}”(hj( h²hh³Nh´Nubah}”(h]”h ]”j½ ah"]”h$]”h&]”uh1j° hj$ ubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hj5 h²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hj$ ubh)�”}”(hhh]”jÖ )�”}”(hŒ oa_tc6_quirks”h]”hŒ oa_tc6_quirks”…”�”}”(hjF h²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hjC ubah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”jí Œreftype”jï Œ reftarget”jH Œmodname”NŒ classname”Njó jö )�”}”jù ]”jý Œ c.oa_tc6_init”†”asbuh1hhj$ ubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hjd h²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hj$ ubj )�”}”(hj h]”hŒ*”…”�”}”(hjr h²hh³Nh´Nubah}”(h]”h ]”j ah"]”h$]”h&]”uh1j hj$ ubjÖ )�”}”(hŒquirks”h]”hŒquirks”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hj$ ubeh}”(h]”h ]”h"]”h$]”h&]”Œnoemph”ˆhÅhÆuh1jB hj> ubeh}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1j< hj¬ h²hh³hÇh´MÈubeh}”(h]”h ]”h"]”h$]”h&]”hÅhÆŒ add_permalink”ˆuh1jª Œsphinx_line_type”Œ declarator”hj¦ h²hh³hÇh´MÈubah}”(h]”j� ah ]”(Œsig”Œ sig-object”eh"]”h$]”h&]”Œ is_multiline”ˆŒ _toc_parts”)Œ _toc_name”huh1j¤ h³hÇh´MÈhj¡ h²hubhŒ desc_content”“”)�”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”uh1j® hj¡ h²hh³hÇh´MÈubeh}”(h]”h ]”(jí Œfunction”eh"]”h$]”h&]”Œdomain”jí Œobjtype”j¼ Œdesctype”j¼ Œnoindex”‰Œ noindexentry”‰Œnocontentsentry”‰uh1jŸ h²hhjo h³Nh´Nubhï)�”}”(hŒInitialize OA TC6 lib.”h]”hŒInitialize OA TC6 lib.”…”�”}”(hjÆ h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´MÌhjo h²hubj� )�”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”Œentries”]”(j› Œoa_tc6_exit (C function)”Œ c.oa_tc6_exit”hNt”auh1jŽ hjo h²hh³Nh´Nubj  )�”}”(hhh]”(j¥ )�”}”(hŒ$void oa_tc6_exit(struct oa_tc6 *tc6)”h]”j« )�”}”(hŒ$void oa_tc6_exit(struct oa_tc6 *tc6)”h]”(hŒdesc_sig_keyword_type”“”)�”}”(hŒvoid”h]”hŒvoid”…”�”}”(hjï h²hh³Nh´Nubah}”(h]”h ]”Œkt”ah"]”h$]”h&]”uh1jí hjé h²hh³hÇh´MÎubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hjþ h²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hjé h²hh³hÇh´MÎubj" )�”}”(hŒ oa_tc6_exit”h]”jÖ )�”}”(hŒ oa_tc6_exit”h]”hŒ oa_tc6_exit”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hj ubah}”(h]”h ]”(j7 j8 eh"]”h$]”h&]”hÅhÆuh1j! hjé h²hh³hÇh´MÎubj= )�”}”(hŒ(struct oa_tc6 *tc6)”h]”jC )�”}”(hŒstruct oa_tc6 *tc6”h]”(j± )�”}”(hj´ h]”hŒstruct”…”�”}”(hj,h²hh³Nh´Nubah}”(h]”h ]”j½ ah"]”h$]”h&]”uh1j° hj(ubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hj9h²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hj(ubh)�”}”(hhh]”jÖ )�”}”(hŒoa_tc6”h]”hŒoa_tc6”…”�”}”(hjJh²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hjGubah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”jí Œreftype”jï Œ reftarget”jLŒmodname”NŒ classname”Njó jö )�”}”jù ]”jü )�”}”jï jsbŒ c.oa_tc6_exit”†”asbuh1hhj(ubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hjjh²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hj(ubj )�”}”(hj h]”hŒ*”…”�”}”(hjxh²hh³Nh´Nubah}”(h]”h ]”j ah"]”h$]”h&]”uh1j hj(ubjÖ )�”}”(hŒtc6”h]”hŒtc6”…”�”}”(hj…h²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hj(ubeh}”(h]”h ]”h"]”h$]”h&]”Œnoemph”ˆhÅhÆuh1jB hj$ubah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1j< hjé h²hh³hÇh´MÎubeh}”(h]”h ]”h"]”h$]”h&]”hÅhÆj  ˆuh1jª j¡ j¢ hjå h²hh³hÇh´MÎubah}”(h]”jà ah ]”(j¦ j§ eh"]”h$]”h&]”j« ˆj¬ )j­ huh1j¤ h³hÇh´MÎhjâ h²hubj¯ )�”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”uh1j® hjâ h²hh³hÇh´MÎubeh}”(h]”h ]”(jí Œfunction”eh"]”h$]”h&]”jÀ jí jÁ j¸j j¸jà ‰jÄ ‰jÅ ‰uh1jŸ h²hhjo h³Nh´Nubhï)�”}”(hŒFree allocated OA TC6 lib.”h]”hŒFree allocated OA TC6 lib.”…”�”}”(hj¼h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´MÐhjo h²hubj� )�”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”Œentries”]”(j› Œ"oa_tc6_write_register (C function)”Œc.oa_tc6_write_register”hNt”auh1jŽ hjo h²hh³Nh´Nubj  )�”}”(hhh]”(j¥ )�”}”(hŒEint oa_tc6_write_register(struct oa_tc6 *tc6, u32 address, u32 value)”h]”j« )�”}”(hŒEint oa_tc6_write_register(struct oa_tc6 *tc6, u32 address, u32 value)”h]”(jî )�”}”(hŒint”h]”hŒint”…”�”}”(hjãh²hh³Nh´Nubah}”(h]”h ]”jú ah"]”h$]”h&]”uh1jí hjßh²hh³hÇh´MÒubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hjñh²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hjßh²hh³hÇh´MÒubj" )�”}”(hŒoa_tc6_write_register”h]”jÖ )�”}”(hŒoa_tc6_write_register”h]”hŒoa_tc6_write_register”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hjÿubah}”(h]”h ]”(j7 j8 eh"]”h$]”h&]”hÅhÆuh1j! hjßh²hh³hÇh´MÒubj= )�”}”(hŒ,(struct oa_tc6 *tc6, u32 address, u32 value)”h]”(jC )�”}”(hŒstruct oa_tc6 *tc6”h]”(j± )�”}”(hj´ h]”hŒstruct”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”j½ ah"]”h$]”h&]”uh1j° hjubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hj,h²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hjubh)�”}”(hhh]”jÖ )�”}”(hŒoa_tc6”h]”hŒoa_tc6”…”�”}”(hj=h²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hj:ubah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”jí Œreftype”jï Œ reftarget”j?Œmodname”NŒ classname”Njó jö )�”}”jù ]”jü )�”}”jï jsbŒc.oa_tc6_write_register”†”asbuh1hhjubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hj]h²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hjubj )�”}”(hj h]”hŒ*”…”�”}”(hjkh²hh³Nh´Nubah}”(h]”h ]”j ah"]”h$]”h&]”uh1j hjubjÖ )�”}”(hŒtc6”h]”hŒtc6”…”�”}”(hjxh²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hjubeh}”(h]”h ]”h"]”h$]”h&]”Œnoemph”ˆhÅhÆuh1jB hjubjC )�”}”(hŒ u32 address”h]”(h)�”}”(hhh]”jÖ )�”}”(hŒu32”h]”hŒu32”…”�”}”(hj”h²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hj‘ubah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”jí Œreftype”jï Œ reftarget”j–Œmodname”NŒ classname”Njó jö )�”}”jù ]”jYŒc.oa_tc6_write_register”†”asbuh1hhj�ubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hj²h²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hj�ubjÖ )�”}”(hŒaddress”h]”hŒaddress”…”�”}”(hjÀh²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hj�ubeh}”(h]”h ]”h"]”h$]”h&]”Œnoemph”ˆhÅhÆuh1jB hjubjC )�”}”(hŒ u32 value”h]”(h)�”}”(hhh]”jÖ )�”}”(hŒu32”h]”hŒu32”…”�”}”(hjÜh²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hjÙubah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”jí Œreftype”jï Œ reftarget”jÞŒmodname”NŒ classname”Njó jö )�”}”jù ]”jYŒc.oa_tc6_write_register”†”asbuh1hhjÕubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hjúh²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hjÕubjÖ )�”}”(hŒvalue”h]”hŒvalue”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hjÕubeh}”(h]”h ]”h"]”h$]”h&]”Œnoemph”ˆhÅhÆuh1jB hjubeh}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1j< hjßh²hh³hÇh´MÒubeh}”(h]”h ]”h"]”h$]”h&]”hÅhÆj  ˆuh1jª j¡ j¢ hjÛh²hh³hÇh´MÒubah}”(h]”jÖah ]”(j¦ j§ eh"]”h$]”h&]”j« ˆj¬ )j­ huh1j¤ h³hÇh´MÒhjØh²hubj¯ )�”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”uh1j® hjØh²hh³hÇh´MÒubeh}”(h]”h ]”(jí Œfunction”eh"]”h$]”h&]”jÀ jí jÁ j;j j;jà ‰jÄ ‰jÅ ‰uh1jŸ h²hhjo h³Nh´Nubhï)�”}”(hŒ'Write a single register in the MAC-PHY.”h]”hŒ'Write a single register in the MAC-PHY.”…”�”}”(hj?h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´MÕhjo h²hubj� )�”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”Œentries”]”(j› Œ#oa_tc6_write_registers (C function)”Œc.oa_tc6_write_registers”hNt”auh1jŽ hjo h²hh³Nh´Nubj  )�”}”(hhh]”(j¥ )�”}”(hŒSint oa_tc6_write_registers(struct oa_tc6 *tc6, u32 address, u32 value[], u8 length)”h]”j« )�”}”(hŒSint oa_tc6_write_registers(struct oa_tc6 *tc6, u32 address, u32 value[], u8 length)”h]”(jî )�”}”(hŒint”h]”hŒint”…”�”}”(hjfh²hh³Nh´Nubah}”(h]”h ]”jú ah"]”h$]”h&]”uh1jí hjbh²hh³hÇh´M×ubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hjth²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hjbh²hh³hÇh´M×ubj" )�”}”(hŒoa_tc6_write_registers”h]”jÖ )�”}”(hŒoa_tc6_write_registers”h]”hŒoa_tc6_write_registers”…”�”}”(hj†h²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hj‚ubah}”(h]”h ]”(j7 j8 eh"]”h$]”h&]”hÅhÆuh1j! hjbh²hh³hÇh´M×ubj= )�”}”(hŒ9(struct oa_tc6 *tc6, u32 address, u32 value[], u8 length)”h]”(jC )�”}”(hŒstruct oa_tc6 *tc6”h]”(j± )�”}”(hj´ h]”hŒstruct”…”�”}”(hj¢h²hh³Nh´Nubah}”(h]”h ]”j½ ah"]”h$]”h&]”uh1j° hjžubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hj¯h²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hjžubh)�”}”(hhh]”jÖ )�”}”(hŒoa_tc6”h]”hŒoa_tc6”…”�”}”(hjÀh²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hj½ubah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”jí Œreftype”jï Œ reftarget”jÂŒmodname”NŒ classname”Njó jö )�”}”jù ]”jü )�”}”jï jˆsbŒc.oa_tc6_write_registers”†”asbuh1hhjžubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hjàh²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hjžubj )�”}”(hj h]”hŒ*”…”�”}”(hjîh²hh³Nh´Nubah}”(h]”h ]”j ah"]”h$]”h&]”uh1j hjžubjÖ )�”}”(hŒtc6”h]”hŒtc6”…”�”}”(hjûh²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hjžubeh}”(h]”h ]”h"]”h$]”h&]”Œnoemph”ˆhÅhÆuh1jB hjšubjC )�”}”(hŒ u32 address”h]”(h)�”}”(hhh]”jÖ )�”}”(hŒu32”h]”hŒu32”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hjubah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”jí Œreftype”jï Œ reftarget”jŒmodname”NŒ classname”Njó jö )�”}”jù ]”jÜŒc.oa_tc6_write_registers”†”asbuh1hhjubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hj5h²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hjubjÖ )�”}”(hŒaddress”h]”hŒaddress”…”�”}”(hjCh²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hjubeh}”(h]”h ]”h"]”h$]”h&]”Œnoemph”ˆhÅhÆuh1jB hjšubjC )�”}”(hŒ u32 value[]”h]”(h)�”}”(hhh]”jÖ )�”}”(hŒu32”h]”hŒu32”…”�”}”(hj_h²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hj\ubah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”jí Œreftype”jï Œ reftarget”jaŒmodname”NŒ classname”Njó jö )�”}”jù ]”jÜŒc.oa_tc6_write_registers”†”asbuh1hhjXubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hj}h²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hjXubjÖ )�”}”(hŒvalue”h]”hŒvalue”…”�”}”(hj‹h²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hjXubj )�”}”(hŒ[”h]”hŒ[”…”�”}”(hj™h²hh³Nh´Nubah}”(h]”h ]”j ah"]”h$]”h&]”uh1j hjXubj )�”}”(hŒ]”h]”hŒ]”…”�”}”(hj§h²hh³Nh´Nubah}”(h]”h ]”j ah"]”h$]”h&]”uh1j hjXubeh}”(h]”h ]”h"]”h$]”h&]”Œnoemph”ˆhÅhÆuh1jB hjšubjC )�”}”(hŒ u8 length”h]”(h)�”}”(hhh]”jÖ )�”}”(hŒu8”h]”hŒu8”…”�”}”(hjÃh²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hjÀubah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”jí Œreftype”jï Œ reftarget”jÅŒmodname”NŒ classname”Njó jö )�”}”jù ]”jÜŒc.oa_tc6_write_registers”†”asbuh1hhj¼ubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hjáh²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hj¼ubjÖ )�”}”(hŒlength”h]”hŒlength”…”�”}”(hjïh²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hj¼ubeh}”(h]”h ]”h"]”h$]”h&]”Œnoemph”ˆhÅhÆuh1jB hjšubeh}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1j< hjbh²hh³hÇh´M×ubeh}”(h]”h ]”h"]”h$]”h&]”hÅhÆj  ˆuh1jª j¡ j¢ hj^h²hh³hÇh´M×ubah}”(h]”jYah ]”(j¦ j§ eh"]”h$]”h&]”j« ˆj¬ )j­ huh1j¤ h³hÇh´M×hj[h²hubj¯ )�”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”uh1j® hj[h²hh³hÇh´M×ubeh}”(h]”h ]”(jí Œfunction”eh"]”h$]”h&]”jÀ jí jÁ j"j j"jà ‰jÄ ‰jÅ ‰uh1jŸ h²hhjo h³Nh´Nubhï)�”}”(hŒ—Writing multiple consecutive registers starting from @address in the MAC-PHY. Maximum of 128 consecutive registers can be written starting at @address.”h]”hŒ—Writing multiple consecutive registers starting from @address in the MAC-PHY. Maximum of 128 consecutive registers can be written starting at @address.”…”�”}”(hj&h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´MÚhjo h²hubj� )�”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”Œentries”]”(j› Œ!oa_tc6_read_register (C function)”Œc.oa_tc6_read_register”hNt”auh1jŽ hjo h²hh³Nh´Nubj  )�”}”(hhh]”(j¥ )�”}”(hŒEint oa_tc6_read_register(struct oa_tc6 *tc6, u32 address, u32 *value)”h]”j« )�”}”(hŒEint oa_tc6_read_register(struct oa_tc6 *tc6, u32 address, u32 *value)”h]”(jî )�”}”(hŒint”h]”hŒint”…”�”}”(hjMh²hh³Nh´Nubah}”(h]”h ]”jú ah"]”h$]”h&]”uh1jí hjIh²hh³hÇh´MÝubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hj[h²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hjIh²hh³hÇh´MÝubj" )�”}”(hŒoa_tc6_read_register”h]”jÖ )�”}”(hŒoa_tc6_read_register”h]”hŒoa_tc6_read_register”…”�”}”(hjmh²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hjiubah}”(h]”h ]”(j7 j8 eh"]”h$]”h&]”hÅhÆuh1j! hjIh²hh³hÇh´MÝubj= )�”}”(hŒ-(struct oa_tc6 *tc6, u32 address, u32 *value)”h]”(jC )�”}”(hŒstruct oa_tc6 *tc6”h]”(j± )�”}”(hj´ h]”hŒstruct”…”�”}”(hj‰h²hh³Nh´Nubah}”(h]”h ]”j½ ah"]”h$]”h&]”uh1j° hj…ubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hj–h²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hj…ubh)�”}”(hhh]”jÖ )�”}”(hŒoa_tc6”h]”hŒoa_tc6”…”�”}”(hj§h²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hj¤ubah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”jí Œreftype”jï Œ reftarget”j©Œmodname”NŒ classname”Njó jö )�”}”jù ]”jü )�”}”jï josbŒc.oa_tc6_read_register”†”asbuh1hhj…ubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hjÇh²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hj…ubj )�”}”(hj h]”hŒ*”…”�”}”(hjÕh²hh³Nh´Nubah}”(h]”h ]”j ah"]”h$]”h&]”uh1j hj…ubjÖ )�”}”(hŒtc6”h]”hŒtc6”…”�”}”(hjâh²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hj…ubeh}”(h]”h ]”h"]”h$]”h&]”Œnoemph”ˆhÅhÆuh1jB hj�ubjC )�”}”(hŒ u32 address”h]”(h)�”}”(hhh]”jÖ )�”}”(hŒu32”h]”hŒu32”…”�”}”(hjþh²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hjûubah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”jí Œreftype”jï Œ reftarget”jŒmodname”NŒ classname”Njó jö )�”}”jù ]”jÃŒc.oa_tc6_read_register”†”asbuh1hhj÷ubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hj÷ubjÖ )�”}”(hŒaddress”h]”hŒaddress”…”�”}”(hj*h²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hj÷ubeh}”(h]”h ]”h"]”h$]”h&]”Œnoemph”ˆhÅhÆuh1jB hj�ubjC )�”}”(hŒ u32 *value”h]”(h)�”}”(hhh]”jÖ )�”}”(hŒu32”h]”hŒu32”…”�”}”(hjFh²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hjCubah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”jí Œreftype”jï Œ reftarget”jHŒmodname”NŒ classname”Njó jö )�”}”jù ]”jÃŒc.oa_tc6_read_register”†”asbuh1hhj?ubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hjdh²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hj?ubj )�”}”(hj h]”hŒ*”…”�”}”(hjrh²hh³Nh´Nubah}”(h]”h ]”j ah"]”h$]”h&]”uh1j hj?ubjÖ )�”}”(hŒvalue”h]”hŒvalue”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hj?ubeh}”(h]”h ]”h"]”h$]”h&]”Œnoemph”ˆhÅhÆuh1jB hj�ubeh}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1j< hjIh²hh³hÇh´MÝubeh}”(h]”h ]”h"]”h$]”h&]”hÅhÆj  ˆuh1jª j¡ j¢ hjEh²hh³hÇh´MÝubah}”(h]”j@ah ]”(j¦ j§ eh"]”h$]”h&]”j« ˆj¬ )j­ huh1j¤ h³hÇh´MÝhjBh²hubj¯ )�”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”uh1j® hjBh²hh³hÇh´MÝubeh}”(h]”h ]”(jí Œfunction”eh"]”h$]”h&]”jÀ jí jÁ j²j j²jà ‰jÄ ‰jÅ ‰uh1jŸ h²hhjo h³Nh´Nubhï)�”}”(hŒ&Read a single register in the MAC-PHY.”h]”hŒ&Read a single register in the MAC-PHY.”…”�”}”(hj¶h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´Màhjo h²hubj� )�”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”Œentries”]”(j› Œ"oa_tc6_read_registers (C function)”Œc.oa_tc6_read_registers”hNt”auh1jŽ hjo h²hh³Nh´Nubj  )�”}”(hhh]”(j¥ )�”}”(hŒRint oa_tc6_read_registers(struct oa_tc6 *tc6, u32 address, u32 value[], u8 length)”h]”j« )�”}”(hŒRint oa_tc6_read_registers(struct oa_tc6 *tc6, u32 address, u32 value[], u8 length)”h]”(jî )�”}”(hŒint”h]”hŒint”…”�”}”(hjÝh²hh³Nh´Nubah}”(h]”h ]”jú ah"]”h$]”h&]”uh1jí hjÙh²hh³hÇh´Mâubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hjëh²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hjÙh²hh³hÇh´Mâubj" )�”}”(hŒoa_tc6_read_registers”h]”jÖ )�”}”(hŒoa_tc6_read_registers”h]”hŒoa_tc6_read_registers”…”�”}”(hjýh²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hjùubah}”(h]”h ]”(j7 j8 eh"]”h$]”h&]”hÅhÆuh1j! hjÙh²hh³hÇh´Mâubj= )�”}”(hŒ9(struct oa_tc6 *tc6, u32 address, u32 value[], u8 length)”h]”(jC )�”}”(hŒstruct oa_tc6 *tc6”h]”(j± )�”}”(hj´ h]”hŒstruct”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”j½ ah"]”h$]”h&]”uh1j° hjubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hj&h²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hjubh)�”}”(hhh]”jÖ )�”}”(hŒoa_tc6”h]”hŒoa_tc6”…”�”}”(hj7h²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hj4ubah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”jí Œreftype”jï Œ reftarget”j9Œmodname”NŒ classname”Njó jö )�”}”jù ]”jü )�”}”jï jÿsbŒc.oa_tc6_read_registers”†”asbuh1hhjubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hjWh²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hjubj )�”}”(hj h]”hŒ*”…”�”}”(hjeh²hh³Nh´Nubah}”(h]”h ]”j ah"]”h$]”h&]”uh1j hjubjÖ )�”}”(hŒtc6”h]”hŒtc6”…”�”}”(hjrh²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hjubeh}”(h]”h ]”h"]”h$]”h&]”Œnoemph”ˆhÅhÆuh1jB hjubjC )�”}”(hŒ u32 address”h]”(h)�”}”(hhh]”jÖ )�”}”(hŒu32”h]”hŒu32”…”�”}”(hjŽh²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hj‹ubah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”jí Œreftype”jï Œ reftarget”j�Œmodname”NŒ classname”Njó jö )�”}”jù ]”jSŒc.oa_tc6_read_registers”†”asbuh1hhj‡ubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hj¬h²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hj‡ubjÖ )�”}”(hŒaddress”h]”hŒaddress”…”�”}”(hjºh²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hj‡ubeh}”(h]”h ]”h"]”h$]”h&]”Œnoemph”ˆhÅhÆuh1jB hjubjC )�”}”(hŒ u32 value[]”h]”(h)�”}”(hhh]”jÖ )�”}”(hŒu32”h]”hŒu32”…”�”}”(hjÖh²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hjÓubah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”jí Œreftype”jï Œ reftarget”jØŒmodname”NŒ classname”Njó jö )�”}”jù ]”jSŒc.oa_tc6_read_registers”†”asbuh1hhjÏubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hjôh²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hjÏubjÖ )�”}”(hŒvalue”h]”hŒvalue”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hjÏubj )�”}”(hj›h]”hŒ[”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”j ah"]”h$]”h&]”uh1j hjÏubj )�”}”(hj©h]”hŒ]”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”j ah"]”h$]”h&]”uh1j hjÏubeh}”(h]”h ]”h"]”h$]”h&]”Œnoemph”ˆhÅhÆuh1jB hjubjC )�”}”(hŒ u8 length”h]”(h)�”}”(hhh]”jÖ )�”}”(hŒu8”h]”hŒu8”…”�”}”(hj8h²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hj5ubah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”jí Œreftype”jï Œ reftarget”j:Œmodname”NŒ classname”Njó jö )�”}”jù ]”jSŒc.oa_tc6_read_registers”†”asbuh1hhj1ubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hjVh²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hj1ubjÖ )�”}”(hŒlength”h]”hŒlength”…”�”}”(hjdh²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hj1ubeh}”(h]”h ]”h"]”h$]”h&]”Œnoemph”ˆhÅhÆuh1jB hjubeh}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1j< hjÙh²hh³hÇh´Mâubeh}”(h]”h ]”h"]”h$]”h&]”hÅhÆj  ˆuh1jª j¡ j¢ hjÕh²hh³hÇh´Mâubah}”(h]”jÐah ]”(j¦ j§ eh"]”h$]”h&]”j« ˆj¬ )j­ huh1j¤ h³hÇh´MâhjÒh²hubj¯ )�”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”uh1j® hjÒh²hh³hÇh´Mâubeh}”(h]”h ]”(jí Œfunction”eh"]”h$]”h&]”jÀ jí jÁ j—j j—jà ‰jÄ ‰jÅ ‰uh1jŸ h²hhjo h³Nh´Nubhï)�”}”(hŒ”Reading multiple consecutive registers starting from @address in the MAC-PHY. Maximum of 128 consecutive registers can be read starting at @address.”h]”hŒ”Reading multiple consecutive registers starting from @address in the MAC-PHY. Maximum of 128 consecutive registers can be read starting at @address.”…”�”}”(hj›h²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´Måhjo h²hubj� )�”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”Œentries”]”(j› Œoa_tc6_start_xmit (C function)”Œc.oa_tc6_start_xmit”hNt”auh1jŽ hjo h²hh³Nh´Nubj  )�”}”(hhh]”(j¥ )�”}”(hŒGnetdev_tx_t oa_tc6_start_xmit(struct oa_tc6 *tc6, struct sk_buff *skb);”h]”j« )�”}”(hŒGnetdev_tx_t oa_tc6_start_xmit(struct oa_tc6 *tc6, struct sk_buff *skb);”h]”(h)�”}”(hhh]”jÖ )�”}”(hŒ netdev_tx_t”h]”hŒ netdev_tx_t”…”�”}”(hjÅh²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hjÂubah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”jí Œreftype”jï Œ reftarget”jÇŒmodname”NŒ classname”Njó jö )�”}”jù ]”jü )�”}”jï Œoa_tc6_start_xmit”sbŒc.oa_tc6_start_xmit”†”asbuh1hhj¾h²hh³hÇh´Mèubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hjæh²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hj¾h²hh³hÇh´Mèubj" )�”}”(hŒoa_tc6_start_xmit”h]”jÖ )�”}”(hjãh]”hŒoa_tc6_start_xmit”…”�”}”(hjøh²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hjôubah}”(h]”h ]”(j7 j8 eh"]”h$]”h&]”hÅhÆuh1j! hj¾h²hh³hÇh´Mèubj= )�”}”(hŒ)(struct oa_tc6 *tc6, struct sk_buff *skb)”h]”(jC )�”}”(hŒstruct oa_tc6 *tc6”h]”(j± )�”}”(hj´ h]”hŒstruct”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”j½ ah"]”h$]”h&]”uh1j° hjubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hjubh)�”}”(hhh]”jÖ )�”}”(hŒoa_tc6”h]”hŒoa_tc6”…”�”}”(hj1h²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hj.ubah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”jí Œreftype”jï Œ reftarget”j3Œmodname”NŒ classname”Njó jö )�”}”jù ]”jáŒc.oa_tc6_start_xmit”†”asbuh1hhjubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hjOh²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hjubj )�”}”(hj h]”hŒ*”…”�”}”(hj]h²hh³Nh´Nubah}”(h]”h ]”j ah"]”h$]”h&]”uh1j hjubjÖ )�”}”(hŒtc6”h]”hŒtc6”…”�”}”(hjjh²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hjubeh}”(h]”h ]”h"]”h$]”h&]”Œnoemph”ˆhÅhÆuh1jB hj ubjC )�”}”(hŒstruct sk_buff *skb”h]”(j± )�”}”(hj´ h]”hŒstruct”…”�”}”(hjƒh²hh³Nh´Nubah}”(h]”h ]”j½ ah"]”h$]”h&]”uh1j° hjubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hj�h²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hjubh)�”}”(hhh]”jÖ )�”}”(hŒsk_buff”h]”hŒsk_buff”…”�”}”(hj¡h²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hjžubah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”jí Œreftype”jï Œ reftarget”j£Œmodname”NŒ classname”Njó jö )�”}”jù ]”jáŒc.oa_tc6_start_xmit”†”asbuh1hhjubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hj¿h²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hjubj )�”}”(hj h]”hŒ*”…”�”}”(hjÍh²hh³Nh´Nubah}”(h]”h ]”j ah"]”h$]”h&]”uh1j hjubjÖ )�”}”(hŒskb”h]”hŒskb”…”�”}”(hjÚh²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hjubeh}”(h]”h ]”h"]”h$]”h&]”Œnoemph”ˆhÅhÆuh1jB hj ubeh}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1j< hj¾h²hh³hÇh´Mèubj )�”}”(hŒ;”h]”hŒ;”…”�”}”(hjõh²hh³Nh´Nubah}”(h]”h ]”j ah"]”h$]”h&]”uh1j hj¾h²hh³hÇh´Mèubeh}”(h]”h ]”h"]”h$]”h&]”hÅhÆj  ˆuh1jª j¡ j¢ hjºh²hh³hÇh´Mèubah}”(h]”jµah ]”(j¦ j§ eh"]”h$]”h&]”j« ˆj¬ )j­ huh1j¤ h³hÇh´Mèhj·h²hubj¯ )�”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”uh1j® hj·h²hh³hÇh´Mèubeh}”(h]”h ]”(jí Œfunction”eh"]”h$]”h&]”jÀ jí jÁ jj jjà ‰jÄ ‰jÅ ‰uh1jŸ h²hhjo h³Nh´Nubhï)�”}”(hŒYThe transmit Ethernet frame in the skb is or going to be transmitted through the MAC-PHY.”h]”hŒYThe transmit Ethernet frame in the skb is or going to be transmitted through the MAC-PHY.”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´Mëhjo h²hubj� )�”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”Œentries”]”(j› Œ3oa_tc6_zero_align_receive_frame_enable (C function)”Œ(c.oa_tc6_zero_align_receive_frame_enable”hNt”auh1jŽ hjo h²hh³Nh´Nubj  )�”}”(hhh]”(j¥ )�”}”(hŒ?int oa_tc6_zero_align_receive_frame_enable(struct oa_tc6 *tc6);”h]”j« )�”}”(hŒ?int oa_tc6_zero_align_receive_frame_enable(struct oa_tc6 *tc6);”h]”(jî )�”}”(hŒint”h]”hŒint”…”�”}”(hjFh²hh³Nh´Nubah}”(h]”h ]”jú ah"]”h$]”h&]”uh1jí hjBh²hh³hÇh´Mîubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hjTh²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hjBh²hh³hÇh´Mîubj" )�”}”(hŒ&oa_tc6_zero_align_receive_frame_enable”h]”jÖ )�”}”(hŒ&oa_tc6_zero_align_receive_frame_enable”h]”hŒ&oa_tc6_zero_align_receive_frame_enable”…”�”}”(hjfh²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hjbubah}”(h]”h ]”(j7 j8 eh"]”h$]”h&]”hÅhÆuh1j! hjBh²hh³hÇh´Mîubj= )�”}”(hŒ(struct oa_tc6 *tc6)”h]”jC )�”}”(hŒstruct oa_tc6 *tc6”h]”(j± )�”}”(hj´ h]”hŒstruct”…”�”}”(hj‚h²hh³Nh´Nubah}”(h]”h ]”j½ ah"]”h$]”h&]”uh1j° hj~ubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hj�h²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hj~ubh)�”}”(hhh]”jÖ )�”}”(hŒoa_tc6”h]”hŒoa_tc6”…”�”}”(hj h²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hj�ubah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”jí Œreftype”jï Œ reftarget”j¢Œmodname”NŒ classname”Njó jö )�”}”jù ]”jü )�”}”jï jhsbŒ(c.oa_tc6_zero_align_receive_frame_enable”†”asbuh1hhj~ubj )�”}”(hŒ ”h]”hŒ ”…”�”}”(hjÀh²hh³Nh´Nubah}”(h]”h ]”jÎ ah"]”h$]”h&]”uh1jÁ hj~ubj )�”}”(hj h]”hŒ*”…”�”}”(hjÎh²hh³Nh´Nubah}”(h]”h ]”j ah"]”h$]”h&]”uh1j hj~ubjÖ )�”}”(hŒtc6”h]”hŒtc6”…”�”}”(hjÛh²hh³Nh´Nubah}”(h]”h ]”jâ ah"]”h$]”h&]”uh1jÕ hj~ubeh}”(h]”h ]”h"]”h$]”h&]”Œnoemph”ˆhÅhÆuh1jB hjzubah}”(h]”h ]”h"]”h$]”h&]”hÅhÆuh1j< hjBh²hh³hÇh´Mîubj )�”}”(hj÷h]”hŒ;”…”�”}”(hjöh²hh³Nh´Nubah}”(h]”h ]”j ah"]”h$]”h&]”uh1j hjBh²hh³hÇh´Mîubeh}”(h]”h ]”h"]”h$]”h&]”hÅhÆj  ˆuh1jª j¡ j¢ hj>h²hh³hÇh´Mîubah}”(h]”j9ah ]”(j¦ j§ eh"]”h$]”h&]”j« ˆj¬ )j­ huh1j¤ h³hÇh´Mîhj;h²hubj¯ )�”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”uh1j® hj;h²hh³hÇh´Mîubeh}”(h]”h ]”(jí Œfunction”eh"]”h$]”h&]”jÀ jí jÁ jj jjà ‰jÄ ‰jÅ ‰uh1jŸ h²hhjo h³Nh´Nubhï)�”}”(hŒ½Zero align receive frame feature can be enabled to align all receive ethernet frames data to start at the beginning of any receive data chunk payload with a start word offset (SWO) of zero.”h]”hŒ½Zero align receive frame feature can be enabled to align all receive ethernet frames data to start at the beginning of any receive data chunk payload with a start word offset (SWO) of zero.”…”�”}”(hjh²hh³Nh´Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hîh³hÇh´Mðhjo h²hubeh}”(h]”Œdevice-drivers-api”ah ]”h"]”Œdevice drivers api”ah$]”h&]”uh1hÈhj¥ h²hh³hÇh´MÄubeh}”(h]”Œcontrol-transaction”ah ]”h"]”Œcontrol transaction”ah$]”h&]”uh1hÈhjSh²hh³hÇh´Mubeh}”(h]”Œimplementation”ah ]”h"]”Œimplementation”ah$]”h&]”uh1hÈhhÊh²hh³hÇh´K}ubeh}”(h]”ŒGopen-alliance-10base-t1x-mac-phy-serial-interface-tc6-framework-support”ah ]”h"]”ŒIopen alliance 10base-t1x mac-phy serial interface (tc6) framework support”ah$]”h&]”uh1hÈhhh²hh³hÇh´Kubeh}”(h]”h ]”h"]”h$]”h&]”Œsource”hÇuh1hŒcurrent_source”NŒ current_line”NŒsettings”Œdocutils.frontend”ŒValues”“”)�”}”(hÍNŒ generator”NŒ datestamp”NŒ source_link”NŒ source_url”NŒ toc_backlinks”Œentry”Œfootnote_backlinks”KŒ sectnum_xform”KŒstrip_comments”NŒstrip_elements_with_classes”NŒ strip_classes”NŒ report_level”KŒ halt_level”KŒexit_status_level”KŒdebug”NŒwarning_stream”NŒ traceback”ˆŒinput_encoding”Œ utf-8-sig”Œinput_encoding_error_handler”Œstrict”Œoutput_encoding”Œutf-8”Œoutput_encoding_error_handler”jpŒerror_encoding”Œutf-8”Œerror_encoding_error_handler”Œbackslashreplace”Œ language_code”Œen”Œrecord_dependencies”NŒconfig”NŒ id_prefix”hŒauto_id_prefix”Œid”Œ dump_settings”NŒdump_internals”NŒdump_transforms”NŒdump_pseudo_xml”NŒexpose_internals”NŒstrict_visitor”NŒ_disable_config”NŒ_source”hÇŒ _destination”NŒ _config_files”]”Œ7/var/lib/git/docbuild/linux/Documentation/docutils.conf”aŒfile_insertion_enabled”ˆŒ raw_enabled”KŒline_length_limit”M'Œpep_references”NŒ pep_base_url”Œhttps://peps.python.org/”Œpep_file_url_template”Œpep-%04d”Œrfc_references”NŒ rfc_base_url”Œ&https://datatracker.ietf.org/doc/html/”Œ tab_width”KŒtrim_footnote_reference_space”‰Œsyntax_highlight”Œlong”Œ smart_quotes”ˆŒsmartquotes_locales”]”Œcharacter_level_inline_markup”‰Œdoctitle_xform”‰Œ docinfo_xform”KŒsectsubtitle_xform”‰Œ image_loading”Œlink”Œembed_stylesheet”‰Œcloak_email_addresses”ˆŒsection_self_link”‰Œenv”NubŒreporter”NŒindirect_targets”]”Œsubstitution_defs”}”Œsubstitution_names”}”Œrefnames”}”Œrefids”}”Œnameids”}”(jJjGj-j*jTjQj³j°jùjöj'j$jPjMjBj?jéjæjƒj€jQ jN j¢ jŸ j:j7j2j/uŒ nametypes”}”(jJ‰j-‰jT‰j³‰jù‰j'‰jP‰jB‰jé‰jƒ‰jQ ‰j¢ ‰j:‰j2‰uh}”(jGhÊj*hÝjQj0j°jWjöj¶j$jüjMj*j?jSjæjdj€jìjN j†jŸ jT j7j¥ j/jo j� j¦ jà jå jÖjÛjYj^j@jEjÐjÕjµjºj9j>uŒ footnote_refs”}”Œ citation_refs”}”Œ autofootnotes”]”Œautofootnote_refs”]”Œsymbol_footnotes”]”Œsymbol_footnote_refs”]”Œ footnotes”]”Œ citations”]”Œautofootnote_start”KŒsymbol_footnote_start”KŒ id_counter”Œ collections”ŒCounter”“”}”…”R”Œparse_messages”]”Œtransform_messages”]”Œ transformer”NŒ include_log”]”Œ decoration”Nh²hub.