sphinx.addnodesdocument)}( rawsource children]( translations
LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba
attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget./translations/zh_CN/networking/multi-pf-netdevmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah }(h ]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget./translations/zh_TW/networking/multi-pf-netdevmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah }(h ]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget./translations/it_IT/networking/multi-pf-netdevmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah }(h ]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget./translations/ja_JP/networking/multi-pf-netdevmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah }(h ]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget./translations/ko_KR/networking/multi-pf-netdevmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hPortuguese (Brazilian)}hhsbah }(h ]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget./translations/pt_BR/networking/multi-pf-netdevmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah }(h ]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget./translations/sp_SP/networking/multi-pf-netdevmodnameN classnameN refexplicituh1hhh ubeh }(h ]h ]h"]h$]h&]current_languageEnglishuh1h
hh _documenthsourceNlineNubhcomment)}(h SPDX-License-Identifier: GPL-2.0h]h SPDX-License-Identifier: GPL-2.0}hhsbah }(h ]h ]h"]h$]h&] xml:spacepreserveuh1hhhhhhH/var/lib/git/docbuild/linux/Documentation/networking/multi-pf-netdev.rsthKubh)}(h4This data file has been placed in the public domain.h]h4This data file has been placed in the public domain.}hhsbah }(h ]h ]h"]h$]h&]hhuh1hhhhhho/srv/docbuild/lib/venvs/build-kernel-docs/lib64/python3.9/site-packages/docutils/parsers/rst/include/isonum.txthKubh)}(hDerived from the Unicode character mappings available from
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h]h¥}hjL sbah }(h ]h ]h"]yenah$]h&]uh1hhhhKRhhhhubhsection)}(hhh](htitle)}(hMulti-PF Netdevh]hMulti-PF Netdev}(hjb hhhNhNubah }(h ]h ]h"]h$]h&]uh1j` hj] hhhhhKubj\ )}(hhh](ja )}(hContentsh]hContents}(hjs hhhNhNubah }(h ]h ]h"]h$]h&]uh1j` hjp hhhhhK ubh bullet_list)}(hhh](h list_item)}(h
`Background`_h]h paragraph)}(hj h]h reference)}(hj h]h
Background}(hj hhhNhNubah }(h ]h ]h"]h$]h&]name
Backgroundrefid
backgrounduh1j hj resolvedKubah }(h ]h ]h"]h$]h&]uh1j hhhK hj ubah }(h ]h ]h"]h$]h&]uh1j hj hhhhhNubj )}(h `Overview`_h]j )}(hj h]j )}(hj h]hOverview}(hj hhhNhNubah }(h ]h ]h"]h$]h&]nameOverviewj overviewuh1j hj j Kubah }(h ]h ]h"]h$]h&]uh1j hhhK hj ubah }(h ]h ]h"]h$]h&]uh1j hj hhhhhNubj )}(h`mlx5 implementation`_h]j )}(hj h]j )}(hj h]hmlx5 implementation}(hj hhhNhNubah }(h ]h ]h"]h$]h&]namemlx5 implementationj mlx5-implementationuh1j hj j Kubah }(h ]h ]h"]h$]h&]uh1j hhhK
hj ubah }(h ]h ]h"]h$]h&]uh1j hj hhhhhNubj )}(h`Channels distribution`_h]j )}(hj h]j )}(hj h]hChannels distribution}(hj hhhNhNubah }(h ]h ]h"]h$]h&]nameChannels distributionj channels-distributionuh1j hj j Kubah }(h ]h ]h"]h$]h&]uh1j hhhKhj ubah }(h ]h ]h"]h$]h&]uh1j hj hhhhhNubj )}(h`Observability`_h]j )}(hj h]j )}(hj h]h
Observability}(hj! hhhNhNubah }(h ]h ]h"]h$]h&]name
Observabilityj
observabilityuh1j hj j Kubah }(h ]h ]h"]h$]h&]uh1j hhhKhj ubah }(h ]h ]h"]h$]h&]uh1j hj hhhhhNubj )}(h `Steering`_h]j )}(hj? h]j )}(hj? h]hSteering}(hjD hhhNhNubah }(h ]h ]h"]h$]h&]nameSteeringj steeringuh1j hjA j Kubah }(h ]h ]h"]h$]h&]uh1j hhhKhj= ubah }(h ]h ]h"]h$]h&]uh1j hj hhhhhNubj )}(h `Mutually exclusive features`_
h]j )}(h `Mutually exclusive features`_h]j )}(hjf h]hMutually exclusive features}(hjh hhhNhNubah }(h ]h ]h"]h$]h&]nameMutually exclusive featuresj mutually-exclusive-featuresuh1j hjd j Kubah }(h ]h ]h"]h$]h&]uh1j hhhKhj` ubah }(h ]h ]h"]h$]h&]uh1j hj hhhhhNubeh }(h ]h ]h"]h$]h&]bullet-uh1j hhhK hjp hhubeh }(h ]contentsah ]h"]contentsah$]h&]uh1j[ hj] hhhhhK ubj\ )}(hhh](ja )}(h
Backgroundh]h
Background}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j` hj hhhhhKubj )}(hX The Multi-PF NIC technology enables several CPUs within a multi-socket server to connect directly to
the network, each through its own dedicated PCIe interface. Through either a connection harness that
splits the PCIe lanes between two cards or by bifurcating a PCIe slot for a single card. This
results in eliminating the network traffic traversing over the internal bus between the sockets,
significantly reducing overhead and latency, in addition to reducing CPU utilization and increasing
network throughput.h]hX The Multi-PF NIC technology enables several CPUs within a multi-socket server to connect directly to
the network, each through its own dedicated PCIe interface. Through either a connection harness that
splits the PCIe lanes between two cards or by bifurcating a PCIe slot for a single card. This
results in eliminating the network traffic traversing over the internal bus between the sockets,
significantly reducing overhead and latency, in addition to reducing CPU utilization and increasing
network throughput.}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj hhubeh }(h ]j ah ]h"]
backgroundah$]h&]uh1j[ hj] hhhhhK
referencedKubj\ )}(hhh](ja )}(hOverviewh]hOverview}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j` hj hhhhhK ubj )}(hX The feature adds support for combining multiple PFs of the same port in a Multi-PF environment under
one netdev instance. It is implemented in the netdev layer. Lower-layer instances like pci func,
sysfs entry, and devlink are kept separate.
Passing traffic through different devices belonging to different NUMA sockets saves cross-NUMA
traffic and allows apps running on the same netdev from different NUMAs to still feel a sense of
proximity to the device and achieve improved performance.h]hX The feature adds support for combining multiple PFs of the same port in a Multi-PF environment under
one netdev instance. It is implemented in the netdev layer. Lower-layer instances like pci func,
sysfs entry, and devlink are kept separate.
Passing traffic through different devices belonging to different NUMA sockets saves cross-NUMA
traffic and allows apps running on the same netdev from different NUMAs to still feel a sense of
proximity to the device and achieve improved performance.}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhK hj hhubeh }(h ]j ah ]h"]overviewah$]h&]uh1j[ hj] hhhhhK j Kubj\ )}(hhh](ja )}(hmlx5 implementationh]hmlx5 implementation}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j` hj hhhhhK(ubj )}(hX% Multi-PF or Socket-direct in mlx5 is achieved by grouping PFs together which belong to the same
NIC and has the socket-direct property enabled, once all PFs are probed, we create a single netdev
to represent all of them, symmetrically, we destroy the netdev whenever any of the PFs is removed.h]hX% Multi-PF or Socket-direct in mlx5 is achieved by grouping PFs together which belong to the same
NIC and has the socket-direct property enabled, once all PFs are probed, we create a single netdev
to represent all of them, symmetrically, we destroy the netdev whenever any of the PFs is removed.}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhK*hj hhubj )}(hThe netdev network channels are distributed between all devices, a proper configuration would utilize
the correct close NUMA node when working on a certain app/CPU.h]hThe netdev network channels are distributed between all devices, a proper configuration would utilize
the correct close NUMA node when working on a certain app/CPU.}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhK.hj hhubj )}(hX We pick one PF to be a primary (leader), and it fills a special role. The other devices
(secondaries) are disconnected from the network at the chip level (set to silent mode). In silent
mode, no south <-> north traffic flowing directly through a secondary PF. It needs the assistance of
the leader PF (east <-> west traffic) to function. All Rx/Tx traffic is steered through the primary
to/from the secondaries.h]hX We pick one PF to be a primary (leader), and it fills a special role. The other devices
(secondaries) are disconnected from the network at the chip level (set to silent mode). In silent
mode, no south <-> north traffic flowing directly through a secondary PF. It needs the assistance of
the leader PF (east <-> west traffic) to function. All Rx/Tx traffic is steered through the primary
to/from the secondaries.}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhK1hj hhubj )}(hICurrently, we limit the support to PFs only, and up to two PFs (sockets).h]hICurrently, we limit the support to PFs only, and up to two PFs (sockets).}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhK7hj hhubeh }(h ]j ah ]h"]mlx5 implementationah$]h&]uh1j[ hj] hhhhhK(j Kubj\ )}(hhh](ja )}(hChannels distributionh]hChannels distribution}(hj4 hhhNhNubah }(h ]h ]h"]h$]h&]uh1j` hj1 hhhhhK:ubj )}(hsWe distribute the channels between the different PFs to achieve local NUMA node performance
on multiple NUMA nodes.h]hsWe distribute the channels between the different PFs to achieve local NUMA node performance
on multiple NUMA nodes.}(hjB hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKmdev".h]hThis is achieved by using the correct core device instance (mdev) in each channel, instead of them
all using the same instance under “priv->mdev”.}(hj| hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKUhj1 hhubeh }(h ]j
ah ]h"]channels distributionah$]h&]uh1j[ hj] hhhhhK:j Kubj\ )}(hhh](ja )}(h
Observabilityh]h
Observability}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j` hj hhhhhKYubj )}(hPThe relation between PF, irq, napi, and queue can be observed via netlink spec::h]hOThe relation between PF, irq, napi, and queue can be observed via netlink spec:}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKZhj hhubj_ )}(hX $ ./tools/net/ynl/pyynl/cli.py --spec Documentation/netlink/specs/netdev.yaml --dump queue-get --json='{"ifindex": 13}'
[{'id': 0, 'ifindex': 13, 'napi-id': 539, 'type': 'rx'},
{'id': 1, 'ifindex': 13, 'napi-id': 540, 'type': 'rx'},
{'id': 2, 'ifindex': 13, 'napi-id': 541, 'type': 'rx'},
{'id': 3, 'ifindex': 13, 'napi-id': 542, 'type': 'rx'},
{'id': 4, 'ifindex': 13, 'napi-id': 543, 'type': 'rx'},
{'id': 0, 'ifindex': 13, 'napi-id': 539, 'type': 'tx'},
{'id': 1, 'ifindex': 13, 'napi-id': 540, 'type': 'tx'},
{'id': 2, 'ifindex': 13, 'napi-id': 541, 'type': 'tx'},
{'id': 3, 'ifindex': 13, 'napi-id': 542, 'type': 'tx'},
{'id': 4, 'ifindex': 13, 'napi-id': 543, 'type': 'tx'}]
$ ./tools/net/ynl/pyynl/cli.py --spec Documentation/netlink/specs/netdev.yaml --dump napi-get --json='{"ifindex": 13}'
[{'id': 543, 'ifindex': 13, 'irq': 42},
{'id': 542, 'ifindex': 13, 'irq': 41},
{'id': 541, 'ifindex': 13, 'irq': 40},
{'id': 540, 'ifindex': 13, 'irq': 39},
{'id': 539, 'ifindex': 13, 'irq': 36}]h]hX $ ./tools/net/ynl/pyynl/cli.py --spec Documentation/netlink/specs/netdev.yaml --dump queue-get --json='{"ifindex": 13}'
[{'id': 0, 'ifindex': 13, 'napi-id': 539, 'type': 'rx'},
{'id': 1, 'ifindex': 13, 'napi-id': 540, 'type': 'rx'},
{'id': 2, 'ifindex': 13, 'napi-id': 541, 'type': 'rx'},
{'id': 3, 'ifindex': 13, 'napi-id': 542, 'type': 'rx'},
{'id': 4, 'ifindex': 13, 'napi-id': 543, 'type': 'rx'},
{'id': 0, 'ifindex': 13, 'napi-id': 539, 'type': 'tx'},
{'id': 1, 'ifindex': 13, 'napi-id': 540, 'type': 'tx'},
{'id': 2, 'ifindex': 13, 'napi-id': 541, 'type': 'tx'},
{'id': 3, 'ifindex': 13, 'napi-id': 542, 'type': 'tx'},
{'id': 4, 'ifindex': 13, 'napi-id': 543, 'type': 'tx'}]
$ ./tools/net/ynl/pyynl/cli.py --spec Documentation/netlink/specs/netdev.yaml --dump napi-get --json='{"ifindex": 13}'
[{'id': 543, 'ifindex': 13, 'irq': 42},
{'id': 542, 'ifindex': 13, 'irq': 41},
{'id': 541, 'ifindex': 13, 'irq': 40},
{'id': 540, 'ifindex': 13, 'irq': 39},
{'id': 539, 'ifindex': 13, 'irq': 36}]}hj sbah }(h ]h ]h"]h$]h&]hhuh1j^ hhhK\hj hhubj )}(h?Here you can clearly observe our channels distribution policy::h]h>Here you can clearly observe our channels distribution policy:}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKohj hhubj_ )}(h$ ls /proc/irq/{36,39,40,41,42}/mlx5* -d -1
/proc/irq/36/mlx5_comp0@pci:0000:08:00.0
/proc/irq/39/mlx5_comp0@pci:0000:09:00.0
/proc/irq/40/mlx5_comp1@pci:0000:08:00.0
/proc/irq/41/mlx5_comp1@pci:0000:09:00.0
/proc/irq/42/mlx5_comp2@pci:0000:08:00.0h]h$ ls /proc/irq/{36,39,40,41,42}/mlx5* -d -1
/proc/irq/36/mlx5_comp0@pci:0000:08:00.0
/proc/irq/39/mlx5_comp0@pci:0000:09:00.0
/proc/irq/40/mlx5_comp1@pci:0000:08:00.0
/proc/irq/41/mlx5_comp1@pci:0000:09:00.0
/proc/irq/42/mlx5_comp2@pci:0000:08:00.0}hj sbah }(h ]h ]h"]h$]h&]hhuh1j^ hhhKqhj hhubeh }(h ]j0 ah ]h"]
observabilityah$]h&]uh1j[ hj] hhhhhKYj Kubj\ )}(hhh](ja )}(hSteeringh]hSteering}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j` hj hhhhhKyubj )}(hWSecondary PFs are set to "silent" mode, meaning they are disconnected from the network.h]h[Secondary PFs are set to “silent” mode, meaning they are disconnected from the network.}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKzhj hhubj )}(hX In Rx, the steering tables belong to the primary PF only, and it is its role to distribute incoming
traffic to other PFs, via cross-vhca steering capabilities. Still maintain a single default RSS table,
that is capable of pointing to the receive queues of a different PF.h]hX In Rx, the steering tables belong to the primary PF only, and it is its role to distribute incoming
traffic to other PFs, via cross-vhca steering capabilities. Still maintain a single default RSS table,
that is capable of pointing to the receive queues of a different PF.}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhK|hj hhubj )}(hIn Tx, the primary PF creates a new Tx flow table, which is aliased by the secondaries, so they can
go out to the network through it.h]hIn Tx, the primary PF creates a new Tx flow table, which is aliased by the secondaries, so they can
go out to the network through it.}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj hhubj )}(hIn addition, we set default XPS configuration that, based on the CPU, selects an SQ belonging to the
PF on the same node as the CPU.h]hIn addition, we set default XPS configuration that, based on the CPU, selects an SQ belonging to the
PF on the same node as the CPU.}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj hhubj )}(hXPS default config example:h]hXPS default config example:}(hj* hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj hhubj )}(hQNUMA node(s): 2
NUMA node0 CPU(s): 0-11
NUMA node1 CPU(s): 12-23h]hQNUMA node(s): 2
NUMA node0 CPU(s): 0-11
NUMA node1 CPU(s): 12-23}(hj8 hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj hhubj )}(hPF0 on node0, PF1 on node1.h]hPF0 on node0, PF1 on node1.}(hjF hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj hhubj )}(hhh](j )}(h//sys/class/net/eth2/queues/tx-0/xps_cpus:000001h]j )}(hjY h]h//sys/class/net/eth2/queues/tx-0/xps_cpus:000001}(hj[ hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhjW ubah }(h ]h ]h"]h$]h&]uh1j hjT hhhhhNubj )}(h//sys/class/net/eth2/queues/tx-1/xps_cpus:001000h]j )}(hjp h]h//sys/class/net/eth2/queues/tx-1/xps_cpus:001000}(hjr hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhjn ubah }(h ]h ]h"]h$]h&]uh1j hjT hhhhhNubj )}(h//sys/class/net/eth2/queues/tx-2/xps_cpus:000002h]j )}(hj h]h//sys/class/net/eth2/queues/tx-2/xps_cpus:000002}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj ubah }(h ]h ]h"]h$]h&]uh1j hjT hhhhhNubj )}(h//sys/class/net/eth2/queues/tx-3/xps_cpus:002000h]j )}(hj h]h//sys/class/net/eth2/queues/tx-3/xps_cpus:002000}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj ubah }(h ]h ]h"]h$]h&]uh1j hjT hhhhhNubj )}(h//sys/class/net/eth2/queues/tx-4/xps_cpus:000004h]j )}(hj h]h//sys/class/net/eth2/queues/tx-4/xps_cpus:000004}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj ubah }(h ]h ]h"]h$]h&]uh1j hjT hhhhhNubj )}(h//sys/class/net/eth2/queues/tx-5/xps_cpus:004000h]j )}(hj h]h//sys/class/net/eth2/queues/tx-5/xps_cpus:004000}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj ubah }(h ]h ]h"]h$]h&]uh1j hjT hhhhhNubj )}(h//sys/class/net/eth2/queues/tx-6/xps_cpus:000008h]j )}(hj h]h//sys/class/net/eth2/queues/tx-6/xps_cpus:000008}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj ubah }(h ]h ]h"]h$]h&]uh1j hjT hhhhhNubj )}(h//sys/class/net/eth2/queues/tx-7/xps_cpus:008000h]j )}(hj h]h//sys/class/net/eth2/queues/tx-7/xps_cpus:008000}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj ubah }(h ]h ]h"]h$]h&]uh1j hjT hhhhhNubj )}(h//sys/class/net/eth2/queues/tx-8/xps_cpus:000010h]j )}(hj h]h//sys/class/net/eth2/queues/tx-8/xps_cpus:000010}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj ubah }(h ]h ]h"]h$]h&]uh1j hjT hhhhhNubj )}(h//sys/class/net/eth2/queues/tx-9/xps_cpus:010000h]j )}(hj( h]h//sys/class/net/eth2/queues/tx-9/xps_cpus:010000}(hj* hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj& ubah }(h ]h ]h"]h$]h&]uh1j hjT hhhhhNubj )}(h0/sys/class/net/eth2/queues/tx-10/xps_cpus:000020h]j )}(hj? h]h0/sys/class/net/eth2/queues/tx-10/xps_cpus:000020}(hjA hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj= ubah }(h ]h ]h"]h$]h&]uh1j hjT hhhhhNubj )}(h0/sys/class/net/eth2/queues/tx-11/xps_cpus:020000h]j )}(hjV h]h0/sys/class/net/eth2/queues/tx-11/xps_cpus:020000}(hjX hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhjT ubah }(h ]h ]h"]h$]h&]uh1j hjT hhhhhNubj )}(h0/sys/class/net/eth2/queues/tx-12/xps_cpus:000040h]j )}(hjm h]h0/sys/class/net/eth2/queues/tx-12/xps_cpus:000040}(hjo hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhjk ubah }(h ]h ]h"]h$]h&]uh1j hjT hhhhhNubj )}(h0/sys/class/net/eth2/queues/tx-13/xps_cpus:040000h]j )}(hj h]h0/sys/class/net/eth2/queues/tx-13/xps_cpus:040000}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj ubah }(h ]h ]h"]h$]h&]uh1j hjT hhhhhNubj )}(h0/sys/class/net/eth2/queues/tx-14/xps_cpus:000080h]j )}(hj h]h0/sys/class/net/eth2/queues/tx-14/xps_cpus:000080}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj ubah }(h ]h ]h"]h$]h&]uh1j hjT hhhhhNubj )}(h0/sys/class/net/eth2/queues/tx-15/xps_cpus:080000h]j )}(hj h]h0/sys/class/net/eth2/queues/tx-15/xps_cpus:080000}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj ubah }(h ]h ]h"]h$]h&]uh1j hjT hhhhhNubj )}(h0/sys/class/net/eth2/queues/tx-16/xps_cpus:000100h]j )}(hj h]h0/sys/class/net/eth2/queues/tx-16/xps_cpus:000100}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj ubah }(h ]h ]h"]h$]h&]uh1j hjT hhhhhNubj )}(h0/sys/class/net/eth2/queues/tx-17/xps_cpus:100000h]j )}(hj h]h0/sys/class/net/eth2/queues/tx-17/xps_cpus:100000}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj ubah }(h ]h ]h"]h$]h&]uh1j hjT hhhhhNubj )}(h0/sys/class/net/eth2/queues/tx-18/xps_cpus:000200h]j )}(hj h]h0/sys/class/net/eth2/queues/tx-18/xps_cpus:000200}(hj hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj ubah }(h ]h ]h"]h$]h&]uh1j hjT hhhhhNubj )}(h0/sys/class/net/eth2/queues/tx-19/xps_cpus:200000h]j )}(hj
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hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj#
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h]h0/sys/class/net/eth2/queues/tx-21/xps_cpus:400000}(hj>
hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj:
ubah }(h ]h ]h"]h$]h&]uh1j hjT hhhhhNubj )}(h0/sys/class/net/eth2/queues/tx-22/xps_cpus:000800h]j )}(hjS
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hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhjQ
ubah }(h ]h ]h"]h$]h&]uh1j hjT hhhhhNubj )}(h1/sys/class/net/eth2/queues/tx-23/xps_cpus:800000
h]j )}(h0/sys/class/net/eth2/queues/tx-23/xps_cpus:800000h]h0/sys/class/net/eth2/queues/tx-23/xps_cpus:800000}(hjl
hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhjh
ubah }(h ]h ]h"]h$]h&]uh1j hjT hhhhhNubeh }(h ]h ]h"]h$]h&]j j uh1j hhhKhj hhubeh }(h ]jS ah ]h"]steeringah$]h&]uh1j[ hj] hhhhhKyj Kubj\ )}(hhh](ja )}(hMutually exclusive featuresh]hMutually exclusive features}(hj
hhhNhNubah }(h ]h ]h"]h$]h&]uh1j` hj
hhhhhKubj )}(hX The nature of Multi-PF, where different channels work with different PFs, conflicts with
stateful features where the state is maintained in one of the PFs.
For example, in the TLS device-offload feature, special context objects are created per connection
and maintained in the PF. Transitioning between different RQs/SQs would break the feature. Hence,
we disable this combination for now.h]hX The nature of Multi-PF, where different channels work with different PFs, conflicts with
stateful features where the state is maintained in one of the PFs.
For example, in the TLS device-offload feature, special context objects are created per connection
and maintained in the PF. Transitioning between different RQs/SQs would break the feature. Hence,
we disable this combination for now.}(hj
hhhNhNubah }(h ]h ]h"]h$]h&]uh1j hhhKhj
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