sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftargetL/translations/zh_CN/networking/device_drivers/ethernet/mellanox/mlx5/kconfigmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftargetL/translations/zh_TW/networking/device_drivers/ethernet/mellanox/mlx5/kconfigmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftargetL/translations/it_IT/networking/device_drivers/ethernet/mellanox/mlx5/kconfigmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftargetL/translations/ja_JP/networking/device_drivers/ethernet/mellanox/mlx5/kconfigmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftargetL/translations/ko_KR/networking/device_drivers/ethernet/mellanox/mlx5/kconfigmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hPortuguese (Brazilian)}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftargetL/translations/pt_BR/networking/device_drivers/ethernet/mellanox/mlx5/kconfigmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftargetL/translations/sp_SP/networking/device_drivers/ethernet/mellanox/mlx5/kconfigmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhcomment)}(h0SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIBh]h0SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB}hhsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1hhhhhhf/var/lib/git/docbuild/linux/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/kconfig.rsthKubh)}(h4This data file has been placed in the public domain.h]h4This data file has been placed in the public domain.}hhsbah}(h]h ]h"]h$]h&]hhuh1hhhhhho/srv/docbuild/lib/venvs/build-kernel-docs/lib64/python3.9/site-packages/docutils/parsers/rst/include/isonum.txthKubh)}(hDerived from the Unicode character mappings available from . Processed by unicode2rstsubs.py, part of Docutils: .h]hDerived from the Unicode character mappings available from . Processed by unicode2rstsubs.py, part of Docutils: .}hhsbah}(h]h ]h"]h$]h&]hhuh1hhhhhhhhKubhsubstitution_definition)}(h*.. |amp| unicode:: U+00026 .. AMPERSANDh]h&}hhsbah}(h]h ]h"]ampah$]h&]uh1hhhhKhhhhubh)}(h+.. |apos| unicode:: U+00027 .. APOSTROPHEh]h'}hhsbah}(h]h ]h"]aposah$]h&]uh1hhhhKhhhhubh)}(h).. |ast| unicode:: U+0002A .. ASTERISKh]h*}hjsbah}(h]h ]h"]astah$]h&]uh1hhhhK hhhhubh)}(h+.. |brvbar| unicode:: U+000A6 .. BROKEN BARh]h¦}hjsbah}(h]h ]h"]brvbarah$]h&]uh1hhhhK hhhhubh)}(h0.. |bsol| unicode:: U+0005C .. REVERSE SOLIDUSh]h\}hj#sbah}(h]h ]h"]bsolah$]h&]uh1hhhhK hhhhubh)}(h*.. |cent| unicode:: U+000A2 .. CENT SIGNh]h¢}hj2sbah}(h]h ]h"]centah$]h&]uh1hhhhK hhhhubh)}(h&.. |colon| unicode:: U+0003A .. COLONh]h:}hjAsbah}(h]h ]h"]colonah$]h&]uh1hhhhK hhhhubh)}(h&.. |comma| unicode:: U+0002C .. COMMAh]h,}hjPsbah}(h]h ]h"]commaah$]h&]uh1hhhhKhhhhubh)}(h... |commat| unicode:: U+00040 .. COMMERCIAL ATh]h@}hj_sbah}(h]h ]h"]commatah$]h&]uh1hhhhKhhhhubh)}(h/.. |copy| unicode:: U+000A9 .. COPYRIGHT SIGNh]h©}hjnsbah}(h]h ]h"]copyah$]h&]uh1hhhhKhhhhubh)}(h... |curren| unicode:: U+000A4 .. CURRENCY SIGNh]h¤}hj}sbah}(h]h ]h"]currenah$]h&]uh1hhhhKhhhhubh)}(h0.. |darr| unicode:: U+02193 .. DOWNWARDS ARROWh]h↓}hjsbah}(h]h ]h"]darrah$]h&]uh1hhhhKhhhhubh)}(h,.. |deg| unicode:: U+000B0 .. DEGREE SIGNh]h°}hjsbah}(h]h ]h"]degah$]h&]uh1hhhhKhhhhubh)}(h... |divide| unicode:: U+000F7 .. DIVISION SIGNh]h÷}hjsbah}(h]h ]h"]divideah$]h&]uh1hhhhKhhhhubh)}(h,.. |dollar| unicode:: U+00024 .. DOLLAR SIGNh]h$}hjsbah}(h]h ]h"]dollarah$]h&]uh1hhhhKhhhhubh)}(h,.. |equals| unicode:: U+0003D .. EQUALS SIGNh]h=}hjsbah}(h]h ]h"]equalsah$]h&]uh1hhhhKhhhhubh)}(h1.. |excl| unicode:: U+00021 .. EXCLAMATION MARKh]h!}hjsbah}(h]h ]h"]exclah$]h&]uh1hhhhKhhhhubh)}(h9.. |frac12| unicode:: U+000BD .. VULGAR FRACTION ONE HALFh]h½}hjsbah}(h]h ]h"]frac12ah$]h&]uh1hhhhKhhhhubh)}(h<.. |frac14| unicode:: U+000BC .. VULGAR FRACTION ONE QUARTERh]h¼}hjsbah}(h]h ]h"]frac14ah$]h&]uh1hhhhKhhhhubh)}(h;.. |frac18| unicode:: U+0215B .. VULGAR FRACTION ONE EIGHTHh]h⅛}hjsbah}(h]h ]h"]frac18ah$]h&]uh1hhhhKhhhhubh)}(h?.. |frac34| unicode:: U+000BE .. VULGAR FRACTION THREE QUARTERSh]h¾}hjsbah}(h]h ]h"]frac34ah$]h&]uh1hhhhKhhhhubh)}(h>.. |frac38| unicode:: U+0215C .. VULGAR FRACTION THREE EIGHTHSh]h⅜}hj"sbah}(h]h ]h"]frac38ah$]h&]uh1hhhhKhhhhubh)}(h=.. |frac58| unicode:: U+0215D .. VULGAR FRACTION FIVE EIGHTHSh]h⅝}hj1sbah}(h]h ]h"]frac58ah$]h&]uh1hhhhKhhhhubh)}(h>.. |frac78| unicode:: U+0215E .. VULGAR FRACTION SEVEN EIGHTHSh]h⅞}hj@sbah}(h]h ]h"]frac78ah$]h&]uh1hhhhKhhhhubh)}(h2.. |gt| unicode:: U+0003E .. GREATER-THAN SIGNh]h>}hjOsbah}(h]h ]h"]gtah$]h&]uh1hhhhKhhhhubh)}(h9.. |half| unicode:: U+000BD .. VULGAR FRACTION ONE HALFh]h½}hj^sbah}(h]h ]h"]halfah$]h&]uh1hhhhK hhhhubh)}(h/.. |horbar| unicode:: U+02015 .. HORIZONTAL BARh]h―}hjmsbah}(h]h ]h"]horbarah$]h&]uh1hhhhK!hhhhubh)}(h'.. |hyphen| unicode:: U+02010 .. HYPHENh]h‐}hj|sbah}(h]h ]h"]hyphenah$]h&]uh1hhhhK"hhhhubh)}(h:.. |iexcl| unicode:: U+000A1 .. INVERTED EXCLAMATION MARKh]h¡}hjsbah}(h]h ]h"]iexclah$]h&]uh1hhhhK#hhhhubh)}(h7.. |iquest| unicode:: U+000BF .. INVERTED QUESTION MARKh]h¿}hjsbah}(h]h ]h"]iquestah$]h&]uh1hhhhK$hhhhubh)}(hJ.. |laquo| unicode:: U+000AB .. LEFT-POINTING DOUBLE ANGLE QUOTATION MARKh]h«}hjsbah}(h]h ]h"]laquoah$]h&]uh1hhhhK%hhhhubh)}(h0.. |larr| unicode:: U+02190 .. LEFTWARDS ARROWh]h←}hjsbah}(h]h ]h"]larrah$]h&]uh1hhhhK&hhhhubh)}(h3.. |lcub| unicode:: U+0007B .. LEFT CURLY BRACKETh]h{}hjsbah}(h]h ]h"]lcubah$]h&]uh1hhhhK'hhhhubh)}(h;.. |ldquo| unicode:: U+0201C .. LEFT DOUBLE QUOTATION MARKh]h“}hjsbah}(h]h ]h"]ldquoah$]h&]uh1hhhhK(hhhhubh)}(h).. |lowbar| unicode:: U+0005F .. LOW LINEh]h_}hjsbah}(h]h ]h"]lowbarah$]h&]uh1hhhhK)hhhhubh)}(h1.. |lpar| unicode:: U+00028 .. LEFT PARENTHESISh]h(}hjsbah}(h]h ]h"]lparah$]h&]uh1hhhhK*hhhhubh)}(h4.. |lsqb| unicode:: U+0005B .. LEFT SQUARE BRACKETh]h[}hjsbah}(h]h ]h"]lsqbah$]h&]uh1hhhhK+hhhhubh)}(h;.. |lsquo| unicode:: U+02018 .. LEFT SINGLE QUOTATION MARKh]h‘}hjsbah}(h]h ]h"]lsquoah$]h&]uh1hhhhK,hhhhubh)}(h/.. |lt| unicode:: U+0003C .. LESS-THAN SIGNh]h<}hj!sbah}(h]h ]h"]ltah$]h&]uh1hhhhK-hhhhubh)}(h+.. |micro| unicode:: U+000B5 .. MICRO SIGNh]hµ}hj0sbah}(h]h ]h"]microah$]h&]uh1hhhhK.hhhhubh)}(h+.. |middot| unicode:: U+000B7 .. MIDDLE DOTh]h·}hj?sbah}(h]h ]h"]middotah$]h&]uh1hhhhK/hhhhubh)}(h/.. |nbsp| unicode:: U+000A0 .. NO-BREAK SPACEh]h }hjNsbah}(h]h ]h"]nbspah$]h&]uh1hhhhK0hhhhubh)}(h).. |not| unicode:: U+000AC .. NOT SIGNh]h¬}hj]sbah}(h]h ]h"]notah$]h&]uh1hhhhK1hhhhubh)}(h,.. |num| unicode:: U+00023 .. NUMBER SIGNh]h#}hjlsbah}(h]h ]h"]numah$]h&]uh1hhhhK2hhhhubh)}(h).. |ohm| unicode:: U+02126 .. OHM SIGNh]hΩ}hj{sbah}(h]h ]h"]ohmah$]h&]uh1hhhhK3hhhhubh)}(h;.. |ordf| unicode:: U+000AA .. FEMININE ORDINAL INDICATORh]hª}hjsbah}(h]h ]h"]ordfah$]h&]uh1hhhhK4hhhhubh)}(h<.. |ordm| unicode:: U+000BA .. MASCULINE ORDINAL INDICATORh]hº}hjsbah}(h]h ]h"]ordmah$]h&]uh1hhhhK5hhhhubh)}(h-.. |para| unicode:: U+000B6 .. PILCROW SIGNh]h¶}hjsbah}(h]h ]h"]paraah$]h&]uh1hhhhK6hhhhubh)}(h-.. |percnt| unicode:: U+00025 .. PERCENT SIGNh]h%}hjsbah}(h]h ]h"]percntah$]h&]uh1hhhhK7hhhhubh)}(h*.. |period| unicode:: U+0002E .. FULL STOPh]h.}hjsbah}(h]h ]h"]periodah$]h&]uh1hhhhK8hhhhubh)}(h*.. |plus| unicode:: U+0002B .. PLUS SIGNh]h+}hjsbah}(h]h ]h"]plusah$]h&]uh1hhhhK9hhhhubh)}(h0.. |plusmn| unicode:: U+000B1 .. PLUS-MINUS SIGNh]h±}hjsbah}(h]h ]h"]plusmnah$]h&]uh1hhhhK:hhhhubh)}(h+.. |pound| unicode:: U+000A3 .. POUND SIGNh]h£}hjsbah}(h]h ]h"]poundah$]h&]uh1hhhhK;hhhhubh)}(h... |quest| unicode:: U+0003F .. QUESTION MARKh]h?}hjsbah}(h]h ]h"]questah$]h&]uh1hhhhKhhhhubh)}(h1.. |rarr| unicode:: U+02192 .. RIGHTWARDS ARROWh]h→}hj/sbah}(h]h ]h"]rarrah$]h&]uh1hhhhK?hhhhubh)}(h4.. |rcub| unicode:: U+0007D .. RIGHT CURLY BRACKETh]h}}hj>sbah}(h]h ]h"]rcubah$]h&]uh1hhhhK@hhhhubh)}(h<.. |rdquo| unicode:: U+0201D .. RIGHT DOUBLE QUOTATION MARKh]h”}hjMsbah}(h]h ]h"]rdquoah$]h&]uh1hhhhKAhhhhubh)}(h0.. |reg| unicode:: U+000AE .. REGISTERED SIGNh]h®}hj\sbah}(h]h ]h"]regah$]h&]uh1hhhhKBhhhhubh)}(h2.. |rpar| unicode:: U+00029 .. RIGHT PARENTHESISh]h)}hjksbah}(h]h ]h"]rparah$]h&]uh1hhhhKChhhhubh)}(h5.. |rsqb| unicode:: U+0005D .. RIGHT SQUARE BRACKETh]h]}hjzsbah}(h]h ]h"]rsqbah$]h&]uh1hhhhKDhhhhubh)}(h<.. |rsquo| unicode:: U+02019 .. RIGHT SINGLE QUOTATION MARKh]h’}hjsbah}(h]h ]h"]rsquoah$]h&]uh1hhhhKEhhhhubh)}(h-.. |sect| unicode:: U+000A7 .. SECTION SIGNh]h§}hjsbah}(h]h ]h"]sectah$]h&]uh1hhhhKFhhhhubh)}(h*.. |semi| unicode:: U+0003B .. SEMICOLONh]h;}hjsbah}(h]h ]h"]semiah$]h&]uh1hhhhKGhhhhubh)}(h,.. |shy| unicode:: U+000AD .. SOFT HYPHENh]h­}hjsbah}(h]h ]h"]shyah$]h&]uh1hhhhKHhhhhubh)}(h(.. |sol| unicode:: U+0002F .. SOLIDUSh]h/}hjsbah}(h]h ]h"]solah$]h&]uh1hhhhKIhhhhubh)}(h,.. |sung| unicode:: U+0266A .. EIGHTH NOTEh]h♪}hjsbah}(h]h ]h"]sungah$]h&]uh1hhhhKJhhhhubh)}(h0.. |sup1| unicode:: U+000B9 .. SUPERSCRIPT ONEh]h¹}hjsbah}(h]h ]h"]sup1ah$]h&]uh1hhhhKKhhhhubh)}(h0.. |sup2| unicode:: U+000B2 .. SUPERSCRIPT TWOh]h²}hjsbah}(h]h ]h"]sup2ah$]h&]uh1hhhhKLhhhhubh)}(h2.. |sup3| unicode:: U+000B3 .. SUPERSCRIPT THREEh]h³}hjsbah}(h]h ]h"]sup3ah$]h&]uh1hhhhKMhhhhubh)}(h4.. |times| unicode:: U+000D7 .. MULTIPLICATION SIGNh]h×}hjsbah}(h]h ]h"]timesah$]h&]uh1hhhhKNhhhhubh)}(h0.. |trade| unicode:: U+02122 .. TRADE MARK SIGNh]h™}hjsbah}(h]h ]h"]tradeah$]h&]uh1hhhhKOhhhhubh)}(h... |uarr| unicode:: U+02191 .. UPWARDS ARROWh]h↑}hj.sbah}(h]h ]h"]uarrah$]h&]uh1hhhhKPhhhhubh)}(h... |verbar| unicode:: U+0007C .. VERTICAL LINEh]h|}hj=sbah}(h]h ]h"]verbarah$]h&]uh1hhhhKQhhhhubh)}(h*.. |yen| unicode:: U+000A5 .. YEN SIGN h]h¥}hjLsbah}(h]h ]h"]yenah$]h&]uh1hhhhKRhhhhubhsection)}(hhh](htitle)}(h'Enabling the driver and kconfig optionsh]h'Enabling the driver and kconfig options}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j`hj]hhhhhKubh field_list)}(hhh]hfield)}(hhh](h field_name)}(h Copyrighth]h Copyright}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1jzhjwhhhKubh field_body)}(hC|copy| 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved. h]h paragraph)}(hB|copy| 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.h](h©}(hjhhhNhNubh< 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjwubeh}(h]h ]h"]h$]h&]uh1juhhhKhjrhhubah}(h]h ]h"]h$]h&]uh1jphj]hhhhhKubh line_block)}(hhh](hh)}(hfmlx5 core is modular and most of the major mlx5 core driver features can be selected (compiled in/out)h]hfmlx5 core is modular and most of the major mlx5 core driver features can be selected (compiled in/out)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hindentKhjhhhhhK ubj)}(h'at build time via kernel Kconfig flags.h]h'at build time via kernel Kconfig flags.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhjhhhhhK ubj)}(hcBasic features, ethernet net device rx/tx offloads and XDP, are available with the most basic flagsh]hcBasic features, ethernet net device rx/tx offloads and XDP, are available with the most basic flags}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhjhhhhhK ubj)}(h/CONFIG_MLX5_CORE=y/m and CONFIG_MLX5_CORE_EN=y.h]h/CONFIG_MLX5_CORE=y/m and CONFIG_MLX5_CORE_EN=y.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhjhhhhhK ubj)}(h4For the list of advanced features, please see below.h]h4For the list of advanced features, please see below.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhjhhhhhKubeh}(h]h ]h"]h$]h&]uh1jhj]hhhhhK ubj)}(h**CONFIG_MLX5_BRIDGE=(y/n)**h]hstrong)}(hj h]hCONFIG_MLX5_BRIDGE=(y/n)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1jhhhKhj]hhubj)}(hhh](j)}(hREnable :ref:`Ethernet Bridging (BRIDGE) offloading support `.h](hEnable }(hj%hhhNhNubh)}(hJ:ref:`Ethernet Bridging (BRIDGE) offloading support `h]hinline)}(hj/h]h-Ethernet Bridging (BRIDGE) offloading support}(hj3hhhNhNubah}(h]h ](xrefstdstd-refeh"]h$]h&]uh1j1hj-ubah}(h]h ]h"]h$]h&]refdoc8networking/device_drivers/ethernet/mellanox/mlx5/kconfig refdomainj>reftyperef refexplicitrefwarn reftargetmlx5_bridge_offloaduh1hhhhKhj%ubh.}(hj%hhhNhNubeh}(h]h ]h"]h$]h&]uh1hjKhj"hhhhhKubj)}(hGThis will provide the ability to add representors of mlx5 uplink and VFh]hGThis will provide the ability to add representors of mlx5 uplink and VF}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhj"hhhhhKubj)}(hDports to Bridge and offloading rules for traffic between such ports.h]hDports to Bridge and offloading rules for traffic between such ports.}(hjjhhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhj"hhhhhKubj)}(h(Supports VLANs (trunk and access modes).h]h(Supports VLANs (trunk and access modes).}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhj"hhhhhKubeh}(h]h ]h"]h$]h&]uh1jhj]hhhhhKubj)}(h2**CONFIG_MLX5_CORE=(y/m/n)** (module mlx5_core.ko)h](j)}(h**CONFIG_MLX5_CORE=(y/m/n)**h]hCONFIG_MLX5_CORE=(y/m/n)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh (module mlx5_core.ko)}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhKhj]hhubj)}(hhh](j)}(hLThe driver can be enabled by choosing CONFIG_MLX5_CORE=y/m in kernel config.h]hLThe driver can be enabled by choosing CONFIG_MLX5_CORE=y/m in kernel config.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhjhhhhhKubj)}(hTThis will provide mlx5 core driver for mlx5 ulps to interface with (mlx5e, mlx5_ib).h]hTThis will provide mlx5 core driver for mlx5 ulps to interface with (mlx5e, mlx5_ib).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhjhhhhhKubeh}(h]h ]h"]h$]h&]uh1jhj]hhhhhKubj)}(h**CONFIG_MLX5_CORE_EN=(y/n)**h]j)}(hjh]hCONFIG_MLX5_CORE_EN=(y/n)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1jhhhKhj]hhubj)}(hhh](j)}(hiChoosing this option will allow basic ethernet netdevice support with all of the standard rx/tx offloads.h]hiChoosing this option will allow basic ethernet netdevice support with all of the standard rx/tx offloads.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhjhhhhhK ubj)}(hbmlx5e is the mlx5 ulp driver which provides netdevice kernel interface, when chosen, mlx5e will beh]hbmlx5e is the mlx5 ulp driver which provides netdevice kernel interface, when chosen, mlx5e will be}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhjhhhhhK!ubj)}(hbuilt-in into mlx5_core.ko.h]hbuilt-in into mlx5_core.ko.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhjhhhhhK"ubeh}(h]h ]h"]h$]h&]uh1jhj]hhhhhK ubj)}(h"**CONFIG_MLX5_CORE_EN_DCB=(y/n)**:h](j)}(h!**CONFIG_MLX5_CORE_EN_DCB=(y/n)**h]hCONFIG_MLX5_CORE_EN_DCB=(y/n)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh:}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhK%hj]hhubj)}(hhh]j)}(hEnables `Data Center Bridging (DCB) Support `_.h](hEnables }(hj6hhhNhNubh reference)}(h`Data Center Bridging (DCB) Support `_h]h"Data Center Bridging (DCB) Support}(hj@hhhNhNubah}(h]h ]h"]h$]h&]name"Data Center Bridging (DCB) Supportrefuriihttps://enterprise-support.nvidia.com/s/article/howto-auto-config-pfc-and-ets-on-connectx-4-via-lldp-dcbxuh1j>hj6ubhtarget)}(hl h]h}(h] data-center-bridging-dcb-supportah ]h"]"data center bridging (dcb) supportah$]h&]refurijQuh1jR referencedKhj6ubh.}(hj6hhhNhNubeh}(h]h ]h"]h$]h&]uh1hjKhj3hhhhhK'ubah}(h]h ]h"]h$]h&]uh1jhj]hhhhhK'ubj)}(h **CONFIG_MLX5_CORE_IPOIB=(y/n)**h]j)}(hjth]hCONFIG_MLX5_CORE_IPOIB=(y/n)}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjrubah}(h]h ]h"]h$]h&]uh1jhhhK*hj]hhubj)}(hhh](j)}(h&IPoIB offloads & acceleration support.h]h&IPoIB offloads & acceleration support.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhjhhhhhK,ubj)}(hMRequires CONFIG_MLX5_CORE_EN to provide an accelerated interface for the rdmah]hMRequires CONFIG_MLX5_CORE_EN to provide an accelerated interface for the rdma}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhjhhhhhK-ubj)}(hIPoIB ulp netdevice.h]hIPoIB ulp netdevice.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhjhhhhhK.ubeh}(h]h ]h"]h$]h&]uh1jhj]hhhhhK,ubj)}(h**CONFIG_MLX5_CLS_ACT=(y/n)**h]j)}(hjh]hCONFIG_MLX5_CLS_ACT=(y/n)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1jhhhK1hj]hhubj)}(hhh](j)}(h?Enables offload support for TC classifier action (NET_CLS_ACT).h]h?Enables offload support for TC classifier action (NET_CLS_ACT).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhjhhhhhK3ubj)}(h7Works in both native NIC mode and Switchdev SRIOV mode.h]h7Works in both native NIC mode and Switchdev SRIOV mode.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhjhhhhhK4ubj)}(h8Flow-based classifiers, such as those registered throughh]h8Flow-based classifiers, such as those registered through}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhjhhhhhK5ubj)}(h<`tc-flower(8)`, are processed by the device, rather than theh](htitle_reference)}(h`tc-flower(8)`h]h tc-flower(8)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh., are processed by the device, rather than the}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hjKhjhhhhhK6ubj)}(h?host. Actions that would then overwrite matching classificationh]h?host. Actions that would then overwrite matching classification}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhjhhhhhK7ubj)}(h1results would then be instant due to the offload.h]h1results would then be instant due to the offload.}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhjhhhhhK8ubeh}(h]h ]h"]h$]h&]uh1jhj]hhhhhK3ubj)}(h**CONFIG_MLX5_EN_ARFS=(y/n)**h]j)}(hjBh]hCONFIG_MLX5_EN_ARFS=(y/n)}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj@ubah}(h]h ]h"]h$]h&]uh1jhhhK;hj]hhubj)}(hhh](j)}(hXEnables Hardware-accelerated receive flow steering (arfs) support, and ntuple filtering.h]hXEnables Hardware-accelerated receive flow steering (arfs) support, and ntuple filtering.}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhjWhhhhhK=ubj)}(hRhttps://enterprise-support.nvidia.com/s/article/howto-configure-arfs-on-connectx-4h]j?)}(hjjh]hRhttps://enterprise-support.nvidia.com/s/article/howto-configure-arfs-on-connectx-4}(hjlhhhNhNubah}(h]h ]h"]h$]h&]refurijjuh1j>hjhubah}(h]h ]h"]h$]h&]uh1hjKhjWhhhhhK>ubeh}(h]h ]h"]h$]h&]uh1jhj]hhhhhK=ubj)}(h**CONFIG_MLX5_EN_IPSEC=(y/n)**h]j)}(hjh]hCONFIG_MLX5_EN_IPSEC=(y/n)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1jhhhKAhj]hhubj)}(hhh]j)}(hJEnables :ref:`IPSec XFRM cryptography-offload acceleration `.h](hEnables }(hjhhhNhNubh)}(hA:ref:`IPSec XFRM cryptography-offload acceleration `h]j2)}(hjh]h,IPSec XFRM cryptography-offload acceleration}(hjhhhNhNubah}(h]h ](j=stdstd-refeh"]h$]h&]uh1j1hjubah}(h]h ]h"]h$]h&]refdocjJ refdomainjreftyperef refexplicitrefwarnjP xfrm_deviceuh1hhhhKChjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hjKhjhhhhhKCubah}(h]h ]h"]h$]h&]uh1jhj]hhhhhKCubj)}(h**CONFIG_MLX5_MACSEC=(y/n)**h]j)}(hjh]hCONFIG_MLX5_MACSEC=(y/n)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]uh1jhhhKFhj]hhubj)}(hhh]j)}(hFBuild support for MACsec cryptography-offload acceleration in the NIC.h]hFBuild support for MACsec cryptography-offload acceleration in the NIC.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhjhhhhhKHubah}(h]h ]h"]h$]h&]uh1jhj]hhhhhKHubj)}(h**CONFIG_MLX5_EN_RXNFC=(y/n)**h]j)}(hj h]hCONFIG_MLX5_EN_RXNFC=(y/n)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1jhhhKKhj]hhubj)}(hhh](j)}(hNEnables ethtool receive network flow classification, which allows user definedh]hNEnables ethtool receive network flow classification, which allows user defined}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhj hhhhhKMubj)}(hSflow rules to direct traffic into arbitrary rx queue via ethtool set/get_rxnfc API.h]hSflow rules to direct traffic into arbitrary rx queue via ethtool set/get_rxnfc API.}(hj. hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhj hhhhhKNubeh}(h]h ]h"]h$]h&]uh1jhj]hhhhhKMubj)}(h**CONFIG_MLX5_EN_TLS=(y/n)**h]j)}(hjD h]hCONFIG_MLX5_EN_TLS=(y/n)}(hjF hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjB ubah}(h]h ]h"]h$]h&]uh1jhhhKQhj]hhubj)}(hhh]j)}(h&TLS cryptography-offload acceleration.h]h&TLS cryptography-offload acceleration.}(hj\ hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhjY hhhhhKSubah}(h]h ]h"]h$]h&]uh1jhj]hhhhhKSubj)}(h**CONFIG_MLX5_ESWITCH=(y/n)**h]j)}(hjr h]hCONFIG_MLX5_ESWITCH=(y/n)}(hjt hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjp ubah}(h]h ]h"]h$]h&]uh1jhhhKVhj]hhubj)}(hhh](j)}(haEthernet SRIOV E-Switch support in ConnectX NIC. E-Switch provides internal SRIOV packet steeringh]haEthernet SRIOV E-Switch support in ConnectX NIC. E-Switch provides internal SRIOV packet steering}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhj hhhhhKXubj)}(h@and switching for the enabled VFs and PF in two available modes:h]h@and switching for the enabled VFs and PF in two available modes:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhj hhhhhKYubj)}(hhh](j)}(h1) `Legacy SRIOV mode (L2 mac vlan steering based) `_.h](h1) }(hj hhhNhNubj?)}(h`Legacy SRIOV mode (L2 mac vlan steering based) `_h]h.Legacy SRIOV mode (L2 mac vlan steering based)}(hj hhhNhNubah}(h]h ]h"]h$]h&]name.Legacy SRIOV mode (L2 mac vlan steering based)jP}https://enterprise-support.nvidia.com/s/article/HowTo-Configure-SR-IOV-for-ConnectX-4-ConnectX-5-ConnectX-6-with-KVM-Ethernetuh1j>hj ubjS)}(h h]h}(h],legacy-sriov-mode-l2-mac-vlan-steering-basedah ]h"].legacy sriov mode (l2 mac vlan steering based)ah$]h&]refurij uh1jRjaKhj ubh.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hjK hj hhhhhKZubj)}(h82) :ref:`Switchdev mode (eswitch offloads) `.h](h2) }(hj hhhNhNubh)}(h4:ref:`Switchdev mode (eswitch offloads) `h]j2)}(hj h]h!Switchdev mode (eswitch offloads)}(hj hhhNhNubah}(h]h ](j=stdstd-refeh"]h$]h&]uh1j1hj ubah}(h]h ]h"]h$]h&]refdocjJ refdomainj reftyperef refexplicitrefwarnjP switchdevuh1hhhhK[hj ubh.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hjK hj hhhhhK[ubeh}(h]h ]h"]h$]h&]uh1jhj hhhhhK[ubeh}(h]h ]h"]h$]h&]uh1jhj]hhhhhKXubj)}(h**CONFIG_MLX5_FPGA=(y/n)**h]j)}(hj h]hCONFIG_MLX5_FPGA=(y/n)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1jhhhK^hj]hhubj)}(hhh](j)}(hNBuild support for the Innova family of network cards by Mellanox Technologies.h]hNBuild support for the Innova family of network cards by Mellanox Technologies.}(hj1 hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhj. hhhhhK`ubj)}(hTInnova network cards are comprised of a ConnectX chip and an FPGA chip on one board.h]hTInnova network cards are comprised of a ConnectX chip and an FPGA chip on one board.}(hj? hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhj. hhhhhKaubj)}(h[If you select this option, the mlx5_core driver will include the Innova FPGA core and allowh]h[If you select this option, the mlx5_core driver will include the Innova FPGA core and allow}(hjM hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhj. hhhhhKbubj)}(h)building sandbox-specific client drivers.h]h)building sandbox-specific client drivers.}(hj[ hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhj. hhhhhKcubeh}(h]h ]h"]h$]h&]uh1jhj]hhhhhK`ubj)}(h6**CONFIG_MLX5_INFINIBAND=(y/n/m)** (module mlx5_ib.ko)h](j)}(h"**CONFIG_MLX5_INFINIBAND=(y/n/m)**h]hCONFIG_MLX5_INFINIBAND=(y/n/m)}(hjs hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjo ubh (module mlx5_ib.ko)}(hjo hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhKfhj]hhubj)}(hhh]j)}(hProvides low-level InfiniBand/RDMA and `RoCE `_ support.h](h'Provides low-level InfiniBand/RDMA and }(hj hhhNhNubj?)}(hx`RoCE `_h]hRoCE}(hj hhhNhNubah}(h]h ]h"]h$]h&]nameRoCEjPnhttps://enterprise-support.nvidia.com/s/article/recommended-network-configuration-examples-for-roce-deploymentuh1j>hj ubjS)}(hq h]h}(h]roceah ]h"]roceah$]h&]refurij uh1jRjaKhj ubh support.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hjKhj hhhhhKhubah}(h]h ]h"]h$]h&]uh1jhj]hhhhhKhubj)}(h**CONFIG_MLX5_MPFS=(y/n)**h]j)}(hj h]hCONFIG_MLX5_MPFS=(y/n)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1jhhhKkhj]hhubj)}(hhh](j)}(hGEthernet Multi-Physical Function Switch (MPFS) support in ConnectX NIC.h]hGEthernet Multi-Physical Function Switch (MPFS) support in ConnectX NIC.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhj hhhhhKmubj)}(hMPFs is required for when `Multi-Host `_ configuration is enabled to allow passingh](hMPFs is required for when }(hj hhhNhNubj?)}(hC`Multi-Host `_h]h Multi-Host}(hj hhhNhNubah}(h]h ]h"]h$]h&]name Multi-HostjP3https://www.nvidia.com/en-us/networking/multi-host/uh1j>hj ubjS)}(h6 h]h}(h] multi-hostah ]h"] multi-hostah$]h&]refurij uh1jRjaKhj ubh* configuration is enabled to allow passing}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hjKhj hhhhhKnubj)}(h;user configured unicast MAC addresses to the requesting PF.h]h;user configured unicast MAC addresses to the requesting PF.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhj hhhhhKoubeh}(h]h ]h"]h$]h&]uh1jhj]hhhhhKmubj)}(h**CONFIG_MLX5_SF=(y/n)**h]j)}(hj2 h]hCONFIG_MLX5_SF=(y/n)}(hj4 hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj0 ubah}(h]h ]h"]h$]h&]uh1jhhhKrhj]hhubj)}(hhh](j)}(hBuild support for subfunction.h]hBuild support for subfunction.}(hjJ hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhjG hhhhhKtubj)}(hKSubfunctions are more light weight than PCI SRIOV VFs. Choosing this optionh]hKSubfunctions are more light weight than PCI SRIOV VFs. Choosing this option}(hjX hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhjG hhhhhKuubj)}(h5will enable support for creating subfunction devices.h]h5will enable support for creating subfunction devices.}(hjf hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhjG hhhhhKvubeh}(h]h ]h"]h$]h&]uh1jhj]hhhhhKtubj)}(h **CONFIG_MLX5_SF_MANAGER=(y/n)**h]j)}(hj| h]hCONFIG_MLX5_SF_MANAGER=(y/n)}(hj~ hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjz ubah}(h]h ]h"]h$]h&]uh1jhhhKyhj]hhubj)}(hhh](j)}(hEBuild support for subfunction port in the NIC. A Mellanox subfunctionh]hEBuild support for subfunction port in the NIC. A Mellanox subfunction}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhj hhhhhK{ubj)}(hHport is managed through devlink. A subfunction supports RDMA, netdeviceh]hHport is managed through devlink. A subfunction supports RDMA, netdevice}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhj hhhhhK|ubj)}(hCand vdpa device. It is similar to a SRIOV VF but it doesn't requireh]hEand vdpa device. It is similar to a SRIOV VF but it doesn’t require}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhj hhhhhK}ubj)}(hSRIOV support.h]hSRIOV support.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhj hhhhhK~ubeh}(h]h ]h"]h$]h&]uh1jhj]hhhhhK{ubj)}(h!**CONFIG_MLX5_SW_STEERING=(y/n)**h]j)}(hj h]hCONFIG_MLX5_SW_STEERING=(y/n)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1jhhhKhj]hhubj)}(hhh]j)}(h7Build support for software-managed steering in the NIC.h]h7Build support for software-managed steering in the NIC.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhj hhhhhKubah}(h]h ]h"]h$]h&]uh1jhj]hhhhhKubj)}(h!**CONFIG_MLX5_HW_STEERING=(y/n)**h]j)}(hj h]hCONFIG_MLX5_HW_STEERING=(y/n)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1jhhhKhj]hhubj)}(hhh]j)}(h7Build support for hardware-managed steering in the NIC.h]h7Build support for hardware-managed steering in the NIC.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhj hhhhhKubah}(h]h ]h"]h$]h&]uh1jhj]hhhhhKubj)}(h**CONFIG_MLX5_TC_CT=(y/n)**h]j)}(hj0 h]hCONFIG_MLX5_TC_CT=(y/n)}(hj2 hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj. ubah}(h]h ]h"]h$]h&]uh1jhhhKhj]hhubj)}(hhh]j)}(h>Support offloading connection tracking rules via tc ct action.h]h>Support offloading connection tracking rules via tc ct action.}(hjH hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhjE hhhhhKubah}(h]h ]h"]h$]h&]uh1jhj]hhhhhKubj)}(h**CONFIG_MLX5_TC_SAMPLE=(y/n)**h]j)}(hj^ h]hCONFIG_MLX5_TC_SAMPLE=(y/n)}(hj` hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj\ ubah}(h]h ]h"]h$]h&]uh1jhhhKhj]hhubj)}(hhh]j)}(h5Support offloading sample rules via tc sample action.h]h5Support offloading sample rules via tc sample action.}(hjv hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhjs hhhhhKubah}(h]h ]h"]h$]h&]uh1jhj]hhhhhKubj)}(h**CONFIG_MLX5_VDPA=(y/n)**h]j)}(hj h]hCONFIG_MLX5_VDPA=(y/n)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1jhhhKhj]hhubj)}(hhh](j)}(h@Support library for Mellanox VDPA drivers. Provides code that ish]h@Support library for Mellanox VDPA drivers. Provides code that is}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhj hhhhhKubj)}(hHcommon for all types of VDPA drivers. The following drivers are planned:h]hHcommon for all types of VDPA drivers. The following drivers are planned:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhj hhhhhKubj)}(h net, block.h]h net, block.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhj hhhhhKubeh}(h]h ]h"]h$]h&]uh1jhj]hhhhhKubj)}(h**CONFIG_MLX5_VDPA_NET=(y/n)**h]j)}(hj h]hCONFIG_MLX5_VDPA_NET=(y/n)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1jhhhKhj]hhubj)}(hhh](j)}(h@VDPA network driver for ConnectX6 and newer. Provides offloadingh]h@VDPA network driver for ConnectX6 and newer. Provides offloading}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhj hhhhhKubj)}(hAof virtio net datapath such that descriptors put on the ring willh]hAof virtio net datapath such that descriptors put on the ring will}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhj hhhhhKubj)}(hDbe executed by the hardware. It also supports a variety of statelessh]hDbe executed by the hardware. It also supports a variety of stateless}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhj hhhhhKubj)}(hBoffloads depending on the actual device used and firmware version.h]hBoffloads depending on the actual device used and firmware version.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhj hhhhhKubeh}(h]h ]h"]h$]h&]uh1jhj]hhhhhKubj)}(h**CONFIG_MLX5_VFIO_PCI=(y/n)**h]j)}(hj. h]hCONFIG_MLX5_VFIO_PCI=(y/n)}(hj0 hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj, ubah}(h]h ]h"]h$]h&]uh1jhhhKhj]hhubj)}(hhh]j)}(hJThis provides migration support for MLX5 devices using the VFIO framework.h]hJThis provides migration support for MLX5 devices using the VFIO framework.}(hjF hhhNhNubah}(h]h ]h"]h$]h&]uh1hjKhjC hhhhhKubah}(h]h ]h"]h$]h&]uh1jhj]hhhhhKubj)}(hM**External options** ( Choose if the corresponding mlx5 feature is required )h](j)}(h**External options**h]hExternal options}(hj^ hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjZ ubh9 ( Choose if the corresponding mlx5 feature is required )}(hjZ hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhKhj]hhubh bullet_list)}(hhh](h list_item)}(hdCONFIG_MLXFW: When chosen, mlx5 firmware flashing support will be enabled (via devlink and ethtool).h]j)}(hj h]hdCONFIG_MLXFW: When chosen, mlx5 firmware flashing support will be enabled (via devlink and ethtool).}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhj} ubah}(h]h ]h"]h$]h&]uh1j{ hjx hhhhhNubj| )}(hDCONFIG_PTP_1588_CLOCK: When chosen, mlx5 ptp support will be enabledh]j)}(hj h]hDCONFIG_PTP_1588_CLOCK: When chosen, mlx5 ptp support will be enabled}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhj ubah}(h]h ]h"]h$]h&]uh1j{ hjx hhhhhNubj| )}(h>CONFIG_VXLAN: When chosen, mlx5 vxlan support will be enabled.h]j)}(hj h]h>CONFIG_VXLAN: When chosen, mlx5 vxlan support will be enabled.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhj ubah}(h]h ]h"]h$]h&]uh1j{ hjx hhhhhNubeh}(h]h ]h"]h$]h&]bullet-uh1jv hhhKhj]hhubeh}(h]'enabling-the-driver-and-kconfig-optionsah ]h"]'enabling the driver and kconfig optionsah$]h&]uh1j[hhhhhhhKubeh}(h]h ]h"]h$]h&]sourcehuh1hcurrent_sourceN current_lineNsettingsdocutils.frontendValues)}(j`N generatorN datestampN source_linkN source_urlN toc_backlinksentryfootnote_backlinksK sectnum_xformKstrip_commentsNstrip_elements_with_classesN strip_classesN report_levelK halt_levelKexit_status_levelKdebugNwarning_streamN tracebackinput_encoding utf-8-siginput_encoding_error_handlerstrictoutput_encodingutf-8output_encoding_error_handlerj error_encodingutf-8error_encoding_error_handlerbackslashreplace language_codeenrecord_dependenciesNconfigN id_prefixhauto_id_prefixid dump_settingsNdump_internalsNdump_transformsNdump_pseudo_xmlNexpose_internalsNstrict_visitorN_disable_configN_sourcehnj _destinationN _config_files]7/var/lib/git/docbuild/linux/Documentation/docutils.confafile_insertion_enabled raw_enabledKline_length_limitM'pep_referencesN pep_base_urlhttps://peps.python.org/pep_file_url_templatepep-%04drfc_referencesN rfc_base_url&https://datatracker.ietf.org/doc/html/ tab_widthKtrim_footnote_reference_spacesyntax_highlightlong smart_quotessmartquotes_locales]character_level_inline_markupdoctitle_xform docinfo_xformKsectsubtitle_xform image_loadinglinkembed_stylesheetcloak_email_addressessection_self_linkenvNubreporterNindirect_targets]substitution_defs}(hhjhjjj jj/j#j>j2jMjAj\jPjkj_jzjnjj}jjjjjjjjjjjjjjjjjjjjj.j"j=j1jLj@j[jOjjj^jyjmjj|jjjjjjjjjjjjjjjjjjjjj-j!j<j0jKj?jZjNjij]jxjljj{jjjjjjjjjjjjjjjjjjjjj,j j;j/jJj>jYjMjhj\jwjkjjzjjjjjjjjjjjjjjjjj jjjj+jj:j.jIj=jXjLusubstitution_names}(amphaposjastjbrvbarj bsolj/centj>colonjMcommaj\commatjkcopyjzcurrenjdarrjdegjdividejdollarjequalsjexcljfrac12jfrac14jfrac18jfrac34jfrac38j.frac58j=frac78jLgtj[halfjjhorbarjyhyphenjiexcljiquestjlaquojlarrjlcubjldquojlowbarjlparjlsqbjlsquojltj-microj<middotjKnbspjZnotjinumjxohmjordfjordmjparajpercntjperiodjplusjplusmnjpoundjquestjquotjraquoj,rarrj;rcubjJrdquojYregjhrparjwrsqbjrsquojsectjsemijshyjsoljsungjsup1jsup2jsup3j timesjtradej+uarrj:verbarjIyenjXurefnames}refids}nameids}(j j j]jZj j j j j j u nametypes}(j j]j j j uh}(j j]jZjTj j j j j j u footnote_refs} citation_refs} autofootnotes]autofootnote_refs]symbol_footnotes]symbol_footnote_refs] footnotes] citations]autofootnote_startKsymbol_footnote_startK id_counter collectionsCounter}Rparse_messages]transform_messages] transformerN include_log]JDocumentation/networking/device_drivers/ethernet/mellanox/mlx5/kconfig.rst(NNNNta decorationNhhub.