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YEN SIGN h]h¥}hj8sbah}(h]h ]h"]yenah$]h&]uh1hhhhKRhhhhubhsection)}(hhh](htitle)}(hDPAA2 Ethernet driverh]hDPAA2 Ethernet driver}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1jLhjIhhhhhKubh field_list)}(hhh]hfield)}(hhh](h field_name)}(h Copyrighth]h Copyright}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1jfhjchhhKubh field_body)}(h|copy| 2017-2018 NXP h]h paragraph)}(h|copy| 2017-2018 NXPh](h©}(hj~hhhNhNubh 2017-2018 NXP}(hj~hhhNhNubeh}(h]h ]h"]h$]h&]uh1j|hhhKhjxubah}(h]h ]h"]h$]h&]uh1jvhjcubeh}(h]h ]h"]h$]h&]uh1jahhhKhj^hhubah}(h]h ]h"]h$]h&]uh1j\hjIhhhhhKubj})}(hIThis file provides documentation for the Freescale DPAA2 Ethernet driver.h]hIThis file provides documentation for the Freescale DPAA2 Ethernet driver.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j|hhhK hjIhhubjH)}(hhh](jM)}(hSupported Platformsh]hSupported Platforms}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jLhjhhhhhK ubj})}(haThis driver provides networking support for Freescale DPAA2 SoCs, e.g. LS2080A, LS2088A, LS1088A.h]haThis driver provides networking support for Freescale DPAA2 SoCs, e.g. LS2080A, LS2088A, LS1088A.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j|hhhKhjhhubeh}(h]supported-platformsah ]h"]supported platformsah$]h&]uh1jGhjIhhhhhK ubjH)}(hhh](jM)}(hArchitecture Overviewh]hArchitecture Overview}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jLhjhhhhhKubj})}(hUnlike regular NICs, in the DPAA2 architecture there is no single hardware block representing network interfaces; instead, several separate hardware resources concur to provide the networking functionality:h]hUnlike regular NICs, in the DPAA2 architecture there is no single hardware block representing network interfaces; instead, several separate hardware resources concur to provide the networking functionality:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j|hhhKhjhhubh bullet_list)}(hhh](h list_item)}(hnetwork interfacesh]j})}(hjh]hnetwork interfaces}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j|hhhKhjubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubj)}(hqueues, channelsh]j})}(hjh]hqueues, channels}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j|hhhKhjubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubj)}(h buffer poolsh]j})}(hj-h]h buffer pools}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1j|hhhKhj+ubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubj)}(hMAC/PHY h]j})}(hMAC/PHYh]hMAC/PHY}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1j|hhhKhjBubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubeh}(h]h ]h"]h$]h&]bullet-uh1jhhhKhjhhubj})}(hXaAll hardware resources are allocated and configured through the Management Complex (MC) portals. MC abstracts most of these resources as DPAA2 objects and exposes ABIs through which they can be configured and controlled. A few hardware resources, like queues, do not have a corresponding MC object and are treated as internal resources of other objects.h]hXaAll hardware resources are allocated and configured through the Management Complex (MC) portals. MC abstracts most of these resources as DPAA2 objects and exposes ABIs through which they can be configured and controlled. A few hardware resources, like queues, do not have a corresponding MC object and are treated as internal resources of other objects.}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1j|hhhKhjhhubj})}(hFor a more detailed description of the DPAA2 architecture and its object abstractions see *Documentation/networking/device_drivers/ethernet/freescale/dpaa2/overview.rst*.h](hZFor a more detailed description of the DPAA2 architecture and its object abstractions see }(hjphhhNhNubhemphasis)}(hO*Documentation/networking/device_drivers/ethernet/freescale/dpaa2/overview.rst*h]hMDocumentation/networking/device_drivers/ethernet/freescale/dpaa2/overview.rst}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1jxhjpubh.}(hjphhhNhNubeh}(h]h ]h"]h$]h&]uh1j|hhhK#hjhhubj})}(hEach Linux net device is built on top of a Datapath Network Interface (DPNI) object and uses Buffer Pools (DPBPs), I/O Portals (DPIOs) and Concentrators (DPCONs).h]hEach Linux net device is built on top of a Datapath Network Interface (DPNI) object and uses Buffer Pools (DPBPs), I/O Portals (DPIOs) and Concentrators (DPCONs).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j|hhhK'hjhhubj})}(hConfiguration interface::h]hConfiguration interface:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j|hhhK+hjhhubh literal_block)}(hX ----------------------- | DPAA2 Ethernet Driver | ----------------------- . . . . . . . . . . . . . . . . . . . . . . . . ---------- ---------- ----------- | DPBP API | | DPNI API | | DPCON API | ---------- ---------- ----------- . . . software ======= . ========== . ============ . =================== . . . hardware ------------------------------------------ | MC hardware portals | ------------------------------------------ . . . . . . ------ ------ ------- | DPBP | | DPNI | | DPCON | ------ ------ -------h]hX ----------------------- | DPAA2 Ethernet Driver | ----------------------- . . . . . . . . . . . . . . . . . . . . . . . . ---------- ---------- ----------- | DPBP API | | DPNI API | | DPCON API | ---------- ---------- ----------- . . . software ======= . ========== . ============ . =================== . . . hardware ------------------------------------------ | MC hardware portals | ------------------------------------------ . . . . . . ------ ------ ------- | DPBP | | DPNI | | DPCON | ------ ------ -------}hjsbah}(h]h ]h"]h$]h&]hhuh1jhhhK-hjhhubj})}(hThe DPNIs are network interfaces without a direct one-on-one mapping to PHYs. DPBPs represent hardware buffer pools. Packet I/O is performed in the context of DPCON objects, using DPIO portals for managing and communicating with the hardware resources.h]hThe DPNIs are network interfaces without a direct one-on-one mapping to PHYs. DPBPs represent hardware buffer pools. Packet I/O is performed in the context of DPCON objects, using DPIO portals for managing and communicating with the hardware resources.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j|hhhKDhjhhubj})}(hDatapath (I/O) interface::h]hDatapath (I/O) interface:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j|hhhKIhjhhubj)}(hX- ----------------------------------------------- | DPAA2 Ethernet Driver | ----------------------------------------------- | ^ ^ | | | | | | | enqueue| dequeue| data | dequeue| seed | (Tx) | (Rx, TxC)| avail.| request| buffers| | | notify| | | | | | | | V | | V V ----------------------------------------------- | DPIO Driver | ----------------------------------------------- | | | | | software | | | | | ================ | | | | | hardware ----------------------------------------------- | I/O hardware portals | ----------------------------------------------- | ^ ^ | | | | | | | | | | V | V | ================ V ---------------------- | ------------- queues ---------------------- | | Buffer pool | ---------------------- | ------------- ======================= Channelh]hX- ----------------------------------------------- | DPAA2 Ethernet Driver | ----------------------------------------------- | ^ ^ | | | | | | | enqueue| dequeue| data | dequeue| seed | (Tx) | (Rx, TxC)| avail.| request| buffers| | | notify| | | | | | | | V | | V V ----------------------------------------------- | DPIO Driver | ----------------------------------------------- | | | | | software | | | | | ================ | | | | | hardware ----------------------------------------------- | I/O hardware portals | ----------------------------------------------- | ^ ^ | | | | | | | | | | V | V | ================ V ---------------------- | ------------- queues ---------------------- | | Buffer pool | ---------------------- | ------------- ======================= Channel}hjsbah}(h]h ]h"]h$]h&]hhuh1jhhhKKhjhhubj})}(hX6Datapath I/O (DPIO) portals provide enqueue and dequeue services, data availability notifications and buffer pool management. DPIOs are shared between all DPAA2 objects (and implicitly all DPAA2 kernel drivers) that work with data frames, but must be affine to the CPUs for the purpose of traffic distribution.h]hX6Datapath I/O (DPIO) portals provide enqueue and dequeue services, data availability notifications and buffer pool management. DPIOs are shared between all DPAA2 objects (and implicitly all DPAA2 kernel drivers) that work with data frames, but must be affine to the CPUs for the purpose of traffic distribution.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j|hhhKhhjhhubj})}(hXFrames are transmitted and received through hardware frame queues, which can be grouped in channels for the purpose of hardware scheduling. The Ethernet driver enqueues TX frames on egress queues and after transmission is complete a TX confirmation frame is sent back to the CPU.h]hXFrames are transmitted and received through hardware frame queues, which can be grouped in channels for the purpose of hardware scheduling. The Ethernet driver enqueues TX frames on egress queues and after transmission is complete a TX confirmation frame is sent back to the CPU.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j|hhhKmhjhhubj})}(hX1When frames are available on ingress queues, a data availability notification is sent to the CPU; notifications are raised per channel, so even if multiple queues in the same channel have available frames, only one notification is sent. After a channel fires a notification, is must be explicitly rearmed.h]hX1When frames are available on ingress queues, a data availability notification is sent to the CPU; notifications are raised per channel, so even if multiple queues in the same channel have available frames, only one notification is sent. After a channel fires a notification, is must be explicitly rearmed.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j|hhhKrhjhhubj})}(hEach network interface can have multiple Rx, Tx and confirmation queues affined to CPUs, and one channel (DPCON) for each CPU that services at least one queue. DPCONs are used to distribute ingress traffic to different CPUs via the cores' affine DPIOs.h]hEach network interface can have multiple Rx, Tx and confirmation queues affined to CPUs, and one channel (DPCON) for each CPU that services at least one queue. DPCONs are used to distribute ingress traffic to different CPUs via the cores’ affine DPIOs.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j|hhhKwhjhhubj})}(hThe role of hardware buffer pools is storage of ingress frame data. Each network interface has a privately owned buffer pool which it seeds with kernel allocated buffers.h]hThe role of hardware buffer pools is storage of ingress frame data. Each network interface has a privately owned buffer pool which it seeds with kernel allocated buffers.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j|hhhK|hjhhubj})}(hDPNIs are decoupled from PHYs; a DPNI can be connected to a PHY through a DPMAC object or to another DPNI through an internal link, but the connection is managed by MC and completely transparent to the Ethernet driver.h]hDPNIs are decoupled from PHYs; a DPNI can be connected to a PHY through a DPMAC object or to another DPNI through an internal link, but the connection is managed by MC and completely transparent to the Ethernet driver.}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j|hhhKhjhhubj)}(hX1 --------- --------- --------- | eth if1 | | eth if2 | | eth ifn | --------- --------- --------- . . . . . . . . . --------------------------- | DPAA2 Ethernet Driver | --------------------------- . . . . . . . . . ------ ------ ------ ------- | DPNI | | DPNI | | DPNI | | DPMAC |----+ ------ ------ ------ ------- | | | | | | | | | | ----- =========== ================== | PHY | -----h]hX1 --------- --------- --------- | eth if1 | | eth if2 | | eth ifn | --------- --------- --------- . . . . . . . . . --------------------------- | DPAA2 Ethernet Driver | --------------------------- . . . . . . . . . ------ ------ ------ ------- | DPNI | | DPNI | | DPNI | | DPMAC |----+ ------ ------ ------ ------- | | | | | | | | | | ----- =========== ================== | PHY | -----}hj<sbah}(h]h ]h"]h$]h&]hhuh1jhhhKhjhhubeh}(h]architecture-overviewah ]h"]architecture overviewah$]h&]uh1jGhjIhhhhhKubjH)}(hhh](jM)}(hCreating a Network Interfaceh]hCreating a Network Interface}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1jLhjRhhhhhKubj})}(hA net device is created for each DPNI object probed on the MC bus. Each DPNI has a number of properties which determine the network interface configuration options and associated hardware resources.h]hA net device is created for each DPNI object probed on the MC bus. Each DPNI has a number of properties which determine the network interface configuration options and associated hardware resources.}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1j|hhhKhjRhhubj})}(hX!DPNI objects (and the other DPAA2 objects needed for a network interface) can be added to a container on the MC bus in one of two ways: statically, through a Datapath Layout Binary file (DPL) that is parsed by MC at boot time; or created dynamically at runtime, via the DPAA2 objects APIs.h]hX!DPNI objects (and the other DPAA2 objects needed for a network interface) can be added to a container on the MC bus in one of two ways: statically, through a Datapath Layout Binary file (DPL) that is parsed by MC at boot time; or created dynamically at runtime, via the DPAA2 objects APIs.}(hjqhhhNhNubah}(h]h ]h"]h$]h&]uh1j|hhhKhjRhhubeh}(h]creating-a-network-interfaceah ]h"]creating a network interfaceah$]h&]uh1jGhjIhhhhhKubjH)}(hhh](jM)}(hFeatures & Offloadsh]hFeatures & Offloads}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jLhjhhhhhKubj})}(hHardware checksum offloading is supported for TCP and UDP over IPv4/6 frames. The checksum offloads can be independently configured on RX and TX through ethtool.h]hHardware checksum offloading is supported for TCP and UDP over IPv4/6 frames. The checksum offloads can be independently configured on RX and TX through ethtool.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j|hhhKhjhhubj})}(hqHardware offload of unicast and multicast MAC filtering is supported on the ingress path and permanently enabled.h]hqHardware offload of unicast and multicast MAC filtering is supported on the ingress path and permanently enabled.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j|hhhKhjhhubj})}(hScatter-gather frames are supported on both RX and TX paths. On TX, SG support is configurable via ethtool; on RX it is always enabled.h]hScatter-gather frames are supported on both RX and TX paths. On TX, SG support is configurable via ethtool; on RX it is always enabled.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j|hhhKhjhhubj})}(hHThe DPAA2 hardware can process jumbo Ethernet frames of up to 10K bytes.h]hHThe DPAA2 hardware can process jumbo Ethernet frames of up to 10K bytes.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j|hhhKhjhhubj})}(hThe Ethernet driver defines a static flow hashing scheme that distributes traffic based on a 5-tuple key: src IP, dst IP, IP proto, L4 src port, L4 dst port. No user configuration is supported for now.h]hThe Ethernet driver defines a static flow hashing scheme that distributes traffic based on a 5-tuple key: src IP, dst IP, IP proto, L4 src port, L4 dst port. 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