sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget-/translations/zh_CN/misc-devices/xilinx_sdfecmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget-/translations/zh_TW/misc-devices/xilinx_sdfecmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget-/translations/it_IT/misc-devices/xilinx_sdfecmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget-/translations/ja_JP/misc-devices/xilinx_sdfecmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget-/translations/ko_KR/misc-devices/xilinx_sdfecmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget-/translations/sp_SP/misc-devices/xilinx_sdfecmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhcomment)}(h!SPDX-License-Identifier: GPL-2.0+h]h!SPDX-License-Identifier: GPL-2.0+}hhsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1hhhhhhG/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec.rsthKubhsection)}(hhh](htitle)}(hXilinx SD-FEC Driverh]hXilinx SD-FEC Driver}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hOverviewh]hOverview}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh paragraph)}(hPThis driver supports SD-FEC Integrated Block for Zynq |Ultrascale+ (TM)| RFSoCs.h](h6This driver supports SD-FEC Integrated Block for Zynq }(hhhhhNhNubh Ultrascale+}(hhhhhNhNubh™}(hhhhhNhNubh RFSoCs.}(hhhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhK hhhhubhsubstitution_definition)}(hM.. |Ultrascale+ (TM)| unicode:: Ultrascale+ U+2122 .. with trademark sign h](h Ultrascale+}hhsbh™}hhsbeh}(h]h ]h"]Ultrascale+ (TM)ah$]h&]uh1hhhhK hhhhubh)}(hFor a full description of SD-FEC core features, see the `SD-FEC Product Guide (PG256) `_h](h8For a full description of SD-FEC core features, see the }(hj hhhNhNubh reference)}(h`SD-FEC Product Guide (PG256) `_h]hSD-FEC Product Guide (PG256)}(hjhhhNhNubah}(h]h ]h"]h$]h&]nameSD-FEC Product Guide (PG256)refuri^https://www.xilinx.com/cgi-bin/docs/ipdoc?c=sd_fec;v=latest;d=pg256-sdfec-integrated-block.pdfuh1jhj ubhtarget)}(ha h]h}(h]sd-fec-product-guide-pg256ah ]h"]sd-fec product guide (pg256)ah$]h&]refurij&uh1j' referencedKhj ubeh}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(h,This driver supports the following features:h]h,This driver supports the following features:}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh block_quote)}(h- Retrieval of the Integrated Block configuration and status information - Configuration of LDPC codes - Configuration of Turbo decoding - Monitoring errors h]h bullet_list)}(hhh](h list_item)}(hFRetrieval of the Integrated Block configuration and status informationh]h)}(hjZh]hFRetrieval of the Integrated Block configuration and status information}(hj\hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjXubah}(h]h ]h"]h$]h&]uh1jVhjSubjW)}(hConfiguration of LDPC codesh]h)}(hjqh]hConfiguration of LDPC codes}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjoubah}(h]h ]h"]h$]h&]uh1jVhjSubjW)}(hConfiguration of Turbo decodingh]h)}(hjh]hConfiguration of Turbo decoding}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jVhjSubjW)}(hMonitoring errors h]h)}(hMonitoring errorsh]hMonitoring errors}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jVhjSubeh}(h]h ]h"]h$]h&]bullet-uh1jQhhhKhjMubah}(h]h ]h"]h$]h&]uh1jKhhhKhhhhubh)}(hTMissing features, known issues, and limitations of the SD-FEC driver are as follows:h]hTMissing features, known issues, and limitations of the SD-FEC driver are as follows:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubjL)}(h- Only allows a single open file handler to any instance of the driver at any time - Reset of the SD-FEC Integrated Block is not controlled by this driver - Does not support shared LDPC code table wraparound h]jR)}(hhh](jW)}(hPOnly allows a single open file handler to any instance of the driver at any timeh]h)}(hjh]hPOnly allows a single open file handler to any instance of the driver at any time}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jVhjubjW)}(hEReset of the SD-FEC Integrated Block is not controlled by this driverh]h)}(hjh]hEReset of the SD-FEC Integrated Block is not controlled by this driver}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jVhjubjW)}(h3Does not support shared LDPC code table wraparound h]h)}(h2Does not support shared LDPC code table wraparoundh]h2Does not support shared LDPC code table wraparound}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jVhjubeh}(h]h ]h"]h$]h&]jjuh1jQhhhKhjubah}(h]h ]h"]h$]h&]uh1jKhhhKhhhhubh)}(hThe device tree entry is described in: `linux-xlnx/Documentation/devicetree/bindings/misc/xlnx,sd-fec.yaml `_h](h'The device tree entry is described in: }(hj*hhhNhNubj)}(h`linux-xlnx/Documentation/devicetree/bindings/misc/xlnx,sd-fec.yaml `_h]hBlinux-xlnx/Documentation/devicetree/bindings/misc/xlnx,sd-fec.yaml}(hj2hhhNhNubah}(h]h ]h"]h$]h&]nameBlinux-xlnx/Documentation/devicetree/bindings/misc/xlnx,sd-fec.yamlj%jhttps://github.com/Xilinx/linux-xlnx/blob/master/Documentation/devicetree/bindings/misc/xlnx%2Csd-fec.yamluh1jhj*ubj()}(hm h]h}(h]Blinux-xlnx-documentation-devicetree-bindings-misc-xlnx-sd-fec-yamlah ]h"]Blinux-xlnx/documentation/devicetree/bindings/misc/xlnx,sd-fec.yamlah$]h&]refurijBuh1j'j6Khj*ubeh}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hhh](h)}(hModes of Operationh]hModes of Operation}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjVhhhhhK$ubh)}(h@The driver works with the SD-FEC core in two modes of operation:h]h@The driver works with the SD-FEC core in two modes of operation:}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK&hjVhhubjL)}(hC- Run-time configuration - Programmable Logic (PL) initialization h]jR)}(hhh](jW)}(hRun-time configurationh]h)}(hj~h]hRun-time configuration}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK(hj|ubah}(h]h ]h"]h$]h&]uh1jVhjyubjW)}(h(Programmable Logic (PL) initialization h]h)}(h&Programmable Logic (PL) initializationh]h&Programmable Logic (PL) initialization}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK)hjubah}(h]h ]h"]h$]h&]uh1jVhjyubeh}(h]h ]h"]h$]h&]jjuh1jQhhhK(hjuubah}(h]h ]h"]h$]h&]uh1jKhhhK(hjVhhubh)}(hhh](h)}(hRun-time Configurationh]hRun-time Configuration}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhK-ubh)}(hgFor Run-time configuration the role of driver is to allow the software application to do the following:h]hgFor Run-time configuration the role of driver is to allow the software application to do the following:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK/hjhhubjL)}(h- Load the configuration parameters for either Turbo decode or LDPC encode or decode - Activate the SD-FEC core - Monitor the SD-FEC core for errors - Retrieve the status and configuration of the SD-FEC core h]jR)}(hhh](jW)}(hRLoad the configuration parameters for either Turbo decode or LDPC encode or decodeh]h)}(hjh]hRLoad the configuration parameters for either Turbo decode or LDPC encode or decode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK1hjubah}(h]h ]h"]h$]h&]uh1jVhjubjW)}(hActivate the SD-FEC coreh]h)}(hjh]hActivate the SD-FEC core}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK2hjubah}(h]h ]h"]h$]h&]uh1jVhjubjW)}(h"Monitor the SD-FEC core for errorsh]h)}(hj h]h"Monitor the SD-FEC core for errors}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK3hj ubah}(h]h ]h"]h$]h&]uh1jVhjubjW)}(h9Retrieve the status and configuration of the SD-FEC core h]h)}(h8Retrieve the status and configuration of the SD-FEC coreh]h8Retrieve the status and configuration of the SD-FEC core}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK4hj"ubah}(h]h ]h"]h$]h&]uh1jVhjubeh}(h]h ]h"]h$]h&]jjuh1jQhhhK1hjubah}(h]h ]h"]h$]h&]uh1jKhhhK1hjhhubeh}(h]run-time-configurationah ]h"]run-time configurationah$]h&]uh1hhjVhhhhhK-ubh)}(hhh](h)}(h&Programmable Logic (PL) Initializationh]h&Programmable Logic (PL) Initialization}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjNhhhhhK7ubh)}(hFor PL initialization, supporting logic loads configuration parameters for either the Turbo decode or LDPC encode or decode. The role of the driver is to allow the software application to do the following:h]hFor PL initialization, supporting logic loads configuration parameters for either the Turbo decode or LDPC encode or decode. The role of the driver is to allow the software application to do the following:}(hj_hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK9hjNhhubjL)}(h|- Activate the SD-FEC core - Monitor the SD-FEC core for errors - Retrieve the status and configuration of the SD-FEC core h]jR)}(hhh](jW)}(hActivate the SD-FEC coreh]h)}(hjvh]hActivate the SD-FEC core}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK=hjtubah}(h]h ]h"]h$]h&]uh1jVhjqubjW)}(h"Monitor the SD-FEC core for errorsh]h)}(hjh]h"Monitor the SD-FEC core for errors}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK>hjubah}(h]h ]h"]h$]h&]uh1jVhjqubjW)}(h:Retrieve the status and configuration of the SD-FEC core h]h)}(h8Retrieve the status and configuration of the SD-FEC coreh]h8Retrieve the status and configuration of the SD-FEC core}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK?hjubah}(h]h ]h"]h$]h&]uh1jVhjqubeh}(h]h ]h"]h$]h&]jjuh1jQhhhK=hjmubah}(h]h ]h"]h$]h&]uh1jKhhhK=hjNhhubeh}(h]$programmable-logic-pl-initializationah ]h"]&programmable logic (pl) initializationah$]h&]uh1hhjVhhhhhK7ubeh}(h]modes-of-operationah ]h"]modes of operationah$]h&]uh1hhhhhhhhK$ubeh}(h]overviewah ]h"]h$]overviewah&]uh1hhhhhhhhKj6Kubh)}(hhh](h)}(hDriver Structureh]hDriver Structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKCubh)}(haThe driver provides a platform device where the ``probe`` and ``remove`` operations are provided.h](h0The driver provides a platform device where the }(hjhhhNhNubhliteral)}(h ``probe``h]hprobe}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh and }(hjhhhNhNubj)}(h ``remove``h]hremove}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh operations are provided.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKEhjhhubjL)}(h- probe: Updates configuration register with device-tree entries plus determines the current activate state of the core, for example, is the core bypassed or has the core been started. h]jR)}(hhh]jW)}(hprobe: Updates configuration register with device-tree entries plus determines the current activate state of the core, for example, is the core bypassed or has the core been started. h]h)}(hprobe: Updates configuration register with device-tree entries plus determines the current activate state of the core, for example, is the core bypassed or has the core been started.h]hprobe: Updates configuration register with device-tree entries plus determines the current activate state of the core, for example, is the core bypassed or has the core been started.}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKHhj*ubah}(h]h ]h"]h$]h&]uh1jVhj'ubah}(h]h ]h"]h$]h&]jjuh1jQhhhKHhj#ubah}(h]h ]h"]h$]h&]uh1jKhhhKHhjhhubh)}(h_The driver defines the following driver file operations to provide user application interfaces:h]h_The driver defines the following driver file operations to provide user application interfaces:}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKKhjhhubjL)}(hX- open: Implements restriction that only a single file descriptor can be open per SD-FEC instance at any time - release: Allows another file descriptor to be open, that is after current file descriptor is closed - poll: Provides a method to monitor for SD-FEC Error events - unlocked_ioctl: Provides the following ioctl commands that allows the application configure the SD-FEC core: - :c:macro:`XSDFEC_START_DEV` - :c:macro:`XSDFEC_STOP_DEV` - :c:macro:`XSDFEC_GET_STATUS` - :c:macro:`XSDFEC_SET_IRQ` - :c:macro:`XSDFEC_SET_TURBO` - :c:macro:`XSDFEC_ADD_LDPC_CODE_PARAMS` - :c:macro:`XSDFEC_GET_CONFIG` - :c:macro:`XSDFEC_SET_ORDER` - :c:macro:`XSDFEC_SET_BYPASS` - :c:macro:`XSDFEC_IS_ACTIVE` - :c:macro:`XSDFEC_CLEAR_STATS` - :c:macro:`XSDFEC_SET_DEFAULT_CONFIG` h]jR)}(hhh](jW)}(hkopen: Implements restriction that only a single file descriptor can be open per SD-FEC instance at any timeh]h)}(hjeh]hkopen: Implements restriction that only a single file descriptor can be open per SD-FEC instance at any time}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKNhjcubah}(h]h ]h"]h$]h&]uh1jVhj`ubjW)}(hcrelease: Allows another file descriptor to be open, that is after current file descriptor is closedh]h)}(hj|h]hcrelease: Allows another file descriptor to be open, that is after current file descriptor is closed}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKOhjzubah}(h]h ]h"]h$]h&]uh1jVhj`ubjW)}(h:poll: Provides a method to monitor for SD-FEC Error eventsh]h)}(hjh]h:poll: Provides a method to monitor for SD-FEC Error events}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKPhjubah}(h]h ]h"]h$]h&]uh1jVhj`ubjW)}(hX}unlocked_ioctl: Provides the following ioctl commands that allows the application configure the SD-FEC core: - :c:macro:`XSDFEC_START_DEV` - :c:macro:`XSDFEC_STOP_DEV` - :c:macro:`XSDFEC_GET_STATUS` - :c:macro:`XSDFEC_SET_IRQ` - :c:macro:`XSDFEC_SET_TURBO` - :c:macro:`XSDFEC_ADD_LDPC_CODE_PARAMS` - :c:macro:`XSDFEC_GET_CONFIG` - :c:macro:`XSDFEC_SET_ORDER` - :c:macro:`XSDFEC_SET_BYPASS` - :c:macro:`XSDFEC_IS_ACTIVE` - :c:macro:`XSDFEC_CLEAR_STATS` - :c:macro:`XSDFEC_SET_DEFAULT_CONFIG` h](h)}(hlunlocked_ioctl: Provides the following ioctl commands that allows the application configure the SD-FEC core:h]hlunlocked_ioctl: Provides the following ioctl commands that allows the application configure the SD-FEC core:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKQhjubjL)}(hX- :c:macro:`XSDFEC_START_DEV` - :c:macro:`XSDFEC_STOP_DEV` - :c:macro:`XSDFEC_GET_STATUS` - :c:macro:`XSDFEC_SET_IRQ` - :c:macro:`XSDFEC_SET_TURBO` - :c:macro:`XSDFEC_ADD_LDPC_CODE_PARAMS` - :c:macro:`XSDFEC_GET_CONFIG` - :c:macro:`XSDFEC_SET_ORDER` - :c:macro:`XSDFEC_SET_BYPASS` - :c:macro:`XSDFEC_IS_ACTIVE` - :c:macro:`XSDFEC_CLEAR_STATS` - :c:macro:`XSDFEC_SET_DEFAULT_CONFIG` h]jR)}(hhh](jW)}(h:c:macro:`XSDFEC_START_DEV`h]h)}(hjh]h)}(hjh]j)}(hjh]hXSDFEC_START_DEV}(hjhhhNhNubah}(h]h ](xrefcc-macroeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocmisc-devices/xilinx_sdfec refdomainjreftypemacro refexplicitrefwarn reftargetXSDFEC_START_DEVuh1hhhhKShjubah}(h]h ]h"]h$]h&]uh1hhhhKShjubah}(h]h ]h"]h$]h&]uh1jVhjubjW)}(h:c:macro:`XSDFEC_STOP_DEV`h]h)}(hjh]h)}(hjh]j)}(hjh]hXSDFEC_STOP_DEV}(hjhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_STOP_DEVuh1hhhhKThjubah}(h]h ]h"]h$]h&]uh1hhhhKThjubah}(h]h ]h"]h$]h&]uh1jVhjubjW)}(h:c:macro:`XSDFEC_GET_STATUS`h]h)}(hj)h]h)}(hj)h]j)}(hj)h]hXSDFEC_GET_STATUS}(hj1hhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1jhj.ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_STATUSuh1hhhhKUhj+ubah}(h]h ]h"]h$]h&]uh1hhhhKUhj'ubah}(h]h ]h"]h$]h&]uh1jVhjubjW)}(h:c:macro:`XSDFEC_SET_IRQ`h]h)}(hjZh]h)}(hjZh]j)}(hjZh]hXSDFEC_SET_IRQ}(hjbhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1jhj_ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_SET_IRQuh1hhhhKVhj\ubah}(h]h ]h"]h$]h&]uh1hhhhKVhjXubah}(h]h ]h"]h$]h&]uh1jVhjubjW)}(h:c:macro:`XSDFEC_SET_TURBO`h]h)}(hjh]h)}(hjh]j)}(hjh]hXSDFEC_SET_TURBO}(hjhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_SET_TURBOuh1hhhhKWhjubah}(h]h ]h"]h$]h&]uh1hhhhKWhjubah}(h]h ]h"]h$]h&]uh1jVhjubjW)}(h&:c:macro:`XSDFEC_ADD_LDPC_CODE_PARAMS`h]h)}(hjh]h)}(hjh]j)}(hjh]hXSDFEC_ADD_LDPC_CODE_PARAMS}(hjhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_ADD_LDPC_CODE_PARAMSuh1hhhhKXhjubah}(h]h ]h"]h$]h&]uh1hhhhKXhjubah}(h]h ]h"]h$]h&]uh1jVhjubjW)}(h:c:macro:`XSDFEC_GET_CONFIG`h]h)}(hjh]h)}(hjh]j)}(hjh]hXSDFEC_GET_CONFIG}(hjhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_CONFIGuh1hhhhKYhjubah}(h]h ]h"]h$]h&]uh1hhhhKYhjubah}(h]h ]h"]h$]h&]uh1jVhjubjW)}(h:c:macro:`XSDFEC_SET_ORDER`h]h)}(hjh]h)}(hjh]j)}(hjh]hXSDFEC_SET_ORDER}(hj&hhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1jhj#ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_SET_ORDERuh1hhhhKZhj ubah}(h]h ]h"]h$]h&]uh1hhhhKZhjubah}(h]h ]h"]h$]h&]uh1jVhjubjW)}(h:c:macro:`XSDFEC_SET_BYPASS`h]h)}(hjOh]h)}(hjOh]j)}(hjOh]hXSDFEC_SET_BYPASS}(hjWhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1jhjTubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_SET_BYPASSuh1hhhhK[hjQubah}(h]h ]h"]h$]h&]uh1hhhhK[hjMubah}(h]h ]h"]h$]h&]uh1jVhjubjW)}(h:c:macro:`XSDFEC_IS_ACTIVE`h]h)}(hjh]h)}(hjh]j)}(hjh]hXSDFEC_IS_ACTIVE}(hjhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_IS_ACTIVEuh1hhhhK\hjubah}(h]h ]h"]h$]h&]uh1hhhhK\hj~ubah}(h]h ]h"]h$]h&]uh1jVhjubjW)}(h:c:macro:`XSDFEC_CLEAR_STATS`h]h)}(hjh]h)}(hjh]j)}(hjh]hXSDFEC_CLEAR_STATS}(hjhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_CLEAR_STATSuh1hhhhK]hjubah}(h]h ]h"]h$]h&]uh1hhhhK]hjubah}(h]h ]h"]h$]h&]uh1jVhjubjW)}(h&:c:macro:`XSDFEC_SET_DEFAULT_CONFIG` h]h)}(h$:c:macro:`XSDFEC_SET_DEFAULT_CONFIG`h]h)}(hjh]j)}(hjh]hXSDFEC_SET_DEFAULT_CONFIG}(hjhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_SET_DEFAULT_CONFIGuh1hhhhK^hjubah}(h]h ]h"]h$]h&]uh1hhhhK^hjubah}(h]h ]h"]h$]h&]uh1jVhjubeh}(h]h ]h"]h$]h&]jjuh1jQhhhKShjubah}(h]h ]h"]h$]h&]uh1jKhhhKShjubeh}(h]h ]h"]h$]h&]uh1jVhj`ubeh}(h]h ]h"]h$]h&]jjuh1jQhhhKNhj\ubah}(h]h ]h"]h$]h&]uh1jKhhhKNhjhhubeh}(h]driver-structureah ]h"]driver structureah$]h&]uh1hhhhhhhhKCubh)}(hhh](h)}(h Driver Usageh]h Driver Usage}(hj;hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8hhhhhKbubh)}(hhh](h)}(hOverviewh]hOverview}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjIhhhhhKfubh)}(hAfter opening the driver, the user should find out what operations need to be performed to configure and activate the SD-FEC core and determine the configuration of the driver. The following outlines the flow the user should perform:h]hAfter opening the driver, the user should find out what operations need to be performed to configure and activate the SD-FEC core and determine the configuration of the driver. The following outlines the flow the user should perform:}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhjIhhubjL)}(hX- Determine Configuration - Set the order, if not already configured as desired - Set Turbo decode, LPDC encode or decode parameters, depending on how the SD-FEC core is configured plus if the SD-FEC has not been configured for PL initialization - Enable interrupts, if not already enabled - Bypass the SD-FEC core, if required - Start the SD-FEC core if not already started - Get the SD-FEC core status - Monitor for interrupts - Stop the SD-FEC core h]jR)}(hhh](jW)}(hDetermine Configurationh]h)}(hjqh]hDetermine Configuration}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKmhjoubah}(h]h ]h"]h$]h&]uh1jVhjlubjW)}(h3Set the order, if not already configured as desiredh]h)}(hjh]h3Set the order, if not already configured as desired}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKnhjubah}(h]h ]h"]h$]h&]uh1jVhjlubjW)}(hSet Turbo decode, LPDC encode or decode parameters, depending on how the SD-FEC core is configured plus if the SD-FEC has not been configured for PL initializationh]h)}(hSet Turbo decode, LPDC encode or decode parameters, depending on how the SD-FEC core is configured plus if the SD-FEC has not been configured for PL initializationh]hSet Turbo decode, LPDC encode or decode parameters, depending on how the SD-FEC core is configured plus if the SD-FEC has not been configured for PL initialization}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKohjubah}(h]h ]h"]h$]h&]uh1jVhjlubjW)}(h)Enable interrupts, if not already enabledh]h)}(hjh]h)Enable interrupts, if not already enabled}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKrhjubah}(h]h ]h"]h$]h&]uh1jVhjlubjW)}(h#Bypass the SD-FEC core, if requiredh]h)}(hjh]h#Bypass the SD-FEC core, if required}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKshjubah}(h]h ]h"]h$]h&]uh1jVhjlubjW)}(h,Start the SD-FEC core if not already startedh]h)}(hjh]h,Start the SD-FEC core if not already started}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKthjubah}(h]h ]h"]h$]h&]uh1jVhjlubjW)}(hGet the SD-FEC core statush]h)}(hjh]hGet the SD-FEC core status}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKuhjubah}(h]h ]h"]h$]h&]uh1jVhjlubjW)}(hMonitor for interruptsh]h)}(hjh]hMonitor for interrupts}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKvhjubah}(h]h ]h"]h$]h&]uh1jVhjlubjW)}(hStop the SD-FEC core h]h)}(hStop the SD-FEC coreh]hStop the SD-FEC core}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKwhj(ubah}(h]h ]h"]h$]h&]uh1jVhjlubeh}(h]h ]h"]h$]h&]jjuh1jQhhhKmhjhubah}(h]h ]h"]h$]h&]uh1jKhhhKmhjIhhubh)}(hNote: When monitoring for interrupts if a critical error is detected where a reset is required, the driver will be required to load the default configuration.h]hNote: When monitoring for interrupts if a critical error is detected where a reset is required, the driver will be required to load the default configuration.}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKzhjIhhubeh}(h]id1ah ]h"]h$]jah&]uh1hhj8hhhhhKfj6Kubh)}(hhh](h)}(hDetermine Configurationh]hDetermine Configuration}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjahhhhhK~ubh)}(h_Determine the configuration of the SD-FEC core by using the ioctl :c:macro:`XSDFEC_GET_CONFIG`.h](hBDetermine the configuration of the SD-FEC core by using the ioctl }(hjrhhhNhNubh)}(h:c:macro:`XSDFEC_GET_CONFIG`h]j)}(hj|h]hXSDFEC_GET_CONFIG}(hj~hhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1jhjzubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_CONFIGuh1hhhhKhjrubh.}(hjrhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjahhubeh}(h]determine-configurationah ]h"]determine configurationah$]h&]uh1hhj8hhhhhK~ubh)}(hhh](h)}(h Set the Orderh]h Set the Order}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hUSetting the order determines how the order of Blocks can change from input to output.h]hUSetting the order determines how the order of Blocks can change from input to output.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh)}(hHSetting the order is done by using the ioctl :c:macro:`XSDFEC_SET_ORDER`h](h-Setting the order is done by using the ioctl }(hjhhhNhNubh)}(h:c:macro:`XSDFEC_SET_ORDER`h]j)}(hjh]hXSDFEC_SET_ORDER}(hjhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_SET_ORDERuh1hhhhKhjubeh}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh)}(hISetting the order can only be done if the following restrictions are met:h]hISetting the order can only be done if the following restrictions are met:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubjL)}(h- The ``state`` member of struct :c:type:`xsdfec_status ` filled by the ioctl :c:macro:`XSDFEC_GET_STATUS` indicates the SD-FEC core has not STARTED h]jR)}(hhh]jW)}(hThe ``state`` member of struct :c:type:`xsdfec_status ` filled by the ioctl :c:macro:`XSDFEC_GET_STATUS` indicates the SD-FEC core has not STARTED h]h)}(hThe ``state`` member of struct :c:type:`xsdfec_status ` filled by the ioctl :c:macro:`XSDFEC_GET_STATUS` indicates the SD-FEC core has not STARTEDh](hThe }(hj hhhNhNubj)}(h ``state``h]hstate}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh member of struct }(hj hhhNhNubh)}(h':c:type:`xsdfec_status `h]j)}(hj, h]h xsdfec_status}(hj. hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jhj* ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj xsdfec_statusuh1hhhhKhj ubh filled by the ioctl }(hj hhhNhNubh)}(h:c:macro:`XSDFEC_GET_STATUS`h]j)}(hjO h]hXSDFEC_GET_STATUS}(hjQ hhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1jhjM ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_STATUSuh1hhhhKhj ubh* indicates the SD-FEC core has not STARTED}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jVhj ubah}(h]h ]h"]h$]h&]jjuh1jQhhhKhj ubah}(h]h ]h"]h$]h&]uh1jKhhhKhjhhubeh}(h] set-the-orderah ]h"] set the orderah$]h&]uh1hhj8hhhhhKubh)}(hhh](h)}(hAdd LDPC Codesh]hAdd LDPC Codes}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhKubh)}(hFThe following steps indicate how to add LDPC codes to the SD-FEC core:h]hFThe following steps indicate how to add LDPC codes to the SD-FEC core:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj hhubjL)}(hXK- Use the auto-generated parameters to fill the :c:type:`struct xsdfec_ldpc_params ` for the desired LDPC code. - Set the SC, QA, and LA table offsets for the LPDC parameters and the parameters in the structure :c:type:`struct xsdfec_ldpc_params ` - Set the desired Code Id value in the structure :c:type:`struct xsdfec_ldpc_params ` - Add the LPDC Code Parameters using the ioctl :c:macro:`XSDFEC_ADD_LDPC_CODE_PARAMS` - For the applied LPDC Code Parameter use the function :c:func:`xsdfec_calculate_shared_ldpc_table_entry_size` to calculate the size of shared LPDC code tables. This allows the user to determine the shared table usage so when selecting the table offsets for the next LDPC code parameters unused table areas can be selected. - Repeat for each LDPC code parameter. h]jR)}(hhh](jW)}(hUse the auto-generated parameters to fill the :c:type:`struct xsdfec_ldpc_params ` for the desired LDPC code.h]h)}(hj h](h.Use the auto-generated parameters to fill the }(hj hhhNhNubh)}(h8:c:type:`struct xsdfec_ldpc_params `h]j)}(hj h]hstruct xsdfec_ldpc_params}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjxsdfec_ldpc_paramsuh1hhhhKhj ubh for the desired LDPC code.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jVhj ubjW)}(hSet the SC, QA, and LA table offsets for the LPDC parameters and the parameters in the structure :c:type:`struct xsdfec_ldpc_params `h]h)}(hj h](haSet the SC, QA, and LA table offsets for the LPDC parameters and the parameters in the structure }(hj hhhNhNubh)}(h8:c:type:`struct xsdfec_ldpc_params `h]j)}(hj h]hstruct xsdfec_ldpc_params}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjxsdfec_ldpc_paramsuh1hhhhKhj ubeh}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jVhj ubjW)}(hgSet the desired Code Id value in the structure :c:type:`struct xsdfec_ldpc_params `h]h)}(hj( h](h/Set the desired Code Id value in the structure }(hj* hhhNhNubh)}(h8:c:type:`struct xsdfec_ldpc_params `h]j)}(hj3 h]hstruct xsdfec_ldpc_params}(hj5 hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jhj1 ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjxsdfec_ldpc_paramsuh1hhhhKhj* ubeh}(h]h ]h"]h$]h&]uh1hhhhKhj& ubah}(h]h ]h"]h$]h&]uh1jVhj ubjW)}(hSAdd the LPDC Code Parameters using the ioctl :c:macro:`XSDFEC_ADD_LDPC_CODE_PARAMS`h]h)}(hj^ h](h-Add the LPDC Code Parameters using the ioctl }(hj` hhhNhNubh)}(h&:c:macro:`XSDFEC_ADD_LDPC_CODE_PARAMS`h]j)}(hji h]hXSDFEC_ADD_LDPC_CODE_PARAMS}(hjk hhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1jhjg ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_ADD_LDPC_CODE_PARAMSuh1hhhhKhj` ubeh}(h]h ]h"]h$]h&]uh1hhhhKhj\ ubah}(h]h ]h"]h$]h&]uh1jVhj ubjW)}(hXAFor the applied LPDC Code Parameter use the function :c:func:`xsdfec_calculate_shared_ldpc_table_entry_size` to calculate the size of shared LPDC code tables. This allows the user to determine the shared table usage so when selecting the table offsets for the next LDPC code parameters unused table areas can be selected.h]h)}(hj h](h5For the applied LPDC Code Parameter use the function }(hj hhhNhNubh)}(h7:c:func:`xsdfec_calculate_shared_ldpc_table_entry_size`h]j)}(hj h]h/xsdfec_calculate_shared_ldpc_table_entry_size()}(hj hhhNhNubah}(h]h ](jjc-funceh"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypefunc refexplicitrefwarnj-xsdfec_calculate_shared_ldpc_table_entry_sizeuh1hhhhKhj ubh to calculate the size of shared LPDC code tables. This allows the user to determine the shared table usage so when selecting the table offsets for the next LDPC code parameters unused table areas can be selected.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jVhj ubjW)}(h%Repeat for each LDPC code parameter. h]h)}(h$Repeat for each LDPC code parameter.h]h$Repeat for each LDPC code parameter.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jVhj ubeh}(h]h ]h"]h$]h&]jjuh1jQhhhKhj ubah}(h]h ]h"]h$]h&]uh1jKhhhKhj hhubh)}(hIAdding LDPC codes can only be done if the following restrictions are met:h]hIAdding LDPC codes can only be done if the following restrictions are met:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj hhubjL)}(hX- The ``code`` member of :c:type:`struct xsdfec_config ` filled by the ioctl :c:macro:`XSDFEC_GET_CONFIG` indicates the SD-FEC core is configured as LDPC - The ``code_wr_protect`` of :c:type:`struct xsdfec_config ` filled by the ioctl :c:macro:`XSDFEC_GET_CONFIG` indicates that write protection is not enabled - The ``state`` member of struct :c:type:`xsdfec_status ` filled by the ioctl :c:macro:`XSDFEC_GET_STATUS` indicates the SD-FEC core has not started h]jR)}(hhh](jW)}(hThe ``code`` member of :c:type:`struct xsdfec_config ` filled by the ioctl :c:macro:`XSDFEC_GET_CONFIG` indicates the SD-FEC core is configured as LDPCh]h)}(hj h](hThe }(hj hhhNhNubj)}(h``code``h]hcode}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh member of }(hj hhhNhNubh)}(h.:c:type:`struct xsdfec_config `h]j)}(hj$ h]hstruct xsdfec_config}(hj& hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jhj" ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj xsdfec_configuh1hhhhKhj ubh filled by the ioctl }(hj hhhNhNubh)}(h:c:macro:`XSDFEC_GET_CONFIG`h]j)}(hjG h]hXSDFEC_GET_CONFIG}(hjI hhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1jhjE ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_CONFIGuh1hhhhKhj ubh0 indicates the SD-FEC core is configured as LDPC}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jVhj ubjW)}(hThe ``code_wr_protect`` of :c:type:`struct xsdfec_config ` filled by the ioctl :c:macro:`XSDFEC_GET_CONFIG` indicates that write protection is not enabledh]h)}(hjv h](hThe }(hjx hhhNhNubj)}(h``code_wr_protect``h]hcode_wr_protect}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjx ubh of }(hjx hhhNhNubh)}(h.:c:type:`struct xsdfec_config `h]j)}(hj h]hstruct xsdfec_config}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj xsdfec_configuh1hhhhKhjx ubh filled by the ioctl }(hjx hhhNhNubh)}(h:c:macro:`XSDFEC_GET_CONFIG`h]j)}(hj h]hXSDFEC_GET_CONFIG}(hj hhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_CONFIGuh1hhhhKhjx ubh/ indicates that write protection is not enabled}(hjx hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjt ubah}(h]h ]h"]h$]h&]uh1jVhj ubjW)}(hThe ``state`` member of struct :c:type:`xsdfec_status ` filled by the ioctl :c:macro:`XSDFEC_GET_STATUS` indicates the SD-FEC core has not started h]h)}(hThe ``state`` member of struct :c:type:`xsdfec_status ` filled by the ioctl :c:macro:`XSDFEC_GET_STATUS` indicates the SD-FEC core has not startedh](hThe }(hj hhhNhNubj)}(h ``state``h]hstate}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh member of struct }(hj hhhNhNubh)}(h':c:type:`xsdfec_status `h]j)}(hj h]h xsdfec_status}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj xsdfec_statusuh1hhhhKhj ubh filled by the ioctl }(hj hhhNhNubh)}(h:c:macro:`XSDFEC_GET_STATUS`h]j)}(hj& h]hXSDFEC_GET_STATUS}(hj( hhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1jhj$ ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_STATUSuh1hhhhKhj ubh* indicates the SD-FEC core has not started}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jVhj ubeh}(h]h ]h"]h$]h&]jjuh1jQhhhKhj ubah}(h]h ]h"]h$]h&]uh1jKhhhKhj hhubeh}(h]add-ldpc-codesah ]h"]add ldpc codesah$]h&]uh1hhj8hhhhhKubh)}(hhh](h)}(hSet Turbo Decodeh]hSet Turbo Decode}(hjj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjg hhhhhKubh)}(hConfiguring the Turbo decode parameters is done by using the ioctl :c:macro:`XSDFEC_SET_TURBO` using auto-generated parameters to fill the :c:type:`struct xsdfec_turbo ` for the desired Turbo code.h](hCConfiguring the Turbo decode parameters is done by using the ioctl }(hjx hhhNhNubh)}(h:c:macro:`XSDFEC_SET_TURBO`h]j)}(hj h]hXSDFEC_SET_TURBO}(hj hhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_SET_TURBOuh1hhhhKhjx ubh- using auto-generated parameters to fill the }(hjx hhhNhNubh)}(h,:c:type:`struct xsdfec_turbo `h]j)}(hj h]hstruct xsdfec_turbo}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj xsdfec_turbouh1hhhhKhjx ubh for the desired Turbo code.}(hjx hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjg hhubh)}(hKAdding Turbo decode can only be done if the following restrictions are met:h]hKAdding Turbo decode can only be done if the following restrictions are met:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjg hhubjL)}(hXN- The ``code`` member of :c:type:`struct xsdfec_config ` filled by the ioctl :c:macro:`XSDFEC_GET_CONFIG` indicates the SD-FEC core is configured as TURBO - The ``state`` member of struct :c:type:`xsdfec_status ` filled by the ioctl :c:macro:`XSDFEC_GET_STATUS` indicates the SD-FEC core has not STARTED h]jR)}(hhh](jW)}(hThe ``code`` member of :c:type:`struct xsdfec_config ` filled by the ioctl :c:macro:`XSDFEC_GET_CONFIG` indicates the SD-FEC core is configured as TURBOh]h)}(hj h](hThe }(hj hhhNhNubj)}(h``code``h]hcode}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh member of }(hj hhhNhNubh)}(h.:c:type:`struct xsdfec_config `h]j)}(hj h]hstruct xsdfec_config}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj xsdfec_configuh1hhhhKhj ubh filled by the ioctl }(hj hhhNhNubh)}(h:c:macro:`XSDFEC_GET_CONFIG`h]j)}(hj# h]hXSDFEC_GET_CONFIG}(hj% hhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1jhj! ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_CONFIGuh1hhhhKhj ubh1 indicates the SD-FEC core is configured as TURBO}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jVhj ubjW)}(hThe ``state`` member of struct :c:type:`xsdfec_status ` filled by the ioctl :c:macro:`XSDFEC_GET_STATUS` indicates the SD-FEC core has not STARTED h]h)}(hThe ``state`` member of struct :c:type:`xsdfec_status ` filled by the ioctl :c:macro:`XSDFEC_GET_STATUS` indicates the SD-FEC core has not STARTEDh](hThe }(hjT hhhNhNubj)}(h ``state``h]hstate}(hj\ hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjT ubh member of struct }(hjT hhhNhNubh)}(h':c:type:`xsdfec_status `h]j)}(hjp h]h xsdfec_status}(hjr hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jhjn ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj xsdfec_statusuh1hhhhKhjT ubh filled by the ioctl }(hjT hhhNhNubh)}(h:c:macro:`XSDFEC_GET_STATUS`h]j)}(hj h]hXSDFEC_GET_STATUS}(hj hhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_STATUSuh1hhhhKhjT ubh* indicates the SD-FEC core has not STARTED}(hjT hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjP ubah}(h]h ]h"]h$]h&]uh1jVhj ubeh}(h]h ]h"]h$]h&]jjuh1jQhhhKhj ubah}(h]h ]h"]h$]h&]uh1jKhhhKhjg hhubeh}(h]set-turbo-decodeah ]h"]set turbo decodeah$]h&]uh1hhj8hhhhhKubh)}(hhh](h)}(hEnable Interruptsh]hEnable Interrupts}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhKubh)}(hX&Enabling or disabling interrupts is done by using the ioctl :c:macro:`XSDFEC_SET_IRQ`. The members of the parameter passed, :c:type:`struct xsdfec_irq `, to the ioctl are used to set and clear different categories of interrupts. The category of interrupt is controlled as following:h](h`h]j)}(hjh]hstruct xsdfec_irq}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj xsdfec_irquh1hhhhKhj ubh, to the ioctl are used to set and clear different categories of interrupts. The category of interrupt is controlled as following:}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj hhubjL)}(hd- ``enable_isr`` controls the ``tlast`` interrupts - ``enable_ecc_isr`` controls the ECC interrupts h]jR)}(hhh](jW)}(h0``enable_isr`` controls the ``tlast`` interruptsh]h)}(hjBh](j)}(h``enable_isr``h]h enable_isr}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjDubh controls the }(hjDhhhNhNubj)}(h ``tlast``h]htlast}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjDubh interrupts}(hjDhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj@ubah}(h]h ]h"]h$]h&]uh1jVhj=ubjW)}(h/``enable_ecc_isr`` controls the ECC interrupts h]h)}(h.``enable_ecc_isr`` controls the ECC interruptsh](j)}(h``enable_ecc_isr``h]henable_ecc_isr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj{ubh controls the ECC interrupts}(hj{hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjwubah}(h]h ]h"]h$]h&]uh1jVhj=ubeh}(h]h ]h"]h$]h&]jjuh1jQhhhKhj9ubah}(h]h ]h"]h$]h&]uh1jKhhhKhj hhubh)}(hIf the ``code`` member of :c:type:`struct xsdfec_config ` filled by the ioctl :c:macro:`XSDFEC_GET_CONFIG` indicates the SD-FEC core is configured as TURBO then the enabling ECC errors is not required.h](hIf the }(hjhhhNhNubj)}(h``code``h]hcode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh member of }(hjhhhNhNubh)}(h.:c:type:`struct xsdfec_config `h]j)}(hjh]hstruct xsdfec_config}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj xsdfec_configuh1hhhhKhjubh filled by the ioctl }(hjhhhNhNubh)}(h:c:macro:`XSDFEC_GET_CONFIG`h]j)}(hjh]hXSDFEC_GET_CONFIG}(hjhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_CONFIGuh1hhhhKhjubh_ indicates the SD-FEC core is configured as TURBO then the enabling ECC errors is not required.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj hhubeh}(h]enable-interruptsah ]h"]enable interruptsah$]h&]uh1hhj8hhhhhKubh)}(hhh](h)}(hBypass the SD-FECh]hBypass the SD-FEC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hLBypassing the SD-FEC is done by using the ioctl :c:macro:`XSDFEC_SET_BYPASS`h](h0Bypassing the SD-FEC is done by using the ioctl }(hj(hhhNhNubh)}(h:c:macro:`XSDFEC_SET_BYPASS`h]j)}(hj2h]hXSDFEC_SET_BYPASS}(hj4hhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1jhj0ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_SET_BYPASSuh1hhhhKhj(ubeh}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh)}(hLBypassing the SD-FEC can only be done if the following restrictions are met:h]hLBypassing the SD-FEC can only be done if the following restrictions are met:}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubjL)}(h- The ``state`` member of :c:type:`struct xsdfec_status ` filled by the ioctl :c:macro:`XSDFEC_GET_STATUS` indicates the SD-FEC core has not STARTED h]jR)}(hhh]jW)}(hThe ``state`` member of :c:type:`struct xsdfec_status ` filled by the ioctl :c:macro:`XSDFEC_GET_STATUS` indicates the SD-FEC core has not STARTED h]h)}(hThe ``state`` member of :c:type:`struct xsdfec_status ` filled by the ioctl :c:macro:`XSDFEC_GET_STATUS` indicates the SD-FEC core has not STARTEDh](hThe }(hjnhhhNhNubj)}(h ``state``h]hstate}(hjvhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjnubh member of }(hjnhhhNhNubh)}(h.:c:type:`struct xsdfec_status `h]j)}(hjh]hstruct xsdfec_status}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj xsdfec_statusuh1hhhhKhjnubh filled by the ioctl }(hjnhhhNhNubh)}(h:c:macro:`XSDFEC_GET_STATUS`h]j)}(hjh]hXSDFEC_GET_STATUS}(hjhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_STATUSuh1hhhhKhjnubh* indicates the SD-FEC core has not STARTED}(hjnhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjjubah}(h]h ]h"]h$]h&]uh1jVhjgubah}(h]h ]h"]h$]h&]jjuh1jQhhhKhjcubah}(h]h ]h"]h$]h&]uh1jKhhhKhjhhubeh}(h]bypass-the-sd-fecah ]h"]bypass the sd-fecah$]h&]uh1hhj8hhhhhKubh)}(hhh](h)}(hStart the SD-FEC coreh]hStart the SD-FEC core}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hDStart the SD-FEC core by using the ioctl :c:macro:`XSDFEC_START_DEV`h](h)Start the SD-FEC core by using the ioctl }(hjhhhNhNubh)}(h:c:macro:`XSDFEC_START_DEV`h]j)}(hj h]hXSDFEC_START_DEV}(hj hhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_START_DEVuh1hhhhKhjubeh}(h]h ]h"]h$]h&]uh1hhhhKhjhhubeh}(h]start-the-sd-fec-coreah ]h"]start the sd-fec coreah$]h&]uh1hhj8hhhhhKubh)}(hhh](h)}(hGet SD-FEC Statush]hGet SD-FEC Status}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj4hhhhhKubh)}(hGet the SD-FEC status of the device by using the ioctl :c:macro:`XSDFEC_GET_STATUS`, which will fill the :c:type:`struct xsdfec_status `h](h7Get the SD-FEC status of the device by using the ioctl }(hjEhhhNhNubh)}(h:c:macro:`XSDFEC_GET_STATUS`h]j)}(hjOh]hXSDFEC_GET_STATUS}(hjQhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1jhjMubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_STATUSuh1hhhhKhjEubh, which will fill the }(hjEhhhNhNubh)}(h.:c:type:`struct xsdfec_status `h]j)}(hjrh]hstruct xsdfec_status}(hjthhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jhjpubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj xsdfec_statusuh1hhhhKhjEubeh}(h]h ]h"]h$]h&]uh1hhhhKhj4hhubeh}(h]get-sd-fec-statusah ]h"]get sd-fec statusah$]h&]uh1hhj8hhhhhKubh)}(hhh](h)}(hMonitor for Interruptsh]hMonitor for Interrupts}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubjL)}(hX6- Use the poll system call to monitor for an interrupt. The poll system call waits for an interrupt to wake it up or times out if no interrupt occurs. - On return Poll ``revents`` will indicate whether stats and/or state have been updated - ``POLLPRI`` indicates a critical error and the user should use :c:macro:`XSDFEC_GET_STATUS` and :c:macro:`XSDFEC_GET_STATS` to confirm - ``POLLRDNORM`` indicates a non-critical error has occurred and the user should use :c:macro:`XSDFEC_GET_STATS` to confirm - Get stats by using the ioctl :c:macro:`XSDFEC_GET_STATS` - For critical error the ``isr_err_count`` or ``uecc_count`` member of :c:type:`struct xsdfec_stats ` is non-zero - For non-critical errors the ``cecc_count`` member of :c:type:`struct xsdfec_stats ` is non-zero - Get state by using the ioctl :c:macro:`XSDFEC_GET_STATUS` - For a critical error the ``state`` of :c:type:`xsdfec_status ` will indicate a Reset Is Required - Clear stats by using the ioctl :c:macro:`XSDFEC_CLEAR_STATS` h]jR)}(hhh](jW)}(hUse the poll system call to monitor for an interrupt. The poll system call waits for an interrupt to wake it up or times out if no interrupt occurs.h]h)}(hjh]hUse the poll system call to monitor for an interrupt. The poll system call waits for an interrupt to wake it up or times out if no interrupt occurs.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jVhjubjW)}(hXgOn return Poll ``revents`` will indicate whether stats and/or state have been updated - ``POLLPRI`` indicates a critical error and the user should use :c:macro:`XSDFEC_GET_STATUS` and :c:macro:`XSDFEC_GET_STATS` to confirm - ``POLLRDNORM`` indicates a non-critical error has occurred and the user should use :c:macro:`XSDFEC_GET_STATS` to confirmh]hdefinition_list)}(hhh]hdefinition_list_item)}(hX[On return Poll ``revents`` will indicate whether stats and/or state have been updated - ``POLLPRI`` indicates a critical error and the user should use :c:macro:`XSDFEC_GET_STATUS` and :c:macro:`XSDFEC_GET_STATS` to confirm - ``POLLRDNORM`` indicates a non-critical error has occurred and the user should use :c:macro:`XSDFEC_GET_STATS` to confirmh](hterm)}(hUOn return Poll ``revents`` will indicate whether stats and/or state have been updatedh](hOn return Poll }(hjhhhNhNubj)}(h ``revents``h]hrevents}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh; will indicate whether stats and/or state have been updated}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhKhjubh definition)}(hhh]jR)}(hhh](jW)}(h``POLLPRI`` indicates a critical error and the user should use :c:macro:`XSDFEC_GET_STATUS` and :c:macro:`XSDFEC_GET_STATS` to confirmh]h)}(hjh](j)}(h ``POLLPRI``h]hPOLLPRI}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubh4 indicates a critical error and the user should use }(hj hhhNhNubh)}(h:c:macro:`XSDFEC_GET_STATUS`h]j)}(hj h]hXSDFEC_GET_STATUS}(hj"hhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_STATUSuh1hhhhKhj ubh and }(hj hhhNhNubh)}(h:c:macro:`XSDFEC_GET_STATS`h]j)}(hjCh]hXSDFEC_GET_STATS}(hjEhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1jhjAubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_STATSuh1hhhhKhj ubh to confirm}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jVhjubjW)}(hz``POLLRDNORM`` indicates a non-critical error has occurred and the user should use :c:macro:`XSDFEC_GET_STATS` to confirmh]h)}(hjrh](j)}(h``POLLRDNORM``h]h POLLRDNORM}(hjwhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjtubhF indicates a non-critical error has occurred and the user should use }(hjthhhNhNubh)}(h:c:macro:`XSDFEC_GET_STATS`h]j)}(hjh]hXSDFEC_GET_STATS}(hjhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_STATSuh1hhhhKhjtubh to confirm}(hjthhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjpubah}(h]h ]h"]h$]h&]uh1jVhjubeh}(h]h ]h"]h$]h&]jjuh1jQhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jVhjubjW)}(hX5Get stats by using the ioctl :c:macro:`XSDFEC_GET_STATS` - For critical error the ``isr_err_count`` or ``uecc_count`` member of :c:type:`struct xsdfec_stats ` is non-zero - For non-critical errors the ``cecc_count`` member of :c:type:`struct xsdfec_stats ` is non-zeroh]j)}(hhh]j)}(hX)Get stats by using the ioctl :c:macro:`XSDFEC_GET_STATS` - For critical error the ``isr_err_count`` or ``uecc_count`` member of :c:type:`struct xsdfec_stats ` is non-zero - For non-critical errors the ``cecc_count`` member of :c:type:`struct xsdfec_stats ` is non-zeroh](j)}(h8Get stats by using the ioctl :c:macro:`XSDFEC_GET_STATS`h](hGet stats by using the ioctl }(hjhhhNhNubh)}(h:c:macro:`XSDFEC_GET_STATS`h]j)}(hjh]hXSDFEC_GET_STATS}(hjhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_STATSuh1hhhhKhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjubj)}(hhh]jR)}(hhh](jW)}(h~For critical error the ``isr_err_count`` or ``uecc_count`` member of :c:type:`struct xsdfec_stats ` is non-zeroh]h)}(hjh](hFor critical error the }(hjhhhNhNubj)}(h``isr_err_count``h]h isr_err_count}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh or }(hjhhhNhNubj)}(h``uecc_count``h]h uecc_count}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh member of }(hjhhhNhNubh)}(h,:c:type:`struct xsdfec_stats `h]j)}(hjEh]hstruct xsdfec_stats}(hjGhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jhjCubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj xsdfec_statsuh1hhhhKhjubh is non-zero}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jVhjubjW)}(hmFor non-critical errors the ``cecc_count`` member of :c:type:`struct xsdfec_stats ` is non-zeroh]h)}(hjth](hFor non-critical errors the }(hjvhhhNhNubj)}(h``cecc_count``h]h cecc_count}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjvubh member of }(hjvhhhNhNubh)}(h,:c:type:`struct xsdfec_stats `h]j)}(hjh]hstruct xsdfec_stats}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdoc-j refdomainjreftypetype refexplicitrefwarnj xsdfec_statsuh1hhhhKhjvubh is non-zero}(hjvhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjrubah}(h]h ]h"]h$]h&]uh1jVhjubeh}(h]h ]h"]h$]h&]jjuh1jQhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jVhjubjW)}(hGet state by using the ioctl :c:macro:`XSDFEC_GET_STATUS` - For a critical error the ``state`` of :c:type:`xsdfec_status ` will indicate a Reset Is Requiredh]j)}(hhh]j)}(hGet state by using the ioctl :c:macro:`XSDFEC_GET_STATUS` - For a critical error the ``state`` of :c:type:`xsdfec_status ` will indicate a Reset Is Requiredh](j)}(h9Get state by using the ioctl :c:macro:`XSDFEC_GET_STATUS`h](hGet state by using the ioctl }(hjhhhNhNubh)}(h:c:macro:`XSDFEC_GET_STATUS`h]j)}(hjh]hXSDFEC_GET_STATUS}(hjhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_STATUSuh1hhhhKhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjubj)}(hhh]jR)}(hhh]jW)}(hoFor a critical error the ``state`` of :c:type:`xsdfec_status ` will indicate a Reset Is Requiredh]h)}(hjh](hFor a critical error the }(hjhhhNhNubj)}(h ``state``h]hstate}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh of }(hjhhhNhNubh)}(h':c:type:`xsdfec_status `h]j)}(hj9h]h xsdfec_status}(hj;hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jhj7ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj xsdfec_statusuh1hhhhKhjubh" will indicate a Reset Is Required}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jVhjubah}(h]h ]h"]h$]h&]jjuh1jQhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jVhjubjW)}(h=Clear stats by using the ioctl :c:macro:`XSDFEC_CLEAR_STATS` h]h)}(h` that contains the interrupt settings for the SD-FEC core h](j)}(h**struct** xsdfec_irq *h](j)}(h **struct**h]hstruct}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj4ubh xsdfec_irq *}(hj4hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:249: ./include/uapi/misc/xilinx_sdfec.hhM,hj0ubj)}(hhh]h)}(hpPointer to the :c:type:`struct xsdfec_irq ` that contains the interrupt settings for the SD-FEC coreh](hPointer to the }(hjThhhNhNubh)}(h(:c:type:`struct xsdfec_irq `h]j)}(hj^h]hstruct xsdfec_irq}(hj`hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jhj\ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarn c:parent_keysphinx.domains.c LookupKey)}data]sbj xsdfec_irquh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:249: ./include/uapi/misc/xilinx_sdfec.hhM+hjTubh9 that contains the interrupt settings for the SD-FEC core}(hjThhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM+hjQubah}(h]h ]h"]h$]h&]uh1jhj0ubeh}(h]h ]h"]h$]h&]uh1jhjPhM,hj-ubah}(h]h ]h"]h$]h&]uh1jhj.hhhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:249: ./include/uapi/misc/xilinx_sdfec.hhNubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:249: ./include/uapi/misc/xilinx_sdfec.hhM.hj.hhubh)}(hioctl to enable or disable irqh]hioctl to enable or disable irq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:249: ./include/uapi/misc/xilinx_sdfec.hhM0hj.hhubj@)}(hhh]h}(h]h ]h"]h$]h&]entries](jLXSDFEC_SET_TURBO (C macro)c.XSDFEC_SET_TURBOhNtauh1j?hj.hhhNhNubjQ)}(hhh](jV)}(hXSDFEC_SET_TURBOh]j\)}(hXSDFEC_SET_TURBOh]jb)}(hXSDFEC_SET_TURBOh]jh)}(hjh]hXSDFEC_SET_TURBO}(hjhhhNhNubah}(h]h ]jsah"]h$]h&]uh1jghjubah}(h]h ](jzj{eh"]h$]h&]hhuh1jahjhhhhhKubah}(h]h ]h"]h$]h&]hhjuh1j[jjhjhhhhhKubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jUhhhKhjhhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjhhhhhKubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjuh1jPhhhj.hNhNubh)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:253: ./include/uapi/misc/xilinx_sdfec.hhM5hj.hhubj)}(hhh]j)}(h**struct** xsdfec_turbo * Pointer to the :c:type:`struct xsdfec_turbo ` that contains the Turbo decode settings for the SD-FEC core h](j)}(h**struct** xsdfec_turbo *h](j)}(h **struct**h]hstruct}(hj7hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj3ubh xsdfec_turbo *}(hj3hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:253: ./include/uapi/misc/xilinx_sdfec.hhM9hj/ubj)}(hhh]h)}(hwPointer to the :c:type:`struct xsdfec_turbo ` that contains the Turbo decode settings for the SD-FEC coreh](hPointer to the }(hjShhhNhNubh)}(h,:c:type:`struct xsdfec_turbo `h]j)}(hj]h]hstruct xsdfec_turbo}(hj_hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jhj[ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjzj~j xsdfec_turbouh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:253: ./include/uapi/misc/xilinx_sdfec.hhM8hjSubh< that contains the Turbo decode settings for the SD-FEC core}(hjShhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjzhM8hjPubah}(h]h ]h"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]uh1jhjOhM9hj,ubah}(h]h ]h"]h$]h&]uh1jhj.hhhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:253: ./include/uapi/misc/xilinx_sdfec.hhNubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:253: ./include/uapi/misc/xilinx_sdfec.hhM;hj.hhubh)}(h1ioctl that sets the SD-FEC Turbo parameter valuesh]h1ioctl that sets the SD-FEC Turbo parameter values}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:253: ./include/uapi/misc/xilinx_sdfec.hhM=hj.hhubh)}(hDThis can only be used when the driver is in the XSDFEC_STOPPED stateh]hDThis can only be used when the driver is in the XSDFEC_STOPPED state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:253: ./include/uapi/misc/xilinx_sdfec.hhM?hj.hhubj@)}(hhh]h}(h]h ]h"]h$]h&]entries](jL%XSDFEC_ADD_LDPC_CODE_PARAMS (C macro)c.XSDFEC_ADD_LDPC_CODE_PARAMShNtauh1j?hj.hhhNhNubjQ)}(hhh](jV)}(hXSDFEC_ADD_LDPC_CODE_PARAMSh]j\)}(hXSDFEC_ADD_LDPC_CODE_PARAMSh]jb)}(hXSDFEC_ADD_LDPC_CODE_PARAMSh]jh)}(hjh]hXSDFEC_ADD_LDPC_CODE_PARAMS}(hjhhhNhNubah}(h]h ]jsah"]h$]h&]uh1jghjubah}(h]h ](jzj{eh"]h$]h&]hhuh1jahjhhhhhMubah}(h]h ]h"]h$]h&]hhjuh1j[jjhjhhhhhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jUhhhMhjhhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjhhhhhMubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjuh1jPhhhj.hNhNubh)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:257: ./include/uapi/misc/xilinx_sdfec.hhMDhj.hhubj)}(hhh]j)}(h**struct** xsdfec_ldpc_params * Pointer to the :c:type:`struct xsdfec_ldpc_params ` that contains the LDPC code parameters to be added to the SD-FEC Block h](j)}(h**struct** xsdfec_ldpc_params *h](j)}(h **struct**h]hstruct}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj9ubh xsdfec_ldpc_params *}(hj9hhhNhNubeh}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:257: ./include/uapi/misc/xilinx_sdfec.hhMHhj5ubj)}(hhh]h)}(hPointer to the :c:type:`struct xsdfec_ldpc_params ` that contains the LDPC code parameters to be added to the SD-FEC Blockh](hPointer to the }(hjYhhhNhNubh)}(h8:c:type:`struct xsdfec_ldpc_params `h]j)}(hjch]hstruct xsdfec_ldpc_params}(hjehhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jhjaubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjzj~jxsdfec_ldpc_paramsuh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:257: ./include/uapi/misc/xilinx_sdfec.hhMGhjYubhG that contains the LDPC code parameters to be added to the SD-FEC Block}(hjYhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMGhjVubah}(h]h ]h"]h$]h&]uh1jhj5ubeh}(h]h ]h"]h$]h&]uh1jhjUhMHhj2ubah}(h]h ]h"]h$]h&]uh1jhj.hhhNhNubh)}(hB**Description** ioctl to add an LDPC code to the SD-FEC LDPC codesh](j)}(h**Description**h]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh3 ioctl to add an LDPC code to the SD-FEC LDPC codes}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:257: ./include/uapi/misc/xilinx_sdfec.hhMJhj.hhubh)}(hThis can only be used when:h]hThis can only be used when:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:257: ./include/uapi/misc/xilinx_sdfec.hhMMhj.hhubjR)}(hhh](jW)}(h&Driver is in the XSDFEC_STOPPED state h]h)}(h%Driver is in the XSDFEC_STOPPED stateh]h%Driver is in the XSDFEC_STOPPED state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:257: ./include/uapi/misc/xilinx_sdfec.hhMOhjubah}(h]h ]h"]h$]h&]uh1jVhjubjW)}(h"SD-FEC core is configured as LPDC h]h)}(h!SD-FEC core is configured as LPDCh]h!SD-FEC core is configured as LPDC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:257: ./include/uapi/misc/xilinx_sdfec.hhMQhjubah}(h]h ]h"]h$]h&]uh1jVhjubjW)}(h)SD-FEC Code Write Protection is disabled h]h)}(h(SD-FEC Code Write Protection is disabledh]h(SD-FEC Code Write Protection is disabled}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:257: ./include/uapi/misc/xilinx_sdfec.hhMShjubah}(h]h ]h"]h$]h&]uh1jVhjubeh}(h]h ]h"]h$]h&]jjuh1jQhjhMOhj.hhubj@)}(hhh]h}(h]h ]h"]h$]h&]entries](jLXSDFEC_GET_CONFIG (C macro)c.XSDFEC_GET_CONFIGhNtauh1j?hj.hhhNhNubjQ)}(hhh](jV)}(hXSDFEC_GET_CONFIGh]j\)}(hXSDFEC_GET_CONFIGh]jb)}(hXSDFEC_GET_CONFIGh]jh)}(hj0h]hXSDFEC_GET_CONFIG}(hj:hhhNhNubah}(h]h ]jsah"]h$]h&]uh1jghj6ubah}(h]h ](jzj{eh"]h$]h&]hhuh1jahj2hhhhhMubah}(h]h ]h"]h$]h&]hhjuh1j[jjhj.hhhhhMubah}(h]j)ah ](jjeh"]h$]h&]jj)jhuh1jUhhhMhj+hhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhj+hhhhhMubeh}(h]h ](jmacroeh"]h$]h&]jjjjejjejjjuh1jPhhhj.hNhNubh)}(h**Parameters**h]j)}(hjkh]h Parameters}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjiubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:261: ./include/uapi/misc/xilinx_sdfec.hhMYhj.hhubj)}(hhh]j)}(h**struct** xsdfec_config * Pointer to the :c:type:`struct xsdfec_config ` that contains the current configuration settings of the SD-FEC Block h](j)}(h**struct** xsdfec_config *h](j)}(h **struct**h]hstruct}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh xsdfec_config *}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:261: ./include/uapi/misc/xilinx_sdfec.hhM]hjubj)}(hhh]h)}(hPointer to the :c:type:`struct xsdfec_config ` that contains the current configuration settings of the SD-FEC Blockh](hPointer to the }(hjhhhNhNubh)}(h.:c:type:`struct xsdfec_config `h]j)}(hjh]hstruct xsdfec_config}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjzj~j xsdfec_configuh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:261: ./include/uapi/misc/xilinx_sdfec.hhM\hjubhE that contains the current configuration settings of the SD-FEC Block}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM\hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhM]hjubah}(h]h ]h"]h$]h&]uh1jhj.hhhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:261: ./include/uapi/misc/xilinx_sdfec.hhNubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:261: ./include/uapi/misc/xilinx_sdfec.hhM_hj.hhubh)}(h,ioctl that returns SD-FEC core configurationh]h,ioctl that returns SD-FEC core configuration}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:261: ./include/uapi/misc/xilinx_sdfec.hhMahj.hhubj@)}(hhh]h}(h]h ]h"]h$]h&]entries](jLXSDFEC_SET_ORDER (C macro)c.XSDFEC_SET_ORDERhNtauh1j?hj.hhhNhNubjQ)}(hhh](jV)}(hXSDFEC_SET_ORDERh]j\)}(hXSDFEC_SET_ORDERh]jb)}(hXSDFEC_SET_ORDERh]jh)}(hj'h]hXSDFEC_SET_ORDER}(hj1hhhNhNubah}(h]h ]jsah"]h$]h&]uh1jghj-ubah}(h]h ](jzj{eh"]h$]h&]hhuh1jahj)hhhhhMubah}(h]h ]h"]h$]h&]hhjuh1j[jjhj%hhhhhMubah}(h]j ah ](jjeh"]h$]h&]jj)jhuh1jUhhhMhj"hhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhj"hhhhhMubeh}(h]h ](jmacroeh"]h$]h&]jjjj\jj\jjjuh1jPhhhj.hNhNubh)}(h**Parameters**h]j)}(hjbh]h Parameters}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj`ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:265: ./include/uapi/misc/xilinx_sdfec.hhMshj.hhubj)}(hhh]j)}(hm**struct** unsigned long * Pointer to the unsigned long that contains a value from the **enum** xsdfec_order h](j)}(h**struct** unsigned long *h](j)}(h **struct**h]hstruct}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh unsigned long *}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:265: ./include/uapi/misc/xilinx_sdfec.hhMwhj{ubj)}(hhh]h)}(hQPointer to the unsigned long that contains a value from the **enum** xsdfec_orderh](hah ](jjeh"]h$]h&]jj)jhuh1jUhhhMhj@hhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhj@hhhhhMubeh}(h]h ](jmacroeh"]h$]h&]jjjjzjjzjjjuh1jPhhhj.hNhNubh)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj~ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:281: ./include/uapi/misc/xilinx_sdfec.hhMhj.hhubj)}(hhh]j)}(h**struct** xsdfec_stats * Pointer to the :c:type:`struct xsdfec_stats ` that will contain the updated stats values h](j)}(h**struct** xsdfec_stats *h](j)}(h **struct**h]hstruct}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh xsdfec_stats *}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:281: ./include/uapi/misc/xilinx_sdfec.hhMhjubj)}(hhh]h)}(hfPointer to the :c:type:`struct xsdfec_stats ` that will contain the updated stats valuesh](hPointer to the }(hjhhhNhNubh)}(h,:c:type:`struct xsdfec_stats `h]j)}(hjh]hstruct xsdfec_stats}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjzj~j xsdfec_statsuh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:281: ./include/uapi/misc/xilinx_sdfec.hhMhjubh+ that will contain the updated stats values}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhMhjubah}(h]h ]h"]h$]h&]uh1jhj.hhhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:281: ./include/uapi/misc/xilinx_sdfec.hhNubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:281: ./include/uapi/misc/xilinx_sdfec.hhMhj.hhubh)}(h$ioctl that returns SD-FEC core statsh]h$ioctl that returns SD-FEC core stats}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:281: ./include/uapi/misc/xilinx_sdfec.hhMhj.hhubh)}(hDThis can only be used when the driver is in the XSDFEC_STOPPED stateh]hDThis can only be used when the driver is in the XSDFEC_STOPPED state}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:281: ./include/uapi/misc/xilinx_sdfec.hhMhj.hhubj@)}(hhh]h}(h]h ]h"]h$]h&]entries](jL#XSDFEC_SET_DEFAULT_CONFIG (C macro)c.XSDFEC_SET_DEFAULT_CONFIGhNtauh1j?hj.hhhNhNubjQ)}(hhh](jV)}(hXSDFEC_SET_DEFAULT_CONFIGh]j\)}(hXSDFEC_SET_DEFAULT_CONFIGh]jb)}(hXSDFEC_SET_DEFAULT_CONFIGh]jh)}(hjKh]hXSDFEC_SET_DEFAULT_CONFIG}(hjUhhhNhNubah}(h]h ]jsah"]h$]h&]uh1jghjQubah}(h]h ](jzj{eh"]h$]h&]hhuh1jahjMhhhhhMubah}(h]h ]h"]h$]h&]hhjuh1j[jjhjIhhhhhMubah}(h]jDah ](jjeh"]h$]h&]jj)jhuh1jUhhhMhjFhhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjFhhhhhMubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjuh1jPhhhj.hNhNubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:285: ./include/uapi/misc/xilinx_sdfec.hhMhj.hhubh)}(hCioctl that returns SD-FEC core to default config, use after a reseth]hCioctl that returns SD-FEC core to default config, use after a reset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:285: ./include/uapi/misc/xilinx_sdfec.hhMhj.hhubh)}(hDThis can only be used when the driver is in the XSDFEC_STOPPED stateh]hDThis can only be used when the driver is in the XSDFEC_STOPPED state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:285: ./include/uapi/misc/xilinx_sdfec.hhMhj.hhubeh}(h] driver-ioctlsah ]h"] driver ioctlsah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hDriver Type Definitionsh]hDriver Type Definitions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhM!ubj@)}(hhh]h}(h]h ]h"]h$]h&]entries](jLxsdfec_code (C enum) c.xsdfec_codehNtauh1j?hjhhhNhNubjQ)}(hhh](jV)}(h xsdfec_codeh]j\)}(henum xsdfec_codeh](hdesc_sig_keyword)}(henumh]henum}(hjhhhNhNubah}(h]h ]kah"]h$]h&]uh1jhjhhhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKubhdesc_sig_space)}(h h]h }(hj hhhNhNubah}(h]h ]wah"]h$]h&]uh1jhjhhhjhKubjb)}(h xsdfec_codeh]jh)}(hjh]h xsdfec_code}(hj hhhNhNubah}(h]h ]jsah"]h$]h&]uh1jghj ubah}(h]h ](jzj{eh"]h$]h&]hhuh1jahjhhhjhKubeh}(h]h ]h"]h$]h&]hhjuh1j[jjhjhhhjhKubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jUhjhKhjhhubj)}(hhh]h)}(h Code Type.h]h Code Type.}(hj5 hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK!hj2 hhubah}(h]h ]h"]h$]h&]uh1jhjhhhjhKubeh}(h]h ](jenumeh"]h$]h&]jjjjM jjM jjjuh1jPhhhjhNhNubh container)}(h**Constants** ``XSDFEC_TURBO_CODE`` Driver is configured for Turbo mode. ``XSDFEC_LDPC_CODE`` Driver is configured for LDPC mode.h](h)}(h **Constants**h]j)}(hjY h]h Constants}(hj[ hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjW ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK%hjS ubj)}(hhh](j)}(h;``XSDFEC_TURBO_CODE`` Driver is configured for Turbo mode. h](j)}(h``XSDFEC_TURBO_CODE``h]j)}(hjx h]hXSDFEC_TURBO_CODE}(hjz hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjv ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK(hjr ubj)}(hhh]h)}(h$Driver is configured for Turbo mode.h]h$Driver is configured for Turbo mode.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hK(hj ubah}(h]h ]h"]h$]h&]uh1jhjr ubeh}(h]h ]h"]h$]h&]uh1jhj hK(hjo ubj)}(h8``XSDFEC_LDPC_CODE`` Driver is configured for LDPC mode.h](j)}(h``XSDFEC_LDPC_CODE``h]j)}(hj h]hXSDFEC_LDPC_CODE}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK*hj ubj)}(hhh]h)}(h#Driver is configured for LDPC mode.h]h#Driver is configured for LDPC mode.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK+hj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hK*hjo ubeh}(h]h ]h"]h$]h&]uh1jhjS ubeh}(h]h ] kernelindentah"]h$]h&]uh1jQ hjhhhNhNubh)}(h**Description**h]j)}(hj h]h Description}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK.hjhhubh)}(hThis enum is used to indicate the mode of the driver. The mode is determined by checking which codes are set in the driver. Note that the mode cannot be changed by the driver.h]hThis enum is used to indicate the mode of the driver. The mode is determined by checking which codes are set in the driver. Note that the mode cannot be changed by the driver.}(hj !hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK%hjhhubj@)}(hhh]h}(h]h ]h"]h$]h&]entries](jLxsdfec_order (C enum)c.xsdfec_orderhNtauh1j?hjhhhNhNubjQ)}(hhh](jV)}(h xsdfec_orderh]j\)}(henum xsdfec_orderh](j)}(hjh]henum}(hj2!hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj.!hhhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK,ubj)}(h h]h }(hj@!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj.!hhhj?!hK,ubjb)}(h xsdfec_orderh]jh)}(hj,!h]h xsdfec_order}(hjR!hhhNhNubah}(h]h ]jsah"]h$]h&]uh1jghjN!ubah}(h]h ](jzj{eh"]h$]h&]hhuh1jahj.!hhhj?!hK,ubeh}(h]h ]h"]h$]h&]hhjuh1j[jjhj*!hhhj?!hK,ubah}(h]j%!ah ](jjeh"]h$]h&]jj)jhuh1jUhj?!hK,hj'!hhubj)}(hhh]h)}(hOrderh]hOrder}(hjt!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK/hjq!hhubah}(h]h ]h"]h$]h&]uh1jhj'!hhhj?!hK,ubeh}(h]h ](jenumeh"]h$]h&]jjjj!jj!jjjuh1jPhhhjhNhNubjR )}(h**Constants** ``XSDFEC_MAINTAIN_ORDER`` Maintain order execution of blocks. ``XSDFEC_OUT_OF_ORDER`` Out-of-order execution of blocks.h](h)}(h **Constants**h]j)}(hj!h]h Constants}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj!ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK3hj!ubj)}(hhh](j)}(h>``XSDFEC_MAINTAIN_ORDER`` Maintain order execution of blocks. h](j)}(h``XSDFEC_MAINTAIN_ORDER``h]j)}(hj!h]hXSDFEC_MAINTAIN_ORDER}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj!ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK6hj!ubj)}(hhh]h)}(h#Maintain order execution of blocks.h]h#Maintain order execution of blocks.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hK6hj!ubah}(h]h ]h"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]uh1jhj!hK6hj!ubj)}(h9``XSDFEC_OUT_OF_ORDER`` Out-of-order execution of blocks.h](j)}(h``XSDFEC_OUT_OF_ORDER``h]j)}(hj!h]hXSDFEC_OUT_OF_ORDER}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj!ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK8hj!ubj)}(hhh]h)}(h!Out-of-order execution of blocks.h]h!Out-of-order execution of blocks.}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK9hj"ubah}(h]h ]h"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]uh1jhj"hK8hj!ubeh}(h]h ]h"]h$]h&]uh1jhj!ubeh}(h]h ] kernelindentah"]h$]h&]uh1jQ hjhhhNhNubh)}(h**Description**h]j)}(hj1"h]h Description}(hj3"hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj/"ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK'h]hxsdfec_axis_word_include}(hjd'hhhNhNubah}(h]h ]jsah"]h$]h&]uh1jghj`'ubah}(h]h ](jzj{eh"]h$]h&]hhuh1jahj@'hhhjQ'hKjubeh}(h]h ]h"]h$]h&]hhjuh1j[jjhj<'hhhjQ'hKjubah}(h]j7'ah ](jjeh"]h$]h&]jj)jhuh1jUhjQ'hKjhj9'hhubj)}(hhh]h)}(hWords Configuration.h]hWords Configuration.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKnhj'hhubah}(h]h ]h"]h$]h&]uh1jhj9'hhhjQ'hKjubeh}(h]h ](jenumeh"]h$]h&]jjjj'jj'jjjuh1jPhhhjhNhNubjR )}(hX`**Constants** ``XSDFEC_FIXED_VALUE`` Fixed, the DIN_WORDS AXI4-Stream interface is removed from the IP instance and is driven with the specified number of words. ``XSDFEC_IN_BLOCK`` In Block, configures the IP instance to expect a single DIN_WORDS value per input code block. The DIN_WORDS interface is present. ``XSDFEC_PER_AXI_TRANSACTION`` Per Transaction, configures the IP instance to expect one DIN_WORDS value per input transaction on the DIN interface. The DIN_WORDS interface is present. ``XSDFEC_AXIS_WORDS_INCLUDE_MAX`` Used to indicate out of bound Words Configurations.h](h)}(h **Constants**h]j)}(hj'h]h Constants}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj'ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKrhj'ubj)}(hhh](j)}(h``XSDFEC_FIXED_VALUE`` Fixed, the DIN_WORDS AXI4-Stream interface is removed from the IP instance and is driven with the specified number of words. h](j)}(h``XSDFEC_FIXED_VALUE``h]j)}(hj'h]hXSDFEC_FIXED_VALUE}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj'ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKwhj'ubj)}(hhh]h)}(h|Fixed, the DIN_WORDS AXI4-Stream interface is removed from the IP instance and is driven with the specified number of words.h]h|Fixed, the DIN_WORDS AXI4-Stream interface is removed from the IP instance and is driven with the specified number of words.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKuhj'ubah}(h]h ]h"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]uh1jhj'hKwhj'ubj)}(h``XSDFEC_IN_BLOCK`` In Block, configures the IP instance to expect a single DIN_WORDS value per input code block. The DIN_WORDS interface is present. h](j)}(h``XSDFEC_IN_BLOCK``h]j)}(hj(h]hXSDFEC_IN_BLOCK}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj'ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK|hj'ubj)}(hhh]h)}(hIn Block, configures the IP instance to expect a single DIN_WORDS value per input code block. The DIN_WORDS interface is present.h]hIn Block, configures the IP instance to expect a single DIN_WORDS value per input code block. The DIN_WORDS interface is present.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKzhj(ubah}(h]h ]h"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]uh1jhj(hK|hj'ubj)}(h``XSDFEC_PER_AXI_TRANSACTION`` Per Transaction, configures the IP instance to expect one DIN_WORDS value per input transaction on the DIN interface. The DIN_WORDS interface is present. h](j)}(h``XSDFEC_PER_AXI_TRANSACTION``h]j)}(hj;(h]hXSDFEC_PER_AXI_TRANSACTION}(hj=(hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj9(ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj5(ubj)}(hhh]h)}(hPer Transaction, configures the IP instance to expect one DIN_WORDS value per input transaction on the DIN interface. The DIN_WORDS interface is present.h]hPer Transaction, configures the IP instance to expect one DIN_WORDS value per input transaction on the DIN interface. The DIN_WORDS interface is present.}(hjT(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjQ(ubah}(h]h ]h"]h$]h&]uh1jhj5(ubeh}(h]h ]h"]h$]h&]uh1jhjP(hKhj'ubj)}(hU``XSDFEC_AXIS_WORDS_INCLUDE_MAX`` Used to indicate out of bound Words Configurations.h](j)}(h!``XSDFEC_AXIS_WORDS_INCLUDE_MAX``h]j)}(hju(h]hXSDFEC_AXIS_WORDS_INCLUDE_MAX}(hjw(hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjs(ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjo(ubj)}(hhh]h)}(h3Used to indicate out of bound Words Configurations.h]h3Used to indicate out of bound Words Configurations.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(hKhj(ubah}(h]h ]h"]h$]h&]uh1jhjo(ubeh}(h]h ]h"]h$]h&]uh1jhj(hKhj'ubeh}(h]h ]h"]h$]h&]uh1jhj'ubeh}(h]h ] kernelindentah"]h$]h&]uh1jQ hjhhhNhNubh)}(h**Description**h]j)}(hj(h]h Description}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj(ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjhhubh)}(h9This enum is used to specify the DIN_WORDS configuration.h]h9This enum is used to specify the DIN_WORDS configuration.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK{hjhhubj@)}(hhh]h}(h]h ]h"]h$]h&]entries](jLxsdfec_turbo (C struct)c.xsdfec_turbohNtauh1j?hjhhhNhNubjQ)}(hhh](jV)}(h xsdfec_turboh]j\)}(hstruct xsdfec_turboh](j)}(hstructh]hstruct}(hj(hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj(hhhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKubj)}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj(hhhj)hKubjb)}(h xsdfec_turboh]jh)}(hj(h]h xsdfec_turbo}(hj)hhhNhNubah}(h]h ]jsah"]h$]h&]uh1jghj)ubah}(h]h ](jzj{eh"]h$]h&]hhuh1jahj(hhhj)hKubeh}(h]h ]h"]h$]h&]hhjuh1j[jjhj(hhhj)hKubah}(h]j(ah ](jjeh"]h$]h&]jj)jhuh1jUhj)hKhj(hhubj)}(hhh]h)}(hUser data for Turbo codes.h]hUser data for Turbo codes.}(hj8)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj5)hhubah}(h]h ]h"]h$]h&]uh1jhj(hhhj)hKubeh}(h]h ](jstructeh"]h$]h&]jjjjP)jjP)jjjuh1jPhhhjhNhNubjR )}(h**Definition**:: struct xsdfec_turbo { __u32 alg; __u8 scale; }; **Members** ``alg`` Specifies which Turbo decode algorithm to use ``scale`` Specifies the extrinsic scaling to apply when the Max Scale algorithm has been selectedh](h)}(h**Definition**::h](j)}(h**Definition**h]h Definition}(hj\)hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjX)ubh:}(hjX)hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjT)ubh literal_block)}(h7struct xsdfec_turbo { __u32 alg; __u8 scale; };h]h7struct xsdfec_turbo { __u32 alg; __u8 scale; };}hjw)sbah}(h]h ]h"]h$]h&]hhuh1ju)hk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjT)ubh)}(h **Members**h]j)}(hj)h]hMembers}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj)ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjT)ubj)}(hhh](j)}(h6``alg`` Specifies which Turbo decode algorithm to use h](j)}(h``alg``h]j)}(hj)h]halg}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj)ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj)ubj)}(hhh]h)}(h-Specifies which Turbo decode algorithm to useh]h-Specifies which Turbo decode algorithm to use}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj)hKhj)ubah}(h]h ]h"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]uh1jhj)hKhj)ubj)}(ha``scale`` Specifies the extrinsic scaling to apply when the Max Scale algorithm has been selectedh](j)}(h ``scale``h]j)}(hj)h]hscale}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj)ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj)ubj)}(hhh]h)}(hWSpecifies the extrinsic scaling to apply when the Max Scale algorithm has been selectedh]hWSpecifies the extrinsic scaling to apply when the Max Scale algorithm has been selected}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj)hKhj)ubah}(h]h ]h"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]uh1jhj)hKhj)ubeh}(h]h ]h"]h$]h&]uh1jhjT)ubeh}(h]h ] kernelindentah"]h$]h&]uh1jQ hjhhhNhNubh)}(h**Description**h]j)}(hj"*h]h Description}(hj$*hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj *ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjhhubh)}(h@Turbo code structure to communicate parameters to XSDFEC driver.h]h@Turbo code structure to communicate parameters to XSDFEC driver.}(hj8*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjhhubj@)}(hhh]h}(h]h ]h"]h$]h&]entries](jLxsdfec_ldpc_params (C struct)c.xsdfec_ldpc_paramshNtauh1j?hjhhhNhNubjQ)}(hhh](jV)}(hxsdfec_ldpc_paramsh]j\)}(hstruct xsdfec_ldpc_paramsh](j)}(hj(h]hstruct}(hj`*hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj\*hhhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKubj)}(h h]h }(hjn*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj\*hhhjm*hKubjb)}(hxsdfec_ldpc_paramsh]jh)}(hjZ*h]hxsdfec_ldpc_params}(hj*hhhNhNubah}(h]h ]jsah"]h$]h&]uh1jghj|*ubah}(h]h ](jzj{eh"]h$]h&]hhuh1jahj\*hhhjm*hKubeh}(h]h ]h"]h$]h&]hhjuh1j[jjhjX*hhhjm*hKubah}(h]jS*ah ](jjeh"]h$]h&]jj)jhuh1jUhjm*hKhjU*hhubj)}(hhh]h)}(hUser data for LDPC codes.h]hUser data for LDPC codes.}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj*hhubah}(h]h ]h"]h$]h&]uh1jhjU*hhhjm*hKubeh}(h]h ](jstructeh"]h$]h&]jjjj*jj*jjjuh1jPhhhjhNhNubjR )}(hX<**Definition**:: struct xsdfec_ldpc_params { __u32 n; __u32 k; __u32 psize; __u32 nlayers; __u32 nqc; __u32 nmqc; __u32 nm; __u32 norm_type; __u32 no_packing; __u32 special_qc; __u32 no_final_parity; __u32 max_schedule; __u32 sc_off; __u32 la_off; __u32 qc_off; __u32 *sc_table; __u32 *la_table; __u32 *qc_table; __u16 code_id; }; **Members** ``n`` Number of code word bits ``k`` Number of information bits ``psize`` Size of sub-matrix ``nlayers`` Number of layers in code ``nqc`` Quasi Cyclic Number ``nmqc`` Number of M-sized QC operations in parity check matrix ``nm`` Number of M-size vectors in N ``norm_type`` Normalization required or not ``no_packing`` Determines if multiple QC ops should be performed ``special_qc`` Sub-Matrix property for Circulant weight > 0 ``no_final_parity`` Decide if final parity check needs to be performed ``max_schedule`` Experimental code word scheduling limit ``sc_off`` SC offset ``la_off`` LA offset ``qc_off`` QC offset ``sc_table`` Pointer to SC Table which must be page aligned ``la_table`` Pointer to LA Table which must be page aligned ``qc_table`` Pointer to QC Table which must be page aligned ``code_id`` LDPC Codeh](h)}(h**Definition**::h](j)}(h**Definition**h]h Definition}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj*ubh:}(hj*hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj*ubjv))}(hXstruct xsdfec_ldpc_params { __u32 n; __u32 k; __u32 psize; __u32 nlayers; __u32 nqc; __u32 nmqc; __u32 nm; __u32 norm_type; __u32 no_packing; __u32 special_qc; __u32 no_final_parity; __u32 max_schedule; __u32 sc_off; __u32 la_off; __u32 qc_off; __u32 *sc_table; __u32 *la_table; __u32 *qc_table; __u16 code_id; };h]hXstruct xsdfec_ldpc_params { __u32 n; __u32 k; __u32 psize; __u32 nlayers; __u32 nqc; __u32 nmqc; __u32 nm; __u32 norm_type; __u32 no_packing; __u32 special_qc; __u32 no_final_parity; __u32 max_schedule; __u32 sc_off; __u32 la_off; __u32 qc_off; __u32 *sc_table; __u32 *la_table; __u32 *qc_table; __u16 code_id; };}hj*sbah}(h]h ]h"]h$]h&]hhuh1ju)hk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj*ubh)}(h **Members**h]j)}(hj*h]hMembers}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj*ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj*ubj)}(hhh](j)}(h``n`` Number of code word bits h](j)}(h``n``h]j)}(hj+h]hn}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj +ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj +ubj)}(hhh]h)}(hNumber of code word bitsh]hNumber of code word bits}(hj(+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$+hKhj%+ubah}(h]h ]h"]h$]h&]uh1jhj +ubeh}(h]h ]h"]h$]h&]uh1jhj$+hKhj+ubj)}(h!``k`` Number of information bits h](j)}(h``k``h]j)}(hjH+h]hk}(hjJ+hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjF+ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjB+ubj)}(hhh]h)}(hNumber of information bitsh]hNumber of information bits}(hja+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]+hKhj^+ubah}(h]h ]h"]h$]h&]uh1jhjB+ubeh}(h]h ]h"]h$]h&]uh1jhj]+hKhj+ubj)}(h``psize`` Size of sub-matrix h](j)}(h ``psize``h]j)}(hj+h]hpsize}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj+ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj{+ubj)}(hhh]h)}(hSize of sub-matrixh]hSize of sub-matrix}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+hKhj+ubah}(h]h ]h"]h$]h&]uh1jhj{+ubeh}(h]h ]h"]h$]h&]uh1jhj+hKhj+ubj)}(h%``nlayers`` Number of layers in code h](j)}(h ``nlayers``h]j)}(hj+h]hnlayers}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj+ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj+ubj)}(hhh]h)}(hNumber of layers in codeh]hNumber of layers in code}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+hKhj+ubah}(h]h ]h"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]uh1jhj+hKhj+ubj)}(h``nqc`` Quasi Cyclic Number h](j)}(h``nqc``h]j)}(hj+h]hnqc}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj+ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj+ubj)}(hhh]h)}(hQuasi Cyclic Numberh]hQuasi Cyclic Number}(hj ,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hKhj ,ubah}(h]h ]h"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]uh1jhj,hKhj+ubj)}(h@``nmqc`` Number of M-sized QC operations in parity check matrix h](j)}(h``nmqc``h]j)}(hj,,h]hnmqc}(hj.,hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj*,ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj&,ubj)}(hhh]h)}(h6Number of M-sized QC operations in parity check matrixh]h6Number of M-sized QC operations in parity check matrix}(hjE,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjA,hKhjB,ubah}(h]h ]h"]h$]h&]uh1jhj&,ubeh}(h]h ]h"]h$]h&]uh1jhjA,hKhj+ubj)}(h%``nm`` Number of M-size vectors in N h](j)}(h``nm``h]j)}(hje,h]hnm}(hjg,hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjc,ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj_,ubj)}(hhh]h)}(hNumber of M-size vectors in Nh]hNumber of M-size vectors in N}(hj~,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjz,hKhj{,ubah}(h]h ]h"]h$]h&]uh1jhj_,ubeh}(h]h ]h"]h$]h&]uh1jhjz,hKhj+ubj)}(h,``norm_type`` Normalization required or not h](j)}(h ``norm_type``h]j)}(hj,h]h norm_type}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj,ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj,ubj)}(hhh]h)}(hNormalization required or noth]hNormalization required or not}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hKhj,ubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jhj,hKhj+ubj)}(hA``no_packing`` Determines if multiple QC ops should be performed h](j)}(h``no_packing``h]j)}(hj,h]h no_packing}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj,ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj,ubj)}(hhh]h)}(h1Determines if multiple QC ops should be performedh]h1Determines if multiple QC ops should be performed}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hKhj,ubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jhj,hKhj+ubj)}(h<``special_qc`` Sub-Matrix property for Circulant weight > 0 h](j)}(h``special_qc``h]j)}(hj-h]h special_qc}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj-ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj -ubj)}(hhh]h)}(h,Sub-Matrix property for Circulant weight > 0h]h,Sub-Matrix property for Circulant weight > 0}(hj)-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj%-hKhj&-ubah}(h]h ]h"]h$]h&]uh1jhj -ubeh}(h]h ]h"]h$]h&]uh1jhj%-hKhj+ubj)}(hG``no_final_parity`` Decide if final parity check needs to be performed h](j)}(h``no_final_parity``h]j)}(hjI-h]hno_final_parity}(hjK-hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjG-ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjC-ubj)}(hhh]h)}(h2Decide if final parity check needs to be performedh]h2Decide if final parity check needs to be performed}(hjb-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj^-hKhj_-ubah}(h]h ]h"]h$]h&]uh1jhjC-ubeh}(h]h ]h"]h$]h&]uh1jhj^-hKhj+ubj)}(h9``max_schedule`` Experimental code word scheduling limit h](j)}(h``max_schedule``h]j)}(hj-h]h max_schedule}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj-ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj|-ubj)}(hhh]h)}(h'Experimental code word scheduling limith]h'Experimental code word scheduling limit}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hKhj-ubah}(h]h ]h"]h$]h&]uh1jhj|-ubeh}(h]h ]h"]h$]h&]uh1jhj-hKhj+ubj)}(h``sc_off`` SC offset h](j)}(h ``sc_off``h]j)}(hj-h]hsc_off}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj-ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj-ubj)}(hhh]h)}(h SC offseth]h SC offset}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hKhj-ubah}(h]h ]h"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]uh1jhj-hKhj+ubj)}(h``la_off`` LA offset h](j)}(h ``la_off``h]j)}(hj-h]hla_off}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj-ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj-ubj)}(hhh]h)}(h LA offseth]h LA offset}(hj .hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj .hKhj .ubah}(h]h ]h"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]uh1jhj .hKhj+ubj)}(h``qc_off`` QC offset h](j)}(h ``qc_off``h]j)}(hj-.h]hqc_off}(hj/.hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj+.ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj'.ubj)}(hhh]h)}(h QC offseth]h QC offset}(hjF.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjB.hKhjC.ubah}(h]h ]h"]h$]h&]uh1jhj'.ubeh}(h]h ]h"]h$]h&]uh1jhjB.hKhj+ubj)}(h<``sc_table`` Pointer to SC Table which must be page aligned h](j)}(h ``sc_table``h]j)}(hjf.h]hsc_table}(hjh.hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjd.ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj`.ubj)}(hhh]h)}(h.Pointer to SC Table which must be page alignedh]h.Pointer to SC Table which must be page aligned}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj{.hKhj|.ubah}(h]h ]h"]h$]h&]uh1jhj`.ubeh}(h]h ]h"]h$]h&]uh1jhj{.hKhj+ubj)}(h<``la_table`` Pointer to LA Table which must be page aligned h](j)}(h ``la_table``h]j)}(hj.h]hla_table}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj.ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj.ubj)}(hhh]h)}(h.Pointer to LA Table which must be page alignedh]h.Pointer to LA Table which must be page aligned}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.hKhj.ubah}(h]h ]h"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]uh1jhj.hKhj+ubj)}(h<``qc_table`` Pointer to QC Table which must be page aligned h](j)}(h ``qc_table``h]j)}(hj.h]hqc_table}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj.ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj.ubj)}(hhh]h)}(h.Pointer to QC Table which must be page alignedh]h.Pointer to QC Table which must be page aligned}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.hKhj.ubah}(h]h ]h"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]uh1jhj.hKhj+ubj)}(h``code_id`` LDPC Codeh](j)}(h ``code_id``h]j)}(hj/h]hcode_id}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj/ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj /ubj)}(hhh]h)}(h LDPC Codeh]h LDPC Code}(hj*/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj'/ubah}(h]h ]h"]h$]h&]uh1jhj /ubeh}(h]h ]h"]h$]h&]uh1jhj&/hKhj+ubeh}(h]h ]h"]h$]h&]uh1jhj*ubeh}(h]h ] kernelindentah"]h$]h&]uh1jQ hjhhhNhNubh)}(h**Description**h]j)}(hjT/h]h Description}(hjV/hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjR/ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjhhubh)}(hWThis structure describes the LDPC code that is passed to the driver by the application.h]hWThis structure describes the LDPC code that is passed to the driver by the application.}(hjj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjhhubj@)}(hhh]h}(h]h ]h"]h$]h&]entries](jLxsdfec_status (C struct)c.xsdfec_statushNtauh1j?hjhhhNhNubjQ)}(hhh](jV)}(h xsdfec_statush]j\)}(hstruct xsdfec_statush](j)}(hj(h]hstruct}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj/hhhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKubj)}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj/hhhj/hKubjb)}(h xsdfec_statush]jh)}(hj/h]h xsdfec_status}(hj/hhhNhNubah}(h]h ]jsah"]h$]h&]uh1jghj/ubah}(h]h ](jzj{eh"]h$]h&]hhuh1jahj/hhhj/hKubeh}(h]h ]h"]h$]h&]hhjuh1j[jjhj/hhhj/hKubah}(h]j/ah ](jjeh"]h$]h&]jj)jhuh1jUhj/hKhj/hhubj)}(hhh]h)}(hStatus of SD-FEC core.h]hStatus of SD-FEC core.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj/hhubah}(h]h ]h"]h$]h&]uh1jhj/hhhj/hKubeh}(h]h ](jstructeh"]h$]h&]jjjj/jj/jjjuh1jPhhhjhNhNubjR )}(h**Definition**:: struct xsdfec_status { __u32 state; __s8 activity; }; **Members** ``state`` State of the SD-FEC core ``activity`` Describes if the SD-FEC instance is Activeh](h)}(h**Definition**::h](j)}(h**Definition**h]h Definition}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj/ubh:}(hj/hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj/ubjv))}(h=struct xsdfec_status { __u32 state; __s8 activity; };h]h=struct xsdfec_status { __u32 state; __s8 activity; };}hj0sbah}(h]h ]h"]h$]h&]hhuh1ju)hk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj/ubh)}(h **Members**h]j)}(hj"0h]hMembers}(hj$0hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj 0ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj/ubj)}(hhh](j)}(h#``state`` State of the SD-FEC core h](j)}(h ``state``h]j)}(hjA0h]hstate}(hjC0hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj?0ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj;0ubj)}(hhh]h)}(hState of the SD-FEC coreh]hState of the SD-FEC core}(hjZ0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjV0hKhjW0ubah}(h]h ]h"]h$]h&]uh1jhj;0ubeh}(h]h ]h"]h$]h&]uh1jhjV0hKhj80ubj)}(h7``activity`` Describes if the SD-FEC instance is Activeh](j)}(h ``activity``h]j)}(hjz0h]hactivity}(hj|0hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjx0ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjt0ubj)}(hhh]h)}(h*Describes if the SD-FEC instance is Activeh]h*Describes if the SD-FEC instance is Active}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj0ubah}(h]h ]h"]h$]h&]uh1jhjt0ubeh}(h]h ]h"]h$]h&]uh1jhj0hKhj80ubeh}(h]h ]h"]h$]h&]uh1jhj/ubeh}(h]h ] kernelindentah"]h$]h&]uh1jQ hjhhhNhNubj@)}(hhh]h}(h]h ]h"]h$]h&]entries](jLxsdfec_irq (C struct) c.xsdfec_irqhNtauh1j?hjhhhNhNubjQ)}(hhh](jV)}(h xsdfec_irqh]j\)}(hstruct xsdfec_irqh](j)}(hj(h]hstruct}(hj0hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj0hhhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKubj)}(h h]h }(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj0hhhj0hKubjb)}(h xsdfec_irqh]jh)}(hj0h]h xsdfec_irq}(hj0hhhNhNubah}(h]h ]jsah"]h$]h&]uh1jghj0ubah}(h]h ](jzj{eh"]h$]h&]hhuh1jahj0hhhj0hKubeh}(h]h ]h"]h$]h&]hhjuh1j[jjhj0hhhj0hKubah}(h]j0ah ](jjeh"]h$]h&]jj)jhuh1jUhj0hKhj0hhubj)}(hhh]h)}(h!Enabling or Disabling Interrupts.h]h!Enabling or Disabling Interrupts.}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj1hhubah}(h]h ]h"]h$]h&]uh1jhj0hhhj0hKubeh}(h]h ](jstructeh"]h$]h&]jjjj.1jj.1jjjuh1jPhhhjhNhNubjR )}(h**Definition**:: struct xsdfec_irq { __s8 enable_isr; __s8 enable_ecc_isr; }; **Members** ``enable_isr`` If true enables the ISR ``enable_ecc_isr`` If true enables the ECC ISRh](h)}(h**Definition**::h](j)}(h**Definition**h]h Definition}(hj:1hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj61ubh:}(hj61hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj21ubjv))}(hDstruct xsdfec_irq { __s8 enable_isr; __s8 enable_ecc_isr; };h]hDstruct xsdfec_irq { __s8 enable_isr; __s8 enable_ecc_isr; };}hjS1sbah}(h]h ]h"]h$]h&]hhuh1ju)hk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj21ubh)}(h **Members**h]j)}(hjd1h]hMembers}(hjf1hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjb1ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj21ubj)}(hhh](j)}(h'``enable_isr`` If true enables the ISR h](j)}(h``enable_isr``h]j)}(hj1h]h enable_isr}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj1ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj}1ubj)}(hhh]h)}(hIf true enables the ISRh]hIf true enables the ISR}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj1hKhj1ubah}(h]h ]h"]h$]h&]uh1jhj}1ubeh}(h]h ]h"]h$]h&]uh1jhj1hKhjz1ubj)}(h.``enable_ecc_isr`` If true enables the ECC ISRh](j)}(h``enable_ecc_isr``h]j)}(hj1h]henable_ecc_isr}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj1ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj1ubj)}(hhh]h)}(hIf true enables the ECC ISRh]hIf true enables the ECC ISR}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj1ubah}(h]h ]h"]h$]h&]uh1jhj1ubeh}(h]h ]h"]h$]h&]uh1jhj1hKhjz1ubeh}(h]h ]h"]h$]h&]uh1jhj21ubeh}(h]h ] kernelindentah"]h$]h&]uh1jQ hjhhhNhNubj@)}(hhh]h}(h]h ]h"]h$]h&]entries](jLxsdfec_config (C struct)c.xsdfec_confighNtauh1j?hjhhhNhNubjQ)}(hhh](jV)}(h xsdfec_configh]j\)}(hstruct xsdfec_configh](j)}(hj(h]hstruct}(hj2hhhNhNubah}(h]h ]jah"]h$]h&]uh1jhj2hhhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKubj)}(h h]h }(hj$2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1jhj2hhhj#2hKubjb)}(h xsdfec_configh]jh)}(hj2h]h xsdfec_config}(hj62hhhNhNubah}(h]h ]jsah"]h$]h&]uh1jghj22ubah}(h]h ](jzj{eh"]h$]h&]hhuh1jahj2hhhj#2hKubeh}(h]h ]h"]h$]h&]hhjuh1j[jjhj2hhhj#2hKubah}(h]j 2ah ](jjeh"]h$]h&]jj)jhuh1jUhj#2hKhj 2hhubj)}(hhh]h)}(hConfiguration of SD-FEC core.h]hConfiguration of SD-FEC core.}(hjX2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjU2hhubah}(h]h ]h"]h$]h&]uh1jhj 2hhhj#2hKubeh}(h]h ](jstructeh"]h$]h&]jjjjp2jjp2jjjuh1jPhhhjhNhNubjR )}(hX**Definition**:: struct xsdfec_config { __u32 code; __u32 order; __u32 din_width; __u32 din_word_include; __u32 dout_width; __u32 dout_word_include; struct xsdfec_irq irq; __s8 bypass; __s8 code_wr_protect; }; **Members** ``code`` The codes being used by the SD-FEC instance ``order`` Order of Operation ``din_width`` Width of the DIN AXI4-Stream ``din_word_include`` How DIN_WORDS are inputted ``dout_width`` Width of the DOUT AXI4-Stream ``dout_word_include`` HOW DOUT_WORDS are outputted ``irq`` Enabling or disabling interrupts ``bypass`` Is the core being bypassed ``code_wr_protect`` Is write protection of LDPC codes enabledh](h)}(h**Definition**::h](j)}(h**Definition**h]h Definition}(hj|2hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjx2ubh:}(hjx2hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjt2ubjv))}(hstruct xsdfec_config { __u32 code; __u32 order; __u32 din_width; __u32 din_word_include; __u32 dout_width; __u32 dout_word_include; struct xsdfec_irq irq; __s8 bypass; __s8 code_wr_protect; };h]hstruct xsdfec_config { __u32 code; __u32 order; __u32 din_width; __u32 din_word_include; __u32 dout_width; __u32 dout_word_include; struct xsdfec_irq irq; __s8 bypass; __s8 code_wr_protect; };}hj2sbah}(h]h ]h"]h$]h&]hhuh1ju)hk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjt2ubh)}(h **Members**h]j)}(hj2h]hMembers}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj2ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjt2ubj)}(hhh](j)}(h5``code`` The codes being used by the SD-FEC instance h](j)}(h``code``h]j)}(hj2h]hcode}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj2ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj2ubj)}(hhh]h)}(h+The codes being used by the SD-FEC instanceh]h+The codes being used by the SD-FEC instance}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2hKhj2ubah}(h]h ]h"]h$]h&]uh1jhj2ubeh}(h]h ]h"]h$]h&]uh1jhj2hKhj2ubj)}(h``order`` Order of Operation h](j)}(h ``order``h]j)}(hj2h]horder}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj2ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj2ubj)}(hhh]h)}(hOrder of Operationh]hOrder of Operation}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj3hKhj3ubah}(h]h ]h"]h$]h&]uh1jhj2ubeh}(h]h ]h"]h$]h&]uh1jhj3hKhj2ubj)}(h+``din_width`` Width of the DIN AXI4-Stream h](j)}(h ``din_width``h]j)}(hj73h]h din_width}(hj93hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj53ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj13ubj)}(hhh]h)}(hWidth of the DIN AXI4-Streamh]hWidth of the DIN AXI4-Stream}(hjP3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjL3hKhjM3ubah}(h]h ]h"]h$]h&]uh1jhj13ubeh}(h]h ]h"]h$]h&]uh1jhjL3hKhj2ubj)}(h0``din_word_include`` How DIN_WORDS are inputted h](j)}(h``din_word_include``h]j)}(hjp3h]hdin_word_include}(hjr3hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjn3ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjj3ubj)}(hhh]h)}(hHow DIN_WORDS are inputtedh]hHow DIN_WORDS are inputted}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj3hKhj3ubah}(h]h ]h"]h$]h&]uh1jhjj3ubeh}(h]h ]h"]h$]h&]uh1jhj3hKhj2ubj)}(h-``dout_width`` Width of the DOUT AXI4-Stream h](j)}(h``dout_width``h]j)}(hj3h]h dout_width}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj3ubah}(h]h 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