sphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget-/translations/zh_CN/misc-devices/xilinx_sdfecmodnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget-/translations/zh_TW/misc-devices/xilinx_sdfecmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget-/translations/it_IT/misc-devices/xilinx_sdfecmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget-/translations/ja_JP/misc-devices/xilinx_sdfecmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget-/translations/ko_KR/misc-devices/xilinx_sdfecmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hPortuguese (Brazilian)}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget-/translations/pt_BR/misc-devices/xilinx_sdfecmodnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget-/translations/sp_SP/misc-devices/xilinx_sdfecmodnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhcomment)}(h!SPDX-License-Identifier: GPL-2.0+h]h!SPDX-License-Identifier: GPL-2.0+}hhsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1hhhhhhG/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec.rsthKubhsection)}(hhh](htitle)}(hXilinx SD-FEC Driverh]hXilinx SD-FEC Driver}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hOverviewh]hOverview}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhhhhKubh paragraph)}(hPThis driver supports SD-FEC Integrated Block for Zynq |Ultrascale+ (TM)| RFSoCs.h](h6This driver supports SD-FEC Integrated Block for Zynq }(hhhhhNhNubh Ultrascale+}(hhhhhNhNubh™}(hhhhhNhNubh RFSoCs.}(hhhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhK hhhhubhsubstitution_definition)}(hM.. |Ultrascale+ (TM)| unicode:: Ultrascale+ U+2122 .. with trademark sign h](h Ultrascale+}hj sbh™}hj sbeh}(h]h ]h"]Ultrascale+ (TM)ah$]h&]uh1j hhhK hhhhubh)}(hFor a full description of SD-FEC core features, see the `SD-FEC Product Guide (PG256) `_h](h8For a full description of SD-FEC core features, see the }(hjhhhNhNubh reference)}(h`SD-FEC Product Guide (PG256) `_h]hSD-FEC Product Guide (PG256)}(hj)hhhNhNubah}(h]h ]h"]h$]h&]nameSD-FEC Product Guide (PG256)refuri^https://www.xilinx.com/cgi-bin/docs/ipdoc?c=sd_fec;v=latest;d=pg256-sdfec-integrated-block.pdfuh1j'hjubhtarget)}(ha h]h}(h]sd-fec-product-guide-pg256ah ]h"]sd-fec product guide (pg256)ah$]h&]refurij:uh1j; referencedKhjubeh}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(h,This driver supports the following features:h]h,This driver supports the following features:}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh block_quote)}(h- Retrieval of the Integrated Block configuration and status information - Configuration of LDPC codes - Configuration of Turbo decoding - Monitoring errors h]h bullet_list)}(hhh](h list_item)}(hFRetrieval of the Integrated Block configuration and status informationh]h)}(hjnh]hFRetrieval of the Integrated Block configuration and status information}(hjphhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjlubah}(h]h ]h"]h$]h&]uh1jjhjgubjk)}(hConfiguration of LDPC codesh]h)}(hjh]hConfiguration of LDPC codes}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jjhjgubjk)}(hConfiguration of Turbo decodingh]h)}(hjh]hConfiguration of Turbo decoding}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jjhjgubjk)}(hMonitoring errors h]h)}(hMonitoring errorsh]hMonitoring errors}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jjhjgubeh}(h]h ]h"]h$]h&]bullet-uh1jehhhKhjaubah}(h]h ]h"]h$]h&]uh1j_hhhKhhhhubh)}(hTMissing features, known issues, and limitations of the SD-FEC driver are as follows:h]hTMissing features, known issues, and limitations of the SD-FEC driver are as follows:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubj`)}(h- Only allows a single open file handler to any instance of the driver at any time - Reset of the SD-FEC Integrated Block is not controlled by this driver - Does not support shared LDPC code table wraparound h]jf)}(hhh](jk)}(hPOnly allows a single open file handler to any instance of the driver at any timeh]h)}(hjh]hPOnly allows a single open file handler to any instance of the driver at any time}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(hEReset of the SD-FEC Integrated Block is not controlled by this driverh]h)}(hjh]hEReset of the SD-FEC Integrated Block is not controlled by this driver}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(h3Does not support shared LDPC code table wraparound h]h)}(h2Does not support shared LDPC code table wraparoundh]h2Does not support shared LDPC code table wraparound}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jjhjubeh}(h]h ]h"]h$]h&]jjuh1jehhhKhjubah}(h]h ]h"]h$]h&]uh1j_hhhKhhhhubh)}(hThe device tree entry is described in: `linux-xlnx/Documentation/devicetree/bindings/misc/xlnx,sd-fec.yaml `_h](h'The device tree entry is described in: }(hj>hhhNhNubj()}(h`linux-xlnx/Documentation/devicetree/bindings/misc/xlnx,sd-fec.yaml `_h]hBlinux-xlnx/Documentation/devicetree/bindings/misc/xlnx,sd-fec.yaml}(hjFhhhNhNubah}(h]h ]h"]h$]h&]nameBlinux-xlnx/Documentation/devicetree/bindings/misc/xlnx,sd-fec.yamlj9jhttps://github.com/Xilinx/linux-xlnx/blob/master/Documentation/devicetree/bindings/misc/xlnx%2Csd-fec.yamluh1j'hj>ubj<)}(hm h]h}(h]Blinux-xlnx-documentation-devicetree-bindings-misc-xlnx-sd-fec-yamlah ]h"]Blinux-xlnx/documentation/devicetree/bindings/misc/xlnx,sd-fec.yamlah$]h&]refurijVuh1j;jJKhj>ubeh}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hhh](h)}(hModes of Operationh]hModes of Operation}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjjhhhhhK$ubh)}(h@The driver works with the SD-FEC core in two modes of operation:h]h@The driver works with the SD-FEC core in two modes of operation:}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK&hjjhhubj`)}(hC- Run-time configuration - Programmable Logic (PL) initialization h]jf)}(hhh](jk)}(hRun-time configurationh]h)}(hjh]hRun-time configuration}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK(hjubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(h(Programmable Logic (PL) initialization h]h)}(h&Programmable Logic (PL) initializationh]h&Programmable Logic (PL) initialization}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK)hjubah}(h]h ]h"]h$]h&]uh1jjhjubeh}(h]h ]h"]h$]h&]jjuh1jehhhK(hjubah}(h]h ]h"]h$]h&]uh1j_hhhK(hjjhhubh)}(hhh](h)}(hRun-time Configurationh]hRun-time Configuration}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhK-ubh)}(hgFor Run-time configuration the role of driver is to allow the software application to do the following:h]hgFor Run-time configuration the role of driver is to allow the software application to do the following:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK/hjhhubj`)}(h- Load the configuration parameters for either Turbo decode or LDPC encode or decode - Activate the SD-FEC core - Monitor the SD-FEC core for errors - Retrieve the status and configuration of the SD-FEC core h]jf)}(hhh](jk)}(hRLoad the configuration parameters for either Turbo decode or LDPC encode or decodeh]h)}(hjh]hRLoad the configuration parameters for either Turbo decode or LDPC encode or decode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK1hjubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(hActivate the SD-FEC coreh]h)}(hj h]hActivate the SD-FEC core}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK2hjubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(h"Monitor the SD-FEC core for errorsh]h)}(hj!h]h"Monitor the SD-FEC core for errors}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK3hjubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(h9Retrieve the status and configuration of the SD-FEC core h]h)}(h8Retrieve the status and configuration of the SD-FEC coreh]h8Retrieve the status and configuration of the SD-FEC core}(hj:hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK4hj6ubah}(h]h ]h"]h$]h&]uh1jjhjubeh}(h]h ]h"]h$]h&]jjuh1jehhhK1hjubah}(h]h ]h"]h$]h&]uh1j_hhhK1hjhhubeh}(h]run-time-configurationah ]h"]run-time configurationah$]h&]uh1hhjjhhhhhK-ubh)}(hhh](h)}(h&Programmable Logic (PL) Initializationh]h&Programmable Logic (PL) Initialization}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhjbhhhhhK7ubh)}(hFor PL initialization, supporting logic loads configuration parameters for either the Turbo decode or LDPC encode or decode. The role of the driver is to allow the software application to do the following:h]hFor PL initialization, supporting logic loads configuration parameters for either the Turbo decode or LDPC encode or decode. The role of the driver is to allow the software application to do the following:}(hjshhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK9hjbhhubj`)}(h|- Activate the SD-FEC core - Monitor the SD-FEC core for errors - Retrieve the status and configuration of the SD-FEC core h]jf)}(hhh](jk)}(hActivate the SD-FEC coreh]h)}(hjh]hActivate the SD-FEC core}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK=hjubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(h"Monitor the SD-FEC core for errorsh]h)}(hjh]h"Monitor the SD-FEC core for errors}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK>hjubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(h:Retrieve the status and configuration of the SD-FEC core h]h)}(h8Retrieve the status and configuration of the SD-FEC coreh]h8Retrieve the status and configuration of the SD-FEC core}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK?hjubah}(h]h ]h"]h$]h&]uh1jjhjubeh}(h]h ]h"]h$]h&]jjuh1jehhhK=hjubah}(h]h ]h"]h$]h&]uh1j_hhhK=hjbhhubeh}(h]$programmable-logic-pl-initializationah ]h"]&programmable logic (pl) initializationah$]h&]uh1hhjjhhhhhK7ubeh}(h]modes-of-operationah ]h"]modes of operationah$]h&]uh1hhhhhhhhK$ubeh}(h]overviewah ]h"]h$]overviewah&]uh1hhhhhhhhKjJKubh)}(hhh](h)}(hDriver Structureh]hDriver Structure}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKCubh)}(haThe driver provides a platform device where the ``probe`` and ``remove`` operations are provided.h](h0The driver provides a platform device where the }(hjhhhNhNubhliteral)}(h ``probe``h]hprobe}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh and }(hjhhhNhNubj )}(h ``remove``h]hremove}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh operations are provided.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKEhjhhubj`)}(h- probe: Updates configuration register with device-tree entries plus determines the current activate state of the core, for example, is the core bypassed or has the core been started. h]jf)}(hhh]jk)}(hprobe: Updates configuration register with device-tree entries plus determines the current activate state of the core, for example, is the core bypassed or has the core been started. h]h)}(hprobe: Updates configuration register with device-tree entries plus determines the current activate state of the core, for example, is the core bypassed or has the core been started.h]hprobe: Updates configuration register with device-tree entries plus determines the current activate state of the core, for example, is the core bypassed or has the core been started.}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKHhj>ubah}(h]h ]h"]h$]h&]uh1jjhj;ubah}(h]h ]h"]h$]h&]jjuh1jehhhKHhj7ubah}(h]h ]h"]h$]h&]uh1j_hhhKHhjhhubh)}(h_The driver defines the following driver file operations to provide user application interfaces:h]h_The driver defines the following driver file operations to provide user application interfaces:}(hjbhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKKhjhhubj`)}(hX- open: Implements restriction that only a single file descriptor can be open per SD-FEC instance at any time - release: Allows another file descriptor to be open, that is after current file descriptor is closed - poll: Provides a method to monitor for SD-FEC Error events - unlocked_ioctl: Provides the following ioctl commands that allows the application configure the SD-FEC core: - :c:macro:`XSDFEC_START_DEV` - :c:macro:`XSDFEC_STOP_DEV` - :c:macro:`XSDFEC_GET_STATUS` - :c:macro:`XSDFEC_SET_IRQ` - :c:macro:`XSDFEC_SET_TURBO` - :c:macro:`XSDFEC_ADD_LDPC_CODE_PARAMS` - :c:macro:`XSDFEC_GET_CONFIG` - :c:macro:`XSDFEC_SET_ORDER` - :c:macro:`XSDFEC_SET_BYPASS` - :c:macro:`XSDFEC_IS_ACTIVE` - :c:macro:`XSDFEC_CLEAR_STATS` - :c:macro:`XSDFEC_SET_DEFAULT_CONFIG` h]jf)}(hhh](jk)}(hkopen: Implements restriction that only a single file descriptor can be open per SD-FEC instance at any timeh]h)}(hjyh]hkopen: Implements restriction that only a single file descriptor can be open per SD-FEC instance at any time}(hj{hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKNhjwubah}(h]h ]h"]h$]h&]uh1jjhjtubjk)}(hcrelease: Allows another file descriptor to be open, that is after current file descriptor is closedh]h)}(hjh]hcrelease: Allows another file descriptor to be open, that is after current file descriptor is closed}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKOhjubah}(h]h ]h"]h$]h&]uh1jjhjtubjk)}(h:poll: Provides a method to monitor for SD-FEC Error eventsh]h)}(hjh]h:poll: Provides a method to monitor for SD-FEC Error events}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKPhjubah}(h]h ]h"]h$]h&]uh1jjhjtubjk)}(hX}unlocked_ioctl: Provides the following ioctl commands that allows the application configure the SD-FEC core: - :c:macro:`XSDFEC_START_DEV` - :c:macro:`XSDFEC_STOP_DEV` - :c:macro:`XSDFEC_GET_STATUS` - :c:macro:`XSDFEC_SET_IRQ` - :c:macro:`XSDFEC_SET_TURBO` - :c:macro:`XSDFEC_ADD_LDPC_CODE_PARAMS` - :c:macro:`XSDFEC_GET_CONFIG` - :c:macro:`XSDFEC_SET_ORDER` - :c:macro:`XSDFEC_SET_BYPASS` - :c:macro:`XSDFEC_IS_ACTIVE` - :c:macro:`XSDFEC_CLEAR_STATS` - :c:macro:`XSDFEC_SET_DEFAULT_CONFIG` h](h)}(hlunlocked_ioctl: Provides the following ioctl commands that allows the application configure the SD-FEC core:h]hlunlocked_ioctl: Provides the following ioctl commands that allows the application configure the SD-FEC core:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKQhjubj`)}(hX- :c:macro:`XSDFEC_START_DEV` - :c:macro:`XSDFEC_STOP_DEV` - :c:macro:`XSDFEC_GET_STATUS` - :c:macro:`XSDFEC_SET_IRQ` - :c:macro:`XSDFEC_SET_TURBO` - :c:macro:`XSDFEC_ADD_LDPC_CODE_PARAMS` - :c:macro:`XSDFEC_GET_CONFIG` - :c:macro:`XSDFEC_SET_ORDER` - :c:macro:`XSDFEC_SET_BYPASS` - :c:macro:`XSDFEC_IS_ACTIVE` - :c:macro:`XSDFEC_CLEAR_STATS` - :c:macro:`XSDFEC_SET_DEFAULT_CONFIG` h]jf)}(hhh](jk)}(h:c:macro:`XSDFEC_START_DEV`h]h)}(hjh]h)}(hjh]j )}(hjh]hXSDFEC_START_DEV}(hjhhhNhNubah}(h]h ](xrefcc-macroeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocmisc-devices/xilinx_sdfec refdomainjreftypemacro refexplicitrefwarn reftargetXSDFEC_START_DEVuh1hhhhKShjubah}(h]h ]h"]h$]h&]uh1hhhhKShjubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(h:c:macro:`XSDFEC_STOP_DEV`h]h)}(hj h]h)}(hj h]j )}(hj h]hXSDFEC_STOP_DEV}(hjhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_STOP_DEVuh1hhhhKThjubah}(h]h ]h"]h$]h&]uh1hhhhKThj ubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(h:c:macro:`XSDFEC_GET_STATUS`h]h)}(hj=h]h)}(hj=h]j )}(hj=h]hXSDFEC_GET_STATUS}(hjEhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1j hjBubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_STATUSuh1hhhhKUhj?ubah}(h]h ]h"]h$]h&]uh1hhhhKUhj;ubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(h:c:macro:`XSDFEC_SET_IRQ`h]h)}(hjnh]h)}(hjnh]j )}(hjnh]hXSDFEC_SET_IRQ}(hjvhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1j hjsubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_SET_IRQuh1hhhhKVhjpubah}(h]h ]h"]h$]h&]uh1hhhhKVhjlubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(h:c:macro:`XSDFEC_SET_TURBO`h]h)}(hjh]h)}(hjh]j )}(hjh]hXSDFEC_SET_TURBO}(hjhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_SET_TURBOuh1hhhhKWhjubah}(h]h ]h"]h$]h&]uh1hhhhKWhjubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(h&:c:macro:`XSDFEC_ADD_LDPC_CODE_PARAMS`h]h)}(hjh]h)}(hjh]j )}(hjh]hXSDFEC_ADD_LDPC_CODE_PARAMS}(hjhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_ADD_LDPC_CODE_PARAMSuh1hhhhKXhjubah}(h]h ]h"]h$]h&]uh1hhhhKXhjubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(h:c:macro:`XSDFEC_GET_CONFIG`h]h)}(hjh]h)}(hjh]j )}(hjh]hXSDFEC_GET_CONFIG}(hj hhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_CONFIGuh1hhhhKYhjubah}(h]h ]h"]h$]h&]uh1hhhhKYhjubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(h:c:macro:`XSDFEC_SET_ORDER`h]h)}(hj2h]h)}(hj2h]j )}(hj2h]hXSDFEC_SET_ORDER}(hj:hhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1j hj7ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_SET_ORDERuh1hhhhKZhj4ubah}(h]h ]h"]h$]h&]uh1hhhhKZhj0ubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(h:c:macro:`XSDFEC_SET_BYPASS`h]h)}(hjch]h)}(hjch]j )}(hjch]hXSDFEC_SET_BYPASS}(hjkhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1j hjhubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_SET_BYPASSuh1hhhhK[hjeubah}(h]h ]h"]h$]h&]uh1hhhhK[hjaubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(h:c:macro:`XSDFEC_IS_ACTIVE`h]h)}(hjh]h)}(hjh]j )}(hjh]hXSDFEC_IS_ACTIVE}(hjhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_IS_ACTIVEuh1hhhhK\hjubah}(h]h ]h"]h$]h&]uh1hhhhK\hjubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(h:c:macro:`XSDFEC_CLEAR_STATS`h]h)}(hjh]h)}(hjh]j )}(hjh]hXSDFEC_CLEAR_STATS}(hjhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_CLEAR_STATSuh1hhhhK]hjubah}(h]h ]h"]h$]h&]uh1hhhhK]hjubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(h&:c:macro:`XSDFEC_SET_DEFAULT_CONFIG` h]h)}(h$:c:macro:`XSDFEC_SET_DEFAULT_CONFIG`h]h)}(hjh]j )}(hjh]hXSDFEC_SET_DEFAULT_CONFIG}(hjhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_SET_DEFAULT_CONFIGuh1hhhhK^hjubah}(h]h ]h"]h$]h&]uh1hhhhK^hjubah}(h]h ]h"]h$]h&]uh1jjhjubeh}(h]h ]h"]h$]h&]jjuh1jehhhKShjubah}(h]h ]h"]h$]h&]uh1j_hhhKShjubeh}(h]h ]h"]h$]h&]uh1jjhjtubeh}(h]h ]h"]h$]h&]jjuh1jehhhKNhjpubah}(h]h ]h"]h$]h&]uh1j_hhhKNhjhhubeh}(h]driver-structureah ]h"]driver structureah$]h&]uh1hhhhhhhhKCubh)}(hhh](h)}(h Driver Usageh]h Driver Usage}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjLhhhhhKbubh)}(hhh](h)}(hOverviewh]hOverview}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj]hhhhhKfubh)}(hAfter opening the driver, the user should find out what operations need to be performed to configure and activate the SD-FEC core and determine the configuration of the driver. The following outlines the flow the user should perform:h]hAfter opening the driver, the user should find out what operations need to be performed to configure and activate the SD-FEC core and determine the configuration of the driver. The following outlines the flow the user should perform:}(hjnhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhj]hhubj`)}(hX- Determine Configuration - Set the order, if not already configured as desired - Set Turbo decode, LPDC encode or decode parameters, depending on how the SD-FEC core is configured plus if the SD-FEC has not been configured for PL initialization - Enable interrupts, if not already enabled - Bypass the SD-FEC core, if required - Start the SD-FEC core if not already started - Get the SD-FEC core status - Monitor for interrupts - Stop the SD-FEC core h]jf)}(hhh](jk)}(hDetermine Configurationh]h)}(hjh]hDetermine Configuration}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKmhjubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(h3Set the order, if not already configured as desiredh]h)}(hjh]h3Set the order, if not already configured as desired}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKnhjubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(hSet Turbo decode, LPDC encode or decode parameters, depending on how the SD-FEC core is configured plus if the SD-FEC has not been configured for PL initializationh]h)}(hSet Turbo decode, LPDC encode or decode parameters, depending on how the SD-FEC core is configured plus if the SD-FEC has not been configured for PL initializationh]hSet Turbo decode, LPDC encode or decode parameters, depending on how the SD-FEC core is configured plus if the SD-FEC has not been configured for PL initialization}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKohjubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(h)Enable interrupts, if not already enabledh]h)}(hjh]h)Enable interrupts, if not already enabled}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKrhjubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(h#Bypass the SD-FEC core, if requiredh]h)}(hjh]h#Bypass the SD-FEC core, if required}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKshjubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(h,Start the SD-FEC core if not already startedh]h)}(hjh]h,Start the SD-FEC core if not already started}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKthjubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(hGet the SD-FEC core statush]h)}(hjh]hGet the SD-FEC core status}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKuhjubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(hMonitor for interruptsh]h)}(hj'h]hMonitor for interrupts}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKvhj%ubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(hStop the SD-FEC core h]h)}(hStop the SD-FEC coreh]hStop the SD-FEC core}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKwhj<ubah}(h]h ]h"]h$]h&]uh1jjhjubeh}(h]h ]h"]h$]h&]jjuh1jehhhKmhj|ubah}(h]h ]h"]h$]h&]uh1j_hhhKmhj]hhubh)}(hNote: When monitoring for interrupts if a critical error is detected where a reset is required, the driver will be required to load the default configuration.h]hNote: When monitoring for interrupts if a critical error is detected where a reset is required, the driver will be required to load the default configuration.}(hj`hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKzhj]hhubeh}(h]id1ah ]h"]h$]jah&]uh1hhjLhhhhhKfjJKubh)}(hhh](h)}(hDetermine Configurationh]hDetermine Configuration}(hjxhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjuhhhhhK~ubh)}(h_Determine the configuration of the SD-FEC core by using the ioctl :c:macro:`XSDFEC_GET_CONFIG`.h](hBDetermine the configuration of the SD-FEC core by using the ioctl }(hjhhhNhNubh)}(h:c:macro:`XSDFEC_GET_CONFIG`h]j )}(hjh]hXSDFEC_GET_CONFIG}(hjhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_CONFIGuh1hhhhKhjubh.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjuhhubeh}(h]determine-configurationah ]h"]determine configurationah$]h&]uh1hhjLhhhhhK~ubh)}(hhh](h)}(h Set the Orderh]h Set the Order}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hUSetting the order determines how the order of Blocks can change from input to output.h]hUSetting the order determines how the order of Blocks can change from input to output.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh)}(hHSetting the order is done by using the ioctl :c:macro:`XSDFEC_SET_ORDER`h](h-Setting the order is done by using the ioctl }(hjhhhNhNubh)}(h:c:macro:`XSDFEC_SET_ORDER`h]j )}(hjh]hXSDFEC_SET_ORDER}(hjhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_SET_ORDERuh1hhhhKhjubeh}(h]h ]h"]h$]h&]uh1hhhhKhjhhubh)}(hISetting the order can only be done if the following restrictions are met:h]hISetting the order can only be done if the following restrictions are met:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubj`)}(h- The ``state`` member of struct :c:type:`xsdfec_status ` filled by the ioctl :c:macro:`XSDFEC_GET_STATUS` indicates the SD-FEC core has not STARTED h]jf)}(hhh]jk)}(hThe ``state`` member of struct :c:type:`xsdfec_status ` filled by the ioctl :c:macro:`XSDFEC_GET_STATUS` indicates the SD-FEC core has not STARTED h]h)}(hThe ``state`` member of struct :c:type:`xsdfec_status ` filled by the ioctl :c:macro:`XSDFEC_GET_STATUS` indicates the SD-FEC core has not STARTEDh](hThe }(hj$ hhhNhNubj )}(h ``state``h]hstate}(hj, hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$ ubh member of struct }(hj$ hhhNhNubh)}(h':c:type:`xsdfec_status `h]j )}(hj@ h]h xsdfec_status}(hjB hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j hj> ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj xsdfec_statusuh1hhhhKhj$ ubh filled by the ioctl }(hj$ hhhNhNubh)}(h:c:macro:`XSDFEC_GET_STATUS`h]j )}(hjc h]hXSDFEC_GET_STATUS}(hje hhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1j hja ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_STATUSuh1hhhhKhj$ ubh* indicates the SD-FEC core has not STARTED}(hj$ hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jjhj ubah}(h]h ]h"]h$]h&]jjuh1jehhhKhj ubah}(h]h ]h"]h$]h&]uh1j_hhhKhjhhubeh}(h] set-the-orderah ]h"] set the orderah$]h&]uh1hhjLhhhhhKubh)}(hhh](h)}(hAdd LDPC Codesh]hAdd LDPC Codes}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhKubh)}(hFThe following steps indicate how to add LDPC codes to the SD-FEC core:h]hFThe following steps indicate how to add LDPC codes to the SD-FEC core:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj hhubj`)}(hXK- Use the auto-generated parameters to fill the :c:type:`struct xsdfec_ldpc_params ` for the desired LDPC code. - Set the SC, QA, and LA table offsets for the LPDC parameters and the parameters in the structure :c:type:`struct xsdfec_ldpc_params ` - Set the desired Code Id value in the structure :c:type:`struct xsdfec_ldpc_params ` - Add the LPDC Code Parameters using the ioctl :c:macro:`XSDFEC_ADD_LDPC_CODE_PARAMS` - For the applied LPDC Code Parameter use the function :c:func:`xsdfec_calculate_shared_ldpc_table_entry_size` to calculate the size of shared LPDC code tables. This allows the user to determine the shared table usage so when selecting the table offsets for the next LDPC code parameters unused table areas can be selected. - Repeat for each LDPC code parameter. h]jf)}(hhh](jk)}(hUse the auto-generated parameters to fill the :c:type:`struct xsdfec_ldpc_params ` for the desired LDPC code.h]h)}(hj h](h.Use the auto-generated parameters to fill the }(hj hhhNhNubh)}(h8:c:type:`struct xsdfec_ldpc_params `h]j )}(hj h]hstruct xsdfec_ldpc_params}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjxsdfec_ldpc_paramsuh1hhhhKhj ubh for the desired LDPC code.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jjhj ubjk)}(hSet the SC, QA, and LA table offsets for the LPDC parameters and the parameters in the structure :c:type:`struct xsdfec_ldpc_params `h]h)}(hj h](haSet the SC, QA, and LA table offsets for the LPDC parameters and the parameters in the structure }(hj hhhNhNubh)}(h8:c:type:`struct xsdfec_ldpc_params `h]j )}(hj h]hstruct xsdfec_ldpc_params}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjxsdfec_ldpc_paramsuh1hhhhKhj ubeh}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jjhj ubjk)}(hgSet the desired Code Id value in the structure :c:type:`struct xsdfec_ldpc_params `h]h)}(hj< h](h/Set the desired Code Id value in the structure }(hj> hhhNhNubh)}(h8:c:type:`struct xsdfec_ldpc_params `h]j )}(hjG h]hstruct xsdfec_ldpc_params}(hjI hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j hjE ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjxsdfec_ldpc_paramsuh1hhhhKhj> ubeh}(h]h ]h"]h$]h&]uh1hhhhKhj: ubah}(h]h ]h"]h$]h&]uh1jjhj ubjk)}(hSAdd the LPDC Code Parameters using the ioctl :c:macro:`XSDFEC_ADD_LDPC_CODE_PARAMS`h]h)}(hjr h](h-Add the LPDC Code Parameters using the ioctl }(hjt hhhNhNubh)}(h&:c:macro:`XSDFEC_ADD_LDPC_CODE_PARAMS`h]j )}(hj} h]hXSDFEC_ADD_LDPC_CODE_PARAMS}(hj hhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1j hj{ ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_ADD_LDPC_CODE_PARAMSuh1hhhhKhjt ubeh}(h]h ]h"]h$]h&]uh1hhhhKhjp ubah}(h]h ]h"]h$]h&]uh1jjhj ubjk)}(hXAFor the applied LPDC Code Parameter use the function :c:func:`xsdfec_calculate_shared_ldpc_table_entry_size` to calculate the size of shared LPDC code tables. This allows the user to determine the shared table usage so when selecting the table offsets for the next LDPC code parameters unused table areas can be selected.h]h)}(hj h](h5For the applied LPDC Code Parameter use the function }(hj hhhNhNubh)}(h7:c:func:`xsdfec_calculate_shared_ldpc_table_entry_size`h]j )}(hj h]h/xsdfec_calculate_shared_ldpc_table_entry_size()}(hj hhhNhNubah}(h]h ](jjc-funceh"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypefunc refexplicitrefwarnj-xsdfec_calculate_shared_ldpc_table_entry_sizeuh1hhhhKhj ubh to calculate the size of shared LPDC code tables. This allows the user to determine the shared table usage so when selecting the table offsets for the next LDPC code parameters unused table areas can be selected.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jjhj ubjk)}(h%Repeat for each LDPC code parameter. h]h)}(h$Repeat for each LDPC code parameter.h]h$Repeat for each LDPC code parameter.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jjhj ubeh}(h]h ]h"]h$]h&]jjuh1jehhhKhj ubah}(h]h ]h"]h$]h&]uh1j_hhhKhj hhubh)}(hIAdding LDPC codes can only be done if the following restrictions are met:h]hIAdding LDPC codes can only be done if the following restrictions are met:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj hhubj`)}(hX- The ``code`` member of :c:type:`struct xsdfec_config ` filled by the ioctl :c:macro:`XSDFEC_GET_CONFIG` indicates the SD-FEC core is configured as LDPC - The ``code_wr_protect`` of :c:type:`struct xsdfec_config ` filled by the ioctl :c:macro:`XSDFEC_GET_CONFIG` indicates that write protection is not enabled - The ``state`` member of struct :c:type:`xsdfec_status ` filled by the ioctl :c:macro:`XSDFEC_GET_STATUS` indicates the SD-FEC core has not started h]jf)}(hhh](jk)}(hThe ``code`` member of :c:type:`struct xsdfec_config ` filled by the ioctl :c:macro:`XSDFEC_GET_CONFIG` indicates the SD-FEC core is configured as LDPCh]h)}(hj h](hThe }(hj hhhNhNubj )}(h``code``h]hcode}(hj$ hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh member of }(hj hhhNhNubh)}(h.:c:type:`struct xsdfec_config `h]j )}(hj8 h]hstruct xsdfec_config}(hj: hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j hj6 ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj xsdfec_configuh1hhhhKhj ubh filled by the ioctl }(hj hhhNhNubh)}(h:c:macro:`XSDFEC_GET_CONFIG`h]j )}(hj[ h]hXSDFEC_GET_CONFIG}(hj] hhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1j hjY ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_CONFIGuh1hhhhKhj ubh0 indicates the SD-FEC core is configured as LDPC}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jjhj ubjk)}(hThe ``code_wr_protect`` of :c:type:`struct xsdfec_config ` filled by the ioctl :c:macro:`XSDFEC_GET_CONFIG` indicates that write protection is not enabledh]h)}(hj h](hThe }(hj hhhNhNubj )}(h``code_wr_protect``h]hcode_wr_protect}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh of }(hj hhhNhNubh)}(h.:c:type:`struct xsdfec_config `h]j )}(hj h]hstruct xsdfec_config}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj xsdfec_configuh1hhhhKhj ubh filled by the ioctl }(hj hhhNhNubh)}(h:c:macro:`XSDFEC_GET_CONFIG`h]j )}(hj h]hXSDFEC_GET_CONFIG}(hj hhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_CONFIGuh1hhhhKhj ubh/ indicates that write protection is not enabled}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jjhj ubjk)}(hThe ``state`` member of struct :c:type:`xsdfec_status ` filled by the ioctl :c:macro:`XSDFEC_GET_STATUS` indicates the SD-FEC core has not started h]h)}(hThe ``state`` member of struct :c:type:`xsdfec_status ` filled by the ioctl :c:macro:`XSDFEC_GET_STATUS` indicates the SD-FEC core has not startedh](hThe }(hj hhhNhNubj )}(h ``state``h]hstate}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh member of struct }(hj hhhNhNubh)}(h':c:type:`xsdfec_status `h]j )}(hj h]h xsdfec_status}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj xsdfec_statusuh1hhhhKhj ubh filled by the ioctl }(hj hhhNhNubh)}(h:c:macro:`XSDFEC_GET_STATUS`h]j )}(hj: h]hXSDFEC_GET_STATUS}(hj< hhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1j hj8 ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_STATUSuh1hhhhKhj ubh* indicates the SD-FEC core has not started}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jjhj ubeh}(h]h ]h"]h$]h&]jjuh1jehhhKhj ubah}(h]h ]h"]h$]h&]uh1j_hhhKhj hhubeh}(h]add-ldpc-codesah ]h"]add ldpc codesah$]h&]uh1hhjLhhhhhKubh)}(hhh](h)}(hSet Turbo Decodeh]hSet Turbo Decode}(hj~ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj{ hhhhhKubh)}(hConfiguring the Turbo decode parameters is done by using the ioctl :c:macro:`XSDFEC_SET_TURBO` using auto-generated parameters to fill the :c:type:`struct xsdfec_turbo ` for the desired Turbo code.h](hCConfiguring the Turbo decode parameters is done by using the ioctl }(hj hhhNhNubh)}(h:c:macro:`XSDFEC_SET_TURBO`h]j )}(hj h]hXSDFEC_SET_TURBO}(hj hhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_SET_TURBOuh1hhhhKhj ubh- using auto-generated parameters to fill the }(hj hhhNhNubh)}(h,:c:type:`struct xsdfec_turbo `h]j )}(hj h]hstruct xsdfec_turbo}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj xsdfec_turbouh1hhhhKhj ubh for the desired Turbo code.}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj{ hhubh)}(hKAdding Turbo decode can only be done if the following restrictions are met:h]hKAdding Turbo decode can only be done if the following restrictions are met:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj{ hhubj`)}(hXN- The ``code`` member of :c:type:`struct xsdfec_config ` filled by the ioctl :c:macro:`XSDFEC_GET_CONFIG` indicates the SD-FEC core is configured as TURBO - The ``state`` member of struct :c:type:`xsdfec_status ` filled by the ioctl :c:macro:`XSDFEC_GET_STATUS` indicates the SD-FEC core has not STARTED h]jf)}(hhh](jk)}(hThe ``code`` member of :c:type:`struct xsdfec_config ` filled by the ioctl :c:macro:`XSDFEC_GET_CONFIG` indicates the SD-FEC core is configured as TURBOh]h)}(hj h](hThe }(hj hhhNhNubj )}(h``code``h]hcode}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubh member of }(hj hhhNhNubh)}(h.:c:type:`struct xsdfec_config `h]j )}(hj h]hstruct xsdfec_config}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj xsdfec_configuh1hhhhKhj ubh filled by the ioctl }(hj hhhNhNubh)}(h:c:macro:`XSDFEC_GET_CONFIG`h]j )}(hj7 h]hXSDFEC_GET_CONFIG}(hj9 hhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1j hj5 ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_CONFIGuh1hhhhKhj ubh1 indicates the SD-FEC core is configured as TURBO}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jjhj ubjk)}(hThe ``state`` member of struct :c:type:`xsdfec_status ` filled by the ioctl :c:macro:`XSDFEC_GET_STATUS` indicates the SD-FEC core has not STARTED h]h)}(hThe ``state`` member of struct :c:type:`xsdfec_status ` filled by the ioctl :c:macro:`XSDFEC_GET_STATUS` indicates the SD-FEC core has not STARTEDh](hThe }(hjh hhhNhNubj )}(h ``state``h]hstate}(hjp hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjh ubh member of struct }(hjh hhhNhNubh)}(h':c:type:`xsdfec_status `h]j )}(hj h]h xsdfec_status}(hj hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj xsdfec_statusuh1hhhhKhjh ubh filled by the ioctl }(hjh hhhNhNubh)}(h:c:macro:`XSDFEC_GET_STATUS`h]j )}(hj h]hXSDFEC_GET_STATUS}(hj hhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_STATUSuh1hhhhKhjh ubh* indicates the SD-FEC core has not STARTED}(hjh hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjd ubah}(h]h ]h"]h$]h&]uh1jjhj ubeh}(h]h ]h"]h$]h&]jjuh1jehhhKhj ubah}(h]h ]h"]h$]h&]uh1j_hhhKhj{ hhubeh}(h]set-turbo-decodeah ]h"]set turbo decodeah$]h&]uh1hhjLhhhhhKubh)}(hhh](h)}(hEnable Interruptsh]hEnable Interrupts}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhKubh)}(hX&Enabling or disabling interrupts is done by using the ioctl :c:macro:`XSDFEC_SET_IRQ`. The members of the parameter passed, :c:type:`struct xsdfec_irq `, to the ioctl are used to set and clear different categories of interrupts. The category of interrupt is controlled as following:h](h`h]j )}(hj&h]hstruct xsdfec_irq}(hj(hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j hj$ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj xsdfec_irquh1hhhhKhj ubh, to the ioctl are used to set and clear different categories of interrupts. The category of interrupt is controlled as following:}(hj hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj hhubj`)}(hd- ``enable_isr`` controls the ``tlast`` interrupts - ``enable_ecc_isr`` controls the ECC interrupts h]jf)}(hhh](jk)}(h0``enable_isr`` controls the ``tlast`` interruptsh]h)}(hjVh](j )}(h``enable_isr``h]h enable_isr}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjXubh controls the }(hjXhhhNhNubj )}(h ``tlast``h]htlast}(hjmhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjXubh interrupts}(hjXhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjTubah}(h]h ]h"]h$]h&]uh1jjhjQubjk)}(h/``enable_ecc_isr`` controls the ECC interrupts h]h)}(h.``enable_ecc_isr`` controls the ECC interruptsh](j )}(h``enable_ecc_isr``h]henable_ecc_isr}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh controls the ECC interrupts}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jjhjQubeh}(h]h ]h"]h$]h&]jjuh1jehhhKhjMubah}(h]h ]h"]h$]h&]uh1j_hhhKhj hhubh)}(hIf the ``code`` member of :c:type:`struct xsdfec_config ` filled by the ioctl :c:macro:`XSDFEC_GET_CONFIG` indicates the SD-FEC core is configured as TURBO then the enabling ECC errors is not required.h](hIf the }(hjhhhNhNubj )}(h``code``h]hcode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh member of }(hjhhhNhNubh)}(h.:c:type:`struct xsdfec_config `h]j )}(hjh]hstruct xsdfec_config}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj xsdfec_configuh1hhhhKhjubh filled by the ioctl }(hjhhhNhNubh)}(h:c:macro:`XSDFEC_GET_CONFIG`h]j )}(hjh]hXSDFEC_GET_CONFIG}(hjhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_CONFIGuh1hhhhKhjubh_ indicates the SD-FEC core is configured as TURBO then the enabling ECC errors is not required.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj hhubeh}(h]enable-interruptsah ]h"]enable interruptsah$]h&]uh1hhjLhhhhhKubh)}(hhh](h)}(hBypass the SD-FECh]hBypass the SD-FEC}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+hhhhhKubh)}(hLBypassing the SD-FEC is done by using the ioctl :c:macro:`XSDFEC_SET_BYPASS`h](h0Bypassing the SD-FEC is done by using the ioctl }(hj<hhhNhNubh)}(h:c:macro:`XSDFEC_SET_BYPASS`h]j )}(hjFh]hXSDFEC_SET_BYPASS}(hjHhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1j hjDubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_SET_BYPASSuh1hhhhKhj<ubeh}(h]h ]h"]h$]h&]uh1hhhhKhj+hhubh)}(hLBypassing the SD-FEC can only be done if the following restrictions are met:h]hLBypassing the SD-FEC can only be done if the following restrictions are met:}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj+hhubj`)}(h- The ``state`` member of :c:type:`struct xsdfec_status ` filled by the ioctl :c:macro:`XSDFEC_GET_STATUS` indicates the SD-FEC core has not STARTED h]jf)}(hhh]jk)}(hThe ``state`` member of :c:type:`struct xsdfec_status ` filled by the ioctl :c:macro:`XSDFEC_GET_STATUS` indicates the SD-FEC core has not STARTED h]h)}(hThe ``state`` member of :c:type:`struct xsdfec_status ` filled by the ioctl :c:macro:`XSDFEC_GET_STATUS` indicates the SD-FEC core has not STARTEDh](hThe }(hjhhhNhNubj )}(h ``state``h]hstate}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh member of }(hjhhhNhNubh)}(h.:c:type:`struct xsdfec_status `h]j )}(hjh]hstruct xsdfec_status}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj xsdfec_statusuh1hhhhKhjubh filled by the ioctl }(hjhhhNhNubh)}(h:c:macro:`XSDFEC_GET_STATUS`h]j )}(hjh]hXSDFEC_GET_STATUS}(hjhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_STATUSuh1hhhhKhjubh* indicates the SD-FEC core has not STARTED}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj~ubah}(h]h ]h"]h$]h&]uh1jjhj{ubah}(h]h ]h"]h$]h&]jjuh1jehhhKhjwubah}(h]h ]h"]h$]h&]uh1j_hhhKhj+hhubeh}(h]bypass-the-sd-fecah ]h"]bypass the sd-fecah$]h&]uh1hhjLhhhhhKubh)}(hhh](h)}(hStart the SD-FEC coreh]hStart the SD-FEC core}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(hDStart the SD-FEC core by using the ioctl :c:macro:`XSDFEC_START_DEV`h](h)Start the SD-FEC core by using the ioctl }(hjhhhNhNubh)}(h:c:macro:`XSDFEC_START_DEV`h]j )}(hjh]hXSDFEC_START_DEV}(hjhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_START_DEVuh1hhhhKhjubeh}(h]h ]h"]h$]h&]uh1hhhhKhjhhubeh}(h]start-the-sd-fec-coreah ]h"]start the sd-fec coreah$]h&]uh1hhjLhhhhhKubh)}(hhh](h)}(hGet SD-FEC Statush]hGet SD-FEC Status}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjHhhhhhKubh)}(hGet the SD-FEC status of the device by using the ioctl :c:macro:`XSDFEC_GET_STATUS`, which will fill the :c:type:`struct xsdfec_status `h](h7Get the SD-FEC status of the device by using the ioctl }(hjYhhhNhNubh)}(h:c:macro:`XSDFEC_GET_STATUS`h]j )}(hjch]hXSDFEC_GET_STATUS}(hjehhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1j hjaubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_STATUSuh1hhhhKhjYubh, which will fill the }(hjYhhhNhNubh)}(h.:c:type:`struct xsdfec_status `h]j )}(hjh]hstruct xsdfec_status}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj xsdfec_statusuh1hhhhKhjYubeh}(h]h ]h"]h$]h&]uh1hhhhKhjHhhubeh}(h]get-sd-fec-statusah ]h"]get sd-fec statusah$]h&]uh1hhjLhhhhhKubh)}(hhh](h)}(hMonitor for Interruptsh]hMonitor for Interrupts}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubj`)}(hX6- Use the poll system call to monitor for an interrupt. The poll system call waits for an interrupt to wake it up or times out if no interrupt occurs. - On return Poll ``revents`` will indicate whether stats and/or state have been updated - ``POLLPRI`` indicates a critical error and the user should use :c:macro:`XSDFEC_GET_STATUS` and :c:macro:`XSDFEC_GET_STATS` to confirm - ``POLLRDNORM`` indicates a non-critical error has occurred and the user should use :c:macro:`XSDFEC_GET_STATS` to confirm - Get stats by using the ioctl :c:macro:`XSDFEC_GET_STATS` - For critical error the ``isr_err_count`` or ``uecc_count`` member of :c:type:`struct xsdfec_stats ` is non-zero - For non-critical errors the ``cecc_count`` member of :c:type:`struct xsdfec_stats ` is non-zero - Get state by using the ioctl :c:macro:`XSDFEC_GET_STATUS` - For a critical error the ``state`` of :c:type:`xsdfec_status ` will indicate a Reset Is Required - Clear stats by using the ioctl :c:macro:`XSDFEC_CLEAR_STATS` h]jf)}(hhh](jk)}(hUse the poll system call to monitor for an interrupt. The poll system call waits for an interrupt to wake it up or times out if no interrupt occurs.h]h)}(hjh]hUse the poll system call to monitor for an interrupt. The poll system call waits for an interrupt to wake it up or times out if no interrupt occurs.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(hXgOn return Poll ``revents`` will indicate whether stats and/or state have been updated - ``POLLPRI`` indicates a critical error and the user should use :c:macro:`XSDFEC_GET_STATUS` and :c:macro:`XSDFEC_GET_STATS` to confirm - ``POLLRDNORM`` indicates a non-critical error has occurred and the user should use :c:macro:`XSDFEC_GET_STATS` to confirmh]hdefinition_list)}(hhh]hdefinition_list_item)}(hX[On return Poll ``revents`` will indicate whether stats and/or state have been updated - ``POLLPRI`` indicates a critical error and the user should use :c:macro:`XSDFEC_GET_STATUS` and :c:macro:`XSDFEC_GET_STATS` to confirm - ``POLLRDNORM`` indicates a non-critical error has occurred and the user should use :c:macro:`XSDFEC_GET_STATS` to confirmh](hterm)}(hUOn return Poll ``revents`` will indicate whether stats and/or state have been updatedh](hOn return Poll }(hjhhhNhNubj )}(h ``revents``h]hrevents}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh; will indicate whether stats and/or state have been updated}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhhhKhjubh definition)}(hhh]jf)}(hhh](jk)}(h``POLLPRI`` indicates a critical error and the user should use :c:macro:`XSDFEC_GET_STATUS` and :c:macro:`XSDFEC_GET_STATS` to confirmh]h)}(hjh](j )}(h ``POLLPRI``h]hPOLLPRI}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh4 indicates a critical error and the user should use }(hjhhhNhNubh)}(h:c:macro:`XSDFEC_GET_STATUS`h]j )}(hj4h]hXSDFEC_GET_STATUS}(hj6hhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1j hj2ubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_STATUSuh1hhhhKhjubh and }(hjhhhNhNubh)}(h:c:macro:`XSDFEC_GET_STATS`h]j )}(hjWh]hXSDFEC_GET_STATS}(hjYhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1j hjUubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_STATSuh1hhhhKhjubh to confirm}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(hz``POLLRDNORM`` indicates a non-critical error has occurred and the user should use :c:macro:`XSDFEC_GET_STATS` to confirmh]h)}(hjh](j )}(h``POLLRDNORM``h]h POLLRDNORM}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubhF indicates a non-critical error has occurred and the user should use }(hjhhhNhNubh)}(h:c:macro:`XSDFEC_GET_STATS`h]j )}(hjh]hXSDFEC_GET_STATS}(hjhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_STATSuh1hhhhKhjubh to confirm}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jjhjubeh}(h]h ]h"]h$]h&]jjuh1jehhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(hX5Get stats by using the ioctl :c:macro:`XSDFEC_GET_STATS` - For critical error the ``isr_err_count`` or ``uecc_count`` member of :c:type:`struct xsdfec_stats ` is non-zero - For non-critical errors the ``cecc_count`` member of :c:type:`struct xsdfec_stats ` is non-zeroh]j)}(hhh]j)}(hX)Get stats by using the ioctl :c:macro:`XSDFEC_GET_STATS` - For critical error the ``isr_err_count`` or ``uecc_count`` member of :c:type:`struct xsdfec_stats ` is non-zero - For non-critical errors the ``cecc_count`` member of :c:type:`struct xsdfec_stats ` is non-zeroh](j)}(h8Get stats by using the ioctl :c:macro:`XSDFEC_GET_STATS`h](hGet stats by using the ioctl }(hjhhhNhNubh)}(h:c:macro:`XSDFEC_GET_STATS`h]j )}(hjh]hXSDFEC_GET_STATS}(hjhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_STATSuh1hhhhKhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjubj)}(hhh]jf)}(hhh](jk)}(h~For critical error the ``isr_err_count`` or ``uecc_count`` member of :c:type:`struct xsdfec_stats ` is non-zeroh]h)}(hj*h](hFor critical error the }(hj,hhhNhNubj )}(h``isr_err_count``h]h isr_err_count}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj,ubh or }(hj,hhhNhNubj )}(h``uecc_count``h]h uecc_count}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1j hj,ubh member of }(hj,hhhNhNubh)}(h,:c:type:`struct xsdfec_stats `h]j )}(hjYh]hstruct xsdfec_stats}(hj[hhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j hjWubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj xsdfec_statsuh1hhhhKhj,ubh is non-zero}(hj,hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj(ubah}(h]h ]h"]h$]h&]uh1jjhj%ubjk)}(hmFor non-critical errors the ``cecc_count`` member of :c:type:`struct xsdfec_stats ` is non-zeroh]h)}(hjh](hFor non-critical errors the }(hjhhhNhNubj )}(h``cecc_count``h]h cecc_count}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1j hjubh member of }(hjhhhNhNubh)}(h,:c:type:`struct xsdfec_stats `h]j )}(hjh]hstruct xsdfec_stats}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj xsdfec_statsuh1hhhhKhjubh is non-zero}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jjhj%ubeh}(h]h ]h"]h$]h&]jjuh1jehhhKhj"ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(hGet state by using the ioctl :c:macro:`XSDFEC_GET_STATUS` - For a critical error the ``state`` of :c:type:`xsdfec_status ` will indicate a Reset Is Requiredh]j)}(hhh]j)}(hGet state by using the ioctl :c:macro:`XSDFEC_GET_STATUS` - For a critical error the ``state`` of :c:type:`xsdfec_status ` will indicate a Reset Is Requiredh](j)}(h9Get state by using the ioctl :c:macro:`XSDFEC_GET_STATUS`h](hGet state by using the ioctl }(hjhhhNhNubh)}(h:c:macro:`XSDFEC_GET_STATUS`h]j )}(hjh]hXSDFEC_GET_STATUS}(hjhhhNhNubah}(h]h ](jjc-macroeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypemacro refexplicitrefwarnjXSDFEC_GET_STATUSuh1hhhhKhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjubj)}(hhh]jf)}(hhh]jk)}(hoFor a critical error the ``state`` of :c:type:`xsdfec_status ` will indicate a Reset Is Requiredh]h)}(hj0h](hFor a critical error the }(hj2hhhNhNubj )}(h ``state``h]hstate}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj2ubh of }(hj2hhhNhNubh)}(h':c:type:`xsdfec_status `h]j )}(hjMh]h xsdfec_status}(hjOhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j hjKubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnj xsdfec_statusuh1hhhhKhj2ubh" will indicate a Reset Is Required}(hj2hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj.ubah}(h]h ]h"]h$]h&]uh1jjhj+ubah}(h]h ]h"]h$]h&]jjuh1jehhhKhj(ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(h=Clear stats by using the ioctl :c:macro:`XSDFEC_CLEAR_STATS` h]h)}(h` that contains the interrupt settings for the SD-FEC core h](j)}(h**struct** xsdfec_irq *h](j)}(h **struct**h]hstruct}(hjLhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjHubh xsdfec_irq *}(hjHhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:249: ./include/uapi/misc/xilinx_sdfec.hhM,hjDubj)}(hhh]h)}(hpPointer to the :c:type:`struct xsdfec_irq ` that contains the interrupt settings for the SD-FEC coreh](hPointer to the }(hjhhhhNhNubh)}(h(:c:type:`struct xsdfec_irq `h]j )}(hjrh]hstruct xsdfec_irq}(hjthhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j hjpubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarn c:parent_keysphinx.domains.c LookupKey)}data]sbj xsdfec_irquh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:249: ./include/uapi/misc/xilinx_sdfec.hhM+hjhubh9 that contains the interrupt settings for the SD-FEC core}(hjhhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM+hjeubah}(h]h ]h"]h$]h&]uh1jhjDubeh}(h]h ]h"]h$]h&]uh1jhjdhM,hjAubah}(h]h ]h"]h$]h&]uh1jhjBhhhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:249: ./include/uapi/misc/xilinx_sdfec.hhNubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:249: ./include/uapi/misc/xilinx_sdfec.hhM.hjBhhubh)}(hioctl to enable or disable irqh]hioctl to enable or disable irq}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:249: ./include/uapi/misc/xilinx_sdfec.hhM0hjBhhubjT)}(hhh]h}(h]h ]h"]h$]h&]entries](j`XSDFEC_SET_TURBO (C macro)c.XSDFEC_SET_TURBOhNtauh1jShjBhhhNhNubje)}(hhh](jj)}(hXSDFEC_SET_TURBOh]jp)}(hXSDFEC_SET_TURBOh]jv)}(hXSDFEC_SET_TURBOh]j|)}(hjh]hXSDFEC_SET_TURBO}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j{hjubah}(h]h ](jjeh"]h$]h&]hhuh1juhjhhhhhKubah}(h]h ]h"]h$]h&]hhjuh1jojjhjhhhhhKubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jihhhKhjhhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjhhhhhKubeh}(h]h ](jmacroeh"]h$]h&]jjjj$jj$jjjuh1jdhhhjBhNhNubh)}(h**Parameters**h]j)}(hj*h]h Parameters}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj(ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:253: ./include/uapi/misc/xilinx_sdfec.hhM5hjBhhubj)}(hhh]j)}(h**struct** xsdfec_turbo * Pointer to the :c:type:`struct xsdfec_turbo ` that contains the Turbo decode settings for the SD-FEC core h](j)}(h**struct** xsdfec_turbo *h](j)}(h **struct**h]hstruct}(hjKhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjGubh xsdfec_turbo *}(hjGhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:253: ./include/uapi/misc/xilinx_sdfec.hhM9hjCubj)}(hhh]h)}(hwPointer to the :c:type:`struct xsdfec_turbo ` that contains the Turbo decode settings for the SD-FEC coreh](hPointer to the }(hjghhhNhNubh)}(h,:c:type:`struct xsdfec_turbo `h]j )}(hjqh]hstruct xsdfec_turbo}(hjshhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j hjoubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj xsdfec_turbouh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:253: ./include/uapi/misc/xilinx_sdfec.hhM8hjgubh< that contains the Turbo decode settings for the SD-FEC core}(hjghhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM8hjdubah}(h]h ]h"]h$]h&]uh1jhjCubeh}(h]h ]h"]h$]h&]uh1jhjchM9hj@ubah}(h]h ]h"]h$]h&]uh1jhjBhhhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:253: ./include/uapi/misc/xilinx_sdfec.hhNubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:253: ./include/uapi/misc/xilinx_sdfec.hhM;hjBhhubh)}(h1ioctl that sets the SD-FEC Turbo parameter valuesh]h1ioctl that sets the SD-FEC Turbo parameter values}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:253: ./include/uapi/misc/xilinx_sdfec.hhM=hjBhhubh)}(hDThis can only be used when the driver is in the XSDFEC_STOPPED stateh]hDThis can only be used when the driver is in the XSDFEC_STOPPED state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:253: ./include/uapi/misc/xilinx_sdfec.hhM?hjBhhubjT)}(hhh]h}(h]h ]h"]h$]h&]entries](j`%XSDFEC_ADD_LDPC_CODE_PARAMS (C macro)c.XSDFEC_ADD_LDPC_CODE_PARAMShNtauh1jShjBhhhNhNubje)}(hhh](jj)}(hXSDFEC_ADD_LDPC_CODE_PARAMSh]jp)}(hXSDFEC_ADD_LDPC_CODE_PARAMSh]jv)}(hXSDFEC_ADD_LDPC_CODE_PARAMSh]j|)}(hjh]hXSDFEC_ADD_LDPC_CODE_PARAMS}(hjhhhNhNubah}(h]h ]jah"]h$]h&]uh1j{hjubah}(h]h ](jjeh"]h$]h&]hhuh1juhjhhhhhMubah}(h]h ]h"]h$]h&]hhjuh1jojjhjhhhhhMubah}(h]jah ](jjeh"]h$]h&]jj)jhuh1jihhhMhjhhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjhhhhhMubeh}(h]h ](jmacroeh"]h$]h&]jjjj*jj*jjjuh1jdhhhjBhNhNubh)}(h**Parameters**h]j)}(hj0h]h Parameters}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj.ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:257: ./include/uapi/misc/xilinx_sdfec.hhMDhjBhhubj)}(hhh]j)}(h**struct** xsdfec_ldpc_params * Pointer to the :c:type:`struct xsdfec_ldpc_params ` that contains the LDPC code parameters to be added to the SD-FEC Block h](j)}(h**struct** xsdfec_ldpc_params *h](j)}(h **struct**h]hstruct}(hjQhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjMubh xsdfec_ldpc_params *}(hjMhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:257: ./include/uapi/misc/xilinx_sdfec.hhMHhjIubj)}(hhh]h)}(hPointer to the :c:type:`struct xsdfec_ldpc_params ` that contains the LDPC code parameters to be added to the SD-FEC Blockh](hPointer to the }(hjmhhhNhNubh)}(h8:c:type:`struct xsdfec_ldpc_params `h]j )}(hjwh]hstruct xsdfec_ldpc_params}(hjyhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j hjuubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjjxsdfec_ldpc_paramsuh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:257: ./include/uapi/misc/xilinx_sdfec.hhMGhjmubhG that contains the LDPC code parameters to be added to the SD-FEC Block}(hjmhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMGhjjubah}(h]h ]h"]h$]h&]uh1jhjIubeh}(h]h ]h"]h$]h&]uh1jhjihMHhjFubah}(h]h ]h"]h$]h&]uh1jhjBhhhNhNubh)}(hB**Description** ioctl to add an LDPC code to the SD-FEC LDPC codesh](j)}(h**Description**h]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh3 ioctl to add an LDPC code to the SD-FEC LDPC codes}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:257: ./include/uapi/misc/xilinx_sdfec.hhMJhjBhhubh)}(hThis can only be used when:h]hThis can only be used when:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:257: ./include/uapi/misc/xilinx_sdfec.hhMMhjBhhubjf)}(hhh](jk)}(h&Driver is in the XSDFEC_STOPPED state h]h)}(h%Driver is in the XSDFEC_STOPPED stateh]h%Driver is in the XSDFEC_STOPPED state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:257: ./include/uapi/misc/xilinx_sdfec.hhMOhjubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(h"SD-FEC core is configured as LPDC h]h)}(h!SD-FEC core is configured as LPDCh]h!SD-FEC core is configured as LPDC}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:257: ./include/uapi/misc/xilinx_sdfec.hhMQhjubah}(h]h ]h"]h$]h&]uh1jjhjubjk)}(h*SD-FEC Code Write Protection is disabled h]h)}(h(SD-FEC Code Write Protection is disabledh]h(SD-FEC Code Write Protection is disabled}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:257: ./include/uapi/misc/xilinx_sdfec.hhMShjubah}(h]h ]h"]h$]h&]uh1jjhjubeh}(h]h ]h"]h$]h&]jjuh1jehjhMOhjBhhubjT)}(hhh]h}(h]h ]h"]h$]h&]entries](j`XSDFEC_GET_CONFIG (C macro)c.XSDFEC_GET_CONFIGhNtauh1jShjBhhhNhNubje)}(hhh](jj)}(hXSDFEC_GET_CONFIGh]jp)}(hXSDFEC_GET_CONFIGh]jv)}(hXSDFEC_GET_CONFIGh]j|)}(hjDh]hXSDFEC_GET_CONFIG}(hjNhhhNhNubah}(h]h ]jah"]h$]h&]uh1j{hjJubah}(h]h ](jjeh"]h$]h&]hhuh1juhjFhhhhhMubah}(h]h ]h"]h$]h&]hhjuh1jojjhjBhhhhhMubah}(h]j=ah ](jjeh"]h$]h&]jj)jhuh1jihhhMhj?hhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhj?hhhhhMubeh}(h]h ](jmacroeh"]h$]h&]jjjjyjjyjjjuh1jdhhhjBhNhNubh)}(h**Parameters**h]j)}(hjh]h Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhj}ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:261: ./include/uapi/misc/xilinx_sdfec.hhMYhjBhhubj)}(hhh]j)}(h**struct** xsdfec_config * Pointer to the :c:type:`struct xsdfec_config ` that contains the current configuration settings of the SD-FEC Block h](j)}(h**struct** xsdfec_config *h](j)}(h **struct**h]hstruct}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh xsdfec_config *}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:261: ./include/uapi/misc/xilinx_sdfec.hhM]hjubj)}(hhh]h)}(hPointer to the :c:type:`struct xsdfec_config ` that contains the current configuration settings of the SD-FEC Blockh](hPointer to the }(hjhhhNhNubh)}(h.:c:type:`struct xsdfec_config `h]j )}(hjh]hstruct xsdfec_config}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj xsdfec_configuh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:261: ./include/uapi/misc/xilinx_sdfec.hhM\hjubhE that contains the current configuration settings of the SD-FEC Block}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhM\hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhM]hjubah}(h]h ]h"]h$]h&]uh1jhjBhhhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:261: ./include/uapi/misc/xilinx_sdfec.hhNubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:261: ./include/uapi/misc/xilinx_sdfec.hhM_hjBhhubh)}(h,ioctl that returns SD-FEC core configurationh]h,ioctl that returns SD-FEC core configuration}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:261: ./include/uapi/misc/xilinx_sdfec.hhMahjBhhubjT)}(hhh]h}(h]h ]h"]h$]h&]entries](j`XSDFEC_SET_ORDER (C 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./include/uapi/misc/xilinx_sdfec.hhMwhjubj)}(hhh]h)}(hQPointer to the unsigned long that contains a value from the **enum** xsdfec_orderh](h` that will contain the updated stats values h](j)}(h**struct** xsdfec_stats *h](j)}(h **struct**h]hstruct}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh xsdfec_stats *}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:281: ./include/uapi/misc/xilinx_sdfec.hhMhjubj)}(hhh]h)}(hfPointer to the :c:type:`struct xsdfec_stats ` that will contain the updated stats valuesh](hPointer to the }(hjhhhNhNubh)}(h,:c:type:`struct xsdfec_stats `h]j )}(hjh]hstruct xsdfec_stats}(hjhhhNhNubah}(h]h ](jjc-typeeh"]h$]h&]uh1j hjubah}(h]h ]h"]h$]h&]refdocj refdomainjreftypetype refexplicitrefwarnjjj xsdfec_statsuh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:281: ./include/uapi/misc/xilinx_sdfec.hhMhjubh+ that will contain the updated stats values}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjhMhjubah}(h]h ]h"]h$]h&]uh1jhjBhhhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:281: ./include/uapi/misc/xilinx_sdfec.hhNubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:281: ./include/uapi/misc/xilinx_sdfec.hhMhjBhhubh)}(h$ioctl that returns SD-FEC core statsh]h$ioctl that returns SD-FEC core stats}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:281: ./include/uapi/misc/xilinx_sdfec.hhMhjBhhubh)}(hDThis can only be used when the driver is in the XSDFEC_STOPPED stateh]hDThis can only be used when the driver is in the XSDFEC_STOPPED state}(hj=hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:281: ./include/uapi/misc/xilinx_sdfec.hhMhjBhhubjT)}(hhh]h}(h]h ]h"]h$]h&]entries](j`#XSDFEC_SET_DEFAULT_CONFIG (C macro)c.XSDFEC_SET_DEFAULT_CONFIGhNtauh1jShjBhhhNhNubje)}(hhh](jj)}(hXSDFEC_SET_DEFAULT_CONFIGh]jp)}(hXSDFEC_SET_DEFAULT_CONFIGh]jv)}(hXSDFEC_SET_DEFAULT_CONFIGh]j|)}(hj_h]hXSDFEC_SET_DEFAULT_CONFIG}(hjihhhNhNubah}(h]h ]jah"]h$]h&]uh1j{hjeubah}(h]h ](jjeh"]h$]h&]hhuh1juhjahhhhhMubah}(h]h ]h"]h$]h&]hhjuh1jojjhj]hhhhhMubah}(h]jXah ](jjeh"]h$]h&]jj)jhuh1jihhhMhjZhhubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjZhhhhhMubeh}(h]h ](jmacroeh"]h$]h&]jjjjjjjjjuh1jdhhhjBhNhNubh)}(h**Description**h]j)}(hjh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:285: ./include/uapi/misc/xilinx_sdfec.hhMhjBhhubh)}(hCioctl that returns SD-FEC core to default config, use after a reseth]hCioctl that returns SD-FEC core to default config, use after a reset}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:285: ./include/uapi/misc/xilinx_sdfec.hhMhjBhhubh)}(hDThis can only be used when the driver is in the XSDFEC_STOPPED stateh]hDThis can only be used when the driver is in the XSDFEC_STOPPED state}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:285: ./include/uapi/misc/xilinx_sdfec.hhMhjBhhubeh}(h] driver-ioctlsah ]h"] driver ioctlsah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(hDriver Type Definitionsh]hDriver Type Definitions}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhM!ubjT)}(hhh]h}(h]h ]h"]h$]h&]entries](j`xsdfec_code (C enum) c.xsdfec_codehNtauh1jShjhhhNhNubje)}(hhh](jj)}(h xsdfec_codeh]jp)}(henum xsdfec_codeh](hdesc_sig_keyword)}(henumh]henum}(hj hhhNhNubah}(h]h ]kah"]h$]h&]uh1j hjhhhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKubhdesc_sig_space)}(h h]h }(hj hhhNhNubah}(h]h ]wah"]h$]h&]uh1j hjhhhj hKubjv)}(h xsdfec_codeh]j|)}(hjh]h xsdfec_code}(hj' hhhNhNubah}(h]h ]jah"]h$]h&]uh1j{hj# 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]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK(hj ubj)}(hhh]h)}(h$Driver is configured for Turbo mode.h]h$Driver is configured for Turbo mode.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hK(hj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hK(hj ubj)}(h8``XSDFEC_LDPC_CODE`` Driver is configured for LDPC mode.h](j)}(h``XSDFEC_LDPC_CODE``h]j )}(hj h]hXSDFEC_LDPC_CODE}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK*hj ubj)}(hhh]h)}(h#Driver is configured for LDPC mode.h]h#Driver is configured for LDPC mode.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK+hj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj hK*hj ubeh}(h]h ]h"]h$]h&]uh1jhjg ubeh}(h]h ] kernelindentah"]h$]h&]uh1je hjhhhNhNubh)}(h**Description**h]j)}(hj!h]h Description}(hj !hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj!ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK-hjhhubh)}(hThis enum is used to indicate the mode of the driver. The mode is determined by checking which codes are set in the driver. Note that the mode cannot be changed by the driver.h]hThis enum is used to indicate the mode of the driver. The mode is determined by checking which codes are set in the driver. Note that the mode cannot be changed by the driver.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK$hjhhubjT)}(hhh]h}(h]h ]h"]h$]h&]entries](j`xsdfec_order (C enum)c.xsdfec_orderhNtauh1jShjhhhNhNubje)}(hhh](jj)}(h xsdfec_orderh]jp)}(henum xsdfec_orderh](j )}(hj h]henum}(hjF!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjB!hhhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK+ubj )}(h h]h }(hjT!hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjB!hhhjS!hK+ubjv)}(h xsdfec_orderh]j|)}(hj@!h]h xsdfec_order}(hjf!hhhNhNubah}(h]h ]jah"]h$]h&]uh1j{hjb!ubah}(h]h ](jjeh"]h$]h&]hhuh1juhjB!hhhjS!hK+ubeh}(h]h ]h"]h$]h&]hhjuh1jojjhj>!hhhjS!hK+ubah}(h]j9!ah ](jjeh"]h$]h&]jj)jhuh1jihjS!hK+hj;!hhubj)}(hhh]h)}(hOrderh]hOrder}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK/hj!hhubah}(h]h ]h"]h$]h&]uh1jhj;!hhhjS!hK+ubeh}(h]h ](jenumeh"]h$]h&]jjjj!jj!jjjuh1jdhhhjhNhNubjf )}(h**Constants** ``XSDFEC_MAINTAIN_ORDER`` Maintain order execution of blocks. ``XSDFEC_OUT_OF_ORDER`` Out-of-order execution of blocks.h](h)}(h **Constants**h]j)}(hj!h]h Constants}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj!ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK3hj!ubj)}(hhh](j)}(h>``XSDFEC_MAINTAIN_ORDER`` Maintain order execution of blocks. h](j)}(h``XSDFEC_MAINTAIN_ORDER``h]j )}(hj!h]hXSDFEC_MAINTAIN_ORDER}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK6hj!ubj)}(hhh]h)}(h#Maintain order execution of blocks.h]h#Maintain order execution of blocks.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hK6hj!ubah}(h]h ]h"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]uh1jhj!hK6hj!ubj)}(h9``XSDFEC_OUT_OF_ORDER`` Out-of-order execution of blocks.h](j)}(h``XSDFEC_OUT_OF_ORDER``h]j )}(hj"h]hXSDFEC_OUT_OF_ORDER}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj"ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK8hj!ubj)}(hhh]h)}(h!Out-of-order execution of blocks.h]h!Out-of-order execution of blocks.}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK9hj"ubah}(h]h ]h"]h$]h&]uh1jhj!ubeh}(h]h ]h"]h$]h&]uh1jhj"hK8hj!ubeh}(h]h ]h"]h$]h&]uh1jhj!ubeh}(h]h ] kernelindentah"]h$]h&]uh1je hjhhhNhNubh)}(h**Description**h]j)}(hjE"h]h Description}(hjG"hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjC"ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK;hjhhubh)}(hZThis enum is used to indicate whether the order of blocks can change from input to output.h]hZThis enum is used to indicate whether the order of blocks can change from input to output.}(hj["hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK2hjhhubjT)}(hhh]h}(h]h ]h"]h$]h&]entries](j`xsdfec_turbo_alg (C enum)c.xsdfec_turbo_alghNtauh1jShjhhhNhNubje)}(hhh](jj)}(hxsdfec_turbo_algh]jp)}(henum xsdfec_turbo_algh](j )}(hj h]henum}(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"hhhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK8ubj )}(h h]h }(hj"hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj"hhhj"hK8ubjv)}(hxsdfec_turbo_algh]j|)}(hj}"h]hxsdfec_turbo_alg}(hj"hhhNhNubah}(h]h ]jah"]h$]h&]uh1j{hj"ubah}(h]h ](jjeh"]h$]h&]hhuh1juhj"hhhj"hK8ubeh}(h]h ]h"]h$]h&]hhjuh1jojjhj{"hhhj"hK8ubah}(h]jv"ah ](jjeh"]h$]h&]jj)jhuh1jihj"hK8hjx"hhubj)}(hhh]h)}(hTurbo Algorithm Type.h]hTurbo Algorithm Type.}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK#ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKHhj:#ubj)}(hhh]h)}(hLog-Map algorithm.h]hLog-Map algorithm.}(hjY#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjU#hKHhjV#ubah}(h]h ]h"]h$]h&]uh1jhj:#ubeh}(h]h ]h"]h$]h&]uh1jhjU#hKHhj"ubj)}(hH``XSDFEC_TURBO_ALG_MAX`` Used to indicate out of bound Turbo algorithms.h](j)}(h``XSDFEC_TURBO_ALG_MAX``h]j )}(hjy#h]hXSDFEC_TURBO_ALG_MAX}(hj{#hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjw#ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKJhjs#ubj)}(hhh]h)}(h/Used to indicate out of bound Turbo algorithms.h]h/Used to indicate out of bound Turbo algorithms.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKKhj#ubah}(h]h ]h"]h$]h&]uh1jhjs#ubeh}(h]h ]h"]h$]h&]uh1jhj#hKJhj"ubeh}(h]h ]h"]h$]h&]uh1jhj"ubeh}(h]h ] kernelindentah"]h$]h&]uh1je hjhhhNhNubh)}(h**Description**h]j)}(hj#h]h Description}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj#ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKMhjhhubh)}(h;This enum specifies which Turbo Decode algorithm is in use.h]h;This enum specifies which Turbo Decode algorithm is in use.}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKBhjhhubjT)}(hhh]h}(h]h ]h"]h$]h&]entries](j`xsdfec_state (C enum)c.xsdfec_statehNtauh1jShjhhhNhNubje)}(hhh](jj)}(h xsdfec_stateh]jp)}(henum xsdfec_stateh](j )}(hj h]henum}(hj#hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#hhhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKGubj )}(h h]h }(hj$hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj#hhhj$hKGubjv)}(h xsdfec_stateh]j|)}(hj#h]h xsdfec_state}(hj$hhhNhNubah}(h]h ]jah"]h$]h&]uh1j{hj$ubah}(h]h ](jjeh"]h$]h&]hhuh1juhj#hhhj$hKGubeh}(h]h ]h"]h$]h&]hhjuh1jojjhj#hhhj$hKGubah}(h]j#ah ](jjeh"]h$]h&]jj)jhuh1jihj$hKGhj#hhubj)}(hhh]h)}(hState.h]hState.}(hj<$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKLhj9$hhubah}(h]h ]h"]h$]h&]uh1jhj#hhhj$hKGubeh}(h]h ](jenumeh"]h$]h&]jjjjT$jjT$jjjuh1jdhhhjhNhNubjf )}(hX**Constants** ``XSDFEC_INIT`` Driver is initialized. ``XSDFEC_STARTED`` Driver is started. ``XSDFEC_STOPPED`` Driver is stopped. ``XSDFEC_NEEDS_RESET`` Driver needs to be reset. ``XSDFEC_PL_RECONFIGURE`` Programmable Logic needs to be recofigured.h](h)}(h **Constants**h]j)}(hj^$h]h Constants}(hj`$hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj\$ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKPhjX$ubj)}(hhh](j)}(h'``XSDFEC_INIT`` Driver is initialized. h](j)}(h``XSDFEC_INIT``h]j )}(hj}$h]h XSDFEC_INIT}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj{$ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKShjw$ubj)}(hhh]h)}(hDriver is initialized.h]hDriver is initialized.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hKShj$ubah}(h]h ]h"]h$]h&]uh1jhjw$ubeh}(h]h ]h"]h$]h&]uh1jhj$hKShjt$ubj)}(h&``XSDFEC_STARTED`` Driver is started. h](j)}(h``XSDFEC_STARTED``h]j )}(hj$h]hXSDFEC_STARTED}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKVhj$ubj)}(hhh]h)}(hDriver is started.h]hDriver is started.}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj$hKVhj$ubah}(h]h ]h"]h$]h&]uh1jhj$ubeh}(h]h ]h"]h$]h&]uh1jhj$hKVhjt$ubj)}(h&``XSDFEC_STOPPED`` Driver is stopped. h](j)}(h``XSDFEC_STOPPED``h]j )}(hj$h]hXSDFEC_STOPPED}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj$ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKYhj$ubj)}(hhh]h)}(hDriver is stopped.h]hDriver is stopped.}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj%hKYhj%ubah}(h]h ]h"]h$]h&]uh1jhj$ubeh}(h]h ]h"]h$]h&]uh1jhj%hKYhjt$ubj)}(h1``XSDFEC_NEEDS_RESET`` Driver needs to be reset. h](j)}(h``XSDFEC_NEEDS_RESET``h]j )}(hj(%h]hXSDFEC_NEEDS_RESET}(hj*%hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj&%ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK\hj"%ubj)}(hhh]h)}(hDriver needs to be reset.h]hDriver needs to be reset.}(hjA%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj=%hK\hj>%ubah}(h]h ]h"]h$]h&]uh1jhj"%ubeh}(h]h ]h"]h$]h&]uh1jhj=%hK\hjt$ubj)}(hE``XSDFEC_PL_RECONFIGURE`` Programmable Logic needs to be recofigured.h](j)}(h``XSDFEC_PL_RECONFIGURE``h]j )}(hja%h]hXSDFEC_PL_RECONFIGURE}(hjc%hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj_%ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK^hj[%ubj)}(hhh]h)}(h+Programmable Logic needs to be recofigured.h]h+Programmable Logic needs to be recofigured.}(hjz%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK_hjw%ubah}(h]h ]h"]h$]h&]uh1jhj[%ubeh}(h]h ]h"]h$]h&]uh1jhjv%hK^hjt$ubeh}(h]h ]h"]h$]h&]uh1jhjX$ubeh}(h]h ] kernelindentah"]h$]h&]uh1je hjhhhNhNubh)}(h**Description**h]j)}(hj%h]h Description}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj%ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKahjhhubh)}(h6This enum is used to indicate the state of the driver.h]h6This enum is used to indicate the state of the driver.}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKRhjhhubjT)}(hhh]h}(h]h ]h"]h$]h&]entries](j`xsdfec_axis_width (C enum)c.xsdfec_axis_widthhNtauh1jShjhhhNhNubje)}(hhh](jj)}(hxsdfec_axis_widthh]jp)}(henum xsdfec_axis_widthh](j )}(hj h]henum}(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%hhhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKWubj )}(h h]h }(hj%hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj%hhhj%hKWubjv)}(hxsdfec_axis_widthh]j|)}(hj%h]hxsdfec_axis_width}(hj&hhhNhNubah}(h]h ]jah"]h$]h&]uh1j{hj%ubah}(h]h ](jjeh"]h$]h&]hhuh1juhj%hhhj%hKWubeh}(h]h ]h"]h$]h&]hhƕ juh1jojjhj%hhhj%hKWubah}(h]j%ah ](jjeh"]h$]h&]jj)jhuh1jihj%hKWhj%hhubj)}(hhh]h)}(h)AXIS_WIDTH.DIN Setting for 128-bit width.h]h)AXIS_WIDTH.DIN Setting for 128-bit width.}(hj$&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK^hj!&hhubah}(h]h ]h"]h$]h&]uh1jhj%hhhj%hKWubeh}(h]h ](jenumeh"]h$]h&]jjjj<&jj<&jjjuh1jdhhhjhNhNubjf )}(h**Constants** ``XSDFEC_1x128b`` DIN data input stream consists of a 128-bit lane ``XSDFEC_2x128b`` DIN data input stream consists of two 128-bit lanes ``XSDFEC_4x128b`` DIN data input stream consists of four 128-bit lanesh](h)}(h **Constants**h]j)}(hjF&h]h Constants}(hjH&hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjD&ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKbhj@&ubj)}(hhh](j)}(hC``XSDFEC_1x128b`` DIN data input stream consists of a 128-bit lane h](j)}(h``XSDFEC_1x128b``h]j )}(hje&h]h XSDFEC_1x128b}(hjg&hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjc&ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKehj_&ubj)}(hhh]h)}(h0DIN data input stream consists of a 128-bit laneh]h0DIN data input stream consists of a 128-bit lane}(hj~&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjz&hKehj{&ubah}(h]h ]h"]h$]h&]uh1jhj_&ubeh}(h]h ]h"]h$]h&]uh1jhjz&hKehj\&ubj)}(hF``XSDFEC_2x128b`` DIN data input stream consists of two 128-bit lanes h](j)}(h``XSDFEC_2x128b``h]j )}(hj&h]h XSDFEC_2x128b}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj&ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhhj&ubj)}(hhh]h)}(h3DIN data input stream consists of two 128-bit lanesh]h3DIN data input stream consists of two 128-bit lanes}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj&hKhhj&ubah}(h]h ]h"]h$]h&]uh1jhj&ubeh}(h]h ]h"]h$]h&]uh1jhj&hKhhj\&ubj)}(hF``XSDFEC_4x128b`` DIN data input stream consists of four 128-bit lanesh](j)}(h``XSDFEC_4x128b``h]j )}(hj&h]h XSDFEC_4x128b}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj&ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKjhj&ubj)}(hhh]h)}(h4DIN data input stream consists of four 128-bit lanesh]h4DIN data input stream consists of four 128-bit lanes}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKkhj&ubah}(h]h ]h"]h$]h&]uh1jhj&ubeh}(h]h ]h"]h$]h&]uh1jhj&hKjhj\&ubeh}(h]h ]h"]h$]h&]uh1jhj@&ubeh}(h]h ] kernelindentah"]h$]h&]uh1je hjhhhNhNubh)}(h**Description**h]j)}(hj'h]h Description}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj'ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKmhjhhubh)}(hThis enum is used to indicate the AXIS_WIDTH.DIN setting for 128-bit width. The number of lanes of the DIN data input stream depends upon the AXIS_WIDTH.DIN parameter.h]hThis enum is used to indicate the AXIS_WIDTH.DIN setting for 128-bit width. The number of lanes of the DIN data input stream depends upon the AXIS_WIDTH.DIN parameter.}(hj0'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKbhjhhubjT)}(hhh]h}(h]h ]h"]h$]h&]entries](j`!xsdfec_axis_word_include (C enum)c.xsdfec_axis_word_includehNtauh1jShjhhhNhNubje)}(hhh](jj)}(hxsdfec_axis_word_includeh]jp)}(henum xsdfec_axis_word_includeh](j )}(hj h]henum}(hjX'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjT'hhhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKiubj )}(h h]h }(hjf'hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjT'hhhje'hKiubjv)}(hxsdfec_axis_word_includeh]j|)}(hjR'h]hxsdfec_axis_word_include}(hjx'hhhNhNubah}(h]h ]jah"]h$]h&]uh1j{hjt'ubah}(h]h ](jjeh"]h$]h&]hhuh1juhjT'hhhje'hKiubeh}(h]h ]h"]h$]h&]hhjuh1jojjhjP'hhhje'hKiubah}(h]jK'ah ](jjeh"]h$]h&]jj)jhuh1jihje'hKihjM'hhubj)}(hhh]h)}(hWords Configuration.h]hWords Configuration.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKnhj'hhubah}(h]h ]h"]h$]h&]uh1jhjM'hhhje'hKiubeh}(h]h ](jenumeh"]h$]h&]jjjj'jj'jjjuh1jdhhhjhNhNubjf )}(hX`**Constants** ``XSDFEC_FIXED_VALUE`` Fixed, the DIN_WORDS AXI4-Stream interface is removed from the IP instance and is driven with the specified number of words. ``XSDFEC_IN_BLOCK`` In Block, configures the IP instance to expect a single DIN_WORDS value per input code block. The DIN_WORDS interface is present. ``XSDFEC_PER_AXI_TRANSACTION`` Per Transaction, configures the IP instance to expect one DIN_WORDS value per input transaction on the DIN interface. The DIN_WORDS interface is present. ``XSDFEC_AXIS_WORDS_INCLUDE_MAX`` Used to indicate out of bound Words Configurations.h](h)}(h **Constants**h]j)}(hj'h]h Constants}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj'ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKrhj'ubj)}(hhh](j)}(h``XSDFEC_FIXED_VALUE`` Fixed, the DIN_WORDS AXI4-Stream interface is removed from the IP instance and is driven with the specified number of words. h](j)}(h``XSDFEC_FIXED_VALUE``h]j )}(hj'h]hXSDFEC_FIXED_VALUE}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj'ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKwhj'ubj)}(hhh]h)}(h|Fixed, the DIN_WORDS AXI4-Stream interface is removed from the IP instance and is driven with the specified number of words.h]h|Fixed, the DIN_WORDS AXI4-Stream interface is removed from the IP instance and is driven with the specified number of words.}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKuhj'ubah}(h]h ]h"]h$]h&]uh1jhj'ubeh}(h]h ]h"]h$]h&]uh1jhj'hKwhj'ubj)}(h``XSDFEC_IN_BLOCK`` In Block, configures the IP instance to expect a single DIN_WORDS value per input code block. The DIN_WORDS interface is present. h](j)}(h``XSDFEC_IN_BLOCK``h]j )}(hj(h]hXSDFEC_IN_BLOCK}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhK|hj(ubj)}(hhh]h)}(hIn Block, configures the IP instance to expect a single DIN_WORDS value per input code block. The DIN_WORDS interface is present.h]hIn Block, configures the IP instance to expect a single DIN_WORDS value per input code block. The DIN_WORDS interface is present.}(hj.(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKzhj+(ubah}(h]h ]h"]h$]h&]uh1jhj(ubeh}(h]h ]h"]h$]h&]uh1jhj*(hK|hj'ubj)}(h``XSDFEC_PER_AXI_TRANSACTION`` Per Transaction, configures the IP instance to expect one DIN_WORDS value per input transaction on the DIN interface. The DIN_WORDS interface is present. h](j)}(h``XSDFEC_PER_AXI_TRANSACTION``h]j )}(hjO(h]hXSDFEC_PER_AXI_TRANSACTION}(hjQ(hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjM(ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjI(ubj)}(hhh]h)}(hPer Transaction, configures the IP instance to expect one DIN_WORDS value per input transaction on the DIN interface. The DIN_WORDS interface is present.h]hPer Transaction, configures the IP instance to expect one DIN_WORDS value per input transaction on the DIN interface. The DIN_WORDS interface is present.}(hjh(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhje(ubah}(h]h ]h"]h$]h&]uh1jhjI(ubeh}(h]h ]h"]h$]h&]uh1jhjd(hKhj'ubj)}(hU``XSDFEC_AXIS_WORDS_INCLUDE_MAX`` Used to indicate out of bound Words Configurations.h](j)}(h!``XSDFEC_AXIS_WORDS_INCLUDE_MAX``h]j )}(hj(h]hXSDFEC_AXIS_WORDS_INCLUDE_MAX}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj(ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj(ubj)}(hhh]h)}(h3Used to indicate out of bound Words Configurations.h]h3Used to indicate out of bound Words Configurations.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj(hKhj(ubah}(h]h ]h"]h$]h&]uh1jhj(ubeh}(h]h ]h"]h$]h&]uh1jhj(hKhj'ubeh}(h]h ]h"]h$]h&]uh1jhj'ubeh}(h]h ] kernelindentah"]h$]h&]uh1je hjhhhNhNubh)}(h**Description**h]j)}(hj(h]h Description}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj(ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjhhubh)}(h9This enum is used to specify the DIN_WORDS configuration.h]h9This enum is used to specify the DIN_WORDS configuration.}(hj(hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKzhjhhubjT)}(hhh]h}(h]h ]h"]h$]h&]entries](j`xsdfec_turbo (C struct)c.xsdfec_turbohNtauh1jShjhhhNhNubje)}(hhh](jj)}(h xsdfec_turboh]jp)}(hstruct xsdfec_turboh](j )}(hstructh]hstruct}(hj )hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)hhhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKubj )}(h h]h }(hj)hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj)hhhj)hKubjv)}(h xsdfec_turboh]j|)}(hj)h]h xsdfec_turbo}(hj*)hhhNhNubah}(h]h ]jah"]h$]h&]uh1j{hj&)ubah}(h]h ](jjeh"]h$]h&]hhuh1juhj)hhhj)hKubeh}(h]h ]h"]h$]h&]hhjuh1jojjhj)hhhj)hKubah}(h]j(ah ](jjeh"]h$]h&]jj)jhuh1jihj)hKhj(hhubj)}(hhh]h)}(hUser data for Turbo codes.h]hUser data for Turbo codes.}(hjL)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjI)hhubah}(h]h ]h"]h$]h&]uh1jhj(hhhj)hKubeh}(h]h ](jstructeh"]h$]h&]jjjjd)jjd)jjjuh1jdhhhjhNhNubjf )}(h**Definition**:: struct xsdfec_turbo { __u32 alg; __u8 scale; }; **Members** ``alg`` Specifies which Turbo decode algorithm to use ``scale`` Specifies the extrinsic scaling to apply when the Max Scale algorithm has been selectedh](h)}(h**Definition**::h](j)}(h**Definition**h]h Definition}(hjp)hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjl)ubh:}(hjl)hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjh)ubh literal_block)}(h7struct xsdfec_turbo { __u32 alg; __u8 scale; };h]h7struct xsdfec_turbo { __u32 alg; __u8 scale; };}hj)sbah}(h]h ]h"]h$]h&]hhuh1j)hk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjh)ubh)}(h **Members**h]j)}(hj)h]hMembers}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj)ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjh)ubj)}(hhh](j)}(h6``alg`` Specifies which Turbo decode algorithm to use h](j)}(h``alg``h]j )}(hj)h]halg}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj)ubj)}(hhh]h)}(h-Specifies which Turbo decode algorithm to useh]h-Specifies which Turbo decode algorithm to use}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj)hKhj)ubah}(h]h ]h"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]uh1jhj)hKhj)ubj)}(ha``scale`` Specifies the extrinsic scaling to apply when the Max Scale algorithm has been selectedh](j)}(h ``scale``h]j )}(hj)h]hscale}(hj)hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj)ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj)ubj)}(hhh]h)}(hWSpecifies the extrinsic scaling to apply when the Max Scale algorithm has been selectedh]hWSpecifies the extrinsic scaling to apply when the Max Scale algorithm has been selected}(hj *hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj *hKhj *ubah}(h]h ]h"]h$]h&]uh1jhj)ubeh}(h]h ]h"]h$]h&]uh1jhj *hKhj)ubeh}(h]h ]h"]h$]h&]uh1jhjh)ubeh}(h]h ] kernelindentah"]h$]h&]uh1je hjhhhNhNubh)}(h**Description**h]j)}(hj6*h]h Description}(hj8*hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj4*ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjhhubh)}(h@Turbo code structure to communicate parameters to XSDFEC driver.h]h@Turbo code structure to communicate parameters to XSDFEC driver.}(hjL*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjhhubjT)}(hhh]h}(h]h ]h"]h$]h&]entries](j`xsdfec_ldpc_params (C struct)c.xsdfec_ldpc_paramshNtauh1jShjhhhNhNubje)}(hhh](jj)}(hxsdfec_ldpc_paramsh]jp)}(hstruct xsdfec_ldpc_paramsh](j )}(hj )h]hstruct}(hjt*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjp*hhhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKubj )}(h h]h }(hj*hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hjp*hhhj*hKubjv)}(hxsdfec_ldpc_paramsh]j|)}(hjn*h]hxsdfec_ldpc_params}(hj*hhhNhNubah}(h]h ]jah"]h$]h&]uh1j{hj*ubah}(h]h ](jjeh"]h$]h&]hhuh1juhjp*hhhj*hKubeh}(h]h ]h"]h$]h&]hhjuh1jojjhjl*hhhj*hKubah}(h]jg*ah ](jjeh"]h$]h&]jj)jhuh1jihj*hKhji*hhubj)}(hhh]h)}(hUser data for LDPC codes.h]hUser data for LDPC codes.}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj*hhubah}(h]h ]h"]h$]h&]uh1jhji*hhhj*hKubeh}(h]h ](jstructeh"]h$]h&]jjjj*jj*jjjuh1jdhhhjhNhNubjf )}(hX<**Definition**:: struct xsdfec_ldpc_params { __u32 n; __u32 k; __u32 psize; __u32 nlayers; __u32 nqc; __u32 nmqc; __u32 nm; __u32 norm_type; __u32 no_packing; __u32 special_qc; __u32 no_final_parity; __u32 max_schedule; __u32 sc_off; __u32 la_off; __u32 qc_off; __u32 *sc_table; __u32 *la_table; __u32 *qc_table; __u16 code_id; }; **Members** ``n`` Number of code word bits ``k`` Number of information bits ``psize`` Size of sub-matrix ``nlayers`` Number of layers in code ``nqc`` Quasi Cyclic Number ``nmqc`` Number of M-sized QC operations in parity check matrix ``nm`` Number of M-size vectors in N ``norm_type`` Normalization required or not ``no_packing`` Determines if multiple QC ops should be performed ``special_qc`` Sub-Matrix property for Circulant weight > 0 ``no_final_parity`` Decide if final parity check needs to be performed ``max_schedule`` Experimental code word scheduling limit ``sc_off`` SC offset ``la_off`` LA offset ``qc_off`` QC offset ``sc_table`` Pointer to SC Table which must be page aligned ``la_table`` Pointer to LA Table which must be page aligned ``qc_table`` Pointer to QC Table which must be page aligned ``code_id`` LDPC Codeh](h)}(h**Definition**::h](j)}(h**Definition**h]h Definition}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj*ubh:}(hj*hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj*ubj))}(hXstruct xsdfec_ldpc_params { __u32 n; __u32 k; __u32 psize; __u32 nlayers; __u32 nqc; __u32 nmqc; __u32 nm; __u32 norm_type; __u32 no_packing; __u32 special_qc; __u32 no_final_parity; __u32 max_schedule; __u32 sc_off; __u32 la_off; __u32 qc_off; __u32 *sc_table; __u32 *la_table; __u32 *qc_table; __u16 code_id; };h]hXstruct xsdfec_ldpc_params { __u32 n; __u32 k; __u32 psize; __u32 nlayers; __u32 nqc; __u32 nmqc; __u32 nm; __u32 norm_type; __u32 no_packing; __u32 special_qc; __u32 no_final_parity; __u32 max_schedule; __u32 sc_off; __u32 la_off; __u32 qc_off; __u32 *sc_table; __u32 *la_table; __u32 *qc_table; __u16 code_id; };}hj*sbah}(h]h ]h"]h$]h&]hhuh1j)hk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj*ubh)}(h **Members**h]j)}(hj+h]hMembers}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj+ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj*ubj)}(hhh](j)}(h``n`` Number of code word bits h](j)}(h``n``h]j )}(hj#+h]hn}(hj%+hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj!+ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj+ubj)}(hhh]h)}(hNumber of code word bitsh]hNumber of code word bits}(hj<+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj8+hKhj9+ubah}(h]h ]h"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]uh1jhj8+hKhj+ubj)}(h!``k`` Number of information bits h](j)}(h``k``h]j )}(hj\+h]hk}(hj^+hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjZ+ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjV+ubj)}(hhh]h)}(hNumber of information bitsh]hNumber of information bits}(hju+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjq+hKhjr+ubah}(h]h ]h"]h$]h&]uh1jhjV+ubeh}(h]h ]h"]h$]h&]uh1jhjq+hKhj+ubj)}(h``psize`` Size of sub-matrix h](j)}(h ``psize``h]j )}(hj+h]hpsize}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj+ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj+ubj)}(hhh]h)}(hSize of sub-matrixh]hSize of sub-matrix}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+hKhj+ubah}(h]h ]h"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]uh1jhj+hKhj+ubj)}(h%``nlayers`` Number of layers in code h](j)}(h ``nlayers``h]j )}(hj+h]hnlayers}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj+ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj+ubj)}(hhh]h)}(hNumber of layers in codeh]hNumber of layers in code}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj+hKhj+ubah}(h]h ]h"]h$]h&]uh1jhj+ubeh}(h]h ]h"]h$]h&]uh1jhj+hKhj+ubj)}(h``nqc`` Quasi Cyclic Number h](j)}(h``nqc``h]j )}(hj,h]hnqc}(hj ,hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj,ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj,ubj)}(hhh]h)}(hQuasi Cyclic Numberh]hQuasi Cyclic Number}(hj ,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hKhj,ubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jhj,hKhj+ubj)}(h@``nmqc`` Number of M-sized QC operations in parity check matrix h](j)}(h``nmqc``h]j )}(hj@,h]hnmqc}(hjB,hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj>,ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj:,ubj)}(hhh]h)}(h6Number of M-sized QC operations in parity check matrixh]h6Number of M-sized QC operations in parity check matrix}(hjY,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjU,hKhjV,ubah}(h]h ]h"]h$]h&]uh1jhj:,ubeh}(h]h ]h"]h$]h&]uh1jhjU,hKhj+ubj)}(h%``nm`` Number of M-size vectors in N h](j)}(h``nm``h]j )}(hjy,h]hnm}(hj{,hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjw,ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjs,ubj)}(hhh]h)}(hNumber of M-size vectors in Nh]hNumber of M-size vectors in N}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hKhj,ubah}(h]h ]h"]h$]h&]uh1jhjs,ubeh}(h]h ]h"]h$]h&]uh1jhj,hKhj+ubj)}(h,``norm_type`` Normalization required or not h](j)}(h ``norm_type``h]j )}(hj,h]h norm_type}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj,ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj,ubj)}(hhh]h)}(hNormalization required or noth]hNormalization required or not}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj,hKhj,ubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jhj,hKhj+ubj)}(hA``no_packing`` Determines if multiple QC ops should be performed h](j)}(h``no_packing``h]j )}(hj,h]h no_packing}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj,ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj,ubj)}(hhh]h)}(h1Determines if multiple QC ops should be performedh]h1Determines if multiple QC ops should be performed}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hKhj-ubah}(h]h ]h"]h$]h&]uh1jhj,ubeh}(h]h ]h"]h$]h&]uh1jhj-hKhj+ubj)}(h<``special_qc`` Sub-Matrix property for Circulant weight > 0 h](j)}(h``special_qc``h]j )}(hj$-h]h special_qc}(hj&-hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj"-ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj-ubj)}(hhh]h)}(h,Sub-Matrix property for Circulant weight > 0h]h,Sub-Matrix property for Circulant weight > 0}(hj=-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj9-hKhj:-ubah}(h]h ]h"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]uh1jhj9-hKhj+ubj)}(hG``no_final_parity`` Decide if final parity check needs to be performed h](j)}(h``no_final_parity``h]j )}(hj]-h]hno_final_parity}(hj_-hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj[-ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjW-ubj)}(hhh]h)}(h2Decide if final parity check needs to be performedh]h2Decide if final parity check needs to be performed}(hjv-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjr-hKhjs-ubah}(h]h ]h"]h$]h&]uh1jhjW-ubeh}(h]h ]h"]h$]h&]uh1jhjr-hKhj+ubj)}(h9``max_schedule`` Experimental code word scheduling limit h](j)}(h``max_schedule``h]j )}(hj-h]h max_schedule}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj-ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj-ubj)}(hhh]h)}(h'Experimental code word scheduling limith]h'Experimental code word scheduling limit}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hKhj-ubah}(h]h ]h"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]uh1jhj-hKhj+ubj)}(h``sc_off`` SC offset h](j)}(h ``sc_off``h]j )}(hj-h]hsc_off}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj-ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj-ubj)}(hhh]h)}(h SC offseth]h SC offset}(hj-hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj-hKhj-ubah}(h]h ]h"]h$]h&]uh1jhj-ubeh}(h]h ]h"]h$]h&]uh1jhj-hKhj+ubj)}(h``la_off`` LA offset h](j)}(h ``la_off``h]j )}(hj.h]hla_off}(hj .hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj.ubj)}(hhh]h)}(h LA offseth]h LA offset}(hj!.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.hKhj.ubah}(h]h ]h"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]uh1jhj.hKhj+ubj)}(h``qc_off`` QC offset h](j)}(h ``qc_off``h]j )}(hjA.h]hqc_off}(hjC.hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj?.ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj;.ubj)}(hhh]h)}(h QC offseth]h QC offset}(hjZ.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjV.hKhjW.ubah}(h]h ]h"]h$]h&]uh1jhj;.ubeh}(h]h ]h"]h$]h&]uh1jhjV.hKhj+ubj)}(h<``sc_table`` Pointer to SC Table which must be page aligned h](j)}(h ``sc_table``h]j )}(hjz.h]hsc_table}(hj|.hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjx.ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjt.ubj)}(hhh]h)}(h.Pointer to SC Table which must be page alignedh]h.Pointer to SC Table which must be page aligned}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.hKhj.ubah}(h]h ]h"]h$]h&]uh1jhjt.ubeh}(h]h ]h"]h$]h&]uh1jhj.hKhj+ubj)}(h<``la_table`` Pointer to LA Table which must be page aligned h](j)}(h ``la_table``h]j )}(hj.h]hla_table}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj.ubj)}(hhh]h)}(h.Pointer to LA Table which must be page alignedh]h.Pointer to LA Table which must be page aligned}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj.hKhj.ubah}(h]h ]h"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]uh1jhj.hKhj+ubj)}(h<``qc_table`` Pointer to QC Table which must be page aligned h](j)}(h ``qc_table``h]j )}(hj.h]hqc_table}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj.ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj.ubj)}(hhh]h)}(h.Pointer to QC Table which must be page alignedh]h.Pointer to QC Table which must be page aligned}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj/hKhj/ubah}(h]h ]h"]h$]h&]uh1jhj.ubeh}(h]h ]h"]h$]h&]uh1jhj/hKhj+ubj)}(h``code_id`` LDPC Codeh](j)}(h ``code_id``h]j )}(hj%/h]hcode_id}(hj'/hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj#/ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj/ubj)}(hhh]h)}(h LDPC Codeh]h LDPC Code}(hj>/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj;/ubah}(h]h ]h"]h$]h&]uh1jhj/ubeh}(h]h ]h"]h$]h&]uh1jhj:/hKhj+ubeh}(h]h ]h"]h$]h&]uh1jhj*ubeh}(h]h ] kernelindentah"]h$]h&]uh1je hjhhhNhNubh)}(h**Description**h]j)}(hjh/h]h Description}(hjj/hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjf/ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjhhubh)}(hWThis structure describes the LDPC code that is passed to the driver by the application.h]hWThis structure describes the LDPC code that is passed to the driver by the application.}(hj~/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjhhubjT)}(hhh]h}(h]h ]h"]h$]h&]entries](j`xsdfec_status (C struct)c.xsdfec_statushNtauh1jShjhhhNhNubje)}(hhh](jj)}(h xsdfec_statush]jp)}(hstruct xsdfec_statush](j )}(hj )h]hstruct}(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/hhhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKubj )}(h h]h }(hj/hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj/hhhj/hKubjv)}(h xsdfec_statush]j|)}(hj/h]h xsdfec_status}(hj/hhhNhNubah}(h]h ]jah"]h$]h&]uh1j{hj/ubah}(h]h ](jjeh"]h$]h&]hhuh1juhj/hhhj/hKubeh}(h]h ]h"]h$]h&]hhjuh1jojjhj/hhhj/hKubah}(h]j/ah ](jjeh"]h$]h&]jj)jhuh1jihj/hKhj/hhubj)}(hhh]h)}(hStatus of SD-FEC core.h]hStatus of SD-FEC core.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj/hhubah}(h]h ]h"]h$]h&]uh1jhj/hhhj/hKubeh}(h]h ](jstructeh"]h$]h&]jjjj0jj0jjjuh1jdhhhjhNhNubjf )}(h**Definition**:: struct xsdfec_status { __u32 state; __s8 activity; }; **Members** ``state`` State of the SD-FEC core ``activity`` Describes if the SD-FEC instance is Activeh](h)}(h**Definition**::h](j)}(h**Definition**h]h Definition}(hj 0hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj0ubh:}(hj0hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj0ubj))}(h=struct xsdfec_status { __u32 state; __s8 activity; };h]h=struct xsdfec_status { __u32 state; __s8 activity; };}hj%0sbah}(h]h ]h"]h$]h&]hhuh1j)hk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj0ubh)}(h **Members**h]j)}(hj60h]hMembers}(hj80hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj40ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj0ubj)}(hhh](j)}(h#``state`` State of the SD-FEC core h](j)}(h ``state``h]j )}(hjU0h]hstate}(hjW0hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjS0ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjO0ubj)}(hhh]h)}(hState of the SD-FEC coreh]hState of the SD-FEC core}(hjn0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjj0hKhjk0ubah}(h]h ]h"]h$]h&]uh1jhjO0ubeh}(h]h ]h"]h$]h&]uh1jhjj0hKhjL0ubj)}(h7``activity`` Describes if the SD-FEC instance is Activeh](j)}(h ``activity``h]j )}(hj0h]hactivity}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj0ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj0ubj)}(hhh]h)}(h*Describes if the SD-FEC instance is Activeh]h*Describes if the SD-FEC instance is Active}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj0ubah}(h]h ]h"]h$]h&]uh1jhj0ubeh}(h]h ]h"]h$]h&]uh1jhj0hKhjL0ubeh}(h]h ]h"]h$]h&]uh1jhj0ubeh}(h]h ] kernelindentah"]h$]h&]uh1je hjhhhNhNubjT)}(hhh]h}(h]h ]h"]h$]h&]entries](j`xsdfec_irq (C struct) c.xsdfec_irqhNtauh1jShjhhhNhNubje)}(hhh](jj)}(h xsdfec_irqh]jp)}(hstruct xsdfec_irqh](j )}(hj )h]hstruct}(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0hhhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKubj )}(h h]h }(hj0hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj0hhhj0hKubjv)}(h xsdfec_irqh]j|)}(hj0h]h xsdfec_irq}(hj1hhhNhNubah}(h]h ]jah"]h$]h&]uh1j{hj1ubah}(h]h ](jjeh"]h$]h&]hhuh1juhj0hhhj0hKubeh}(h]h ]h"]h$]h&]hhjuh1jojjhj0hhhj0hKubah}(h]j0ah ](jjeh"]h$]h&]jj)jhuh1jihj0hKhj0hhubj)}(hhh]h)}(h!Enabling or Disabling Interrupts.h]h!Enabling or Disabling Interrupts.}(hj*1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj'1hhubah}(h]h ]h"]h$]h&]uh1jhj0hhhj0hKubeh}(h]h ](jstructeh"]h$]h&]jjjjB1jjB1jjjuh1jdhhhjhNhNubjf )}(h**Definition**:: struct xsdfec_irq { __s8 enable_isr; __s8 enable_ecc_isr; }; **Members** ``enable_isr`` If true enables the ISR ``enable_ecc_isr`` If true enables the ECC ISRh](h)}(h**Definition**::h](j)}(h**Definition**h]h Definition}(hjN1hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjJ1ubh:}(hjJ1hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjF1ubj))}(hDstruct xsdfec_irq { __s8 enable_isr; __s8 enable_ecc_isr; };h]hDstruct xsdfec_irq { __s8 enable_isr; __s8 enable_ecc_isr; };}hjg1sbah}(h]h ]h"]h$]h&]hhuh1j)hk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjF1ubh)}(h **Members**h]j)}(hjx1h]hMembers}(hjz1hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjv1ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjF1ubj)}(hhh](j)}(h'``enable_isr`` If true enables the ISR h](j)}(h``enable_isr``h]j )}(hj1h]h enable_isr}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj1ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj1ubj)}(hhh]h)}(hIf true enables the ISRh]hIf true enables the ISR}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj1hKhj1ubah}(h]h ]h"]h$]h&]uh1jhj1ubeh}(h]h ]h"]h$]h&]uh1jhj1hKhj1ubj)}(h.``enable_ecc_isr`` If true enables the ECC ISRh](j)}(h``enable_ecc_isr``h]j )}(hj1h]henable_ecc_isr}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj1ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj1ubj)}(hhh]h)}(hIf true enables the ECC ISRh]hIf true enables the ECC ISR}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj1ubah}(h]h ]h"]h$]h&]uh1jhj1ubeh}(h]h ]h"]h$]h&]uh1jhj1hKhj1ubeh}(h]h ]h"]h$]h&]uh1jhjF1ubeh}(h]h ] kernelindentah"]h$]h&]uh1je hjhhhNhNubjT)}(hhh]h}(h]h ]h"]h$]h&]entries](j`xsdfec_config (C struct)c.xsdfec_confighNtauh1jShjhhhNhNubje)}(hhh](jj)}(h xsdfec_configh]jp)}(hstruct xsdfec_configh](j )}(hj )h]hstruct}(hj*2hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&2hhhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKubj )}(h h]h }(hj82hhhNhNubah}(h]h ]j ah"]h$]h&]uh1j hj&2hhhj72hKubjv)}(h xsdfec_configh]j|)}(hj$2h]h xsdfec_config}(hjJ2hhhNhNubah}(h]h ]jah"]h$]h&]uh1j{hjF2ubah}(h]h ](jjeh"]h$]h&]hhuh1juhj&2hhhj72hKubeh}(h]h ]h"]h$]h&]hhjuh1jojjhj"2hhhj72hKubah}(h]j2ah ](jjeh"]h$]h&]jj)jhuh1jihj72hKhj2hhubj)}(hhh]h)}(hConfiguration of SD-FEC core.h]hConfiguration of SD-FEC core.}(hjl2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhji2hhubah}(h]h ]h"]h$]h&]uh1jhj2hhhj72hKubeh}(h]h ](jstructeh"]h$]h&]jjjj2jj2jjjuh1jdhhhjhNhNubjf )}(hX**Definition**:: struct xsdfec_config { __u32 code; __u32 order; __u32 din_width; __u32 din_word_include; __u32 dout_width; __u32 dout_word_include; struct xsdfec_irq irq; __s8 bypass; __s8 code_wr_protect; }; **Members** ``code`` The codes being used by the SD-FEC instance ``order`` Order of Operation ``din_width`` Width of the DIN AXI4-Stream ``din_word_include`` How DIN_WORDS are inputted ``dout_width`` Width of the DOUT AXI4-Stream ``dout_word_include`` HOW DOUT_WORDS are outputted ``irq`` Enabling or disabling interrupts ``bypass`` Is the core being bypassed ``code_wr_protect`` Is write protection of LDPC codes enabledh](h)}(h**Definition**::h](j)}(h**Definition**h]h Definition}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj2ubh:}(hj2hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj2ubj))}(hstruct xsdfec_config { __u32 code; __u32 order; __u32 din_width; __u32 din_word_include; __u32 dout_width; __u32 dout_word_include; struct xsdfec_irq irq; __s8 bypass; __s8 code_wr_protect; };h]hstruct xsdfec_config { __u32 code; __u32 order; __u32 din_width; __u32 din_word_include; __u32 dout_width; __u32 dout_word_include; struct xsdfec_irq irq; __s8 bypass; __s8 code_wr_protect; };}hj2sbah}(h]h ]h"]h$]h&]hhuh1j)hk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj2ubh)}(h **Members**h]j)}(hj2h]hMembers}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1jhj2ubah}(h]h ]h"]h$]h&]uh1hhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj2ubj)}(hhh](j)}(h5``code`` The codes being used by the SD-FEC instance h](j)}(h``code``h]j )}(hj2h]hcode}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj2ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj2ubj)}(hhh]h)}(h+The codes being used by the SD-FEC instanceh]h+The codes being used by the SD-FEC instance}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj2hKhj2ubah}(h]h ]h"]h$]h&]uh1jhj2ubeh}(h]h ]h"]h$]h&]uh1jhj2hKhj2ubj)}(h``order`` Order of Operation h](j)}(h ``order``h]j )}(hj3h]horder}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj3ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj 3ubj)}(hhh]h)}(hOrder of Operationh]hOrder of Operation}(hj+3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj'3hKhj(3ubah}(h]h ]h"]h$]h&]uh1jhj 3ubeh}(h]h ]h"]h$]h&]uh1jhj'3hKhj2ubj)}(h+``din_width`` Width of the DIN AXI4-Stream h](j)}(h ``din_width``h]j )}(hjK3h]h din_width}(hjM3hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjI3ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjE3ubj)}(hhh]h)}(hWidth of the DIN AXI4-Streamh]hWidth of the DIN AXI4-Stream}(hjd3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj`3hKhja3ubah}(h]h ]h"]h$]h&]uh1jhjE3ubeh}(h]h ]h"]h$]h&]uh1jhj`3hKhj2ubj)}(h0``din_word_include`` How DIN_WORDS are inputted h](j)}(h``din_word_include``h]j )}(hj3h]hdin_word_include}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj3ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj~3ubj)}(hhh]h)}(hHow DIN_WORDS are inputtedh]hHow DIN_WORDS are inputted}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj3hKhj3ubah}(h]h ]h"]h$]h&]uh1jhj~3ubeh}(h]h ]h"]h$]h&]uh1jhj3hKhj2ubj)}(h-``dout_width`` Width of the DOUT AXI4-Stream h](j)}(h``dout_width``h]j )}(hj3h]h dout_width}(hj3hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj3ubah}(h]h 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./include/uapi/misc/xilinx_sdfec.hhKhj)4ubj)}(hhh]h)}(h Enabling or disabling interruptsh]h Enabling or disabling interrupts}(hjH4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjD4hKhjE4ubah}(h]h ]h"]h$]h&]uh1jhj)4ubeh}(h]h ]h"]h$]h&]uh1jhjD4hKhj2ubj)}(h&``bypass`` Is the core being bypassed h](j)}(h ``bypass``h]j )}(hjh4h]hbypass}(hjj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j hjf4ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhjb4ubj)}(hhh]h)}(hIs the core being bypassedh]hIs the core being bypassed}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj}4hKhj~4ubah}(h]h ]h"]h$]h&]uh1jhjb4ubeh}(h]h ]h"]h$]h&]uh1jhj}4hKhj2ubj)}(h=``code_wr_protect`` Is write protection of LDPC codes enabledh](j)}(h``code_wr_protect``h]j )}(hj4h]hcode_wr_protect}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1j hj4ubah}(h]h ]h"]h$]h&]uh1jhk/var/lib/git/docbuild/linux/Documentation/misc-devices/xilinx_sdfec:291: ./include/uapi/misc/xilinx_sdfec.hhKhj4ubj)}(hhh]h)}(h)Is write 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