€•n\Œsphinx.addnodes”Œdocument”“”)”}”(Œ rawsource”Œ”Œchildren”]”(Œ translations”Œ LanguagesNode”“”)”}”(hhh]”(hŒ pending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ refdomain”Œstd”Œreftype”Œdoc”Œ reftarget”Œ/translations/zh_CN/iio/ad7606”Œmodname”NŒ classname”NŒ refexplicit”ˆuŒtagname”hhh ubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ/translations/zh_TW/iio/ad7606”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ/translations/it_IT/iio/ad7606”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ/translations/ja_JP/iio/ad7606”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ/translations/ko_KR/iio/ad7606”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒSpanish”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ/translations/sp_SP/iio/ad7606”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h hhŒ _document”hŒsource”NŒline”NubhŒcomment”“”)”}”(hŒ%SPDX-License-Identifier: GPL-2.0-only”h]”hŒ%SPDX-License-Identifier: GPL-2.0-only”…””}”hh£sbah}”(h]”h ]”h"]”h$]”h&]”Œ xml:space”Œpreserve”uh1h¡hhhžhhŸŒ8/var/lib/git/docbuild/linux/Documentation/iio/ad7606.rst”h KubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒ AD7606 driver”h]”hŒ AD7606 driver”…””}”(hh»hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hh¶hžhhŸh³h KubhŒ paragraph”“”)”}”(hŒ]ADC driver for Analog Devices Inc. AD7606 and similar devices. The module name is ``ad7606``.”h]”(hŒRADC driver for Analog Devices Inc. AD7606 and similar devices. The module name is ”…””}”(hhËhžhhŸNh NubhŒliteral”“”)”}”(hŒ ``ad7606``”h]”hŒad7606”…””}”(hhÕhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÓhhËubhŒ.”…””}”(hhËhžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khh¶hžhubhµ)”}”(hhh]”(hº)”}”(hŒSupported devices”h]”hŒSupported devices”…””}”(hhðhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hhíhžhhŸh³h K ubhÊ)”}”(hŒ1The following chips are supported by this driver:”h]”hŒ1The following chips are supported by this driver:”…””}”(hhþhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K hhíhžhubhŒ bullet_list”“”)”}”(hhh]”(hŒ list_item”“”)”}”(hŒ:`AD7605 `_”h]”hÊ)”}”(hjh]”(hŒ reference”“”)”}”(hjh]”hŒAD7605”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”Œname”ŒAD7605”Œrefuri”Œ.https://www.analog.com/en/products/ad7605.html”uh1jhjubhŒtarget”“”)”}”(hŒ1 ”h]”h}”(h]”Œad7605”ah ]”h"]”Œad7605”ah$]”h&]”Œrefuri”j,uh1j-Œ referenced”Khjubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khjubah}”(h]”h ]”h"]”h$]”h&]”uh1jhjhžhhŸh³h Nubj)”}”(hŒ:`AD7606 `_”h]”hÊ)”}”(hjKh]”(j)”}”(hjKh]”hŒAD7606”…””}”(hjPhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”Œname”ŒAD7606”j+Œ.https://www.analog.com/en/products/ad7606.html”uh1jhjMubj.)”}”(hŒ1 ”h]”h}”(h]”Œad7606”ah ]”h"]”Œad7606”ah$]”h&]”Œrefuri”j_uh1j-j<KhjMubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KhjIubah}”(h]”h ]”h"]”h$]”h&]”uh1jhjhžhhŸh³h Nubj)”}”(hŒ<`AD7606B `_”h]”hÊ)”}”(hj{h]”(j)”}”(hj{h]”hŒAD7606B”…””}”(hj€hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”Œname”ŒAD7606B”j+Œ/https://www.analog.com/en/products/ad7606b.html”uh1jhj}ubj.)”}”(hŒ2 ”h]”h}”(h]”Œad7606b”ah ]”h"]”Œad7606b”ah$]”h&]”Œrefuri”juh1j-j<Khj}ubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khjyubah}”(h]”h ]”h"]”h$]”h&]”uh1jhjhžhhŸh³h Nubj)”}”(hŒ;`AD7616 `_ ”h]”hÊ)”}”(hŒ:`AD7616 `_”h]”(j)”}”(hj¯h]”hŒAD7616”…””}”(hj±hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”Œname”ŒAD7616”j+Œ.https://www.analog.com/en/products/ad7616.html”uh1jhj­ubj.)”}”(hŒ1 ”h]”h}”(h]”Œad7616”ah ]”h"]”Œad7616”ah$]”h&]”Œrefuri”jÀuh1j-j<Khj­ubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khj©ubah}”(h]”h ]”h"]”h$]”h&]”uh1jhjhžhhŸh³h Nubeh}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ*”uh1j hŸh³h Khhíhžhubeh}”(h]”Œsupported-devices”ah ]”h"]”Œsupported devices”ah$]”h&]”uh1h´hh¶hžhhŸh³h K ubhµ)”}”(hhh]”(hº)”}”(hŒSupported features”h]”hŒSupported features”…””}”(hjíhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hjêhžhhŸh³h Kubhµ)”}”(hhh]”(hº)”}”(hŒSPI wiring modes”h]”hŒSPI wiring modes”…””}”(hjþhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hjûhžhhŸh³h KubhÊ)”}”(hŒiThese ADCs can output data on several SDO lines (1/2/4/8). The driver currently supports only 1 SDO line.”h]”hŒiThese ADCs can output data on several SDO lines (1/2/4/8). The driver currently supports only 1 SDO line.”…””}”(hj hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khjûhžhubeh}”(h]”Œspi-wiring-modes”ah ]”h"]”Œspi wiring modes”ah$]”h&]”uh1h´hjêhžhhŸh³h Kubhµ)”}”(hhh]”(hº)”}”(hŒParallel wiring mode”h]”hŒParallel wiring mode”…””}”(hj%hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj"hžhhŸh³h KubhÊ)”}”(hŒãThere is also a parallel interface, with 16 lines (that can be reduced to 8 in byte mode). The parallel interface is selected by declaring the device as platform in the device tree (with no io-backends node defined, see below).”h]”hŒãThere is also a parallel interface, with 16 lines (that can be reduced to 8 in byte mode). The parallel interface is selected by declaring the device as platform in the device tree (with no io-backends node defined, see below).”…””}”(hj3hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K hj"hžhubeh}”(h]”Œparallel-wiring-mode”ah ]”h"]”Œparallel wiring mode”ah$]”h&]”uh1h´hjêhžhhŸh³h Kubhµ)”}”(hhh]”(hº)”}”(hŒIIO-backend mode”h]”hŒIIO-backend mode”…””}”(hjLhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hjIhžhhŸh³h K%ubhÊ)”}”(hŒöThis mode allows to reach the best sample rates, but it requires an external hardware (eg HDL or APU) to handle the low level communication. The backend mode is enabled when through the definition of the "io-backends" property in the device tree.”h]”hŒúThis mode allows to reach the best sample rates, but it requires an external hardware (eg HDL or APU) to handle the low level communication. The backend mode is enabled when through the definition of the “io-backends†property in the device tree.”…””}”(hjZhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K'hjIhžhubhÊ)”}”(hŒ·The reference configuration for the current implementation of IIO-backend mode is the HDL reference provided by ADI: https://wiki.analog.com/resources/eval/user-guides/ad7606x-fmc/hdl”h]”(hŒuThe reference configuration for the current implementation of IIO-backend mode is the HDL reference provided by ADI: ”…””}”(hjhhžhhŸNh Nubj)”}”(hŒBhttps://wiki.analog.com/resources/eval/user-guides/ad7606x-fmc/hdl”h]”hŒBhttps://wiki.analog.com/resources/eval/user-guides/ad7606x-fmc/hdl”…””}”(hjphžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”jruh1jhjhubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K,hjIhžhubhÊ)”}”(hŒxThis implementation embeds an IIO-backend compatible IP (adi-axi-adc) and a PWM connected to the conversion trigger pin.”h]”hŒxThis implementation embeds an IIO-backend compatible IP (adi-axi-adc) and a PWM connected to the conversion trigger pin.”…””}”(hj…hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K0hjIhžhubhŒ literal_block”“”)”}”(hXƒ+---+ +---------------------------- | | +-------+ |AD76xx | A | controls | | | | D |-------------->| PWM |-------------->| cnvst | 7 | | | | | 6 | +-------+ | | 0 | controls +-----------+-----------+ | | 6 |---------->| | |<--| frstdata | | | Backend | Backend |<--| busy | D | | Driver | | | | R | | | |-->| clk | I | requests |+---------+| DMA | | | V |----------->| Buffer ||<---- |<=>| DATA | E | |+---------+| | | | R | +-----------+-----------+ | | |-------------------------------------->| reset/configuration gpios +---+ +-----------------------------”h]”hXƒ+---+ +---------------------------- | | +-------+ |AD76xx | A | controls | | | | D |-------------->| PWM |-------------->| cnvst | 7 | | | | | 6 | +-------+ | | 0 | controls +-----------+-----------+ | | 6 |---------->| | |<--| frstdata | | | Backend | Backend |<--| busy | D | | Driver | | | | R | | | |-->| clk | I | requests |+---------+| DMA | | | V |----------->| Buffer ||<---- |<=>| DATA | E | |+---------+| | | | R | +-----------+-----------+ | | |-------------------------------------->| reset/configuration gpios +---+ +-----------------------------”…””}”hj•sbah}”(h]”h ]”h"]”h$]”h&]”h±h²Œforce”‰Œlanguage”Œnone”Œhighlight_args”}”uh1j“hŸh³h K3hjIhžhubeh}”(h]”Œiio-backend-mode”ah ]”h"]”Œiio-backend mode”ah$]”h&]”uh1h´hjêhžhhŸh³h K%ubhµ)”}”(hhh]”(hº)”}”(hŒSoftware and hardware modes”h]”hŒSoftware and hardware modes”…””}”(hj³hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj°hžhhŸh³h KIubhÊ)”}”(hŒvWhile all the AD7606/AD7616 series parts can be configured using GPIOs, some of them can be configured using register.”h]”hŒvWhile all the AD7606/AD7616 series parts can be configured using GPIOs, some of them can be configured using register.”…””}”(hjÁhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KKhj°hžhubhÊ)”}”(hŒ±The chips that support software mode have more values available for configuring the device, as well as more settings, and allow to control the range and calibration per channel.”h]”hŒ±The chips that support software mode have more values available for configuring the device, as well as more settings, and allow to control the range and calibration per channel.”…””}”(hjÏhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KNhj°hžhubhŒdefinition_list”“”)”}”(hhh]”hŒdefinition_list_item”“”)”}”(hŒKThe following settings are available per channel in software mode: - Scale ”h]”(hŒterm”“”)”}”(hŒBThe following settings are available per channel in software mode:”h]”hŒBThe following settings are available per channel in software mode:”…””}”(hjêhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1jèhŸh³h KShjäubhŒ definition”“”)”}”(hhh]”j )”}”(hhh]”j)”}”(hŒScale ”h]”hÊ)”}”(hŒScale”h]”hŒScale”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KShjubah}”(h]”h ]”h"]”h$]”h&]”uh1jhjýubah}”(h]”h ]”h"]”h$]”h&]”jàŒ-”uh1j hŸh³h KShjúubah}”(h]”h ]”h"]”h$]”h&]”uh1jøhjäubeh}”(h]”h ]”h"]”h$]”h&]”uh1jâhŸh³h KShjßubah}”(h]”h ]”h"]”h$]”h&]”uh1jÝhj°hžhhŸNh NubhÊ)”}”(hŒHAlso, there is a broader choice of oversampling ratios in software mode.”h]”hŒHAlso, there is a broader choice of oversampling ratios in software mode.”…””}”(hj1hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KUhj°hžhubeh}”(h]”Œsoftware-and-hardware-modes”ah ]”h"]”Œsoftware and hardware modes”ah$]”h&]”uh1h´hjêhžhhŸh³h KIubhµ)”}”(hhh]”(hº)”}”(hŒConversion triggering”h]”hŒConversion triggering”…””}”(hjJhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hjGhžhhŸh³h KXubhÊ)”}”(hŒ5The conversion can be triggered by two distinct ways:”h]”hŒ5The conversion can be triggered by two distinct ways:”…””}”(hjXhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KZhjGhžhubhŒ block_quote”“”)”}”(hX- A GPIO is connected to the conversion trigger pin, and this GPIO is controlled by the driver directly. In this configuration, the driver sets back the conversion trigger pin to high as soon as it has read all the conversions. - An external source is connected to the conversion trigger pin. In the current implementation, it must be a PWM. In this configuration, the driver does not control directly the conversion trigger pin. Instead, it can control the PWM's frequency. This trigger is enabled only for iio-backend. ”h]”j )”}”(hhh]”(j)”}”(hŒãA GPIO is connected to the conversion trigger pin, and this GPIO is controlled by the driver directly. In this configuration, the driver sets back the conversion trigger pin to high as soon as it has read all the conversions. ”h]”hÊ)”}”(hŒâA GPIO is connected to the conversion trigger pin, and this GPIO is controlled by the driver directly. In this configuration, the driver sets back the conversion trigger pin to high as soon as it has read all the conversions.”h]”hŒâA GPIO is connected to the conversion trigger pin, and this GPIO is controlled by the driver directly. In this configuration, the driver sets back the conversion trigger pin to high as soon as it has read all the conversions.”…””}”(hjshžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K\hjoubah}”(h]”h ]”h"]”h$]”h&]”uh1jhjlubj)”}”(hX#An external source is connected to the conversion trigger pin. In the current implementation, it must be a PWM. In this configuration, the driver does not control directly the conversion trigger pin. Instead, it can control the PWM's frequency. This trigger is enabled only for iio-backend. ”h]”hÊ)”}”(hX"An external source is connected to the conversion trigger pin. In the current implementation, it must be a PWM. In this configuration, the driver does not control directly the conversion trigger pin. Instead, it can control the PWM's frequency. This trigger is enabled only for iio-backend.”h]”hX$An external source is connected to the conversion trigger pin. In the current implementation, it must be a PWM. In this configuration, the driver does not control directly the conversion trigger pin. Instead, it can control the PWM’s frequency. This trigger is enabled only for iio-backend.”…””}”(hj‹hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K`hj‡ubah}”(h]”h ]”h"]”h$]”h&]”uh1jhjlubeh}”(h]”h ]”h"]”h$]”h&]”jàjuh1j hŸh³h K\hjhubah}”(h]”h ]”h"]”h$]”h&]”uh1jfhŸh³h K\hjGhžhubeh}”(h]”Œconversion-triggering”ah ]”h"]”Œconversion triggering”ah$]”h&]”uh1h´hjêhžhhŸh³h KXubhµ)”}”(hhh]”(hº)”}”(hŒReference voltage”h]”hŒReference voltage”…””}”(hj¶hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj³hžhhŸh³h KfubhÊ)”}”(hŒ32 possible reference voltage sources are supported:”h]”hŒ32 possible reference voltage sources are supported:”…””}”(hjÄhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Khhj³hžhubjg)”}”(hŒ8- Internal reference (2.5V) - External reference (2.5V) ”h]”j )”}”(hhh]”(j)”}”(hŒInternal reference (2.5V)”h]”hÊ)”}”(hjÛh]”hŒInternal reference (2.5V)”…””}”(hjÝhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h KjhjÙubah}”(h]”h ]”h"]”h$]”h&]”uh1jhjÖubj)”}”(hŒExternal reference (2.5V) ”h]”hÊ)”}”(hŒExternal reference (2.5V)”h]”hŒExternal reference (2.5V)”…””}”(hjôhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Kkhjðubah}”(h]”h ]”h"]”h$]”h&]”uh1jhjÖubeh}”(h]”h ]”h"]”h$]”h&]”jàjuh1j hŸh³h KjhjÒubah}”(h]”h ]”h"]”h$]”h&]”uh1jfhŸh³h Kjhj³hžhubhÊ)”}”(hŒ›The source is determined by the device tree. If ``refin-supply`` is present, then the external reference is used, otherwise the internal reference is used.”h]”(hŒ0The source is determined by the device tree. If ”…””}”(hjhžhhŸNh NubhÔ)”}”(hŒ``refin-supply``”h]”hŒ refin-supply”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÓhjubhŒ[ is present, then the external reference is used, otherwise the internal reference is used.”…””}”(hjhžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Kmhj³hžhubeh}”(h]”Œreference-voltage”ah ]”h"]”Œreference voltage”ah$]”h&]”uh1h´hjêhžhhŸh³h Kfubhµ)”}”(hhh]”(hº)”}”(hŒ Oversampling”h]”hŒ Oversampling”…””}”(hj?hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj<hžhhŸh³h KqubhÊ)”}”(hŒ™This family supports oversampling to improve SNR. In software mode, the following ratios are available: 1 (oversampling disabled)/2/4/8/16/32/64/128/256.”h]”hŒ™This family supports oversampling to improve SNR. In software mode, the following ratios are available: 1 (oversampling disabled)/2/4/8/16/32/64/128/256.”…””}”(hjMhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Kshj<hžhubeh}”(h]”Œ oversampling”ah ]”h"]”Œ oversampling”ah$]”h&]”uh1h´hjêhžhhŸh³h Kqubhµ)”}”(hhh]”(hº)”}”(hŒUnimplemented features”h]”hŒUnimplemented features”…””}”(hjfhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hjchžhhŸh³h Kxubj )”}”(hhh]”(j)”}”(hŒ2/4/8 SDO lines”h]”hÊ)”}”(hjyh]”hŒ2/4/8 SDO lines”…””}”(hj{hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h Kzhjwubah}”(h]”h ]”h"]”h$]”h&]”uh1jhjthžhhŸh³h Nubj)”}”(hŒCRC indication”h]”hÊ)”}”(hjh]”hŒCRC indication”…””}”(hj’hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K{hjŽubah}”(h]”h ]”h"]”h$]”h&]”uh1jhjthžhhŸh³h Nubj)”}”(hŒ Calibration ”h]”hÊ)”}”(hŒ Calibration”h]”hŒ Calibration”…””}”(hj©hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K|hj¥ubah}”(h]”h ]”h"]”h$]”h&]”uh1jhjthžhhŸh³h Nubeh}”(h]”h ]”h"]”h$]”h&]”jàjuh1j hŸh³h Kzhjchžhubeh}”(h]”Œunimplemented-features”ah ]”h"]”Œunimplemented features”ah$]”h&]”uh1h´hjêhžhhŸh³h Kxubeh}”(h]”Œsupported-features”ah ]”h"]”Œsupported features”ah$]”h&]”uh1h´hh¶hžhhŸh³h Kubhµ)”}”(hhh]”(hº)”}”(hŒDevice buffers”h]”hŒDevice buffers”…””}”(hjÖhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hjÓhžhhŸh³h Kubhµ)”}”(hhh]”(hº)”}”(hŒIIO triggered buffer”h]”hŒIIO triggered buffer”…””}”(hjçhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hjähžhhŸh³h K‚ubhÊ)”}”(hX=This driver supports IIO triggered buffers, with a "built in" trigger, i.e the trigger is allocated and linked by the driver, and a new conversion is triggered as soon as the samples are transferred, and a timestamp channel is added to make up for the potential jitter induced by the delays in the interrupt handling.”h]”hXAThis driver supports IIO triggered buffers, with a “built in†trigger, i.e the trigger is allocated and linked by the driver, and a new conversion is triggered as soon as the samples are transferred, and a timestamp channel is added to make up for the potential jitter induced by the delays in the interrupt handling.”…””}”(hjõhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÉhŸh³h K„hjähžhubeh}”(h]”Œiio-triggered-buffer”ah ]”h"]”Œiio triggered buffer”ah$]”h&]”uh1h´hjÓhžhhŸh³h K‚ubhµ)”}”(hhh]”(hº)”}”(hŒIIO backend buffer”h]”hŒIIO backend buffer”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¹hj hžhhŸh³h KŠubhÊ)”}”(hXkWhen IIO backend is used, the trigger is not needed, and the sample rate is considered as stable. There is no timestamp channel. The communication is delegated to an external logic, called a backend, and the backend's driver handles the buffer. When this mode is enabled, the driver cannot control the conversion pin, because the busy pin is bound to the backend.”h]”hXmWhen IIO backend is used, the trigger is not needed, and the sample rate is considered as stable. There is no timestamp channel. The communication is delegated to an external logic, called a backend, and the backend’s driver handles the buffer. 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