€•1sŒsphinx.addnodes”Œdocument”“”)”}”(Œ rawsource”Œ”Œchildren”]”(Œ translations”Œ LanguagesNode”“”)”}”(hhh]”(hŒ pending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ refdomain”Œstd”Œreftype”Œdoc”Œ reftarget”Œ'/translations/zh_CN/i2c/slave-interface”Œmodname”NŒ classname”NŒ refexplicit”ˆuŒtagname”hhh ubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ'/translations/zh_TW/i2c/slave-interface”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ'/translations/it_IT/i2c/slave-interface”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ'/translations/ja_JP/i2c/slave-interface”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ'/translations/ko_KR/i2c/slave-interface”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒSpanish”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ'/translations/sp_SP/i2c/slave-interface”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h hhŒ _document”hŒsource”NŒline”NubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒ%Linux I2C slave interface description”h]”hŒ%Linux I2C slave interface description”…””}”(hh¨hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hh£hžhhŸŒA/var/lib/git/docbuild/linux/Documentation/i2c/slave-interface.rst”h KubhŒ paragraph”“”)”}”(hŒ5by Wolfram Sang in 2014-15”h]”(hŒby Wolfram Sang <”…””}”(hh¹hžhhŸNh NubhŒ reference”“”)”}”(hŒwsa@sang-engineering.com”h]”hŒwsa@sang-engineering.com”…””}”(hhÃhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”Œmailto:wsa@sang-engineering.com”uh1hÁhh¹ubhŒ > in 2014-15”…””}”(hh¹hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Khh£hžhubh¸)”}”(hXLinux can also be an I2C slave if the I2C controller in use has slave functionality. For that to work, one needs slave support in the bus driver plus a hardware independent software backend providing the actual functionality. An example for the latter is the slave-eeprom driver, which acts as a dual memory driver. While another I2C master on the bus can access it like a regular EEPROM, the Linux I2C slave can access the content via sysfs and handle data as needed. The backend driver and the I2C bus driver communicate via events. Here is a small graph visualizing the data flow and the means by which data is transported. The dotted line marks only one example. The backend could also use a character device, be in-kernel only, or something completely different::”h]”hXÿLinux can also be an I2C slave if the I2C controller in use has slave functionality. For that to work, one needs slave support in the bus driver plus a hardware independent software backend providing the actual functionality. An example for the latter is the slave-eeprom driver, which acts as a dual memory driver. While another I2C master on the bus can access it like a regular EEPROM, the Linux I2C slave can access the content via sysfs and handle data as needed. The backend driver and the I2C bus driver communicate via events. Here is a small graph visualizing the data flow and the means by which data is transported. The dotted line marks only one example. The backend could also use a character device, be in-kernel only, or something completely different:”…””}”(hhÝhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Khh£hžhubhŒ literal_block”“”)”}”(hXò e.g. sysfs I2C slave events I/O registers +-----------+ v +---------+ v +--------+ v +------------+ | Userspace +........+ Backend +-----------+ Driver +-----+ Controller | +-----------+ +---------+ +--------+ +------------+ | | ----------------------------------------------------------------+-- I2C --------------------------------------------------------------+---- Bus”h]”hXò e.g. sysfs I2C slave events I/O registers +-----------+ v +---------+ v +--------+ v +------------+ | Userspace +........+ Backend +-----------+ Driver +-----+ Controller | +-----------+ +---------+ +--------+ +------------+ | | ----------------------------------------------------------------+-- I2C --------------------------------------------------------------+---- Bus”…””}”hhísbah}”(h]”h ]”h"]”h$]”h&]”Œ xml:space”Œpreserve”uh1hëhŸh¶h Khh£hžhubh¸)”}”(hŒNote: Technically, there is also the I2C core between the backend and the driver. However, at this time of writing, the layer is transparent.”h]”hŒNote: Technically, there is also the I2C core between the backend and the driver. However, at this time of writing, the layer is transparent.”…””}”(hhýhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Khh£hžhubh¢)”}”(hhh]”(h§)”}”(hŒ User manual”h]”hŒ User manual”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hj hžhhŸh¶h K ubh¸)”}”(hX‡I2C slave backends behave like standard I2C clients. So, you can instantiate them as described in the document instantiating-devices.rst. The only difference is that i2c slave backends have their own address space. So, you have to add 0x1000 to the address you would originally request. An example for instantiating the slave-eeprom driver from userspace at the 7 bit address 0x64 on bus 1::”h]”hX†I2C slave backends behave like standard I2C clients. So, you can instantiate them as described in the document instantiating-devices.rst. The only difference is that i2c slave backends have their own address space. So, you have to add 0x1000 to the address you would originally request. An example for instantiating the slave-eeprom driver from userspace at the 7 bit address 0x64 on bus 1:”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K"hj hžhubhì)”}”(hŒA# echo slave-24c02 0x1064 > /sys/bus/i2c/devices/i2c-1/new_device”h]”hŒA# echo slave-24c02 0x1064 > /sys/bus/i2c/devices/i2c-1/new_device”…””}”hj*sbah}”(h]”h ]”h"]”h$]”h&]”hûhüuh1hëhŸh¶h K)hj hžhubh¸)”}”(hŒbEach backend should come with separate documentation to describe its specific behaviour and setup.”h]”hŒbEach backend should come with separate documentation to describe its specific behaviour and setup.”…””}”(hj8hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K+hj hžhubeh}”(h]”Œ user-manual”ah ]”h"]”Œ user manual”ah$]”h&]”uh1h¡hh£hžhhŸh¶h K ubh¢)”}”(hhh]”(h§)”}”(hŒDeveloper manual”h]”hŒDeveloper manual”…””}”(hjQhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjNhžhhŸh¶h K0ubh¸)”}”(hŒÃFirst, the events which are used by the bus driver and the backend will be described in detail. After that, some implementation hints for extending bus drivers and writing backends will be given.”h]”hŒÃFirst, the events which are used by the bus driver and the backend will be described in detail. After that, some implementation hints for extending bus drivers and writing backends will be given.”…””}”(hj_hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K2hjNhžhubh¢)”}”(hhh]”(h§)”}”(hŒI2C slave events”h]”hŒI2C slave events”…””}”(hjphžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjmhžhhŸh¶h K8ubh¸)”}”(hŒKThe bus driver sends an event to the backend using the following function::”h]”hŒJThe bus driver sends an event to the backend using the following function:”…””}”(hj~hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K:hjmhžhubhì)”}”(hŒ*ret = i2c_slave_event(client, event, &val)”h]”hŒ*ret = i2c_slave_event(client, event, &val)”…””}”hjŒsbah}”(h]”h ]”h"]”h$]”h&]”hûhüuh1hëhŸh¶h Khjmhžhubh¸)”}”(hŒ Event types:”h]”hŒ Event types:”…””}”(hj¨hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KEhjmhžhubhŒ bullet_list”“”)”}”(hhh]”hŒ list_item”“”)”}”(hŒmI2C_SLAVE_WRITE_REQUESTED (mandatory) 'val': unused 'ret': 0 if the backend is ready, otherwise some errno ”h]”(h¸)”}”(hŒ%I2C_SLAVE_WRITE_REQUESTED (mandatory)”h]”hŒ%I2C_SLAVE_WRITE_REQUESTED (mandatory)”…””}”(hjÁhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KGhj½ubh¸)”}”(hŒ 'val': unused”h]”hŒ‘val’: unused”…””}”(hjÏhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KIhj½ubh¸)”}”(hŒ6'ret': 0 if the backend is ready, otherwise some errno”h]”hŒ:‘ret’: 0 if the backend is ready, otherwise some errno”…””}”(hjÝhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KKhj½ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j»hj¸hžhhŸh¶h Nubah}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ*”uh1j¶hŸh¶h KGhjmhžhubh¸)”}”(hXíAnother I2C master wants to write data to us. This event should be sent once our own address and the write bit was detected. The data did not arrive yet, so there is nothing to process or return. After returning, the bus driver must always ack the address phase. If 'ret' is zero, backend initialization or wakeup is done and further data may be received. If 'ret' is an errno, the bus driver should nack all incoming bytes until the next stop condition to enforce a retry of the transmission.”h]”hXõAnother I2C master wants to write data to us. This event should be sent once our own address and the write bit was detected. The data did not arrive yet, so there is nothing to process or return. After returning, the bus driver must always ack the address phase. If ‘ret’ is zero, backend initialization or wakeup is done and further data may be received. If ‘ret’ is an errno, the bus driver should nack all incoming bytes until the next stop condition to enforce a retry of the transmission.”…””}”(hjùhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KMhjmhžhubj·)”}”(hhh]”j¼)”}”(hŒdI2C_SLAVE_READ_REQUESTED (mandatory) 'val': backend returns first byte to be sent 'ret': always 0 ”h]”(h¸)”}”(hŒ$I2C_SLAVE_READ_REQUESTED (mandatory)”h]”hŒ$I2C_SLAVE_READ_REQUESTED (mandatory)”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KUhj ubh¸)”}”(hŒ,'val': backend returns first byte to be sent”h]”hŒ0‘val’: backend returns first byte to be sent”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KWhj ubh¸)”}”(hŒ'ret': always 0”h]”hŒ‘ret’: always 0”…””}”(hj*hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KYhj ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j»hjhžhhŸh¶h Nubah}”(h]”h ]”h"]”h$]”h&]”j÷jøuh1j¶hŸh¶h KUhjmhžhubh¸)”}”(hŒ¼Another I2C master wants to read data from us. This event should be sent once our own address and the read bit was detected. After returning, the bus driver should transmit the first byte.”h]”hŒ¼Another I2C master wants to read data from us. This event should be sent once our own address and the read bit was detected. After returning, the bus driver should transmit the first byte.”…””}”(hjDhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K[hjmhžhubj·)”}”(hhh]”j¼)”}”(hŒžI2C_SLAVE_WRITE_RECEIVED (mandatory) 'val': bus driver delivers received byte 'ret': 0 if the byte should be acked, some errno if the byte should be nacked ”h]”(h¸)”}”(hŒ$I2C_SLAVE_WRITE_RECEIVED (mandatory)”h]”hŒ$I2C_SLAVE_WRITE_RECEIVED (mandatory)”…””}”(hjYhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K_hjUubh¸)”}”(hŒ('val': bus driver delivers received byte”h]”hŒ,‘val’: bus driver delivers received byte”…””}”(hjghžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KahjUubh¸)”}”(hŒM'ret': 0 if the byte should be acked, some errno if the byte should be nacked”h]”hŒQ‘ret’: 0 if the byte should be acked, some errno if the byte should be nacked”…””}”(hjuhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KchjUubeh}”(h]”h ]”h"]”h$]”h&]”uh1j»hjRhžhhŸh¶h Nubah}”(h]”h ]”h"]”h$]”h&]”j÷jøuh1j¶hŸh¶h K_hjmhžhubh¸)”}”(hŒµAnother I2C master has sent a byte to us which needs to be set in 'val'. If 'ret' is zero, the bus driver should ack this byte. If 'ret' is an errno, then the byte should be nacked.”h]”hŒÁAnother I2C master has sent a byte to us which needs to be set in ‘val’. If ‘ret’ is zero, the bus driver should ack this byte. If ‘ret’ is an errno, then the byte should be nacked.”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Kehjmhžhubj·)”}”(hhh]”j¼)”}”(hŒcI2C_SLAVE_READ_PROCESSED (mandatory) 'val': backend returns next byte to be sent 'ret': always 0 ”h]”(h¸)”}”(hŒ$I2C_SLAVE_READ_PROCESSED (mandatory)”h]”hŒ$I2C_SLAVE_READ_PROCESSED (mandatory)”…””}”(hj¤hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Kihj ubh¸)”}”(hŒ+'val': backend returns next byte to be sent”h]”hŒ/‘val’: backend returns next byte to be sent”…””}”(hj²hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Kkhj ubh¸)”}”(hŒ'ret': always 0”h]”hŒ‘ret’: always 0”…””}”(hjÀhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Kmhj ubeh}”(h]”h ]”h"]”h$]”h&]”uh1j»hjhžhhŸh¶h Nubah}”(h]”h ]”h"]”h$]”h&]”j÷jøuh1j¶hŸh¶h Kihjmhžhubh¸)”}”(hX3The bus driver requests the next byte to be sent to another I2C master in 'val'. Important: This does not mean that the previous byte has been acked, it only means that the previous byte is shifted out to the bus! To ensure seamless transmission, most hardware requests the next byte when the previous one is still shifted out. If the master sends NACK and stops reading after the byte currently shifted out, this byte requested here is never used. It very likely needs to be sent again on the next I2C_SLAVE_READ_REQUEST, depending a bit on your backend, though.”h]”hX7The bus driver requests the next byte to be sent to another I2C master in ‘val’. Important: This does not mean that the previous byte has been acked, it only means that the previous byte is shifted out to the bus! To ensure seamless transmission, most hardware requests the next byte when the previous one is still shifted out. If the master sends NACK and stops reading after the byte currently shifted out, this byte requested here is never used. It very likely needs to be sent again on the next I2C_SLAVE_READ_REQUEST, depending a bit on your backend, though.”…””}”(hjÚhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Kohjmhžhubj·)”}”(hhh]”j¼)”}”(hŒ;I2C_SLAVE_STOP (mandatory) 'val': unused 'ret': always 0 ”h]”(h¸)”}”(hŒI2C_SLAVE_STOP (mandatory)”h]”hŒI2C_SLAVE_STOP (mandatory)”…””}”(hjïhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Kxhjëubh¸)”}”(hŒ 'val': unused”h]”hŒ‘val’: unused”…””}”(hjýhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Kzhjëubh¸)”}”(hŒ'ret': always 0”h]”hŒ‘ret’: always 0”…””}”(hj hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K|hjëubeh}”(h]”h ]”h"]”h$]”h&]”uh1j»hjèhžhhŸh¶h Nubah}”(h]”h ]”h"]”h$]”h&]”j÷jøuh1j¶hŸh¶h Kxhjmhžhubh¸)”}”(hŒ›A stop condition was received. This can happen anytime and the backend should reset its state machine for I2C transfers to be able to receive new requests.”h]”hŒ›A stop condition was received. This can happen anytime and the backend should reset its state machine for I2C transfers to be able to receive new requests.”…””}”(hj%hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K~hjmhžhubeh}”(h]”Œi2c-slave-events”ah ]”h"]”Œi2c slave events”ah$]”h&]”uh1h¡hjNhžhhŸh¶h K8ubh¢)”}”(hhh]”(h§)”}”(hŒSoftware backends”h]”hŒSoftware backends”…””}”(hj>hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hj;hžhhŸh¶h Kƒubh¸)”}”(hŒ(If you want to write a software backend:”h]”hŒ(If you want to write a software backend:”…””}”(hjLhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K…hj;hžhubj·)”}”(hhh]”(j¼)”}”(hŒ5use a standard i2c_driver and its matching mechanisms”h]”h¸)”}”(hj_h]”hŒ5use a standard i2c_driver and its matching mechanisms”…””}”(hjahžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K‡hj]ubah}”(h]”h ]”h"]”h$]”h&]”uh1j»hjZhžhhŸh¶h Nubj¼)”}”(hŒZwrite the slave_callback which handles the above slave events (best using a state machine)”h]”h¸)”}”(hŒZwrite the slave_callback which handles the above slave events (best using a state machine)”h]”hŒZwrite the slave_callback which handles the above slave events (best using a state machine)”…””}”(hjxhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Kˆhjtubah}”(h]”h ]”h"]”h$]”h&]”uh1j»hjZhžhhŸh¶h Nubj¼)”}”(hŒ0register this callback via i2c_slave_register() ”h]”h¸)”}”(hŒ/register this callback via i2c_slave_register()”h]”hŒ/register this callback via i2c_slave_register()”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KŠhjŒubah}”(h]”h ]”h"]”h$]”h&]”uh1j»hjZhžhhŸh¶h Nubeh}”(h]”h ]”h"]”h$]”h&]”j÷jøuh1j¶hŸh¶h K‡hj;hžhubh¸)”}”(hŒ0Check the i2c-slave-eeprom driver as an example.”h]”hŒ0Check the i2c-slave-eeprom driver as an example.”…””}”(hjªhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KŒhj;hžhubeh}”(h]”Œsoftware-backends”ah ]”h"]”Œsoftware backends”ah$]”h&]”uh1h¡hjNhžhhŸh¶h Kƒubh¢)”}”(hhh]”(h§)”}”(hŒBus driver support”h]”hŒBus driver support”…””}”(hjÃhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjÀhžhhŸh¶h Kubh¸)”}”(hŒ3If you want to add slave support to the bus driver:”h]”hŒ3If you want to add slave support to the bus driver:”…””}”(hjÑhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K’hjÀhžhubj·)”}”(hhh]”(j¼)”}”(hX’implement calls to register/unregister the slave and add those to the struct i2c_algorithm. When registering, you probably need to set the I2C slave address and enable slave specific interrupts. If you use runtime pm, you should use pm_runtime_get_sync() because your device usually needs to be powered on always to be able to detect its slave address. When unregistering, do the inverse of the above. ”h]”h¸)”}”(hX‘implement calls to register/unregister the slave and add those to the struct i2c_algorithm. When registering, you probably need to set the I2C slave address and enable slave specific interrupts. If you use runtime pm, you should use pm_runtime_get_sync() because your device usually needs to be powered on always to be able to detect its slave address. When unregistering, do the inverse of the above.”h]”hX‘implement calls to register/unregister the slave and add those to the struct i2c_algorithm. When registering, you probably need to set the I2C slave address and enable slave specific interrupts. If you use runtime pm, you should use pm_runtime_get_sync() because your device usually needs to be powered on always to be able to detect its slave address. When unregistering, do the inverse of the above.”…””}”(hjæhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K”hjâubah}”(h]”h ]”h"]”h$]”h&]”uh1j»hjßhžhhŸh¶h Nubj¼)”}”(hŒQCatch the slave interrupts and send appropriate i2c_slave_events to the backend. ”h]”h¸)”}”(hŒPCatch the slave interrupts and send appropriate i2c_slave_events to the backend.”h]”hŒPCatch the slave interrupts and send appropriate i2c_slave_events to the backend.”…””}”(hjþhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K›hjúubah}”(h]”h ]”h"]”h$]”h&]”uh1j»hjßhžhhŸh¶h Nubeh}”(h]”h ]”h"]”h$]”h&]”j÷jøuh1j¶hŸh¶h K”hjÀhžhubh¸)”}”(hŒøNote that most hardware supports being master _and_ slave on the same bus. So, if you extend a bus driver, please make sure that the driver supports that as well. In almost all cases, slave support does not need to disable the master functionality.”h]”hŒøNote that most hardware supports being master _and_ slave on the same bus. So, if you extend a bus driver, please make sure that the driver supports that as well. In almost all cases, slave support does not need to disable the master functionality.”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KhjÀhžhubh¸)”}”(hŒ(Check the i2c-rcar driver as an example.”h]”hŒ(Check the i2c-rcar driver as an example.”…””}”(hj&hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K¢hjÀhžhubeh}”(h]”Œbus-driver-support”ah ]”h"]”Œbus driver support”ah$]”h&]”uh1h¡hjNhžhhŸh¶h Kubh¢)”}”(hhh]”(h§)”}”(hŒAbout ACK/NACK”h]”hŒAbout ACK/NACK”…””}”(hj?hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hj<hžhhŸh¶h K¦ubh¸)”}”(hXÜIt is good behaviour to always ACK the address phase, so the master knows if a device is basically present or if it mysteriously disappeared. Using NACK to state being busy is troublesome. SMBus demands to always ACK the address phase, while the I2C specification is more loose on that. Most I2C controllers also automatically ACK when detecting their slave addresses, so there is no option to NACK them. For those reasons, this API does not support NACK in the address phase.”h]”hXÜIt is good behaviour to always ACK the address phase, so the master knows if a device is basically present or if it mysteriously disappeared. Using NACK to state being busy is troublesome. SMBus demands to always ACK the address phase, while the I2C specification is more loose on that. Most I2C controllers also automatically ACK when detecting their slave addresses, so there is no option to NACK them. For those reasons, this API does not support NACK in the address phase.”…””}”(hjMhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K¨hj<hžhubh¸)”}”(hXuCurrently, there is no slave event to report if the master did ACK or NACK a byte when it reads from us. We could make this an optional event if the need arises. However, cases should be extremely rare because the master is expected to send STOP after that and we have an event for that. Also, keep in mind not all I2C controllers have the possibility to report that event.”h]”hXuCurrently, there is no slave event to report if the master did ACK or NACK a byte when it reads from us. We could make this an optional event if the need arises. However, cases should be extremely rare because the master is expected to send STOP after that and we have an event for that. Also, keep in mind not all I2C controllers have the possibility to report that event.”…””}”(hj[hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K°hj<hžhubeh}”(h]”Œabout-ack-nack”ah ]”h"]”Œabout ack/nack”ah$]”h&]”uh1h¡hjNhžhhŸh¶h K¦ubh¢)”}”(hhh]”(h§)”}”(hŒ About buffers”h]”hŒ About buffers”…””}”(hjthžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjqhžhhŸh¶h K¸ubh¸)”}”(hŒàDuring development of this API, the question of using buffers instead of just bytes came up. Such an extension might be possible, usefulness is unclear at this time of writing. Some points to keep in mind when using buffers:”h]”hŒàDuring development of this API, the question of using buffers instead of just bytes came up. Such an extension might be possible, usefulness is unclear at this time of writing. Some points to keep in mind when using buffers:”…””}”(hj‚hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h Kºhjqhžhubj·)”}”(hhh]”(j¼)”}”(hŒ¯Buffers should be opt-in and backend drivers will always have to support byte-based transactions as the ultimate fallback anyhow because this is how the majority of HW works. ”h]”h¸)”}”(hŒ®Buffers should be opt-in and backend drivers will always have to support byte-based transactions as the ultimate fallback anyhow because this is how the majority of HW works.”h]”hŒ®Buffers should be opt-in and backend drivers will always have to support byte-based transactions as the ultimate fallback anyhow because this is how the majority of HW works.”…””}”(hj—hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h K¾hj“ubah}”(h]”h ]”h"]”h$]”h&]”uh1j»hjhžhhŸh¶h Nubj¼)”}”(hXFor backends simulating hardware registers, buffers are largely not helpful because after each byte written an action should be immediately triggered. For reads, the data kept in the buffer might get stale if the backend just updated a register because of internal processing. ”h]”h¸)”}”(hXFor backends simulating hardware registers, buffers are largely not helpful because after each byte written an action should be immediately triggered. For reads, the data kept in the buffer might get stale if the backend just updated a register because of internal processing.”h]”hXFor backends simulating hardware registers, buffers are largely not helpful because after each byte written an action should be immediately triggered. For reads, the data kept in the buffer might get stale if the backend just updated a register because of internal processing.”…””}”(hj¯hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h·hŸh¶h KÂhj«ubah}”(h]”h ]”h"]”h$]”h&]”uh1j»hjhžhhŸh¶h Nubj¼)”}”(hŒžA master can send STOP at any time. For partially transferred buffers, this means additional code to handle this exception. Such code tends to be error-prone.”h]”h¸)”}”(hŒžA master can send STOP at any time. For partially transferred buffers, this means additional code to handle this exception. Such code tends to be error-prone.”h]”hŒžA master can send STOP at any time. For partially transferred buffers, this means additional code to handle this exception. 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