€•)Œsphinx.addnodes”Œdocument”“”)”}”(Œ rawsource”Œ”Œchildren”]”(Œ translations”Œ LanguagesNode”“”)”}”(hhh]”(hŒ pending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ refdomain”Œstd”Œreftype”Œdoc”Œ reftarget”Œ'/translations/zh_CN/i2c/busses/i2c-ismt”Œmodname”NŒ classname”NŒ refexplicit”ˆuŒtagname”hhh ubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ'/translations/zh_TW/i2c/busses/i2c-ismt”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ'/translations/it_IT/i2c/busses/i2c-ismt”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ'/translations/ja_JP/i2c/busses/i2c-ismt”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ'/translations/ko_KR/i2c/busses/i2c-ismt”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubh)”}”(hhh]”hŒSpanish”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ refdomain”h)Œreftype”h+Œ reftarget”Œ'/translations/sp_SP/i2c/busses/i2c-ismt”Œmodname”NŒ classname”NŒ refexplicit”ˆuh1hhh ubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h hhŒ _document”hŒsource”NŒline”NubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒKernel driver i2c-ismt”h]”hŒKernel driver i2c-ismt”…””}”(hh¨hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hh£hžhhŸŒA/var/lib/git/docbuild/linux/Documentation/i2c/busses/i2c-ismt.rst”h KubhŒdefinition_list”“”)”}”(hhh]”(hŒdefinition_list_item”“”)”}”(hŒ.Supported adapters: * Intel S12xx series SOCs ”h]”(hŒterm”“”)”}”(hŒSupported adapters:”h]”hŒSupported adapters:”…””}”(hhÄhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÂhŸh¶h Khh¾ubhŒ definition”“”)”}”(hhh]”hŒ bullet_list”“”)”}”(hhh]”hŒ list_item”“”)”}”(hŒIntel S12xx series SOCs ”h]”hŒ paragraph”“”)”}”(hŒIntel S12xx series SOCs”h]”hŒIntel S12xx series SOCs”…””}”(hhähžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hâhŸh¶h KhhÞubah}”(h]”h ]”h"]”h$]”h&]”uh1hÜhhÙubah}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ*”uh1h×hŸh¶h KhhÔubah}”(h]”h ]”h"]”h$]”h&]”uh1hÒhh¾ubeh}”(h]”h ]”h"]”h$]”h&]”uh1h¼hŸh¶h Khh¹ubh½)”}”(hŒ.Authors: Bill Brown ”h]”(hÃ)”}”(hŒAuthors:”h]”hŒAuthors:”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÂhŸh¶h K hj ubhÓ)”}”(hhh]”hã)”}”(hŒ#Bill Brown ”h]”(hŒ Bill Brown <”…””}”(hj!hžhhŸNh NubhŒ reference”“”)”}”(hŒbill.e.brown@intel.com”h]”hŒbill.e.brown@intel.com”…””}”(hj+hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”Œrefuri”Œmailto:bill.e.brown@intel.com”uh1j)hj!ubhŒ>”…””}”(hj!hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hâhŸh¶h K hjubah}”(h]”h ]”h"]”h$]”h&]”uh1hÒhj ubeh}”(h]”h ]”h"]”h$]”h&]”uh1h¼hŸh¶h K hh¹hžhubeh}”(h]”h ]”h"]”h$]”h&]”uh1h·hh£hžhhŸNh Nubh¢)”}”(hhh]”(h§)”}”(hŒModule Parameters”h]”hŒModule Parameters”…””}”(hjZhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjWhžhhŸh¶h KubhØ)”}”(hhh]”hÝ)”}”(hŒbus_speed (unsigned int) ”h]”hã)”}”(hŒbus_speed (unsigned int)”h]”hŒbus_speed (unsigned int)”…””}”(hjohžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hâhŸh¶h Khjkubah}”(h]”h ]”h"]”h$]”h&]”uh1hÜhjhhžhhŸh¶h Nubah}”(h]”h ]”h"]”h$]”h&]”hþhÿuh1h×hŸh¶h KhjWhžhubhã)”}”(hXAllows changing of the bus speed. Normally, the bus speed is set by the BIOS and never needs to be changed. However, some SMBus analyzers are too slow for monitoring the bus during debug, thus the need for this module parameter. Specify the bus speed in kHz.”h]”hXAllows changing of the bus speed. Normally, the bus speed is set by the BIOS and never needs to be changed. However, some SMBus analyzers are too slow for monitoring the bus during debug, thus the need for this module parameter. Specify the bus speed in kHz.”…””}”(hj‰hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hâhŸh¶h KhjWhžhubhã)”}”(hŒ!Available bus frequency settings:”h]”hŒ!Available bus frequency settings:”…””}”(hj—hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hâhŸh¶h KhjWhžhubhŒ block_quote”“”)”}”(hŒ`==== ========= 0 no change 80 kHz 100 kHz 400 kHz 1000 kHz ==== ========= ”h]”hŒtable”“”)”}”(hhh]”hŒtgroup”“”)”}”(hhh]”(hŒcolspec”“”)”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”Œcolwidth”Kuh1jµhj²ubj¶)”}”(hhh]”h}”(h]”h ]”h"]”h$]”h&]”Œcolwidth”K uh1jµhj²ubhŒtbody”“”)”}”(hhh]”(hŒrow”“”)”}”(hhh]”(hŒentry”“”)”}”(hhh]”hã)”}”(hŒ0”h]”hŒ0”…””}”(hjÚhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hâhŸh¶h Khj×ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhjÒubjÖ)”}”(hhh]”hã)”}”(hŒ no change”h]”hŒ no change”…””}”(hjñhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hâhŸh¶h Khjîubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhjÒubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÐhjÍubjÑ)”}”(hhh]”(jÖ)”}”(hhh]”hã)”}”(hŒ80”h]”hŒ80”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hâhŸh¶h Khjubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhj ubjÖ)”}”(hhh]”hã)”}”(hŒkHz”h]”hŒkHz”…””}”(hj(hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hâhŸh¶h Khj%ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhj ubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÐhjÍubjÑ)”}”(hhh]”(jÖ)”}”(hhh]”hã)”}”(hŒ100”h]”hŒ100”…””}”(hjHhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hâhŸh¶h KhjEubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhjBubjÖ)”}”(hhh]”hã)”}”(hŒkHz”h]”hŒkHz”…””}”(hj_hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hâhŸh¶h Khj\ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhjBubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÐhjÍubjÑ)”}”(hhh]”(jÖ)”}”(hhh]”hã)”}”(hŒ400”h]”hŒ400”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hâhŸh¶h Khj|ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhjyubjÖ)”}”(hhh]”hã)”}”(hŒkHz”h]”hŒkHz”…””}”(hj–hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hâhŸh¶h Khj“ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhjyubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÐhjÍubjÑ)”}”(hhh]”(jÖ)”}”(hhh]”hã)”}”(hŒ1000”h]”hŒ1000”…””}”(hj¶hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hâhŸh¶h Khj³ubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhj°ubjÖ)”}”(hhh]”hã)”}”(hŒkHz”h]”hŒkHz”…””}”(hjÍhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hâhŸh¶h KhjÊubah}”(h]”h ]”h"]”h$]”h&]”uh1jÕhj°ubeh}”(h]”h ]”h"]”h$]”h&]”uh1jÐhjÍubeh}”(h]”h ]”h"]”h$]”h&]”uh1jËhj²ubeh}”(h]”h ]”h"]”h$]”h&]”Œcols”Kuh1j°hj­ubah}”(h]”h ]”h"]”h$]”h&]”uh1j«hj§ubah}”(h]”h ]”h"]”h$]”h&]”uh1j¥hŸh¶h KhjWhžhubeh}”(h]”Œmodule-parameters”ah ]”h"]”Œmodule parameters”ah$]”h&]”uh1h¡hh£hžhhŸh¶h Kubh¢)”}”(hhh]”(h§)”}”(hŒ Description”h]”hŒ Description”…””}”(hj hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjhžhhŸh¶h K#ubhã)”}”(hŒƒThe S12xx series of SOCs have a pair of integrated SMBus 2.0 controllers targeted primarily at the microserver and storage markets.”h]”hŒƒThe S12xx series of SOCs have a pair of integrated SMBus 2.0 controllers targeted primarily at the microserver and storage markets.”…””}”(hjhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hâhŸh¶h K%hjhžhubhã)”}”(hŒtThe S12xx series contain a pair of PCI functions. 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