bsphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget /translations/zh_CN/hwmon/vt1211modnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget /translations/zh_TW/hwmon/vt1211modnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget /translations/it_IT/hwmon/vt1211modnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget /translations/ja_JP/hwmon/vt1211modnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget /translations/ko_KR/hwmon/vt1211modnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget /translations/sp_SP/hwmon/vt1211modnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhsection)}(hhh](htitle)}(hKernel driver vt1211h]hKernel driver vt1211}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhh:/var/lib/git/docbuild/linux/Documentation/hwmon/vt1211.rsthKubh paragraph)}(hSupported chips:h]hSupported chips:}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh block_quote)}(h* VIA VT1211 Prefix: 'vt1211' Addresses scanned: none, address read from Super-I/O config space Datasheet: Provided by VIA upon request and under NDA h]h bullet_list)}(hhh]h list_item)}(hVIA VT1211 Prefix: 'vt1211' Addresses scanned: none, address read from Super-I/O config space Datasheet: Provided by VIA upon request and under NDA h](h)}(h VIA VT1211h]h VIA VT1211}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhubh)}(hPrefix: 'vt1211'h]hPrefix: ‘vt1211’}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhubh)}(hAAddresses scanned: none, address read from Super-I/O config spaceh]hAAddresses scanned: none, address read from Super-I/O config space}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hhubh)}(h5Datasheet: Provided by VIA upon request and under NDAh]h5Datasheet: Provided by VIA upon request and under NDA}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hhubeh}(h]h ]h"]h$]h&]uh1hhhubah}(h]h ]h"]h$]h&]bullet*uh1hhhhKhhubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(h+Authors: Juerg Haefliger h](hAuthors: Juerg Haefliger <}(hj$hhhNhNubh reference)}(hjuergh@gmail.comh]hjuergh@gmail.com}(hj.hhhNhNubah}(h]h ]h"]h$]h&]refurimailto:juergh@gmail.comuh1j,hj$ubh>}(hj$hhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hqThis driver is based on the driver for kernel 2.4 by Mark D. Studebaker and its port to kernel 2.6 by Lars Ekman.h]hqThis driver is based on the driver for kernel 2.4 by Mark D. Studebaker and its port to kernel 2.6 by Lars Ekman.}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(h`Thanks to Joseph Chan and Fiona Gatt from VIA for providing documentation and technical support.h]h`Thanks to Joseph Chan and Fiona Gatt from VIA for providing documentation and technical support.}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hhh](h)}(hModule Parametersh]hModule Parameters}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhjdhhhhhKubh)}(hhh](h)}(hXuch_config: int Override the BIOS default universal channel (UCH) configuration for channels 1-5. Legal values are in the range of 0-31. Bit 0 maps to UCH1, bit 1 maps to UCH2 and so on. Setting a bit to 1 enables the thermal input of that particular UCH and setting a bit to 0 enables the voltage input. h]hdefinition_list)}(hhh]hdefinition_list_item)}(hX1uch_config: int Override the BIOS default universal channel (UCH) configuration for channels 1-5. Legal values are in the range of 0-31. Bit 0 maps to UCH1, bit 1 maps to UCH2 and so on. Setting a bit to 1 enables the thermal input of that particular UCH and setting a bit to 0 enables the voltage input. h](hterm)}(huch_config: inth]huch_config: int}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhK!hjubh definition)}(hhh]h)}(hX Override the BIOS default universal channel (UCH) configuration for channels 1-5. Legal values are in the range of 0-31. Bit 0 maps to UCH1, bit 1 maps to UCH2 and so on. Setting a bit to 1 enables the thermal input of that particular UCH and setting a bit to 0 enables the voltage input.h]hX Override the BIOS default universal channel (UCH) configuration for channels 1-5. Legal values are in the range of 0-31. Bit 0 maps to UCH1, bit 1 maps to UCH2 and so on. Setting a bit to 1 enables the thermal input of that particular UCH and setting a bit to 0 enables the voltage input.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhK!hj~ubah}(h]h ]h"]h$]h&]uh1j|hjxubah}(h]h ]h"]h$]h&]uh1hhjuhhhNhNubh)}(hXint_mode: int Override the BIOS default temperature interrupt mode. The only possible value is 0 which forces interrupt mode 0. In this mode, any pending interrupt is cleared when the status register is read but is regenerated as long as the temperature stays above the hysteresis limit. h]j})}(hhh]j)}(hX int_mode: int Override the BIOS default temperature interrupt mode. The only possible value is 0 which forces interrupt mode 0. In this mode, any pending interrupt is cleared when the status register is read but is regenerated as long as the temperature stays above the hysteresis limit. h](j)}(h int_mode: inth]h int_mode: int}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhK)hjubj)}(hhh]h)}(hXOverride the BIOS default temperature interrupt mode. The only possible value is 0 which forces interrupt mode 0. In this mode, any pending interrupt is cleared when the status register is read but is regenerated as long as the temperature stays above the hysteresis limit.h]hXOverride the BIOS default temperature interrupt mode. The only possible value is 0 which forces interrupt mode 0. In this mode, any pending interrupt is cleared when the status register is read but is regenerated as long as the temperature stays above the hysteresis limit.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK$hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhhhK)hjubah}(h]h ]h"]h$]h&]uh1j|hjubah}(h]h ]h"]h$]h&]uh1hhjuhhhNhNubeh}(h]h ]h"]h$]h&]jjuh1hhhhKhjdhhubh)}(hNBe aware that overriding BIOS defaults might cause some unwanted side effects!h]hNBe aware that overriding BIOS defaults might cause some unwanted side effects!}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK+hjdhhubeh}(h]module-parametersah ]h"]module parametersah$]h&]uh1hhhhhhhhKubh)}(hhh](h)}(h Descriptionh]h Description}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhK/ubh)}(hXTThe VIA VT1211 Super-I/O chip includes complete hardware monitoring capabilities. It monitors 2 dedicated temperature sensor inputs (temp1 and temp2), 1 dedicated voltage (in5) and 2 fans. Additionally, the chip implements 5 universal input channels (UCH1-5) that can be individually programmed to either monitor a voltage or a temperature.h]hXTThe VIA VT1211 Super-I/O chip includes complete hardware monitoring capabilities. It monitors 2 dedicated temperature sensor inputs (temp1 and temp2), 1 dedicated voltage (in5) and 2 fans. Additionally, the chip implements 5 universal input channels (UCH1-5) that can be individually programmed to either monitor a voltage or a temperature.}(hj1hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK1hj hhubh)}(hXThis chip also provides manual and automatic control of fan speeds (according to the datasheet). The driver only supports automatic control since the manual mode doesn't seem to work as advertised in the datasheet. In fact I couldn't get manual mode to work at all! Be aware that automatic mode hasn't been tested very well (due to the fact that my EPIA M10000 doesn't have the fans connected to the PWM outputs of the VT1211 :-().h]hXThis chip also provides manual and automatic control of fan speeds (according to the datasheet). The driver only supports automatic control since the manual mode doesn’t seem to work as advertised in the datasheet. In fact I couldn’t get manual mode to work at all! Be aware that automatic mode hasn’t been tested very well (due to the fact that my EPIA M10000 doesn’t have the fans connected to the PWM outputs of the VT1211 :-().}(hj?hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK7hj hhubh)}(hYThe following table shows the relationship between the vt1211 inputs and the sysfs nodes.h]hYThe following table shows the relationship between the vt1211 inputs and the sysfs nodes.}(hjMhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK>hj hhubhtable)}(hhh]htgroup)}(hhh](hcolspec)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jehjbubjf)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jehjbubjf)}(hhh]h}(h]h ]h"]h$]h&]colwidthK uh1jehjbubjf)}(hhh]h}(h]h ]h"]h$]h&]colwidthK uh1jehjbubhthead)}(hhh]hrow)}(hhh](hentry)}(hhh]h)}(hSensorh]hSensor}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKBhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h Voltage Modeh]h Voltage Mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKBhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h Temp Modeh]h Temp Mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKBhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h Default Use (from the datasheet)h]h Default Use (from the datasheet)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKBhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhjbubhtbody)}(hhh](j)}(hhh](j)}(hhh]h)}(h Reading 1h]h Reading 1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKDhj ubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(htemp1h]htemp1}(hj.hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKDhj+ubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hIntel thermal diodeh]hIntel thermal diode}(hjEhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKDhjBubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(h Reading 3h]h Reading 3}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKEhjbubah}(h]h ]h"]h$]h&]uh1jhj_ubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhj_ubj)}(hhh]h)}(htemp2h]htemp2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKEhjubah}(h]h ]h"]h$]h&]uh1jhj_ubj)}(hhh]h)}(hInternal thermal diodeh]hInternal thermal diode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKEhjubah}(h]h ]h"]h$]h&]uh1jhj_ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(h UCH1/Reading2h]h UCH1/Reading2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKFhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hin0h]hin0}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKFhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(htemp3h]htemp3}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKFhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hNTC type thermistorh]hNTC type thermistor}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKFhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hUCH2h]hUCH2}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKGhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hin1h]hin1}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKGhj5ubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(htemp4h]htemp4}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKGhjLubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h+2.5Vh]h+2.5V}(hjfhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKGhjcubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hUCH3h]hUCH3}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKHhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hin2h]hin2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKHhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(htemp5h]htemp5}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKHhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hVccP (processor core)h]hVccP (processor core)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKHhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hUCH4h]hUCH4}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKIhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hin3h]hin3}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKIhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(htemp6h]htemp6}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKIhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h+5Vh]h+5V}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKIhj-ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hUCH5h]hUCH5}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKJhjMubah}(h]h ]h"]h$]h&]uh1jhjJubj)}(hhh]h)}(hin4h]hin4}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKJhjdubah}(h]h ]h"]h$]h&]uh1jhjJubj)}(hhh]h)}(htemp7h]htemp7}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKJhj{ubah}(h]h ]h"]h$]h&]uh1jhjJubj)}(hhh]h)}(h+12Vh]h+12V}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKJhjubah}(h]h ]h"]h$]h&]uh1jhjJubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(h+3.3Vh]h+3.3V}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKKhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hin5h]hin5}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKKhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hInternal VCC (+3.3V)h]hInternal VCC (+3.3V)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjbubeh}(h]h ]h"]h$]h&]colsKuh1j`hj]ubah}(h]h ]h"]h$]h&]uh1j[hj hhhhhNubeh}(h] descriptionah ]h"] descriptionah$]h&]uh1hhhhhhhhK/ubh)}(hhh](h)}(hVoltage Monitoringh]hVoltage Monitoring}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj!hhhhhKPubh)}(hX Voltages are sampled by an 8-bit ADC with a LSB of ~10mV. The supported input range is thus from 0 to 2.60V. Voltage values outside of this range need external scaling resistors. This external scaling needs to be compensated for via compute lines in sensors.conf, like:h]hX Voltages are sampled by an 8-bit ADC with a LSB of ~10mV. The supported input range is thus from 0 to 2.60V. Voltage values outside of this range need external scaling resistors. This external scaling needs to be compensated for via compute lines in sensors.conf, like:}(hj2hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKRhj!hhubh)}(h$compute inx @*(1+R1/R2), @/(1+R1/R2)h]h$compute inx @*(1+R1/R2), @/(1+R1/R2)}(hj@hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKWhj!hhubh)}(hXThe board level scaling resistors according to VIA's recommendation are as follows. And this is of course totally dependent on the actual board implementation :-) You will have to find documentation for your own motherboard and edit sensors.conf accordingly.h]hXThe board level scaling resistors according to VIA’s recommendation are as follows. And this is of course totally dependent on the actual board implementation :-) You will have to find documentation for your own motherboard and edit sensors.conf accordingly.}(hjNhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKYhj!hhubj\)}(hhh]ja)}(hhh](jf)}(hhh]h}(h]h ]h"]h$]h&]colwidthK uh1jehj_ubjf)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jehj_ubjf)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jehj_ubjf)}(hhh]h}(h]h ]h"]h$]h&]colwidthK uh1jehj_ubjf)}(hhh]h}(h]h ]h"]h$]h&]colwidthK uh1jehj_ubj)}(hhh]j)}(hhh](j)}(hhh]h)}(hVoltageh]hVoltage}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK`hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hR1h]hR1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK`hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hR2h]hR2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK`hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hDividerh]hDivider}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK`hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h Raw Valueh]h Raw Value}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK`hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhj_ubj)}(hhh](j)}(hhh](j)}(hhh]h)}(h+2.5Vh]h+2.5V}(hj"hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKbhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h2Kh]h2K}(hj9hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKbhj6ubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h10Kh]h10K}(hjPhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKbhjMubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h1.2h]h1.2}(hjghhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKbhjdubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h2083 mVh]h2083 mV}(hj~hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKbhj{ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hVccPh]hVccP}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKchjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h---h]h---}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKchjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h---h]h---}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKchjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h1.0h]h1.0}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKchjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h 1400 mV [1]_h](h1400 mV }(hjhhhNhNubhfootnote_reference)}(h[1]_h]h1}(hjhhhNhNubah}(h]id1ah ]h"]h$]h&]refidid3docname hwmon/vt1211uh1jhjresolvedKubeh}(h]h ]h"]h$]h&]uh1hhhhKchjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(h+5Vh]h+5V}(hj0hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKdhj-ubah}(h]h ]h"]h$]h&]uh1jhj*ubj)}(hhh]h)}(h14Kh]h14K}(hjGhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKdhjDubah}(h]h ]h"]h$]h&]uh1jhj*ubj)}(hhh]h)}(h10Kh]h10K}(hj^hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKdhj[ubah}(h]h ]h"]h$]h&]uh1jhj*ubj)}(hhh]h)}(h2.4h]h2.4}(hjuhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKdhjrubah}(h]h ]h"]h$]h&]uh1jhj*ubj)}(hhh]h)}(h2083 mVh]h2083 mV}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKdhjubah}(h]h ]h"]h$]h&]uh1jhj*ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(h+12Vh]h+12V}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKehjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h47Kh]h47K}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKehjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h10Kh]h10K}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKehjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h5.7h]h5.7}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKehjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h2105 mVh]h2105 mV}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKehj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(h +3.3V (int)h]h +3.3V (int)}(hj( hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKfhj% ubah}(h]h ]h"]h$]h&]uh1jhj" ubj)}(hhh]h)}(h2Kh]h2K}(hj? hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKfhj< ubah}(h]h ]h"]h$]h&]uh1jhj" ubj)}(hhh]h)}(h3.4Kh]h3.4K}(hjV hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKfhjS ubah}(h]h ]h"]h$]h&]uh1jhj" ubj)}(hhh]h)}(h1.588h]h1.588}(hjm hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKfhjj ubah}(h]h ]h"]h$]h&]uh1jhj" ubj)}(hhh]h)}(h 3300 mV [2]_h](h3300 mV }(hj hhhNhNubj)}(h[2]_h]h2}(hj hhhNhNubah}(h]id2ah ]h"]h$]h&]jid4jjuh1jhj jKubeh}(h]h ]h"]h$]h&]uh1hhhhKfhj ubah}(h]h ]h"]h$]h&]uh1jhj" ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(h +3.3V (ext)h]h +3.3V (ext)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKghj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(h6.8Kh]h6.8K}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKghj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(h10Kh]h10K}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKghj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(h1.68h]h1.68}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKghj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(h1964 mVh]h1964 mV}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKghj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj_ubeh}(h]h ]h"]h$]h&]colsKuh1j`hj\ubah}(h]h ]h"]h$]h&]uh1j[hj!hhhhhNubhfootnote)}(h6Depending on the CPU (1.4V is for a VIA C3 Nehemiah). h](hlabel)}(h1h]h1}(hjE hhhNhNubah}(h]h ]h"]h$]h&]uh1jC hj? ubh)}(h5Depending on the CPU (1.4V is for a VIA C3 Nehemiah).h]h5Depending on the CPU (1.4V is for a VIA C3 Nehemiah).}(hjS hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKjhj? ubeh}(h]jah ]h"]1ah$]h&]jajjuh1j= hhhKjhj!hhjKubj> )}(hR1 and R2 for 3.3V (int) are internal to the VT1211 chip and the driver performs the scaling and returns the properly scaled voltage value. h](jD )}(h2h]h2}(hjl hhhNhNubah}(h]h ]h"]h$]h&]uh1jC hjh ubh)}(hR1 and R2 for 3.3V (int) are internal to the VT1211 chip and the driver performs the scaling and returns the properly scaled voltage value.h]hR1 and R2 for 3.3V (int) are internal to the VT1211 chip and the driver performs the scaling and returns the properly scaled voltage value.}(hjz hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKlhjh ubeh}(h]j ah ]h"]2ah$]h&]j ajjuh1j= hhhKlhj!hhjKubh)}(h`Each measured voltage has an associated low and high limit which triggers an alarm when crossed.h]h`Each measured voltage has an associated low and high limit which triggers an alarm when crossed.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKohj!hhubeh}(h]voltage-monitoringah ]h"]voltage monitoringah$]h&]uh1hhhhhhhhKPubh)}(hhh](h)}(hTemperature Monitoringh]hTemperature Monitoring}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhKtubh)}(hXTemperatures are reported in millidegree Celsius. Each measured temperature has a high limit which triggers an alarm if crossed. There is an associated hysteresis value with each temperature below which the temperature has to drop before the alarm is cleared (this is only true for interrupt mode 0). The interrupt mode can be forced to 0 in case the BIOS doesn't do it automatically. See the 'Module Parameters' section for details.h]hXTemperatures are reported in millidegree Celsius. Each measured temperature has a high limit which triggers an alarm if crossed. There is an associated hysteresis value with each temperature below which the temperature has to drop before the alarm is cleared (this is only true for interrupt mode 0). The interrupt mode can be forced to 0 in case the BIOS doesn’t do it automatically. See the ‘Module Parameters’ section for details.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKvhj hhubh)}(hXVAll temperature channels except temp2 are external. Temp2 is the VT1211 internal thermal diode and the driver does all the scaling for temp2 and returns the temperature in millidegree Celsius. For the external channels temp1 and temp3-temp7, scaling depends on the board implementation and needs to be performed in userspace via sensors.conf.h]hXVAll temperature channels except temp2 are external. Temp2 is the VT1211 internal thermal diode and the driver does all the scaling for temp2 and returns the temperature in millidegree Celsius. For the external channels temp1 and temp3-temp7, scaling depends on the board implementation and needs to be performed in userspace via sensors.conf.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK}hj hhubh)}(hTemp1 is an Intel-type thermal diode which requires the following formula to convert between sysfs readings and real temperatures:h]hTemp1 is an Intel-type thermal diode which requires the following formula to convert between sysfs readings and real temperatures:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj hhubh)}(h.compute temp1 (@-Offset)/Gain, (@*Gain)+Offseth]h.compute temp1 (@-Offset)/Gain, (@*Gain)+Offset}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj hhubh)}(hdAccording to the VIA VT1211 BIOS porting guide, the following gain and offset values should be used:h]hdAccording to the VIA VT1211 BIOS porting guide, the following gain and offset values should be used:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj hhubj\)}(hhh]ja)}(hhh](jf)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jehj ubjf)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jehj ubjf)}(hhh]h}(h]h ]h"]h$]h&]colwidthK uh1jehj ubj)}(hhh]j)}(hhh](j)}(hhh]h)}(h Diode Typeh]h Diode Type}(hj) hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj& ubah}(h]h ]h"]h$]h&]uh1jhj# ubj)}(hhh]h)}(hOffseth]hOffset}(hj@ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj= ubah}(h]h ]h"]h$]h&]uh1jhj# ubj)}(hhh]h)}(hGainh]hGain}(hjW hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjT ubah}(h]h ]h"]h$]h&]uh1jhj# ubeh}(h]h ]h"]h$]h&]uh1jhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh](j)}(hhh](j)}(hhh]h)}(h Intel CPUh]h Intel CPU}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj} ubah}(h]h ]h"]h$]h&]uh1jhjz ubj)}(hhh]h)}(h 88.638 65.000h]h 88.638 65.000}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhjz ubj)}(hhh]h)}(h0.9528 0.9686 [3]_h](h0.9528 0.9686 }(hj hhhNhNubj)}(h[3]_h]h3}(hj hhhNhNubah}(h]id5ah ]h"]h$]h&]jid6jjuh1jhj jKubeh}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhjz ubeh}(h]h ]h"]h$]h&]uh1jhjw ubj)}(hhh](j)}(hhh]h)}(h VIA C3 Ezrah]h VIA C3 Ezra}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(h83.869h]h83.869}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(h0.9528h]h0.9528}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhjw ubj)}(hhh](j)}(hhh]h)}(h VIA C3 Ezra-Th]h VIA C3 Ezra-T}(hj, hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj) ubah}(h]h ]h"]h$]h&]uh1jhj& ubj)}(hhh]h)}(h73.869h]h73.869}(hjC hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj@ ubah}(h]h ]h"]h$]h&]uh1jhj& ubj)}(hhh]h)}(h0.9528h]h0.9528}(hjZ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjW ubah}(h]h ]h"]h$]h&]uh1jhj& ubeh}(h]h ]h"]h$]h&]uh1jhjw ubeh}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]colsKuh1j`hj ubah}(h]h ]h"]h$]h&]uh1j[hj hhhhhNubj> )}(hThis is the formula from the lm_sensors 2.10.0 sensors.conf file. I don't know where it comes from or how it was derived, it's just listed here for completeness. h](jD )}(h3h]h3}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1jC hj ubh)}(hThis is the formula from the lm_sensors 2.10.0 sensors.conf file. I don't know where it comes from or how it was derived, it's just listed here for completeness.h]hThis is the formula from the lm_sensors 2.10.0 sensors.conf file. I don’t know where it comes from or how it was derived, it’s just listed here for completeness.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubeh}(h]j ah ]h"]3ah$]h&]j ajjuh1j= hhhKhj hhjKubh)}(hTemp3-temp7 support NTC thermistors. For these channels, the driver returns the voltages as seen at the individual pins of UCH1-UCH5. The voltage at the pin (Vpin) is formed by a voltage divider made of the thermistor (Rth) and a scaling resistor (Rs)::h]hTemp3-temp7 support NTC thermistors. For these channels, the driver returns the voltages as seen at the individual pins of UCH1-UCH5. The voltage at the pin (Vpin) is formed by a voltage divider made of the thermistor (Rth) and a scaling resistor (Rs):}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj hhubh literal_block)}(hGVpin = 2200 * Rth / (Rs + Rth) (2200 is the ADC max limit of 2200 mV)h]hGVpin = 2200 * Rth / (Rs + Rth) (2200 is the ADC max limit of 2200 mV)}hj sbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1j hhhKhj hhubh)}(h]The equation for the thermistor is as follows (google it if you want to know more about it)::h]h\The equation for the thermistor is as follows (google it if you want to know more about it):}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj hhubj )}(hRth = Ro * exp(B * (1 / T - 1 / To)) (To is 298.15K (25C) and Ro is the nominal resistance at 25C)h]hRth = Ro * exp(B * (1 / T - 1 / To)) (To is 298.15K (25C) and Ro is the nominal resistance at 25C)}hj sbah}(h]h ]h"]h$]h&]j j uh1j hhhKhj hhubh)}(hrMingling the above two equations and assuming Rs = Ro and B = 3435 yields the following formula for sensors.conf::h]hqMingling the above two equations and assuming Rs = Ro and B = 3435 yields the following formula for sensors.conf:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj hhubj )}(hcompute tempx 1 / (1 / 298.15 - (` (2200 / @ - 1)) / 3435) - 273.15, 2200 / (1 + (^ (3435 / 298.15 - 3435 / (273.15 + @))))h]hcompute tempx 1 / (1 / 298.15 - (` (2200 / @ - 1)) / 3435) - 273.15, 2200 / (1 + (^ (3435 / 298.15 - 3435 / (273.15 + @))))}hj sbah}(h]h ]h"]h$]h&]j j uh1j hhhKhj hhubeh}(h]temperature-monitoringah ]h"]temperature monitoringah$]h&]uh1hhhhhhhhKtubh)}(hhh](h)}(hFan Speed Controlh]hFan Speed Control}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhj hhhhhKubh)}(hX7The VT1211 provides 2 programmable PWM outputs to control the speeds of 2 fans. Writing a 2 to any of the two pwm[1-2]_enable sysfs nodes will put the PWM controller in automatic mode. There is only a single controller that controls both PWM outputs but each PWM output can be individually enabled and disabled.h]hX7The VT1211 provides 2 programmable PWM outputs to control the speeds of 2 fans. Writing a 2 to any of the two pwm[1-2]_enable sysfs nodes will put the PWM controller in automatic mode. There is only a single controller that controls both PWM outputs but each PWM output can be individually enabled and disabled.}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj hhubh)}(hXEach PWM has 4 associated distinct output duty-cycles: full, high, low and off. Full and off are internally hard-wired to 255 (100%) and 0 (0%), respectively. High and low can be programmed via pwm[1-2]_auto_point[2-3]_pwm. Each PWM output can be associated with a different thermal input but - and here's the weird part - only one set of thermal thresholds exist that controls both PWMs output duty-cycles. The thermal thresholds are accessible via pwm[1-2]_auto_point[1-4]_temp. Note that even though there are 2 sets of 4 auto points each, they map to the same registers in the VT1211 and programming one set is sufficient (actually only the first set pwm1_auto_point[1-4]_temp is writable, the second set is read-only).h]hXEach PWM has 4 associated distinct output duty-cycles: full, high, low and off. Full and off are internally hard-wired to 255 (100%) and 0 (0%), respectively. High and low can be programmed via pwm[1-2]_auto_point[2-3]_pwm. Each PWM output can be associated with a different thermal input but - and here’s the weird part - only one set of thermal thresholds exist that controls both PWMs output duty-cycles. The thermal thresholds are accessible via pwm[1-2]_auto_point[1-4]_temp. Note that even though there are 2 sets of 4 auto points each, they map to the same registers in the VT1211 and programming one set is sufficient (actually only the first set pwm1_auto_point[1-4]_temp is writable, the second set is read-only).}(hj- hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj hhubj\)}(hhh]ja)}(hhh](jf)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jehj> ubjf)}(hhh]h}(h]h ]h"]h$]h&]colwidthK)uh1jehj> ubj)}(hhh]j)}(hhh](j)}(hhh]h)}(hPWM Auto Pointh]hPWM Auto Point}(hj^ hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj[ ubah}(h]h ]h"]h$]h&]uh1jhjX ubj)}(hhh]h)}(hPWM Output Duty-Cycleh]hPWM Output Duty-Cycle}(hju hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjr ubah}(h]h ]h"]h$]h&]uh1jhjX ubeh}(h]h ]h"]h$]h&]uh1jhjU ubah}(h]h ]h"]h$]h&]uh1jhj> ubj)}(hhh](j)}(hhh](j)}(hhh]h)}(hpwm[1-2]_auto_point4_pwmh]hpwm[1-2]_auto_point4_pwm}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(h)full speed duty-cycle (hard-wired to 255)h]h)full speed duty-cycle (hard-wired to 255)}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh](j)}(hhh]h)}(hpwm[1-2]_auto_point3_pwmh]hpwm[1-2]_auto_point3_pwm}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh]h)}(hhigh speed duty-cycleh]hhigh speed duty-cycle}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh](j)}(hhh]h)}(hpwm[1-2]_auto_point2_pwmh]hpwm[1-2]_auto_point2_pwm}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hlow speed duty-cycleh]hlow speed duty-cycle}(hj#hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj ubj)}(hhh](j)}(hhh]h)}(hpwm[1-2]_auto_point1_pwmh]hpwm[1-2]_auto_point1_pwm}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj@ubah}(h]h ]h"]h$]h&]uh1jhj=ubj)}(hhh]h)}(h off duty-cycle (hard-wired to 0)h]h off duty-cycle (hard-wired to 0)}(hjZhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjWubah}(h]h ]h"]h$]h&]uh1jhj=ubeh}(h]h ]h"]h$]h&]uh1jhj ubeh}(h]h ]h"]h$]h&]uh1jhj> ubeh}(h]h ]h"]h$]h&]colsKuh1j`hj; ubah}(h]h ]h"]h$]h&]uh1j[hj hhhhhNubj\)}(hhh]ja)}(hhh](jf)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jehjubjf)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jehjubj)}(hhh]j)}(hhh](j)}(hhh]h)}(hTemp Auto Pointh]hTemp Auto Point}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hThermal Thresholdh]hThermal Threshold}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh](j)}(hhh]h)}(hpwm[1-2]_auto_point4_temph]hpwm[1-2]_auto_point4_temp}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hfull speed temph]hfull speed temp}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hpwm[1-2]_auto_point3_temph]hpwm[1-2]_auto_point3_temp}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hhigh speed temph]hhigh speed temp}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj5ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hpwm[1-2]_auto_point2_temph]hpwm[1-2]_auto_point2_temp}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjUubah}(h]h ]h"]h$]h&]uh1jhjRubj)}(hhh]h)}(hlow speed temph]hlow speed temp}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjlubah}(h]h ]h"]h$]h&]uh1jhjRubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hpwm[1-2]_auto_point1_temph]hpwm[1-2]_auto_point1_temp}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hoff temph]hoff temp}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]colsKuh1j`hjubah}(h]h ]h"]h$]h&]uh1j[hj hhhhhNubh)}(hLong story short, the controller implements the following algorithm to set the PWM output duty-cycle based on the input temperature:h]hLong story short, the controller implements the following algorithm to set the PWM output duty-cycle based on the input temperature:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj hhubj\)}(hhh]ja)}(hhh](jf)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jehjubjf)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jehjubjf)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jehjubj)}(hhh]j)}(hhh](j)}(hhh]h)}(hThermal Thresholdh]hThermal Threshold}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hOutput Duty-Cycle (Rising Temp)h]hOutput Duty-Cycle (Rising Temp)}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj"ubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h Output Duty-Cycle (Falling Temp)h]h Output Duty-Cycle (Falling Temp)}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj9ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh](j)}(hhh]h)}(hhh]h)}(hhh]h}(h]h ]h"]h$]h&]uh1hhjeubah}(h]h ]h"]h$]h&]j-uh1hhhhKhjbubah}(h]h ]h"]h$]h&]uh1jhj_ubj)}(hhh]h)}(hfull speed duty-cycleh]hfull speed duty-cycle}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj~ubah}(h]h ]h"]h$]h&]uh1jhj_ubj)}(hhh]h)}(hfull speed duty-cycleh]hfull speed duty-cycle}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhj_ubeh}(h]h ]h"]h$]h&]uh1jhj\ubj)}(hhh](j)}(hhh]h)}(hfull speed temph]hfull speed temp}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj\ubj)}(hhh](j)}(hhh]h)}(hhh]h)}(hhh]h}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]jjwuh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hhigh speed duty-cycleh]hhigh speed duty-cycle}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hfull speed duty-cycleh]hfull speed duty-cycle}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj\ubj)}(hhh](j)}(hhh]h)}(hhigh speed temph]hhigh speed temp}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj9ubah}(h]h ]h"]h$]h&]uh1jhj6ubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhj6ubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhj6ubeh}(h]h ]h"]h$]h&]uh1jhj\ubj)}(hhh](j)}(hhh]h)}(hhh]h)}(hhh]h}(h]h ]h"]h$]h&]uh1hhjnubah}(h]h ]h"]h$]h&]jjwuh1hhhhKhjkubah}(h]h ]h"]h$]h&]uh1jhjhubj)}(hhh]h)}(hlow speed duty-cycleh]hlow speed duty-cycle}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjhubj)}(hhh]h)}(hhigh speed duty-cycleh]hhigh speed duty-cycle}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjhubeh}(h]h ]h"]h$]h&]uh1jhj\ubj)}(hhh](j)}(hhh]h)}(hlow speed temph]hlow speed temp}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhj\ubj)}(hhh](j)}(hhh]h)}(hhh]h)}(hhh]h}(h]h ]h"]h$]h&]uh1hhjubah}(h]h ]h"]h$]h&]jjwuh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hoff duty-cycleh]hoff duty-cycle}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj ubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(hlow speed duty-cycleh]hlow speed duty-cycle}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj!ubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h 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