nsphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget$/translations/zh_CN/hwmon/smsc47b397modnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget$/translations/zh_TW/hwmon/smsc47b397modnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget$/translations/it_IT/hwmon/smsc47b397modnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget$/translations/ja_JP/hwmon/smsc47b397modnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget$/translations/ko_KR/hwmon/smsc47b397modnameN classnameN refexplicituh1hhh ubh)}(hhh]hPortuguese (Brazilian)}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget$/translations/pt_BR/hwmon/smsc47b397modnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget$/translations/sp_SP/hwmon/smsc47b397modnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhsection)}(hhh](htitle)}(hKernel driver smsc47b397h]hKernel driver smsc47b397}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhh>/var/lib/git/docbuild/linux/Documentation/hwmon/smsc47b397.rsthKubh paragraph)}(hSupported chips:h]hSupported chips:}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh block_quote)}(h* SMSC LPC47B397-NC * SMSC SCH5307-NS * SMSC SCH5317 Prefix: 'smsc47b397' Addresses scanned: none, address read from Super I/O config space Datasheet: In this file h]h bullet_list)}(hhh](h list_item)}(hSMSC LPC47B397-NC h]h)}(hSMSC LPC47B397-NCh]hSMSC LPC47B397-NC}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhubah}(h]h ]h"]h$]h&]uh1hhhubh)}(hSMSC SCH5307-NS h]h)}(hSMSC SCH5307-NSh]hSMSC SCH5307-NS}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1hhhubh)}(hSMSC SCH5317 Prefix: 'smsc47b397' Addresses scanned: none, address read from Super I/O config space Datasheet: In this file h](h)}(h SMSC SCH5317h]h SMSC SCH5317}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hjubh)}(hPrefix: 'smsc47b397'h]hPrefix: ‘smsc47b397’}(hj*hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hjubh)}(hAAddresses scanned: none, address read from Super I/O config spaceh]hAAddresses scanned: none, address read from Super I/O config space}(hj8hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubh)}(hDatasheet: In this fileh]hDatasheet: In this file}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubeh}(h]h ]h"]h$]h&]uh1hhhubeh}(h]h ]h"]h$]h&]bullet*uh1hhhhKhhubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hAuthors:h]hAuthors:}(hjhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hD- Mark M. Hoffman - Utilitek Systems, Inc. h]h)}(hhh](h)}(h(Mark M. Hoffman h]h)}(hjh](hMark M. Hoffman <}(hjhhhNhNubh reference)}(hmhoffman@lightlink.comh]hmhoffman@lightlink.com}(hjhhhNhNubah}(h]h ]h"]h$]h&]refurimailto:mhoffman@lightlink.comuh1jhjubh>}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj}ubah}(h]h ]h"]h$]h&]uh1hhjzubh)}(hUtilitek Systems, Inc. h]h)}(hUtilitek Systems, Inc.h]hUtilitek Systems, Inc.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1hhjzubeh}(h]h ]h"]h$]h&]j`-uh1hhhhKhjvubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hNovember 23, 2004h]hNovember 23, 2004}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hX The following specification describes the SMSC LPC47B397-NC [1]_ sensor chip (for which there is no public datasheet available). This document was provided by Craig Kelly (In-Store Broadcast Network) and edited/corrected by Mark M. Hoffman .h](h.}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhhhhubhfootnote)}(h_And SMSC SCH5307-NS and SCH5317, which have different device IDs but are otherwise compatible. h](hlabel)}(h1h]h1}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1jhjubh)}(h^And SMSC SCH5307-NS and SCH5317, which have different device IDs but are otherwise compatible.h]h^And SMSC SCH5307-NS and SCH5317, which have different device IDs but are otherwise compatible.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubeh}(h]jah ]h"]1ah$]h&]jajjuh1jhhhKhhhhjKubh transition)}(hI-------------------------------------------------------------------------h]h}(h]h ]h"]h$]h&]uh1jDhhhK!hhhhubh)}(hhh](h)}(hIMethods for detecting the HP SIO and reading the thermal data on a dc7100h]hIMethods for detecting the HP SIO and reading the thermal data on a dc7100}(hjShhhNhNubah}(h]h ]h"]h$]h&]uh1hhjPhhhhhK$ubh)}(hXThe thermal information on the dc7100 is contained in the SIO Hardware Monitor (HWM). The information is accessed through an index/data pair. The index/data pair is located at the HWM Base Address + 0 and the HWM Base Address + 1. The HWM Base address can be obtained from Logical Device 8, registers 0x60 (MSB) and 0x61 (LSB). Currently we are using 0x480 for the HWM Base Address and 0x480 and 0x481 for the index/data pair.h]hXThe thermal information on the dc7100 is contained in the SIO Hardware Monitor (HWM). The information is accessed through an index/data pair. The index/data pair is located at the HWM Base Address + 0 and the HWM Base Address + 1. The HWM Base address can be obtained from Logical Device 8, registers 0x60 (MSB) and 0x61 (LSB). Currently we are using 0x480 for the HWM Base Address and 0x480 and 0x481 for the index/data pair.}(hjahhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK&hjPhhubh)}(hcReading temperature information. The temperature information is located in the following registers:h]hcReading temperature information. The temperature information is located in the following registers:}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK-hjPhhubhtable)}(hhh]htgroup)}(hhh](hcolspec)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthK7uh1jhjubhtbody)}(hhh](hrow)}(hhh](hentry)}(hhh]h)}(hTemp1h]hTemp1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK1hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h0x25h]h0x25}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK1hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h7(Currently, this reflects the CPU temp on all systems).h]h7(Currently, this reflects the CPU temp on all systems).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK1hjubah}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hTemp2h]hTemp2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK2hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h0x26h]h0x26}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK2hjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hTemp3h]hTemp3}(hjDhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK3hjAubah}(h]h ]h"]h$]h&]uh1jhj>ubj)}(hhh]h)}(h0x27h]h0x27}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK3hjXubah}(h]h ]h"]h$]h&]uh1jhj>ubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhj>ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j)}(hhh]h)}(hTemp4h]hTemp4}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK4hjubah}(h]h ]h"]h$]h&]uh1jhj~ubj)}(hhh]h)}(h0x80h]h0x80}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK4hjubah}(h]h ]h"]h$]h&]uh1jhj~ubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhj~ubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]colsKuh1jhjubah}(h]h ]h"]h$]h&]uh1j}hjPhhhhhNubh)}(h^Programming Example The following is an example of how to read the HWM temperature registers::h]h]Programming Example The following is an example of how to read the HWM temperature registers:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK7hjPhhubh literal_block)}(hJMOV DX,480H MOV AX,25H OUT DX,AL MOV DX,481H IN AL,DXh]hJMOV DX,480H MOV AX,25H OUT DX,AL MOV DX,481H IN AL,DX}hjsbah}(h]h ]h"]h$]h&] xml:spacepreserveuh1jhhhK:hjPhhubh)}(hRAL contains the data in hex, the temperature in Celsius is the decimal equivalent.h]hRAL contains the data in hex, the temperature in Celsius is the decimal equivalent.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK@hjPhhubh)}(h9Ex: If AL contains 0x2A, the temperature is 42 degrees C.h]h9Ex: If AL contains 0x2A, the temperature is 42 degrees C.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKChjPhhubh)}(hZReading tach information. The fan speed information is located in the following registers:h]hZReading tach information. The fan speed information is located in the following registers:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKEhjPhhubj~)}(hhh]j)}(hhh](j)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthK!uh1jhjubj)}(hhh](j)}(hhh](j)}(hhh]h)}(hTach1h]hTach1}(hjRhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKJhjOubah}(h]h ]h"]h$]h&]uh1jhjLubj)}(hhh]h)}(h0x28h]h0x28}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKJhjfubah}(h]h ]h"]h$]h&]uh1jhjLubj)}(hhh]h)}(h0x29h]h0x29}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKJhj}ubah}(h]h ]h"]h$]h&]uh1jhjLubj)}(hhh]h)}(h<(Currently, this reflects the CPU fan speed on all systems).h]h<(Currently, this reflects the CPU fan speed on all systems).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKJhjubah}(h]h ]h"]h$]h&]uh1jhjLubeh}(h]h ]h"]h$]h&]uh1jhjIubj)}(hhh](j)}(hhh]h)}(hTach2h]hTach2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKLhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h0x2Ah]h0x2A}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKLhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h0x2Bh]h0x2B}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKLhjubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjIubj)}(hhh](j)}(hhh]h)}(hTach3h]hTach3}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKMhj ubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h0x2Ch]h0x2C}(hj%hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKMhj"ubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h)}(h0x2Dh]h0x2D}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKMhj9ubah}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1jhjIubj)}(hhh](j)}(hhh]h)}(hTach4h]hTach4}(hjehhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKNhjbubah}(h]h ]h"]h$]h&]uh1jhj_ubj)}(hhh]h)}(h0x2Eh]h0x2E}(hj|hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKNhjyubah}(h]h ]h"]h$]h&]uh1jhj_ubj)}(hhh]h)}(h0x2Fh]h0x2F}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKNhjubah}(h]h ]h"]h$]h&]uh1jhj_ubj)}(hhh]h}(h]h ]h"]h$]h&]uh1jhj_ubeh}(h]h ]h"]h$]h&]uh1jhjIubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]colsKuh1jhjubah}(h]h ]h"]h$]h&]uh1j}hjPhhhhhNubh important)}(hDReading the tach LSB locks the tach MSB. The LSB Must be read first.h]h)}(hDReading the tach LSB locks the tach MSB. The LSB Must be read first.h]hDReading the tach LSB locks the tach MSB. The LSB Must be read first.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKShjubah}(h]h ]h"]h$]h&]uh1jhjPhhhhhNubeh}(h]Imethods-for-detecting-the-hp-sio-and-reading-the-thermal-data-on-a-dc7100ah ]h"]Imethods for detecting the hp sio and reading the thermal data on a dc7100ah$]h&]uh1hhhhhhhhK$ubh)}(hhh](h)}(h&How to convert the tach reading to RPMh]h&How to convert the tach reading to RPM}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKWubh)}(hThe tach reading (TCount) is given by: (Tach MSB * 256) + (Tach LSB) The SIO counts the number of 90kHz (11.111us) pulses per revolution. RPM = 60/(TCount * 11.111us)h]hThe tach reading (TCount) is given by: (Tach MSB * 256) + (Tach LSB) The SIO counts the number of 90kHz (11.111us) pulses per revolution. RPM = 60/(TCount * 11.111us)}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKYhjhhubh)}(h Example::h]hExample:}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK]hjhhubj)}(hReg 0x28 = 0x9B Reg 0x29 = 0x08h]hReg 0x28 = 0x9B Reg 0x29 = 0x08}hjsbah}(h]h ]h"]h$]h&]jjuh1jhhhK_hjhhubh)}(hTCount = 0x89B = 2203h]hTCount = 0x89B = 2203}(hj&hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKbhjhhubh)}(h+RPM = 60 / (2203 * 11.11111 E-6) = 2451 RPMh]h+RPM = 60 / (2203 * 11.11111 E-6) = 2451 RPM}(hj4hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKdhjhhubh)}(hObtaining the SIO version.h]hObtaining the SIO version.}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKfhjhhubeh}(h]&how-to-convert-the-tach-reading-to-rpmah ]h"]&how to convert the tach reading to rpmah$]h&]uh1hhhhhhhhKWubh)}(hhh](h)}(hConfiguration Sequenceh]hConfiguration Sequence}(hj[hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjXhhhhhKiubh)}(hTo program the configuration registers, the following sequence must be followed: 1. Enter Configuration Mode 2. Configure the Configuration Registers 3. Exit Configuration Mode.h]hTo program the configuration registers, the following sequence must be followed: 1. Enter Configuration Mode 2. Configure the Configuration Registers 3. Exit Configuration Mode.}(hjihhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKkhjXhhubh)}(hhh](h)}(hEnter Configuration Modeh]hEnter Configuration Mode}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjwhhhhhKqubh)}(hjTo place the chip into the Configuration State The config key (0x55) is written to the CONFIG PORT (0x2E).h]hjTo place the chip into the Configuration State The config key (0x55) is written to the CONFIG PORT (0x2E).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKshjwhhubeh}(h]enter-configuration-modeah ]h"]enter configuration modeah$]h&]uh1hhjXhhhhhKqubh)}(hhh](h)}(hConfiguration Modeh]hConfiguration Mode}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKwubh)}(h{In configuration mode, the INDEX PORT is located at the CONFIG PORT address and the DATA PORT is at INDEX PORT address + 1.h]h{In configuration mode, the INDEX PORT is located at the CONFIG PORT address and the DATA PORT is at INDEX PORT address + 1.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKyhjhhubh)}(h>The desired configuration registers are accessed in two steps:h]h>The desired configuration registers are accessed in two steps:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK|hjhhubhenumerated_list)}(hhh](h)}(hWrite the index of the Logical Device Number Configuration Register (i.e., 0x07) to the INDEX PORT and then write the number of the desired logical device to the DATA PORT. h]h)}(hWrite the index of the Logical Device Number Configuration Register (i.e., 0x07) to the INDEX PORT and then write the number of the desired logical device to the DATA PORT.h]hWrite the index of the Logical Device Number Configuration Register (i.e., 0x07) to the INDEX PORT and then write the number of the desired logical device to the DATA PORT.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK~hjubah}(h]h ]h"]h$]h&]uh1hhjhhhhhNubh)}(hWrite the address of the desired configuration register within the logical device to the INDEX PORT and then write or read the config- uration register through the DATA PORT. h]h)}(hWrite the address of the desired configuration register within the logical device to the INDEX PORT and then write or read the config- uration register through the DATA PORT.h]hWrite the address of the desired configuration register within the logical device to the INDEX PORT and then write or read the config- uration register through the DATA PORT.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1hhjhhhhhNubeh}(h]h ]h"]h$]h&]enumtype loweralphaprefixhsuffix.uh1jhjhhhhhK~ubhdefinition_list)}(hhh]hdefinition_list_item)}(hQNote: If accessing the Global Configuration Registers, step (a) is not required. h](hterm)}(hNote:h]hNote:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1jhhhKhjubh definition)}(hhh]h)}(hJIf accessing the Global Configuration Registers, step (a) is not required.h]hJIf accessing the Global Configuration Registers, step (a) is not required.}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj(ubah}(h]h ]h"]h$]h&]uh1j&hjubeh}(h]h ]h"]h$]h&]uh1jhhhKhj ubah}(h]h ]h"]h$]h&]uh1j hjhhhhhNubeh}(h]configuration-modeah ]h"]configuration modeah$]h&]uh1hhjXhhhhhKwubh)}(hhh](h)}(hExit Configuration Modeh]hExit Configuration Mode}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjShhhhhKubh)}(hTo exit the Configuration State the write 0xAA to the CONFIG PORT (0x2E). The chip returns to the RUN State. (This is important).h]hTo exit the Configuration State the write 0xAA to the CONFIG PORT (0x2E). The chip returns to the RUN State. (This is important).}(hjdhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjShhubeh}(h]exit-configuration-modeah ]h"]exit configuration modeah$]h&]uh1hhjXhhhhhKubh)}(hhh](h)}(hProgramming Exampleh]hProgramming Example}(hj}hhhNhNubah}(h]h ]h"]h$]h&]uh1hhjzhhhhhKubh)}(hMThe following is an example of how to read the SIO Device ID located at 0x20:h]hMThe following is an example of how to read the SIO Device ID located at 0x20:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjzhhubh)}(hX ; ENTER CONFIGURATION MODE MOV DX,02EH MOV AX,055H OUT DX,AL ; GLOBAL CONFIGURATION REGISTER MOV DX,02EH MOV AL,20H OUT DX,AL ; READ THE DATA MOV DX,02FH IN AL,DX ; EXIT CONFIGURATION MODE MOV DX,02EH MOV AX,0AAH OUT DX,AL h]h)}(hX ; ENTER CONFIGURATION MODE MOV DX,02EH MOV AX,055H OUT DX,AL ; GLOBAL CONFIGURATION REGISTER MOV DX,02EH MOV AL,20H OUT DX,AL ; READ THE DATA MOV DX,02FH IN AL,DX ; EXIT CONFIGURATION MODE MOV DX,02EH MOV AX,0AAH OUT DX,ALh]hX ; ENTER CONFIGURATION MODE MOV DX,02EH MOV AX,055H OUT DX,AL ; GLOBAL CONFIGURATION REGISTER MOV DX,02EH MOV AL,20H OUT DX,AL ; READ THE DATA MOV DX,02FH IN AL,DX ; EXIT CONFIGURATION MODE MOV DX,02EH MOV AX,0AAH OUT DX,AL}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1hhhhKhjzhhubh)}(hlThe registers of interest for identifying the SIO on the dc7100 are Device ID (0x20) and Device Rev (0x21).h]hlThe registers of interest for identifying the SIO on the dc7100 are Device ID (0x20) and Device Rev (0x21).}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjzhhubh)}(hlThe Device ID will read 0x6F (0x81 for SCH5307-NS, and 0x85 for SCH5317) The Device Rev currently reads 0x01h]hlThe Device ID will read 0x6F (0x81 for SCH5307-NS, and 0x85 for SCH5317) The Device Rev currently reads 0x01}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjzhhubeh}(h]programming-exampleah ]h"]programming exampleah$]h&]uh1hhjXhhhhhKubeh}(h]configuration-sequenceah ]h"]configuration sequenceah$]h&]uh1hhhhhhhhKiubh)}(hhh](h)}(hObtaining the HWM Base Addressh]hObtaining the HWM Base Address}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKubh)}(h]The following is an example of how to read the HWM Base Address located in Logical Device 8::h]h\The following is an example of how to read the HWM Base Address located in Logical Device 8:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjhhubj)}(hX; ENTER CONFIGURATION MODE MOV DX,02EH MOV AX,055H OUT DX,AL ; CONFIGURE REGISTER CRE0, ; LOGICAL DEVICE 8 MOV DX,02EH MOV AL,07H OUT DX,AL ;Point to LD# Config Reg MOV DX,02FH MOV AL, 08H OUT DX,AL;Point to Logical Device 8 ; MOV DX,02EH MOV AL,60H OUT DX,AL ; Point to HWM Base Addr MSB MOV DX,02FH IN AL,DX ; Get MSB of HWM Base Addr ; EXIT CONFIGURATION MODE MOV DX,02EH MOV AX,0AAH OUT DX,ALh]hX; ENTER CONFIGURATION MODE MOV DX,02EH MOV AX,055H OUT DX,AL ; CONFIGURE REGISTER CRE0, ; LOGICAL DEVICE 8 MOV DX,02EH MOV AL,07H OUT DX,AL ;Point to LD# Config Reg MOV DX,02FH MOV AL, 08H OUT DX,AL;Point to Logical Device 8 ; MOV DX,02EH MOV AL,60H OUT DX,AL ; Point to HWM Base Addr MSB MOV DX,02FH IN AL,DX ; Get MSB of HWM Base Addr ; EXIT CONFIGURATION MODE MOV DX,02EH MOV AX,0AAH OUT DX,AL}hjsbah}(h]h ]h"]h$]h&]jjuh1jhhhKhjhhubeh}(h]obtaining-the-hwm-base-addressah ]h"]obtaining the hwm base addressah$]h&]uh1hhhhhhhhKubeh}(h]kernel-driver-smsc47b397ah ]h"]kernel driver smsc47b397ah$]h&]uh1hhhhhhhhKubeh}(h]h ]h"]h$]h&]sourcehuh1hcurrent_sourceN current_lineNsettingsdocutils.frontendValues)}(hN generatorN datestampN source_linkN source_urlN toc_backlinksjfootnote_backlinksK sectnum_xformKstrip_commentsNstrip_elements_with_classesN strip_classesN report_levelK halt_levelKexit_status_levelKdebugNwarning_streamN tracebackinput_encoding utf-8-siginput_encoding_error_handlerstrictoutput_encodingutf-8output_encoding_error_handlerj<error_encodingutf-8error_encoding_error_handlerbackslashreplace language_codeenrecord_dependenciesNconfigN id_prefixhauto_id_prefixid dump_settingsNdump_internalsNdump_transformsNdump_pseudo_xmlNexpose_internalsNstrict_visitorN_disable_configN_sourcehʌ _destinationN _config_files]7/var/lib/git/docbuild/linux/Documentation/docutils.confafile_insertion_enabled raw_enabledKline_length_limitM'pep_referencesN pep_base_urlhttps://peps.python.org/pep_file_url_templatepep-%04drfc_referencesN rfc_base_url&https://datatracker.ietf.org/doc/html/ tab_widthKtrim_footnote_reference_spacesyntax_highlightlong smart_quotessmartquotes_locales]character_level_inline_markupdoctitle_xform docinfo_xformKsectsubtitle_xform image_loadinglinkembed_stylesheetcloak_email_addressessection_self_linkenvNubreporterNindirect_targets]substitution_defs}substitution_names}refnames}1]jasrefids}nameids}(jjjAjjjjUjRjjjjjPjMjwjtjjjj u nametypes}(jjAjjUjjjPjwjjuh}(jhjjjjjjPjRjjjXjjwjMjjtjSjjzj ju footnote_refs}j|]jas citation_refs} autofootnotes]autofootnote_refs]symbol_footnotes]symbol_footnote_refs] footnotes]ja citations]autofootnote_startKsymbol_footnote_startK id_counter collectionsCounter}jJKsRparse_messages]transform_messages] transformerN include_log] decorationNhhub.