ksphinx.addnodesdocument)}( rawsourcechildren]( translations LanguagesNode)}(hhh](h pending_xref)}(hhh]docutils.nodesTextChinese (Simplified)}parenthsba attributes}(ids]classes]names]dupnames]backrefs] refdomainstdreftypedoc reftarget!/translations/zh_CN/hwmon/sis5595modnameN classnameN refexplicitutagnamehhh ubh)}(hhh]hChinese (Traditional)}hh2sbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget!/translations/zh_TW/hwmon/sis5595modnameN classnameN refexplicituh1hhh ubh)}(hhh]hItalian}hhFsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget!/translations/it_IT/hwmon/sis5595modnameN classnameN refexplicituh1hhh ubh)}(hhh]hJapanese}hhZsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget!/translations/ja_JP/hwmon/sis5595modnameN classnameN refexplicituh1hhh ubh)}(hhh]hKorean}hhnsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget!/translations/ko_KR/hwmon/sis5595modnameN classnameN refexplicituh1hhh ubh)}(hhh]hSpanish}hhsbah}(h]h ]h"]h$]h&] refdomainh)reftypeh+ reftarget!/translations/sp_SP/hwmon/sis5595modnameN classnameN refexplicituh1hhh ubeh}(h]h ]h"]h$]h&]current_languageEnglishuh1h hh _documenthsourceNlineNubhsection)}(hhh](htitle)}(hKernel driver sis5595h]hKernel driver sis5595}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhhh;/var/lib/git/docbuild/linux/Documentation/hwmon/sis5595.rsthKubh paragraph)}(hSupported chips:h]hSupported chips:}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh block_quote)}(h* Silicon Integrated Systems Corp. SiS5595 Southbridge Hardware Monitor Prefix: 'sis5595' Addresses scanned: ISA in PCI-space encoded address Datasheet: Publicly available at the Silicon Integrated Systems Corp. site. h]h bullet_list)}(hhh]h list_item)}(hSilicon Integrated Systems Corp. SiS5595 Southbridge Hardware Monitor Prefix: 'sis5595' Addresses scanned: ISA in PCI-space encoded address Datasheet: Publicly available at the Silicon Integrated Systems Corp. site. h](h)}(hESilicon Integrated Systems Corp. SiS5595 Southbridge Hardware Monitorh]hESilicon Integrated Systems Corp. SiS5595 Southbridge Hardware Monitor}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhubh)}(hPrefix: 'sis5595'h]hPrefix: ‘sis5595’}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhubh)}(h3Addresses scanned: ISA in PCI-space encoded addressh]h3Addresses scanned: ISA in PCI-space encoded address}(hhhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hhubh)}(hKDatasheet: Publicly available at the Silicon Integrated Systems Corp. site.h]hKDatasheet: Publicly available at the Silicon Integrated Systems Corp. site.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK hhubeh}(h]h ]h"]h$]h&]uh1hhhubah}(h]h ]h"]h$]h&]bullet*uh1hhhhKhhubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hAuthors:h]hAuthors:}(hj$hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hXd - Kyösti Mälkki , - Mark D. Studebaker , - Aurelien Jarno 2.6 port SiS southbridge has a LM78-like chip integrated on the same IC. This driver is a customized copy of lm78.c Supports following revisions: =============== =============== ============== Version PCI ID PCI Revision =============== =============== ============== 1 1039/0008 AF or less 2 1039/0008 B0 or greater =============== =============== ============== Note: these chips contain a 0008 device which is incompatible with the 5595. We recognize these by the presence of the listed "blacklist" PCI ID and refuse to load. =================== =============== ================ NOT SUPPORTED PCI ID BLACKLIST PCI ID =================== =============== ================ 540 0008 0540 550 0008 0550 5513 0008 5511 5581 0008 5597 5582 0008 5597 5597 0008 5597 630 0008 0630 645 0008 0645 730 0008 0730 735 0008 0735 =================== =============== ================ h](h)}(h- Kyösti Mälkki , - Mark D. Studebaker , - Aurelien Jarno 2.6 port h]h)}(hhh](h)}(h$Kyösti Mälkki ,h]h)}(hj?h](hKyösti Mälkki <}(hjAhhhNhNubh reference)}(hkmalkki@cc.hut.fih]hkmalkki@cc.hut.fi}(hjJhhhNhNubah}(h]h ]h"]h$]h&]refurimailto:kmalkki@cc.hut.fiuh1jHhjAubh>,}(hjAhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhj=ubah}(h]h ]h"]h$]h&]uh1hhj:ubh)}(h)Mark D. Studebaker ,h]h)}(hjlh](hMark D. Studebaker <}(hjnhhhNhNubjI)}(hmdsxyz123@yahoo.comh]hmdsxyz123@yahoo.com}(hjuhhhNhNubah}(h]h ]h"]h$]h&]refurimailto:mdsxyz123@yahoo.comuh1jHhjnubh>,}(hjnhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjjubah}(h]h ]h"]h$]h&]uh1hhj:ubh)}(h/Aurelien Jarno 2.6 port h]h)}(h.Aurelien Jarno 2.6 porth](hAurelien Jarno <}(hjhhhNhNubjI)}(haurelien@aurel32.neth]haurelien@aurel32.net}(hjhhhNhNubah}(h]h ]h"]h$]h&]refurimailto:aurelien@aurel32.netuh1jHhjubh > 2.6 port}(hjhhhNhNubeh}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1hhj:ubeh}(h]h ]h"]h$]h&]j-uh1hhhhKhj6ubah}(h]h ]h"]h$]h&]uh1hhhhKhj2ubh)}(hjSiS southbridge has a LM78-like chip integrated on the same IC. This driver is a customized copy of lm78.ch]hjSiS southbridge has a LM78-like chip integrated on the same IC. This driver is a customized copy of lm78.c}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj2ubh)}(hSupports following revisions:h]hSupports following revisions:}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj2ubh)}(hX=============== =============== ============== Version PCI ID PCI Revision =============== =============== ============== 1 1039/0008 AF or less 2 1039/0008 B0 or greater =============== =============== ============== h]htable)}(hhh]htgroup)}(hhh](hcolspec)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjubhthead)}(hhh]hrow)}(hhh](hentry)}(hhh]h)}(hVersionh]hVersion}(hj'hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj$ubah}(h]h ]h"]h$]h&]uh1j"hjubj#)}(hhh]h)}(hPCI IDh]hPCI ID}(hj>hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj;ubah}(h]h ]h"]h$]h&]uh1j"hjubj#)}(hhh]h)}(h PCI Revisionh]h PCI Revision}(hjUhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjRubah}(h]h ]h"]h$]h&]uh1j"hjubeh}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhjubhtbody)}(hhh](j)}(hhh](j#)}(hhh]h)}(h1h]h1}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhj}ubah}(h]h ]h"]h$]h&]uh1j"hjzubj#)}(hhh]h)}(h 1039/0008h]h 1039/0008}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1j"hjzubj#)}(hhh]h)}(h AF or lessh]h AF or less}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1j"hjzubeh}(h]h ]h"]h$]h&]uh1jhjwubj)}(hhh](j#)}(hhh]h)}(h2h]h2}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1j"hjubj#)}(hhh]h)}(h 1039/0008h]h 1039/0008}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1j"hjubj#)}(hhh]h)}(h B0 or greaterh]h B0 or greater}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKhjubah}(h]h ]h"]h$]h&]uh1j"hjubeh}(h]h ]h"]h$]h&]uh1jhjwubeh}(h]h ]h"]h$]h&]uh1juhjubeh}(h]h ]h"]h$]h&]colsKuh1jhjubah}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1hhhhKhj2ubhdefinition_list)}(hhh]hdefinition_list_item)}(hNote: these chips contain a 0008 device which is incompatible with the 5595. We recognize these by the presence of the listed "blacklist" PCI ID and refuse to load. h](hterm)}(hFNote: these chips contain a 0008 device which is incompatible with theh]hFNote: these chips contain a 0008 device which is incompatible with the}(hj<hhhNhNubah}(h]h ]h"]h$]h&]uh1j:hhhK$hj6ubh definition)}(hhh]h)}(h]5595. We recognize these by the presence of the listed "blacklist" PCI ID and refuse to load.h]ha5595. We recognize these by the presence of the listed “blacklist” PCI ID and refuse to load.}(hjOhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK#hjLubah}(h]h ]h"]h$]h&]uh1jJhj6ubeh}(h]h ]h"]h$]h&]uh1j4hhhK$hj1ubah}(h]h ]h"]h$]h&]uh1j/hj2ubj)}(hhh]j)}(hhh](j)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjrubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjrubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhjrubj)}(hhh]j)}(hhh](j#)}(hhh]h)}(h NOT SUPPORTEDh]h NOT SUPPORTED}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK'hjubah}(h]h ]h"]h$]h&]uh1j"hjubj#)}(hhh]h)}(hPCI IDh]hPCI ID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK'hjubah}(h]h ]h"]h$]h&]uh1j"hjubj#)}(hhh]h)}(hBLACKLIST PCI IDh]hBLACKLIST PCI ID}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK'hjubah}(h]h ]h"]h$]h&]uh1j"hjubeh}(h]h ]h"]h$]h&]uh1jhjubah}(h]h ]h"]h$]h&]uh1jhjrubjv)}(hhh](j)}(hhh](j#)}(hhh]h)}(h540h]h540}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK)hjubah}(h]h ]h"]h$]h&]uh1j"hjubj#)}(hhh]h)}(h0008h]h0008}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK)hjubah}(h]h ]h"]h$]h&]uh1j"hjubj#)}(hhh]h)}(h0540h]h0540}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK)hjubah}(h]h ]h"]h$]h&]uh1j"hjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j#)}(hhh]h)}(h550h]h550}(hjAhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK*hj>ubah}(h]h ]h"]h$]h&]uh1j"hj;ubj#)}(hhh]h)}(h0008h]h0008}(hjXhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK*hjUubah}(h]h ]h"]h$]h&]uh1j"hj;ubj#)}(hhh]h)}(h0550h]h0550}(hjohhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK*hjlubah}(h]h ]h"]h$]h&]uh1j"hj;ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j#)}(hhh]h)}(h5513h]h5513}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK+hjubah}(h]h ]h"]h$]h&]uh1j"hjubj#)}(hhh]h)}(h0008h]h0008}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK+hjubah}(h]h ]h"]h$]h&]uh1j"hjubj#)}(hhh]h)}(h5511h]h5511}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK+hjubah}(h]h ]h"]h$]h&]uh1j"hjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j#)}(hhh]h)}(h5581h]h5581}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK,hjubah}(h]h ]h"]h$]h&]uh1j"hjubj#)}(hhh]h)}(h0008h]h0008}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK,hjubah}(h]h ]h"]h$]h&]uh1j"hjubj#)}(hhh]h)}(h5597h]h5597}(hj hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK,hjubah}(h]h ]h"]h$]h&]uh1j"hjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j#)}(hhh]h)}(h5582h]h5582}(hj+hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK-hj(ubah}(h]h ]h"]h$]h&]uh1j"hj%ubj#)}(hhh]h)}(h0008h]h0008}(hjBhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK-hj?ubah}(h]h ]h"]h$]h&]uh1j"hj%ubj#)}(hhh]h)}(h5597h]h5597}(hjYhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK-hjVubah}(h]h ]h"]h$]h&]uh1j"hj%ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j#)}(hhh]h)}(h5597h]h5597}(hjyhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK.hjvubah}(h]h ]h"]h$]h&]uh1j"hjsubj#)}(hhh]h)}(h0008h]h0008}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK.hjubah}(h]h ]h"]h$]h&]uh1j"hjsubj#)}(hhh]h)}(h5597h]h5597}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK.hjubah}(h]h ]h"]h$]h&]uh1j"hjsubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j#)}(hhh]h)}(h630h]h630}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK/hjubah}(h]h ]h"]h$]h&]uh1j"hjubj#)}(hhh]h)}(h0008h]h0008}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK/hjubah}(h]h ]h"]h$]h&]uh1j"hjubj#)}(hhh]h)}(h0630h]h0630}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK/hjubah}(h]h ]h"]h$]h&]uh1j"hjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j#)}(hhh]h)}(h645h]h645}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK0hjubah}(h]h ]h"]h$]h&]uh1j"hjubj#)}(hhh]h)}(h0008h]h0008}(hj,hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK0hj)ubah}(h]h ]h"]h$]h&]uh1j"hjubj#)}(hhh]h)}(h0645h]h0645}(hjChhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK0hj@ubah}(h]h ]h"]h$]h&]uh1j"hjubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j#)}(hhh]h)}(h730h]h730}(hjchhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK1hj`ubah}(h]h ]h"]h$]h&]uh1j"hj]ubj#)}(hhh]h)}(h0008h]h0008}(hjzhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK1hjwubah}(h]h ]h"]h$]h&]uh1j"hj]ubj#)}(hhh]h)}(h0730h]h0730}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK1hjubah}(h]h ]h"]h$]h&]uh1j"hj]ubeh}(h]h ]h"]h$]h&]uh1jhjubj)}(hhh](j#)}(hhh]h)}(h735h]h735}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK2hjubah}(h]h ]h"]h$]h&]uh1j"hjubj#)}(hhh]h)}(h0008h]h0008}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK2hjubah}(h]h ]h"]h$]h&]uh1j"hjubj#)}(hhh]h)}(h0735h]h0735}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK2hjubah}(h]h ]h"]h$]h&]uh1j"hjubeh}(h]h ]h"]h$]h&]uh1jhjubeh}(h]h ]h"]h$]h&]uh1juhjrubeh}(h]h ]h"]h$]h&]colsKuh1jhjoubah}(h]h ]h"]h$]h&]uh1jhj2ubeh}(h]h ]h"]h$]h&]uh1hhhhKhhhhubh)}(hhh](h)}(hModule Parametersh]hModule Parameters}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhK7ubj)}(hhh]j)}(hhh](j)}(hhh]h}(h]h ]h"]h$]h&]colwidthKuh1jhj&ubj)}(hhh]h}(h]h ]h"]h$]h&]colwidthK5uh1jhj&ubjv)}(hhh]j)}(hhh](j#)}(hhh]h)}(hforce_addr=0xaddrh]hforce_addr=0xaddr}(hjFhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK:hjCubah}(h]h ]h"]h$]h&]uh1j"hj@ubj#)}(hhh](h)}(hSet the I/O base address. Useful for boards that don't set the address in the BIOS. Does not do a PCI force; the device must still be present in lspci. Don't use this unless the driver complains that the base address is not set.h]hSet the I/O base address. Useful for boards that don’t set the address in the BIOS. Does not do a PCI force; the device must still be present in lspci. Don’t use this unless the driver complains that the base address is not set.}(hj]hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK:hjZubh)}(h,Example: 'modprobe sis5595 force_addr=0x290'h]h0Example: ‘modprobe sis5595 force_addr=0x290’}(hjkhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK@hjZubeh}(h]h ]h"]h$]h&]uh1j"hj@ubeh}(h]h ]h"]h$]h&]uh1jhj=ubah}(h]h ]h"]h$]h&]uh1juhj&ubeh}(h]h ]h"]h$]h&]colsKuh1jhj#ubah}(h]h ]h"]h$]h&]uh1jhjhhhhhNubeh}(h]module-parametersah ]h"]module parametersah$]h&]uh1hhhhhhhhK7ubh)}(hhh](h)}(h Descriptionh]h Description}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjhhhhhKEubh)}(hThe SiS5595 southbridge has integrated hardware monitor functions. It also has an I2C bus, but this driver only supports the hardware monitor. For the I2C bus driver see i2c-sis5595.h]hThe SiS5595 southbridge has integrated hardware monitor functions. It also has an I2C bus, but this driver only supports the hardware monitor. For the I2C bus driver see i2c-sis5595.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKGhjhhubh)}(hwThe SiS5595 implements zero or one temperature sensor, two fan speed sensors, four or five voltage sensors, and alarms.h]hwThe SiS5595 implements zero or one temperature sensor, two fan speed sensors, four or five voltage sensors, and alarms.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKKhjhhubh)}(h\On the first version of the chip, there are four voltage sensors and one temperature sensor.h]h\On the first version of the chip, there are four voltage sensors and one temperature sensor.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKNhjhhubh)}(hOn the second version of the chip, the temperature sensor (temp) and the fifth voltage sensor (in4) share a pin which is configurable, but not through the driver. Sorry. The driver senses the configuration of the pin, which was hopefully set by the BIOS.h]hOn the second version of the chip, the temperature sensor (temp) and the fifth voltage sensor (in4) share a pin which is configurable, but not through the driver. Sorry. The driver senses the configuration of the pin, which was hopefully set by the BIOS.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKQhjhhubh)}(hTemperatures are measured in degrees Celsius. An alarm is triggered once when the max is crossed; it is also triggered when it drops below the min value. Measurements are guaranteed between -55 and +125 degrees, with a resolution of 1 degree.h]hTemperatures are measured in degrees Celsius. An alarm is triggered once when the max is crossed; it is also triggered when it drops below the min value. Measurements are guaranteed between -55 and +125 degrees, with a resolution of 1 degree.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKVhjhhubh)}(hXFan rotation speeds are reported in RPM (rotations per minute). An alarm is triggered if the rotation speed has dropped below a programmable limit. Fan readings can be divided by a programmable divider (1, 2, 4 or 8) to give the readings more range or accuracy. Not all RPM values can accurately be represented, so some rounding is done. With a divider of 2, the lowest representable value is around 2600 RPM.h]hXFan rotation speeds are reported in RPM (rotations per minute). An alarm is triggered if the rotation speed has dropped below a programmable limit. Fan readings can be divided by a programmable divider (1, 2, 4 or 8) to give the readings more range or accuracy. Not all RPM values can accurately be represented, so some rounding is done. With a divider of 2, the lowest representable value is around 2600 RPM.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhK[hjhhubh)}(hXyVoltage sensors (also known as IN sensors) report their values in volts. An alarm is triggered if the voltage has crossed a programmable minimum or maximum limit. Note that minimum in this case always means 'closest to zero'; this is important for negative voltage measurements. All voltage inputs can measure voltages between 0 and 4.08 volts, with a resolution of 0.016 volt.h]hX}Voltage sensors (also known as IN sensors) report their values in volts. An alarm is triggered if the voltage has crossed a programmable minimum or maximum limit. Note that minimum in this case always means ‘closest to zero’; this is important for negative voltage measurements. All voltage inputs can measure voltages between 0 and 4.08 volts, with a resolution of 0.016 volt.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKbhjhhubh)}(hIn addition to the alarms described above, there is a BTI alarm, which gets triggered when an external chip has crossed its limits. Usually, this is connected to some LM75-like chip; if at least one crosses its limits, this bit gets set.h]hIn addition to the alarms described above, there is a BTI alarm, which gets triggered when an external chip has crossed its limits. Usually, this is connected to some LM75-like chip; if at least one crosses its limits, this bit gets set.}(hjhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKihjhhubh)}(hX|If an alarm triggers, it will remain triggered until the hardware register is read at least once. This means that the cause for the alarm may already have disappeared! Note that in the current implementation, all hardware registers are read whenever any data is read (unless it is less than 1.5 seconds since the last update). This means that you can easily miss once-only alarms.h]hX|If an alarm triggers, it will remain triggered until the hardware register is read at least once. This means that the cause for the alarm may already have disappeared! Note that in the current implementation, all hardware registers are read whenever any data is read (unless it is less than 1.5 seconds since the last update). This means that you can easily miss once-only alarms.}(hj!hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKnhjhhubh)}(hzThe SiS5595 only updates its values each 1.5 seconds; reading it more often will do no harm, but will return 'old' values.h]h~The SiS5595 only updates its values each 1.5 seconds; reading it more often will do no harm, but will return ‘old’ values.}(hj/hhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKuhjhhubeh}(h] descriptionah ]h"] descriptionah$]h&]uh1hhhhhhhhKEubh)}(hhh](h)}(hProblemsh]hProblems}(hjHhhhNhNubah}(h]h ]h"]h$]h&]uh1hhjEhhhhhKyubh)}(hpSome chips refuse to be enabled. We don't know why. The driver will recognize this and print a message in dmesg.h]hrSome chips refuse to be enabled. We don’t know why. The driver will recognize this and print a message in dmesg.}(hjVhhhNhNubah}(h]h ]h"]h$]h&]uh1hhhhKzhjEhhubeh}(h]problemsah ]h"]problemsah$]h&]uh1hhhhhhhhKyubeh}(h]kernel-driver-sis5595ah ]h"]kernel driver sis5595ah$]h&]uh1hhhhhhhhKubeh}(h]h ]h"]h$]h&]sourcehuh1hcurrent_sourceN current_lineNsettingsdocutils.frontendValues)}(hN generatorN datestampN source_linkN source_urlN toc_backlinksj"footnote_backlinksK sectnum_xformKstrip_commentsNstrip_elements_with_classesN strip_classesN report_levelK halt_levelKexit_status_levelKdebugNwarning_streamN tracebackinput_encoding utf-8-siginput_encoding_error_handlerstrictoutput_encodingutf-8output_encoding_error_handlerjerror_encodingutf-8error_encoding_error_handlerbackslashreplace language_codeenrecord_dependenciesNconfigN id_prefixhauto_id_prefixid dump_settingsNdump_internalsNdump_transformsNdump_pseudo_xmlNexpose_internalsNstrict_visitorN_disable_configN_sourceh _destinationN _config_files]7/var/lib/git/docbuild/linux/Documentation/docutils.confafile_insertion_enabled raw_enabledKline_length_limitM'pep_referencesN pep_base_urlhttps://peps.python.org/pep_file_url_templatepep-%04drfc_referencesN rfc_base_url&https://datatracker.ietf.org/doc/html/ tab_widthKtrim_footnote_reference_spacesyntax_highlightlong smart_quotessmartquotes_locales]character_level_inline_markupdoctitle_xform docinfo_xformKsectsubtitle_xform image_loadinglinkembed_stylesheetcloak_email_addressessection_self_linkenvNubreporterNindirect_targets]substitution_defs}substitution_names}refnames}refids}nameids}(jqjnjjjBj?jijfu nametypes}(jqjjBjiuh}(jnhjjj?jjfjEu footnote_refs} citation_refs} autofootnotes]autofootnote_refs]symbol_footnotes]symbol_footnote_refs] footnotes] citations]autofootnote_startKsymbol_footnote_startK id_counter collectionsCounter}Rparse_messages]transform_messages] transformerN include_log] decorationNhhub.