€•{¾      Œsphinx.addnodes”Œdocument”“”)”}”(Œ	rawsource”Œ ”Œchildren”]”(Œtranslations”ŒLanguagesNode”“”)”}”(hhh]”(h Œpending_xref”“”)”}”(hhh]”Œdocutils.nodes”ŒText”“”ŒChinese (Simplified)”…””}”Œparent”hsbaŒ
attributes”}”(Œids”]”Œclasses”]”Œnames”]”Œdupnames”]”Œbackrefs”]”Œ	refdomain”Œstd”Œreftype”Œdoc”Œ	reftarget”Œ$/translations/zh_CN/hwmon/pmbus-core”Œmodname”NŒ	classname”NŒrefexplicit”ˆuŒtagname”hhhubh)”}”(hhh]”hŒChinese (Traditional)”…””}”hh2sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ$/translations/zh_TW/hwmon/pmbus-core”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒItalian”…””}”hhFsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ$/translations/it_IT/hwmon/pmbus-core”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒJapanese”…””}”hhZsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ$/translations/ja_JP/hwmon/pmbus-core”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒKorean”…””}”hhnsbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ$/translations/ko_KR/hwmon/pmbus-core”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubh)”}”(hhh]”hŒSpanish”…””}”hh‚sbah}”(h]”h ]”h"]”h$]”h&]”Œ	refdomain”h)Œreftype”h+Œ	reftarget”Œ$/translations/sp_SP/hwmon/pmbus-core”Œmodname”NŒ	classname”NŒrefexplicit”ˆuh1hhhubeh}”(h]”h ]”h"]”h$]”h&]”Œcurrent_language”ŒEnglish”uh1h
hhŒ	_document”hŒsource”NŒline”NubhŒsection”“”)”}”(hhh]”(hŒtitle”“”)”}”(hŒ"PMBus core driver and internal API”h]”hŒ"PMBus core driver and internal API”…””}”(hh¨hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hh£hžhhŸŒ>/var/lib/git/docbuild/linux/Documentation/hwmon/pmbus-core.rst”h Kubh¢)”}”(hhh]”(h§)”}”(hŒIntroduction”h]”hŒIntroduction”…””}”(hhºhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hh·hžhhŸh¶h KubhŒ	paragraph”“”)”}”(hX   [from pmbus.org] The Power Management Bus (PMBus) is an open standard
power-management protocol with a fully defined command language that facilitates
communication with power converters and other devices in a power system. The
protocol is implemented over the industry-standard SMBus serial interface and
enables programming, control, and real-time monitoring of compliant power
conversion products. This flexible and highly versatile standard allows for
communication between devices based on both analog and digital technologies, and
provides true interoperability which will reduce design complexity and shorten
time to market for power system designers. Pioneered by leading power supply and
semiconductor companies, this open power system standard is maintained and
promoted by the PMBus Implementers Forum (PMBus-IF), comprising 30+ adopters
with the objective to provide support to, and facilitate adoption among, users.”h]”hX   [from pmbus.org] The Power Management Bus (PMBus) is an open standard
power-management protocol with a fully defined command language that facilitates
communication with power converters and other devices in a power system. The
protocol is implemented over the industry-standard SMBus serial interface and
enables programming, control, and real-time monitoring of compliant power
conversion products. This flexible and highly versatile standard allows for
communication between devices based on both analog and digital technologies, and
provides true interoperability which will reduce design complexity and shorten
time to market for power system designers. Pioneered by leading power supply and
semiconductor companies, this open power system standard is maintained and
promoted by the PMBus Implementers Forum (PMBus-IF), comprising 30+ adopters
with the objective to provide support to, and facilitate adoption among, users.”…””}”(hhÊhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Khh·hžhubhÉ)”}”(hXu  Unfortunately, while PMBus commands are standardized, there are no mandatory
commands, and manufacturers can add as many non-standard commands as they like.
Also, different PMBUs devices act differently if non-supported commands are
executed. Some devices return an error, some devices return 0xff or 0xffff and
set a status error flag, and some devices may simply hang up.”h]”hXu  Unfortunately, while PMBus commands are standardized, there are no mandatory
commands, and manufacturers can add as many non-standard commands as they like.
Also, different PMBUs devices act differently if non-supported commands are
executed. Some devices return an error, some devices return 0xff or 0xffff and
set a status error flag, and some devices may simply hang up.”…””}”(hhØhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Khh·hžhubhÉ)”}”(hXK  Despite all those difficulties, a generic PMBus device driver is still useful
and supported since kernel version 2.6.39. However, it was necessary to support
device specific extensions in addition to the core PMBus driver, since it is
simply unknown what new device specific functionality PMBus device developers
come up with next.”h]”hXK  Despite all those difficulties, a generic PMBus device driver is still useful
and supported since kernel version 2.6.39. However, it was necessary to support
device specific extensions in addition to the core PMBus driver, since it is
simply unknown what new device specific functionality PMBus device developers
come up with next.”…””}”(hhæhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Khh·hžhubhÉ)”}”(hXs  To make device specific extensions as scalable as possible, and to avoid having
to modify the core PMBus driver repeatedly for new devices, the PMBus driver was
split into core, generic, and device specific code. The core code (in
pmbus_core.c) provides generic functionality. The generic code (in pmbus.c)
provides support for generic PMBus devices. Device specific code is responsible
for device specific initialization and, if needed, maps device specific
functionality into generic functionality. This is to some degree comparable
to PCI code, where generic code is augmented as needed with quirks for all kinds
of devices.”h]”hXs  To make device specific extensions as scalable as possible, and to avoid having
to modify the core PMBus driver repeatedly for new devices, the PMBus driver was
split into core, generic, and device specific code. The core code (in
pmbus_core.c) provides generic functionality. The generic code (in pmbus.c)
provides support for generic PMBus devices. Device specific code is responsible
for device specific initialization and, if needed, maps device specific
functionality into generic functionality. This is to some degree comparable
to PCI code, where generic code is augmented as needed with quirks for all kinds
of devices.”…””}”(hhôhžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h K!hh·hžhubeh}”(h]”Œintroduction”ah ]”h"]”Œintroduction”ah$]”h&]”uh1h¡hh£hžhhŸh¶h Kubh¢)”}”(hhh]”(h§)”}”(hŒ(PMBus device capabilities auto-detection”h]”hŒ(PMBus device capabilities auto-detection”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hj
  hžhhŸh¶h K,ubhÉ)”}”(hX‡  For generic PMBus devices, code in pmbus.c attempts to auto-detect all supported
PMBus commands. Auto-detection is somewhat limited, since there are simply too
many variables to consider. For example, it is almost impossible to autodetect
which PMBus commands are paged and which commands are replicated across all
pages (see the PMBus specification for details on multi-page PMBus devices).”h]”hX‡  For generic PMBus devices, code in pmbus.c attempts to auto-detect all supported
PMBus commands. Auto-detection is somewhat limited, since there are simply too
many variables to consider. For example, it is almost impossible to autodetect
which PMBus commands are paged and which commands are replicated across all
pages (see the PMBus specification for details on multi-page PMBus devices).”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h K.hj
  hžhubhÉ)”}”(hŒïFor this reason, it often makes sense to provide a device specific driver if not
all commands can be auto-detected. The data structures in this driver can be
used to inform the core driver about functionality supported by individual
chips.”h]”hŒïFor this reason, it often makes sense to provide a device specific driver if not
all commands can be auto-detected. The data structures in this driver can be
used to inform the core driver about functionality supported by individual
chips.”…””}”(hj)  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h K4hj
  hžhubhÉ)”}”(hX,  Some commands are always auto-detected. This applies to all limit commands
(lcrit, min, max, and crit attributes) as well as associated alarm attributes.
Limits and alarm attributes are auto-detected because there are simply too many
possible combinations to provide a manual configuration interface.”h]”hX,  Some commands are always auto-detected. This applies to all limit commands
(lcrit, min, max, and crit attributes) as well as associated alarm attributes.
Limits and alarm attributes are auto-detected because there are simply too many
possible combinations to provide a manual configuration interface.”…””}”(hj7  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h K9hj
  hžhubeh}”(h]”Œ(pmbus-device-capabilities-auto-detection”ah ]”h"]”Œ(pmbus device capabilities auto-detection”ah$]”h&]”uh1h¡hh£hžhhŸh¶h K,ubh¢)”}”(hhh]”(h§)”}”(hŒPMBus internal API”h]”hŒPMBus internal API”…””}”(hjP  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjM  hžhhŸh¶h K?ubhÉ)”}”(hŒÃThe API between core and device specific PMBus code is defined in
drivers/hwmon/pmbus/pmbus.h. In addition to the internal API, pmbus.h defines
standard PMBus commands and virtual PMBus commands.”h]”hŒÃThe API between core and device specific PMBus code is defined in
drivers/hwmon/pmbus/pmbus.h. In addition to the internal API, pmbus.h defines
standard PMBus commands and virtual PMBus commands.”…””}”(hj^  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h KAhjM  hžhubh¢)”}”(hhh]”(h§)”}”(hŒStandard PMBus commands”h]”hŒStandard PMBus commands”…””}”(hjo  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjl  hžhhŸh¶h KFubhÉ)”}”(hŒ^Standard PMBus commands (commands values 0x00 to 0xff) are defined in the PMBUs
specification.”h]”hŒ^Standard PMBus commands (commands values 0x00 to 0xff) are defined in the PMBUs
specification.”…””}”(hj}  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h KHhjl  hžhubeh}”(h]”Œstandard-pmbus-commands”ah ]”h"]”Œstandard pmbus commands”ah$]”h&]”uh1h¡hjM  hžhhŸh¶h KFubh¢)”}”(hhh]”(h§)”}”(hŒVirtual PMBus commands”h]”hŒVirtual PMBus commands”…””}”(hj–  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hj“  hžhhŸh¶h KLubhÉ)”}”(hŒ©Virtual PMBus commands are provided to enable support for non-standard
functionality which has been implemented by several chip vendors and is thus
desirable to support.”h]”hŒ©Virtual PMBus commands are provided to enable support for non-standard
functionality which has been implemented by several chip vendors and is thus
desirable to support.”…””}”(hj¤  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h KNhj“  hžhubhÉ)”}”(hX  Virtual PMBus commands start with command value 0x100 and can thus easily be
distinguished from standard PMBus commands (which can not have values larger
than 0xff). Support for virtual PMBus commands is device specific and thus has
to be implemented in device specific code.”h]”hX  Virtual PMBus commands start with command value 0x100 and can thus easily be
distinguished from standard PMBus commands (which can not have values larger
than 0xff). Support for virtual PMBus commands is device specific and thus has
to be implemented in device specific code.”…””}”(hj²  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h KRhj“  hžhubhÉ)”}”(hŒnVirtual commands are named PMBUS_VIRT_xxx and start with PMBUS_VIRT_BASE. All
virtual commands are word sized.”h]”hŒnVirtual commands are named PMBUS_VIRT_xxx and start with PMBUS_VIRT_BASE. All
virtual commands are word sized.”…””}”(hjÀ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h KWhj“  hžhubhÉ)”}”(hŒ2There are currently two types of virtual commands.”h]”hŒ2There are currently two types of virtual commands.”…””}”(hjÎ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h KZhj“  hžhubhŒbullet_list”“”)”}”(hhh]”(hŒ	list_item”“”)”}”(hŒJREAD commands are read-only; writes are either ignored or return an error.”h]”hÉ)”}”(hjå  h]”hŒJREAD commands are read-only; writes are either ignored or return an error.”…””}”(hjç  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h K\hjã  ubah}”(h]”h ]”h"]”h$]”h&]”uh1já  hjÞ  hžhhŸh¶h Nubjâ  )”}”(hŒ—RESET commands are read/write. Reading reset registers returns zero
(used for detection), writing any value causes the associated history to be
reset.
”h]”hÉ)”}”(hŒ–RESET commands are read/write. Reading reset registers returns zero
(used for detection), writing any value causes the associated history to be
reset.”h]”hŒ–RESET commands are read/write. Reading reset registers returns zero
(used for detection), writing any value causes the associated history to be
reset.”…””}”(hjþ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h K]hjú  ubah}”(h]”h ]”h"]”h$]”h&]”uh1já  hjÞ  hžhhŸh¶h Nubeh}”(h]”h ]”h"]”h$]”h&]”Œbullet”Œ-”uh1jÜ  hŸh¶h K\hj“  hžhubhÉ)”}”(hX7  Virtual commands have to be handled in device specific driver code. Chip driver
code returns non-negative values if a virtual command is supported, or a
negative error code if not. The chip driver may return -ENODATA or any other
Linux error code in this case, though an error code other than -ENODATA is
handled more efficiently and thus preferred. Either case, the calling PMBus
core code will abort if the chip driver returns an error code when reading
or writing virtual registers (in other words, the PMBus core code will never
send a virtual command to a chip).”h]”hX7  Virtual commands have to be handled in device specific driver code. Chip driver
code returns non-negative values if a virtual command is supported, or a
negative error code if not. The chip driver may return -ENODATA or any other
Linux error code in this case, though an error code other than -ENODATA is
handled more efficiently and thus preferred. Either case, the calling PMBus
core code will abort if the chip driver returns an error code when reading
or writing virtual registers (in other words, the PMBus core code will never
send a virtual command to a chip).”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Kahj“  hžhubeh}”(h]”Œvirtual-pmbus-commands”ah ]”h"]”Œvirtual pmbus commands”ah$]”h&]”uh1h¡hjM  hžhhŸh¶h KLubh¢)”}”(hhh]”(h§)”}”(hŒPMBus driver information”h]”hŒPMBus driver information”…””}”(hj3  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hj0  hžhhŸh¶h KkubhÉ)”}”(hŒÏPMBus driver information, defined in struct pmbus_driver_info, is the main means
for device specific drivers to pass information to the core PMBus driver.
Specifically, it provides the following information.”h]”hŒÏPMBus driver information, defined in struct pmbus_driver_info, is the main means
for device specific drivers to pass information to the core PMBus driver.
Specifically, it provides the following information.”…””}”(hjA  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Kmhj0  hžhubjÝ  )”}”(hhh]”(jâ  )”}”(hŒÎFor devices supporting its data in Direct Data Format, it provides coefficients
for converting register values into normalized data. This data is usually
provided by chip manufacturers in device datasheets.”h]”hÉ)”}”(hŒÎFor devices supporting its data in Direct Data Format, it provides coefficients
for converting register values into normalized data. This data is usually
provided by chip manufacturers in device datasheets.”h]”hŒÎFor devices supporting its data in Direct Data Format, it provides coefficients
for converting register values into normalized data. This data is usually
provided by chip manufacturers in device datasheets.”…””}”(hjV  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h KqhjR  ubah}”(h]”h ]”h"]”h$]”h&]”uh1já  hjO  hžhhŸh¶h Nubjâ  )”}”(hŒÒSupported chip functionality can be provided to the core driver. This may be
necessary for chips which react badly if non-supported commands are executed,
and/or to speed up device detection and initialization.”h]”hÉ)”}”(hŒÒSupported chip functionality can be provided to the core driver. This may be
necessary for chips which react badly if non-supported commands are executed,
and/or to speed up device detection and initialization.”h]”hŒÒSupported chip functionality can be provided to the core driver. This may be
necessary for chips which react badly if non-supported commands are executed,
and/or to speed up device detection and initialization.”…””}”(hjn  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Kthjj  ubah}”(h]”h ]”h"]”h$]”h&]”uh1já  hjO  hžhhŸh¶h Nubjâ  )”}”(hX  Several function entry points are provided to support overriding and/or
augmenting generic command execution. This functionality can be used to map
non-standard PMBus commands to standard commands, or to augment standard
command return values with device specific information.
”h]”hÉ)”}”(hX  Several function entry points are provided to support overriding and/or
augmenting generic command execution. This functionality can be used to map
non-standard PMBus commands to standard commands, or to augment standard
command return values with device specific information.”h]”hX  Several function entry points are provided to support overriding and/or
augmenting generic command execution. This functionality can be used to map
non-standard PMBus commands to standard commands, or to augment standard
command return values with device specific information.”…””}”(hj†  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Kwhj‚  ubah}”(h]”h ]”h"]”h$]”h&]”uh1já  hjO  hžhhŸh¶h Nubeh}”(h]”h ]”h"]”h$]”h&]”j  j  uh1jÜ  hŸh¶h Kqhj0  hžhubeh}”(h]”Œpmbus-driver-information”ah ]”h"]”Œpmbus driver information”ah$]”h&]”uh1h¡hjM  hžhhŸh¶h Kkubeh}”(h]”Œpmbus-internal-api”ah ]”h"]”Œpmbus internal api”ah$]”h&]”uh1h¡hh£hžhhŸh¶h K?ubh¢)”}”(hhh]”(h§)”}”(hŒPEC Support”h]”hŒPEC Support”…””}”(hj³  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hj°  hžhhŸh¶h K}ubhÉ)”}”(hXK  Many PMBus devices support SMBus PEC (Packet Error Checking). If supported
by both the I2C adapter and by the PMBus chip, it is by default enabled.
If PEC is supported, the PMBus core driver adds an attribute named 'pec' to
the I2C device. This attribute can be used to control PEC support in the
communication with the PMBus chip.”h]”hXO  Many PMBus devices support SMBus PEC (Packet Error Checking). If supported
by both the I2C adapter and by the PMBus chip, it is by default enabled.
If PEC is supported, the PMBus core driver adds an attribute named â€˜pecâ€™ to
the I2C device. This attribute can be used to control PEC support in the
communication with the PMBus chip.”…””}”(hjÁ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Khj°  hžhubeh}”(h]”Œpec-support”ah ]”h"]”Œpec support”ah$]”h&]”uh1h¡hh£hžhhŸh¶h K}ubh¢)”}”(hhh]”(h§)”}”(hŒAPI functions”h]”hŒAPI functions”…””}”(hjÚ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hj×  hžhhŸh¶h K†ubh¢)”}”(hhh]”(h§)”}”(hŒ!Functions provided by chip driver”h]”hŒ!Functions provided by chip driver”…””}”(hjë  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjè  hžhhŸh¶h K‰ubhÉ)”}”(hXy  All functions return the command return value (read) or zero (write) if
successful. A return value of -ENODATA indicates that there is no manufacturer
specific command, but that a standard PMBus command may exist. Any other
negative return value indicates that the commands does not exist for this
chip, and that no attempt should be made to read or write the standard
command.”h]”hXy  All functions return the command return value (read) or zero (write) if
successful. A return value of -ENODATA indicates that there is no manufacturer
specific command, but that a standard PMBus command may exist. Any other
negative return value indicates that the commands does not exist for this
chip, and that no attempt should be made to read or write the standard
command.”…””}”(hjù  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h K‹hjè  hžhubhÉ)”}”(hŒ°As mentioned above, an exception to this rule applies to virtual commands,
which *must* be handled in driver specific code. See "Virtual PMBus Commands"
above for more details.”h]”(hŒQAs mentioned above, an exception to this rule applies to virtual commands,
which ”…””}”(hj  hžhhŸNh NubhŒemphasis”“”)”}”(hŒ*must*”h]”hŒmust”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1j  hj  ubhŒ] be handled in driver specific code. See â€œVirtual PMBus Commandsâ€
above for more details.”…””}”(hj  hžhhŸNh Nubeh}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h K’hjè  hžhubhÉ)”}”(hŒ?Command execution in the core PMBus driver code is as follows::”h]”hŒ>Command execution in the core PMBus driver code is as follows:”…””}”(hj)  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h K–hjè  hžhubhŒliteral_block”“”)”}”(hŒýif (chip_access_function) {
        status = chip_access_function();
        if (status != -ENODATA)
                return status;
}
if (command >= PMBUS_VIRT_BASE) /* For word commands/registers only */
        return -EINVAL;
return generic_access();”h]”hŒýif (chip_access_function) {
        status = chip_access_function();
        if (status != -ENODATA)
                return status;
}
if (command >= PMBUS_VIRT_BASE) /* For word commands/registers only */
        return -EINVAL;
return generic_access();”…””}”hj9  sbah}”(h]”h ]”h"]”h$]”h&]”Œ	xml:space”Œpreserve”uh1j7  hŸh¶h K˜hjè  hžhubhÉ)”}”(hŒuChip drivers may provide pointers to the following functions in struct
pmbus_driver_info. All functions are optional.”h]”hŒuChip drivers may provide pointers to the following functions in struct
pmbus_driver_info. All functions are optional.”…””}”(hjI  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h K¡hjè  hžhubj8  )”}”(hŒDint (*read_byte_data)(struct i2c_client *client, int page, int reg);”h]”hŒDint (*read_byte_data)(struct i2c_client *client, int page, int reg);”…””}”hjW  sbah}”(h]”h ]”h"]”h$]”h&]”jG  jH  uh1j7  hŸh¶h K¦hjè  hžhubhÉ)”}”(hŒYRead byte from page <page>, register <reg>.
<page> may be -1, which means "current page".”h]”hŒ]Read byte from page <page>, register <reg>.
<page> may be -1, which means â€œcurrent pageâ€.”…””}”(hje  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h K¨hjè  hžhubj8  )”}”(hŒeint (*read_word_data)(struct i2c_client *client, int page, int phase,
                      int reg);”h]”hŒeint (*read_word_data)(struct i2c_client *client, int page, int phase,
                      int reg);”…””}”hjs  sbah}”(h]”h ]”h"]”h$]”h&]”jG  jH  uh1j7  hŸh¶h K®hjè  hžhubhÉ)”}”(hŒÞRead word from page <page>, phase <phase>, register <reg>. If the chip does not
support multiple phases, the phase parameter can be ignored. If the chip
supports multiple phases, a phase value of 0xff indicates all phases.”h]”hŒÞRead word from page <page>, phase <phase>, register <reg>. If the chip does not
support multiple phases, the phase parameter can be ignored. If the chip
supports multiple phases, a phase value of 0xff indicates all phases.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h K±hjè  hžhubj8  )”}”(hŒfint (*write_word_data)(struct i2c_client *client, int page, int reg,
                       u16 word);”h]”hŒfint (*write_word_data)(struct i2c_client *client, int page, int reg,
                       u16 word);”…””}”hj  sbah}”(h]”h ]”h"]”h$]”h&]”jG  jH  uh1j7  hŸh¶h K·hjè  hžhubhÉ)”}”(hŒ*Write word to page <page>, register <reg>.”h]”hŒ*Write word to page <page>, register <reg>.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Kºhjè  hžhubj8  )”}”(hŒAint (*write_byte)(struct i2c_client *client, int page, u8 value);”h]”hŒAint (*write_byte)(struct i2c_client *client, int page, u8 value);”…””}”hj«  sbah}”(h]”h ]”h"]”h$]”h&]”jG  jH  uh1j7  hŸh¶h K¾hjè  hžhubhÉ)”}”(hŒXWrite byte to page <page>, register <reg>.
<page> may be -1, which means "current page".”h]”hŒ\Write byte to page <page>, register <reg>.
<page> may be -1, which means â€œcurrent pageâ€.”…””}”(hj¹  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h KÀhjè  hžhubj8  )”}”(hŒKint (*identify)(struct i2c_client *client, struct pmbus_driver_info *info);”h]”hŒKint (*identify)(struct i2c_client *client, struct pmbus_driver_info *info);”…””}”hjÇ  sbah}”(h]”h ]”h"]”h$]”h&]”jG  jH  uh1j7  hŸh¶h KÅhjè  hžhubhÉ)”}”(hŒåDetermine supported PMBus functionality. This function is only necessary
if a chip driver supports multiple chips, and the chip functionality is not
pre-determined. It is currently only used by the generic pmbus driver
(pmbus.c).”h]”hŒåDetermine supported PMBus functionality. This function is only necessary
if a chip driver supports multiple chips, and the chip functionality is not
pre-determined. It is currently only used by the generic pmbus driver
(pmbus.c).”…””}”(hjÕ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h KÇhjè  hžhubeh}”(h]”Œ!functions-provided-by-chip-driver”ah ]”h"]”Œ!functions provided by chip driver”ah$]”h&]”uh1h¡hj×  hžhhŸh¶h K‰ubh¢)”}”(hhh]”(h§)”}”(hŒ!Functions exported by core driver”h]”hŒ!Functions exported by core driver”…””}”(hjî  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hjë  hžhhŸh¶h KÍubhÉ)”}”(hXŽ  Chip drivers are expected to use the following functions to read or write
PMBus registers. Chip drivers may also use direct I2C commands. If direct I2C
commands are used, the chip driver code must not directly modify the current
page, since the selected page is cached in the core driver and the core driver
will assume that it is selected. Using pmbus_set_page() to select a new page
is mandatory.”h]”hXŽ  Chip drivers are expected to use the following functions to read or write
PMBus registers. Chip drivers may also use direct I2C commands. If direct I2C
commands are used, the chip driver code must not directly modify the current
page, since the selected page is cached in the core driver and the core driver
will assume that it is selected. Using pmbus_set_page() to select a new page
is mandatory.”…””}”(hjü  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h KÏhjë  hžhubj8  )”}”(hŒAint pmbus_set_page(struct i2c_client *client, u8 page, u8 phase);”h]”hŒAint pmbus_set_page(struct i2c_client *client, u8 page, u8 phase);”…””}”hj
  sbah}”(h]”h ]”h"]”h$]”h&]”jG  jH  uh1j7  hŸh¶h KØhjë  hžhubhÉ)”}”(hŒÉSet PMBus page register to <page> and <phase> for subsequent commands.
If the chip does not support multiple phases, the phase parameter is
ignored. Otherwise, a phase value of 0xff selects all phases.”h]”hŒÉSet PMBus page register to <page> and <phase> for subsequent commands.
If the chip does not support multiple phases, the phase parameter is
ignored. Otherwise, a phase value of 0xff selects all phases.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h KÚhjë  hžhubj8  )”}”(hŒhint pmbus_read_word_data(struct i2c_client *client, u8 page, u8 phase,
                         u8 reg);”h]”hŒhint pmbus_read_word_data(struct i2c_client *client, u8 page, u8 phase,
                         u8 reg);”…””}”hj&  sbah}”(h]”h ]”h"]”h$]”h&]”jG  jH  uh1j7  hŸh¶h Kàhjë  hžhubhÉ)”}”(hŒ÷Read word data from <page>, <phase>, <reg>. Similar to
i2c_smbus_read_word_data(), but selects page and phase first. If the chip does
not support multiple phases, the phase parameter is ignored. Otherwise, a phase
value of 0xff selects all phases.”h]”hŒ÷Read word data from <page>, <phase>, <reg>. Similar to
i2c_smbus_read_word_data(), but selects page and phase first. If the chip does
not support multiple phases, the phase parameter is ignored. Otherwise, a phase
value of 0xff selects all phases.”…””}”(hj4  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Kãhjë  hžhubj8  )”}”(hŒjint pmbus_write_word_data(struct i2c_client *client, u8 page, u8 reg,
                          u16 word);”h]”hŒjint pmbus_write_word_data(struct i2c_client *client, u8 page, u8 reg,
                          u16 word);”…””}”hjB  sbah}”(h]”h ]”h"]”h$]”h&]”jG  jH  uh1j7  hŸh¶h Kêhjë  hžhubhÉ)”}”(hŒaWrite word data to <page>, <reg>. Similar to i2c_smbus_write_word_data(), but
selects page first.”h]”hŒaWrite word data to <page>, <reg>. Similar to i2c_smbus_write_word_data(), but
selects page first.”…””}”(hjP  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Kíhjë  hžhubj8  )”}”(hŒFint pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg);”h]”hŒFint pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg);”…””}”hj^  sbah}”(h]”h ]”h"]”h$]”h&]”jG  jH  uh1j7  hŸh¶h Kòhjë  hžhubhÉ)”}”(hŒRead byte data from <page>, <reg>. Similar to i2c_smbus_read_byte_data(), but
selects page first. <page> may be -1, which means "current page".”h]”hŒ“Read byte data from <page>, <reg>. Similar to i2c_smbus_read_byte_data(), but
selects page first. <page> may be -1, which means â€œcurrent pageâ€.”…””}”(hjl  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Kôhjë  hžhubj8  )”}”(hŒDint pmbus_write_byte(struct i2c_client *client, int page, u8 value);”h]”hŒDint pmbus_write_byte(struct i2c_client *client, int page, u8 value);”…””}”hjz  sbah}”(h]”h ]”h"]”h$]”h&]”jG  jH  uh1j7  hŸh¶h Kùhjë  hžhubhÉ)”}”(hŒŠWrite byte data to <page>, <reg>. Similar to i2c_smbus_write_byte(), but
selects page first. <page> may be -1, which means "current page".”h]”hŒŽWrite byte data to <page>, <reg>. Similar to i2c_smbus_write_byte(), but
selects page first. <page> may be -1, which means â€œcurrent pageâ€.”…””}”(hjˆ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Kûhjë  hžhubj8  )”}”(hŒ3void pmbus_clear_faults(struct i2c_client *client);”h]”hŒ3void pmbus_clear_faults(struct i2c_client *client);”…””}”hj–  sbah}”(h]”h ]”h"]”h$]”h&]”jG  jH  uh1j7  hŸh¶h M hjë  hžhubhÉ)”}”(hŒµExecute PMBus "Clear Fault" command on all chip pages.
This function calls the device specific write_byte function if defined.
Therefore, it must _not_ be called from that function.”h]”hŒ¹Execute PMBus â€œClear Faultâ€ command on all chip pages.
This function calls the device specific write_byte function if defined.
Therefore, it must _not_ be called from that function.”…””}”(hj¤  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Mhjë  hžhubj8  )”}”(hŒMbool pmbus_check_byte_register(struct i2c_client *client, int page, int reg);”h]”hŒMbool pmbus_check_byte_register(struct i2c_client *client, int page, int reg);”…””}”hj²  sbah}”(h]”h ]”h"]”h$]”h&]”jG  jH  uh1j7  hŸh¶h Mhjë  hžhubhÉ)”}”(hŒìCheck if byte register exists. Return true if the register exists, false
otherwise.
This function calls the device specific write_byte function if defined to
obtain the chip status. Therefore, it must _not_ be called from that function.”h]”hŒìCheck if byte register exists. Return true if the register exists, false
otherwise.
This function calls the device specific write_byte function if defined to
obtain the chip status. Therefore, it must _not_ be called from that function.”…””}”(hjÀ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h M
hjë  hžhubj8  )”}”(hŒMbool pmbus_check_word_register(struct i2c_client *client, int page, int reg);”h]”hŒMbool pmbus_check_word_register(struct i2c_client *client, int page, int reg);”…””}”hjÎ  sbah}”(h]”h ]”h"]”h$]”h&]”jG  jH  uh1j7  hŸh¶h Mhjë  hžhubhÉ)”}”(hŒìCheck if word register exists. Return true if the register exists, false
otherwise.
This function calls the device specific write_byte function if defined to
obtain the chip status. Therefore, it must _not_ be called from that function.”h]”hŒìCheck if word register exists. Return true if the register exists, false
otherwise.
This function calls the device specific write_byte function if defined to
obtain the chip status. Therefore, it must _not_ be called from that function.”…””}”(hjÜ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Mhjë  hžhubj8  )”}”(hŒNint pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info);”h]”hŒNint pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info);”…””}”hjê  sbah}”(h]”h ]”h"]”h$]”h&]”jG  jH  uh1j7  hŸh¶h Mhjë  hžhubhÉ)”}”(hŒèExecute probe function. Similar to standard probe function for other drivers,
with the pointer to struct pmbus_driver_info as additional argument. Calls
identify function if supported. Must only be called from device probe
function.”h]”hŒèExecute probe function. Similar to standard probe function for other drivers,
with the pointer to struct pmbus_driver_info as additional argument. Calls
identify function if supported. Must only be called from device probe
function.”…””}”(hjø  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Mhjë  hžhubj8  )”}”(hŒWconst struct pmbus_driver_info
      *pmbus_get_driver_info(struct i2c_client *client);”h]”hŒWconst struct pmbus_driver_info
      *pmbus_get_driver_info(struct i2c_client *client);”…””}”hj  sbah}”(h]”h ]”h"]”h$]”h&]”jG  jH  uh1j7  hŸh¶h M#hjë  hžhubhÉ)”}”(hŒIReturn pointer to struct pmbus_driver_info as passed to pmbus_do_probe().”h]”hŒIReturn pointer to struct pmbus_driver_info as passed to pmbus_do_probe().”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h M&hjë  hžhubeh}”(h]”Œ!functions-exported-by-core-driver”ah ]”h"]”Œ!functions exported by core driver”ah$]”h&]”uh1h¡hj×  hžhhŸh¶h KÍubeh}”(h]”Œapi-functions”ah ]”h"]”Œapi functions”ah$]”h&]”uh1h¡hh£hžhhŸh¶h K†ubh¢)”}”(hhh]”(h§)”}”(hŒPMBus driver platform data”h]”hŒPMBus driver platform data”…””}”(hj5  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hj2  hžhhŸh¶h M*ubhÉ)”}”(hŒ}PMBus platform data is defined in include/linux/pmbus.h. Platform data
currently provides a flags field with four bits used::”h]”hŒ|PMBus platform data is defined in include/linux/pmbus.h. Platform data
currently provides a flags field with four bits used:”…””}”(hjC  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h M,hj2  hžhubj8  )”}”(hX‹  #define PMBUS_SKIP_STATUS_CHECK                 BIT(0)

#define PMBUS_WRITE_PROTECTED                   BIT(1)

#define PMBUS_NO_CAPABILITY                     BIT(2)

#define PMBUS_READ_STATUS_AFTER_FAILED_CHECK    BIT(3)

#define PMBUS_NO_WRITE_PROTECT                  BIT(4)

#define PMBUS_USE_COEFFICIENTS_CMD              BIT(5)

#define PMBUS_OP_PROTECTED                      BIT(6)

#define PMBUS_VOUT_PROTECTED                    BIT(7)

struct pmbus_platform_data {
        u32 flags;              /* Device specific flags */

        /* regulator support */
        int num_regulators;
        struct regulator_init_data *reg_init_data;
};”h]”hX‹  #define PMBUS_SKIP_STATUS_CHECK                 BIT(0)

#define PMBUS_WRITE_PROTECTED                   BIT(1)

#define PMBUS_NO_CAPABILITY                     BIT(2)

#define PMBUS_READ_STATUS_AFTER_FAILED_CHECK    BIT(3)

#define PMBUS_NO_WRITE_PROTECT                  BIT(4)

#define PMBUS_USE_COEFFICIENTS_CMD              BIT(5)

#define PMBUS_OP_PROTECTED                      BIT(6)

#define PMBUS_VOUT_PROTECTED                    BIT(7)

struct pmbus_platform_data {
        u32 flags;              /* Device specific flags */

        /* regulator support */
        int num_regulators;
        struct regulator_init_data *reg_init_data;
};”…””}”hjQ  sbah}”(h]”h ]”h"]”h$]”h&]”jG  jH  uh1j7  hŸh¶h M/hj2  hžhubh¢)”}”(hhh]”(h§)”}”(hŒFlags”h]”hŒFlags”…””}”(hjb  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hj_  hžhhŸh¶h MIubhÉ)”}”(hŒPMBUS_SKIP_STATUS_CHECK”h]”hŒPMBUS_SKIP_STATUS_CHECK”…””}”(hjp  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h MKhj_  hžhubhÉ)”}”(hŒaDuring register detection, skip checking the status register for
communication or command errors.”h]”hŒaDuring register detection, skip checking the status register for
communication or command errors.”…””}”(hj~  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h MMhj_  hžhubhÉ)”}”(hX{  Some PMBus chips respond with valid data when trying to read an unsupported
register. For such chips, checking the status register is mandatory when
trying to determine if a chip register exists or not.
Other PMBus chips don't support the STATUS_CML register, or report
communication errors for no explicable reason. For such chips, checking the
status register must be disabled.”h]”hX}  Some PMBus chips respond with valid data when trying to read an unsupported
register. For such chips, checking the status register is mandatory when
trying to determine if a chip register exists or not.
Other PMBus chips donâ€™t support the STATUS_CML register, or report
communication errors for no explicable reason. For such chips, checking the
status register must be disabled.”…””}”(hjŒ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h MPhj_  hžhubhÉ)”}”(hŒäSome i2c controllers do not support single-byte commands (write commands with
no data, i2c_smbus_write_byte()). With such controllers, clearing the status
register is impossible, and the PMBUS_SKIP_STATUS_CHECK flag must be set.”h]”hŒäSome i2c controllers do not support single-byte commands (write commands with
no data, i2c_smbus_write_byte()). With such controllers, clearing the status
register is impossible, and the PMBUS_SKIP_STATUS_CHECK flag must be set.”…””}”(hjš  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h MWhj_  hžhubhÉ)”}”(hŒPMBUS_WRITE_PROTECTED”h]”hŒPMBUS_WRITE_PROTECTED”…””}”(hj¨  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h M[hj_  hžhubhÉ)”}”(hŒpSet if the chip is write protected and write protection is not determined
by the standard WRITE_PROTECT command.”h]”hŒpSet if the chip is write protected and write protection is not determined
by the standard WRITE_PROTECT command.”…””}”(hj¶  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h M]hj_  hžhubhÉ)”}”(hŒPMBUS_NO_CAPABILITY”h]”hŒPMBUS_NO_CAPABILITY”…””}”(hjÄ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h M`hj_  hžhubhÉ)”}”(hŒÌSome PMBus chips don't respond with valid data when reading the CAPABILITY
register. For such chips, this flag should be set so that the PMBus core
driver doesn't use CAPABILITY to determine its behavior.”h]”hŒÐSome PMBus chips donâ€™t respond with valid data when reading the CAPABILITY
register. For such chips, this flag should be set so that the PMBus core
driver doesnâ€™t use CAPABILITY to determine its behavior.”…””}”(hjÒ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Mbhj_  hžhubhÉ)”}”(hŒ$PMBUS_READ_STATUS_AFTER_FAILED_CHECK”h]”hŒ$PMBUS_READ_STATUS_AFTER_FAILED_CHECK”…””}”(hjà  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Mfhj_  hžhubhÉ)”}”(hŒ:Read the STATUS register after each failed register check.”h]”hŒ:Read the STATUS register after each failed register check.”…””}”(hjî  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Mhhj_  hžhubhÉ)”}”(hX£  Some PMBus chips end up in an undefined state when trying to read an
unsupported register. For such chips, it is necessary to reset the
chip pmbus controller to a known state after a failed register check.
This can be done by reading a known register. By setting this flag the
driver will try to read the STATUS register after each failed
register check. This read may fail, but it will put the chip into a
known state.”h]”hX£  Some PMBus chips end up in an undefined state when trying to read an
unsupported register. For such chips, it is necessary to reset the
chip pmbus controller to a known state after a failed register check.
This can be done by reading a known register. By setting this flag the
driver will try to read the STATUS register after each failed
register check. This read may fail, but it will put the chip into a
known state.”…””}”(hjü  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Mjhj_  hžhubhÉ)”}”(hŒPMBUS_NO_WRITE_PROTECT”h]”hŒPMBUS_NO_WRITE_PROTECT”…””}”(hj
  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Mrhj_  hžhubhÉ)”}”(hŒÚSome PMBus chips respond with invalid data when reading the WRITE_PROTECT
register. For such chips, this flag should be set so that the PMBus core
driver doesn't use the WRITE_PROTECT command to determine its behavior.”h]”hŒÜSome PMBus chips respond with invalid data when reading the WRITE_PROTECT
register. For such chips, this flag should be set so that the PMBus core
driver doesnâ€™t use the WRITE_PROTECT command to determine its behavior.”…””}”(hj  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Mthj_  hžhubhÉ)”}”(hŒPMBUS_USE_COEFFICIENTS_CMD”h]”hŒPMBUS_USE_COEFFICIENTS_CMD”…””}”(hj&  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Mxhj_  hžhubhÉ)”}”(hŒ‰When this flag is set the PMBus core driver will use the COEFFICIENTS
register to initialize the coefficients for the direct mode format.”h]”hŒ‰When this flag is set the PMBus core driver will use the COEFFICIENTS
register to initialize the coefficients for the direct mode format.”…””}”(hj4  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Mzhj_  hžhubhÉ)”}”(hŒPMBUS_OP_PROTECTED”h]”hŒPMBUS_OP_PROTECTED”…””}”(hjB  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h M}hj_  hžhubhÉ)”}”(hŒvSet if the chip OPERATION command is protected and protection is not
determined by the standard WRITE_PROTECT command.”h]”hŒvSet if the chip OPERATION command is protected and protection is not
determined by the standard WRITE_PROTECT command.”…””}”(hjP  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h Mhj_  hžhubhÉ)”}”(hŒPMBUS_VOUT_PROTECTED”h]”hŒPMBUS_VOUT_PROTECTED”…””}”(hj^  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h M‚hj_  hžhubhÉ)”}”(hŒySet if the chip VOUT_COMMAND command is protected and protection is not
determined by the standard WRITE_PROTECT command.”h]”hŒySet if the chip VOUT_COMMAND command is protected and protection is not
determined by the standard WRITE_PROTECT command.”…””}”(hjl  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h M„hj_  hžhubeh}”(h]”Œflags”ah ]”h"]”Œflags”ah$]”h&]”uh1h¡hj2  hžhhŸh¶h MIubh¢)”}”(hhh]”(h§)”}”(hŒModule parameter”h]”hŒModule parameter”…””}”(hj…  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1h¦hj‚  hžhhŸh¶h MˆubhÉ)”}”(hŒ.pmbus_core.wp: PMBus write protect forced mode”h]”hŒ.pmbus_core.wp: PMBus write protect forced mode”…””}”(hj“  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h MŠhj‚  hžhubhÉ)”}”(hXa  PMBus may come up with a variety of write protection configuration.
'pmbus_core.wp' may be used if a particular write protection is necessary.
The ability to actually alter the protection may also depend on the chip
so the actual runtime write protection configuration may differ from
the requested one. pmbus_core currently support the following value:”h]”hXe  PMBus may come up with a variety of write protection configuration.
â€˜pmbus_core.wpâ€™ may be used if a particular write protection is necessary.
The ability to actually alter the protection may also depend on the chip
so the actual runtime write protection configuration may differ from
the requested one. pmbus_core currently support the following value:”…””}”(hj¡  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h MŒhj‚  hžhubjÝ  )”}”(hhh]”(jâ  )”}”(hŒ0: write protection removed.”h]”hÉ)”}”(hj´  h]”hŒ0: write protection removed.”…””}”(hj¶  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h M’hj²  ubah}”(h]”h ]”h"]”h$]”h&]”uh1já  hj¯  hžhhŸh¶h Nubjâ  )”}”(hŒl1: Disable all writes except to the WRITE_PROTECT, OPERATION,
PAGE, ON_OFF_CONFIG and VOUT_COMMAND commands.”h]”hÉ)”}”(hŒl1: Disable all writes except to the WRITE_PROTECT, OPERATION,
PAGE, ON_OFF_CONFIG and VOUT_COMMAND commands.”h]”hŒl1: Disable all writes except to the WRITE_PROTECT, OPERATION,
PAGE, ON_OFF_CONFIG and VOUT_COMMAND commands.”…””}”(hjÍ  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h M“hjÉ  ubah}”(h]”h ]”h"]”h$]”h&]”uh1já  hj¯  hžhhŸh¶h Nubjâ  )”}”(hŒO2: Disable all writes except to the WRITE_PROTECT, OPERATION and
PAGE commands.”h]”hÉ)”}”(hŒO2: Disable all writes except to the WRITE_PROTECT, OPERATION and
PAGE commands.”h]”hŒO2: Disable all writes except to the WRITE_PROTECT, OPERATION and
PAGE commands.”…””}”(hjå  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h M•hjá  ubah}”(h]”h ]”h"]”h$]”h&]”uh1já  hj¯  hžhhŸh¶h Nubjâ  )”}”(hX	  3: Disable all writes except to the WRITE_PROTECT command. Note that
protection should include the PAGE register. This may be problematic
for multi-page chips, if the chips strictly follows the PMBus
specification, preventing the chip from changing the active page.”h]”hÉ)”}”(hX	  3: Disable all writes except to the WRITE_PROTECT command. Note that
protection should include the PAGE register. This may be problematic
for multi-page chips, if the chips strictly follows the PMBus
specification, preventing the chip from changing the active page.”h]”hX	  3: Disable all writes except to the WRITE_PROTECT command. Note that
protection should include the PAGE register. This may be problematic
for multi-page chips, if the chips strictly follows the PMBus
specification, preventing the chip from changing the active page.”…””}”(hjý  hžhhŸNh Nubah}”(h]”h ]”h"]”h$]”h&]”uh1hÈhŸh¶h M—hjù  ubah}”(h]”h ]”h"]”h$]”h&]”uh1já  hj¯  hžhhŸh¶h Nubeh}”(h]”h ]”h"]”h$]”h&]”j  Œ*”uh1jÜ  hŸh¶h M’hj‚  hžhubeh}”(h]”Œmodule-parameter”ah ]”h"]”Œmodule parameter”ah$]”h&]”uh1h¡hj2  hžhhŸh¶h Mˆubeh}”(h]”Œpmbus-driver-platform-data”ah ]”h"]”Œpmbus driver platform data”ah$]”h&]”uh1h¡hh£hžhhŸh¶h M*ubeh}”(h]”Œ"pmbus-core-driver-and-internal-api”ah ]”h"]”Œ"pmbus core driver and internal api”ah$]”h&]”uh1h¡hhhžhhŸh¶h Kubeh}”(h]”h ]”h"]”h$]”h&]”Œsource”h¶uh1hŒcurrent_source”NŒcurrent_line”NŒsettings”Œdocutils.frontend”ŒValues”“”)”}”(h¦NŒ	generator”NŒ	datestamp”NŒsource_link”NŒ
source_url”NŒtoc_backlinks”Œentry”Œfootnote_backlinks”KŒsectnum_xform”KŒstrip_comments”NŒstrip_elements_with_classes”NŒstrip_classes”NŒreport_level”KŒ
halt_level”KŒexit_status_level”KŒdebug”NŒwarning_stream”NŒ	traceback”ˆŒinput_encoding”Œ	utf-8-sig”Œinput_encoding_error_handler”Œstrict”Œoutput_encoding”Œutf-8”Œoutput_encoding_error_handler”jS  Œerror_encoding”Œutf-8”Œerror_encoding_error_handler”Œbackslashreplace”Œlanguage_code”Œen”Œrecord_dependencies”NŒconfig”NŒ	id_prefix”hŒauto_id_prefix”Œid”Œdump_settings”NŒdump_internals”NŒdump_transforms”NŒdump_pseudo_xml”NŒexpose_internals”NŒstrict_visitor”NŒ_disable_config”NŒ_source”h¶Œ_destination”NŒ_config_files”]”Œ7/var/lib/git/docbuild/linux/Documentation/docutils.conf”aŒfile_insertion_enabled”ˆŒraw_enabled”KŒline_length_limit”M'Œpep_references”NŒpep_base_url”Œhttps://peps.python.org/”Œpep_file_url_template”Œpep-%04d”Œrfc_references”NŒrfc_base_url”Œ&https://datatracker.ietf.org/doc/html/”Œ	tab_width”KŒtrim_footnote_reference_space”‰Œsyntax_highlight”Œlong”Œsmart_quotes”ˆŒsmartquotes_locales”]”Œcharacter_level_inline_markup”‰Œdoctitle_xform”‰Œdocinfo_xform”KŒsectsubtitle_xform”‰Œimage_loading”Œlink”Œembed_stylesheet”‰Œcloak_email_addresses”ˆŒsection_self_link”‰Œenv”NubŒreporter”NŒindirect_targets”]”Œsubstitution_defs”}”Œsubstitution_names”}”Œrefnames”}”Œrefids”}”Œnameids”}”(j-  j*  j  j  jJ  jG  j­  jª  j  j  j-  j*  j¥  j¢  jÔ  jÑ  j/  j,  jè  jå  j'  j$  j%  j"  j  j|  j  j  uŒ	nametypes”}”(j-  ‰j  ‰jJ  ‰j­  ‰j  ‰j-  ‰j¥  ‰jÔ  ‰j/  ‰jè  ‰j'  ‰j%  ‰j  ‰j  ‰uh}”(j*  h£j  h·jG  j
  jª  jM  j  jl  j*  j“  j¢  j0  jÑ  j°  j,  j×  jå  jè  j$  jë  j"  j2  j|  j_  j  j‚  uŒfootnote_refs”}”Œcitation_refs”}”Œautofootnotes”]”Œautofootnote_refs”]”Œsymbol_footnotes”]”Œsymbol_footnote_refs”]”Œ	footnotes”]”Œ	citations”]”Œautofootnote_start”KŒsymbol_footnote_start”K Œ
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